/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_iir_lattice_q31.c
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* Description: Q31 IIR lattice filter processing function
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*
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* $Date: 27. January 2017
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* $Revision: V.1.5.1
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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/**
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* @ingroup groupFilters
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*/
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/**
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* @addtogroup IIR_Lattice
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* @{
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*/
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/**
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* @brief Processing function for the Q31 IIR lattice filter.
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* @param[in] *S points to an instance of the Q31 IIR lattice structure.
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* @param[in] *pSrc points to the block of input data.
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* @param[out] *pDst points to the block of output data.
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* @param[in] blockSize number of samples to process.
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* @return none.
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*
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* @details
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* <b>Scaling and Overflow Behavior:</b>
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* \par
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* The function is implemented using an internal 64-bit accumulator.
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* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
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* Thus, if the accumulator result overflows it wraps around rather than clip.
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* In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
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* After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
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*/
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void arm_iir_lattice_q31(
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const arm_iir_lattice_instance_q31 * S,
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q31_t * pSrc,
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q31_t * pDst,
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uint32_t blockSize)
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{
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q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
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q63_t acc; /* Accumlator */
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uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
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q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
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uint32_t numStages = S->numStages; /* number of stages */
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q31_t *pState; /* State pointer */
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q31_t *pStateCurnt; /* State current pointer */
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blkCnt = blockSize;
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pState = &S->pState[0];
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#if defined (ARM_MATH_DSP)
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/* Run the below code for Cortex-M4 and Cortex-M3 */
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/* Sample processing */
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while (blkCnt > 0U)
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{
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/* Read Sample from input buffer */
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/* fN(n) = x(n) */
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fcurr = *pSrc++;
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/* Initialize state read pointer */
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px1 = pState;
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/* Initialize state write pointer */
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px2 = pState;
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/* Set accumulator to zero */
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acc = 0;
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/* Initialize Ladder coeff pointer */
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pv = &S->pvCoeffs[0];
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/* Initialize Reflection coeff pointer */
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pk = &S->pkCoeffs[0];
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/* Process sample for first tap */
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gcurr = *px1++;
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/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
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fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
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/* write gN-1(n-1) into state for next sample processing */
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*px2++ = gnext;
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/* y(n) += gN(n) * vN */
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acc += ((q63_t) gnext * *pv++);
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/* Update f values for next coefficient processing */
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fcurr = fnext;
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/* Loop unrolling. Process 4 taps at a time. */
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tapCnt = (numStages - 1U) >> 2;
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while (tapCnt > 0U)
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{
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/* Process sample for 2nd, 6th .. taps */
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/* Read gN-2(n-1) from state buffer */
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gcurr = *px1++;
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/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
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fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
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/* y(n) += gN-1(n) * vN-1 */
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/* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
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acc += ((q63_t) gnext * *pv++);
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/* write gN-1(n) into state for next sample processing */
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*px2++ = gnext;
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/* Process sample for 3nd, 7th ...taps */
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/* Read gN-3(n-1) from state buffer */
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gcurr = *px1++;
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/* Process sample for 3rd, 7th .. taps */
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/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
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fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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/* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
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/* y(n) += gN-2(n) * vN-2 */
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/* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
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acc += ((q63_t) gnext * *pv++);
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/* write gN-2(n) into state for next sample processing */
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*px2++ = gnext;
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/* Process sample for 4th, 8th ...taps */
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/* Read gN-4(n-1) from state buffer */
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gcurr = *px1++;
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/* Process sample for 4th, 8th .. taps */
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/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
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fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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/* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
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/* y(n) += gN-3(n) * vN-3 */
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/* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
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acc += ((q63_t) gnext * *pv++);
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/* write gN-3(n) into state for next sample processing */
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*px2++ = gnext;
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/* Process sample for 5th, 9th ...taps */
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/* Read gN-5(n-1) from state buffer */
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gcurr = *px1++;
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/* Process sample for 5th, 9th .. taps */
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/* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
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fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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/* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
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/* y(n) += gN-4(n) * vN-4 */
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/* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
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acc += ((q63_t) gnext * *pv++);
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/* write gN-4(n) into state for next sample processing */
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*px2++ = gnext;
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tapCnt--;
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}
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fnext = fcurr;
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/* If the filter length is not a multiple of 4, compute the remaining filter taps */
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tapCnt = (numStages - 1U) % 0x4U;
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while (tapCnt > 0U)
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{
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gcurr = *px1++;
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/* Process sample for last taps */
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fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
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gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
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/* Output samples for last taps */
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acc += ((q63_t) gnext * *pv++);
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*px2++ = gnext;
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fcurr = fnext;
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tapCnt--;
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}
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/* y(n) += g0(n) * v0 */
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acc += (q63_t) fnext *(
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*pv++);
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*px2++ = fnext;
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/* write out into pDst */
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*pDst++ = (q31_t) (acc >> 31U);
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/* Advance the state pointer by 4 to process the next group of 4 samples */
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pState = pState + 1U;
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blkCnt--;
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}
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/* Processing is complete. Now copy last S->numStages samples to start of the buffer
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for the preperation of next frame process */
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/* Points to the start of the state buffer */
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pStateCurnt = &S->pState[0];
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pState = &S->pState[blockSize];
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tapCnt = numStages >> 2U;
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/* copy data */
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while (tapCnt > 0U)
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{
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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*pStateCurnt++ = *pState++;
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/* Decrement the loop counter */
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tapCnt--;
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}
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/* Calculate remaining number of copies */
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tapCnt = (numStages) % 0x4U;
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/* Copy the remaining q31_t data */
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while (tapCnt > 0U)
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{
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*pStateCurnt++ = *pState++;
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/* Decrement the loop counter */
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tapCnt--;
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};
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#else
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/* Run the below code for Cortex-M0 */
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/* Sample processing */
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while (blkCnt > 0U)
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{
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/* Read Sample from input buffer */
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/* fN(n) = x(n) */
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fcurr = *pSrc++;
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/* Initialize state read pointer */
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px1 = pState;
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/* Initialize state write pointer */
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px2 = pState;
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/* Set accumulator to zero */
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acc = 0;
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/* Initialize Ladder coeff pointer */
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pv = &S->pvCoeffs[0];
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/* Initialize Reflection coeff pointer */
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pk = &S->pkCoeffs[0];
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tapCnt = numStages;
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while (tapCnt > 0U)
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{
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gcurr = *px1++;
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/* Process sample */
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/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
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fnext =
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clip_q63_to_q31(((q63_t) fcurr -
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((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
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/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
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gnext =
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clip_q63_to_q31(((q63_t) gcurr +
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((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
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/* Output samples */
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/* y(n) += gN(n) * vN */
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acc += ((q63_t) gnext * *pv++);
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/* write gN-1(n-1) into state for next sample processing */
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*px2++ = gnext;
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/* Update f values for next coefficient processing */
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fcurr = fnext;
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tapCnt--;
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}
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/* y(n) += g0(n) * v0 */
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acc += (q63_t) fnext *(
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*pv++);
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*px2++ = fnext;
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/* write out into pDst */
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*pDst++ = (q31_t) (acc >> 31U);
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/* Advance the state pointer by 1 to process the next group of samples */
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pState = pState + 1U;
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blkCnt--;
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}
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/* Processing is complete. Now copy last S->numStages samples to start of the buffer
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for the preperation of next frame process */
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/* Points to the start of the state buffer */
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pStateCurnt = &S->pState[0];
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pState = &S->pState[blockSize];
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tapCnt = numStages;
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/* Copy the remaining q31_t data */
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while (tapCnt > 0U)
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{
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*pStateCurnt++ = *pState++;
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/* Decrement the loop counter */
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tapCnt--;
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}
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#endif /* #if defined (ARM_MATH_DSP) */
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}
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/**
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* @} end of IIR_Lattice group
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*/
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