/*
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* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: CMSIS NN Library
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* Title: arm_convolve_HWC_q7_fast_nonsquare.c
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* Description: Fast Q7 version of convolution (non-sqaure shape)
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*
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* $Date: 17. January 2018
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* $Revision: V.1.0.0
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*
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* Target Processor: Cortex-M cores
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*
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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#include "arm_nnfunctions.h"
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup NNConv
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* @{
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*/
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/**
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* @brief Fast Q7 convolution function (non-sqaure shape)
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* @param[in] Im_in pointer to input tensor
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* @param[in] dim_im_in_x input tensor dimention x
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* @param[in] dim_im_in_y input tensor dimention y
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* @param[in] ch_im_in number of input tensor channels
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* @param[in] wt pointer to kernel weights
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* @param[in] ch_im_out number of filters, i.e., output tensor channels
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* @param[in] dim_kernel_x filter kernel size x
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* @param[in] dim_kernel_y filter kernel size y
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* @param[in] padding_x padding size x
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* @param[in] padding_y padding size y
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* @param[in] stride_x convolution stride x
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* @param[in] stride_y convolution stride y
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* @param[in] bias pointer to bias
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* @param[in] bias_shift amount of left-shift for bias
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* @param[in] out_shift amount of right-shift for output
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* @param[in,out] Im_out pointer to output tensor
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* @param[in] dim_im_out_x output tensor dimension x
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* @param[in] dim_im_out_y output tensor dimension y
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* @param[in,out] bufferA pointer to buffer space for input
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* @param[in,out] bufferB pointer to buffer space for output
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* @return The function returns either
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* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
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*
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* This function is the version with full list of optimization tricks, but with
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* some contraints:
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* ch_im_in is multiple of 4
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* ch_im_out is multiple of 2
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*/
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arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
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const uint16_t dim_im_in_x,
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const uint16_t dim_im_in_y,
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const uint16_t ch_im_in,
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const q7_t * wt,
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const uint16_t ch_im_out,
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const uint16_t dim_kernel_x,
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const uint16_t dim_kernel_y,
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const uint16_t padding_x,
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const uint16_t padding_y,
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const uint16_t stride_x,
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const uint16_t stride_y,
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const q7_t * bias,
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const uint16_t bias_shift,
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const uint16_t out_shift,
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q7_t * Im_out,
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const uint16_t dim_im_out_x,
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const uint16_t dim_im_out_y,
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q15_t * bufferA,
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q7_t * bufferB)
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{
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#if defined (ARM_MATH_DSP)
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/* Run the following code for Cortex-M4 and Cortex-M7 */
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int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
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/* -----------------------
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* Here we use bufferA as q15_t internally as computation are done with q15_t level
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* im2col are done to output in q15_t format from q7_t input
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*/
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q15_t *pBuffer = bufferA;
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q7_t *pOut = Im_out;
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if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
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{
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/* check if the input dimension meets the constraints */
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return ARM_MATH_SIZE_MISMATCH;
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}
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/*
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* Here we split the entire matrix into three regions depending on the padding situation
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* Top: i_out_y from 0 to padding - 1
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* Middle: i_out_y from padding to dim_im_out-padding-1
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* Bottom: i_out_y from dim_im_out-padding to dim_im_out-1
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*/
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/* top part */
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for (i_out_y = 0; i_out_y < padding_y; i_out_y++)
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{
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for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
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{
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/* This part implements the im2col function */
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for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
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i_ker_y++)
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{
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for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
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i_ker_x++)
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{
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if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
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{
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/* arm_fill_q15(0, pBuffer, ch_im_in); */
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memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
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} else
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{
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arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
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pBuffer, ch_im_in);
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}
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pBuffer += ch_im_in;
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}
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}
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if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
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{
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pOut =
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arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
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bias_shift, out_shift, bias, pOut);
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/* counter reset */
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pBuffer = bufferA;
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}
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}
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}
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/* middle part, here we also divide the x into left, mid and right */
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for (; i_out_y < dim_im_out_y - padding_y; i_out_y++)
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{
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/* left part */
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for (i_out_x = 0; i_out_x < padding_x; i_out_x++)
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{
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/* This part implements the im2col function */
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for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
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i_ker_y++)
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{
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for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
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i_ker_x++)
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{
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if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
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{
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/* arm_fill_q15(0, pBuffer, ch_im_in); */
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memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
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} else
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{
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arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
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pBuffer, ch_im_in);
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}
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pBuffer += ch_im_in;
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}
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}
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if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
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{
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pOut =
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arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
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bias_shift, out_shift, bias, pOut);
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/* counter reset */
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pBuffer = bufferA;
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}
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}
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/* mid part */
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for (; i_out_x < dim_im_out_x - padding_x; i_out_x++)
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{
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/* This part implements the im2col function */
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for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
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i_ker_y++)
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{
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arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in +
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(i_ker_y * dim_im_in_x + i_out_x * stride_x - padding_x) * ch_im_in,
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pBuffer, ch_im_in * dim_kernel_x);
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pBuffer += ch_im_in * dim_kernel_x;
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}
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if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
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{
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pOut =
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arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
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bias_shift, out_shift, bias, pOut);
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/* counter reset */
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pBuffer = bufferA;
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}
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}
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/* right part */
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for (; i_out_x < dim_im_out_x; i_out_x++)
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{
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/* This part implements the im2col function */
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for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
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i_ker_y++)
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{
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for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
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i_ker_x++)
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{
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if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
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{
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/* arm_fill_q15(0, pBuffer, ch_im_in); */
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memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
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} else
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{
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arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
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pBuffer, ch_im_in);
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}
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pBuffer += ch_im_in;
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}
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}
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if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
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{
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pOut =
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arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
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bias_shift, out_shift, bias, pOut);
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/* counter reset */
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pBuffer = bufferA;
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}
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}
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}
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for (; i_out_y < dim_im_out_y; i_out_y++)
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{
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for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
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{
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/* This part implements the im2col function */
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for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
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i_ker_y++)
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{
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for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
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i_ker_x++)
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{
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if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
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{
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/* arm_fill_q15(0, pBuffer, ch_im_in); */
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memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
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} else
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{
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arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
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pBuffer, ch_im_in);
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}
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pBuffer += ch_im_in;
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}
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}
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if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
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{
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pOut =
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arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
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bias_shift, out_shift, bias, pOut);
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/* counter reset */
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pBuffer = bufferA;
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}
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}
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}
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/* check if there is left-over for compute */
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if (pBuffer != bufferA)
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{
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const q7_t *pA = wt;
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int i;
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for (i = 0; i < ch_im_out; i++)
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{
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q31_t sum = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
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q15_t *pB = bufferA;
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/* basically each time it process 4 entries */
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uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
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while (colCnt)
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{
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q31_t inA1, inA2;
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q31_t inB1, inB2;
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pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
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inB1 = *__SIMD32(pB)++;
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sum = __SMLAD(inA1, inB1, sum);
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inB2 = *__SIMD32(pB)++;
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sum = __SMLAD(inA2, inB2, sum);
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colCnt--;
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}
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colCnt = (ch_im_in * dim_kernel_y * dim_kernel_x) & 0x3;
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while (colCnt)
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{
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q7_t inA1 = *pA++;
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q15_t inB1 = *pB++;
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sum += inA1 * inB1;
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colCnt--;
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}
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*pOut = (q7_t) __SSAT((sum >> out_shift), 8);
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pOut++;
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}
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}
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#else
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/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
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int i, j, k, l, m, n;
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int conv_out;
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int in_row, in_col;
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if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
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{
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/* check if the input dimension meets the constraints */
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return ARM_MATH_SIZE_MISMATCH;
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}
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for (i = 0; i < ch_im_out; i++)
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{
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for (j = 0; j < dim_im_out_y; j++)
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{
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for (k = 0; k < dim_im_out_x; k++)
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{
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conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
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for (m = 0; m < dim_kernel_y; m++)
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{
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for (n = 0; n < dim_kernel_x; n++)
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{
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/* if-for implementation */
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in_row = stride_y * j + m - padding_y;
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in_col = stride_x * k + n - padding_x;
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if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
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{
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for (l = 0; l < ch_im_in; l++)
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{
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conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
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wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in + l];
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}
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}
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}
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}
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Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
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}
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}
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}
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#endif /* ARM_MATH_DSP */
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/* Return to application */
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return ARM_MATH_SUCCESS;
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}
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/**
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* @} end of NNConv group
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*/
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