/**
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******************************************************************************
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* @file stm8s_clk.c
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* @author MCD Application Team
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* @version V2.3.0
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* @date 16-June-2017
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* @brief This file contains all the functions for the CLK peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_clk.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private Constants ---------------------------------------------------------*/
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/**
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* @addtogroup CLK_Private_Constants
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* @{
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*/
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CONST uint8_t HSIDivFactor[4] = {1, 2, 4, 8}; /*!< Holds the different HSI Divider factors */
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CONST uint8_t CLKPrescTable[8] = {1, 2, 4, 8, 10, 16, 20, 40}; /*!< Holds the different CLK prescaler values */
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/**
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* @}
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*/
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/* Public functions ----------------------------------------------------------*/
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/**
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* @addtogroup CLK_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the CLK peripheral registers to their default reset
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* values.
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* @param None
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* @retval None
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* @par Warning:
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* Resetting the CCOR register: \n
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* When the CCOEN bit is set, the reset of the CCOR register require
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* two consecutive write instructions in order to reset first the CCOEN bit
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* and the second one is to reset the CCOSEL bits.
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*/
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void CLK_DeInit(void)
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{
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CLK->ICKR = CLK_ICKR_RESET_VALUE;
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CLK->ECKR = CLK_ECKR_RESET_VALUE;
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CLK->SWR = CLK_SWR_RESET_VALUE;
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CLK->SWCR = CLK_SWCR_RESET_VALUE;
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CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
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CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
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CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
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CLK->CSSR = CLK_CSSR_RESET_VALUE;
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CLK->CCOR = CLK_CCOR_RESET_VALUE;
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while ((CLK->CCOR & CLK_CCOR_CCOEN)!= 0)
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{}
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CLK->CCOR = CLK_CCOR_RESET_VALUE;
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CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
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CLK->SWIMCCR = CLK_SWIMCCR_RESET_VALUE;
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}
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/**
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* @brief Configures the High Speed Internal oscillator (HSI).
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* @par Full description:
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* If CLK_FastHaltWakeup is enabled, HSI oscillator is automatically
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* switched-on (HSIEN=1) and selected as next clock master
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* (CKM=SWI=HSI) when resuming from HALT/ActiveHalt modes.\n
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* @param NewState this parameter is the Wake-up Mode state.
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* @retval None
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*/
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void CLK_FastHaltWakeUpCmd(FunctionalState NewState)
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{
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/* check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set FHWU bit (HSI oscillator is automatically switched-on) */
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CLK->ICKR |= CLK_ICKR_FHWU;
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}
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else /* FastHaltWakeup = DISABLE */
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{
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/* Reset FHWU bit */
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_FHWU);
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}
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}
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/**
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* @brief Enable or Disable the External High Speed oscillator (HSE).
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* @param NewState new state of HSEEN, value accepted ENABLE, DISABLE.
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* @retval None
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*/
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void CLK_HSECmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set HSEEN bit */
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CLK->ECKR |= CLK_ECKR_HSEEN;
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}
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else
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{
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/* Reset HSEEN bit */
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CLK->ECKR &= (uint8_t)(~CLK_ECKR_HSEEN);
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}
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}
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/**
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* @brief Enables or disables the Internal High Speed oscillator (HSI).
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* @param NewState new state of HSIEN, value accepted ENABLE, DISABLE.
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* @retval None
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*/
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void CLK_HSICmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set HSIEN bit */
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CLK->ICKR |= CLK_ICKR_HSIEN;
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}
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else
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{
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/* Reset HSIEN bit */
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_HSIEN);
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}
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}
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/**
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* @brief Enables or disables the Internal Low Speed oscillator (LSI).
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* @param NewState new state of LSIEN, value accepted ENABLE, DISABLE.
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* @note Before using the LSI clock you have to enable the option bytes (LSI_EN option bit is set).
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* @retval None
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*/
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void CLK_LSICmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set LSIEN bit */
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CLK->ICKR |= CLK_ICKR_LSIEN;
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}
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else
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{
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/* Reset LSIEN bit */
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_LSIEN);
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}
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}
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/**
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* @brief Enables or disablle the Configurable Clock Output (CCO).
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* @param NewState : New state of CCEN bit (CCO register).
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void CLK_CCOCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set CCOEN bit */
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CLK->CCOR |= CLK_CCOR_CCOEN;
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}
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else
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{
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/* Reset CCOEN bit */
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CLK->CCOR &= (uint8_t)(~CLK_CCOR_CCOEN);
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}
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}
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/**
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* @brief Starts or Stops manually the clock switch execution.
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* @par Full description:
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* NewState parameter set the SWEN.
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* @param NewState new state of SWEN, value accepted ENABLE, DISABLE.
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* @retval None
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*/
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void CLK_ClockSwitchCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE )
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{
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/* Enable the Clock Switch */
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CLK->SWCR |= CLK_SWCR_SWEN;
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}
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else
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{
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/* Disable the Clock Switch */
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CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
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}
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}
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/**
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* @brief Configures the slow active halt wake up
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* @param NewState: specifies the Slow Active Halt wake up state.
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* can be set of the following values:
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* - DISABLE: Slow Active Halt mode disabled;
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* - ENABLE: Slow Active Halt mode enabled.
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* @retval None
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*/
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void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState)
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{
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/* check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Set S_ACTHALT bit */
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CLK->ICKR |= CLK_ICKR_SWUAH;
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}
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else
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{
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/* Reset S_ACTHALT bit */
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_SWUAH);
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}
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}
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/**
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* @brief Enables or disables the specified peripheral CLK.
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* @param CLK_Peripheral : This parameter specifies the peripheral clock to gate.
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* This parameter can be any of the @ref CLK_Peripheral_TypeDef enumeration.
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* @param NewState : New state of specified peripheral clock.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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assert_param(IS_CLK_PERIPHERAL_OK(CLK_Peripheral));
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if (((uint8_t)CLK_Peripheral & (uint8_t)0x10) == 0x00)
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{
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if (NewState != DISABLE)
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{
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/* Enable the peripheral Clock */
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CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
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}
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else
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{
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/* Disable the peripheral Clock */
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CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
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}
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}
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else
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{
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if (NewState != DISABLE)
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{
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/* Enable the peripheral Clock */
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CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
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}
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else
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{
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/* Disable the peripheral Clock */
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CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
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}
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}
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}
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/**
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* @brief configures the Switch from one clock to another
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* @param CLK_SwitchMode select the clock switch mode.
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* It can be set of the values of @ref CLK_SwitchMode_TypeDef
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* @param CLK_NewClock choice of the future clock.
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* It can be set of the values of @ref CLK_Source_TypeDef
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* @param ITState Enable or Disable the Clock Switch interrupt.
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* @param CLK_CurrentClockState current clock to switch OFF or to keep ON.
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* It can be set of the values of @ref CLK_CurrentClockState_TypeDef
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* @note LSI selected as master clock source only if LSI_EN option bit is set.
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* @retval ErrorStatus this shows the clock switch status (ERROR/SUCCESS).
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*/
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ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState)
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{
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CLK_Source_TypeDef clock_master;
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uint16_t DownCounter = CLK_TIMEOUT;
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ErrorStatus Swif = ERROR;
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/* Check the parameters */
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assert_param(IS_CLK_SOURCE_OK(CLK_NewClock));
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assert_param(IS_CLK_SWITCHMODE_OK(CLK_SwitchMode));
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assert_param(IS_FUNCTIONALSTATE_OK(ITState));
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assert_param(IS_CLK_CURRENTCLOCKSTATE_OK(CLK_CurrentClockState));
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/* Current clock master saving */
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clock_master = (CLK_Source_TypeDef)CLK->CMSR;
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/* Automatic switch mode management */
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if (CLK_SwitchMode == CLK_SWITCHMODE_AUTO)
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{
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/* Enables Clock switch */
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CLK->SWCR |= CLK_SWCR_SWEN;
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/* Enables or Disables Switch interrupt */
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if (ITState != DISABLE)
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{
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CLK->SWCR |= CLK_SWCR_SWIEN;
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}
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else
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{
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CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
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}
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/* Selection of the target clock source */
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CLK->SWR = (uint8_t)CLK_NewClock;
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/* Wait until the target clock source is ready */
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while((((CLK->SWCR & CLK_SWCR_SWBSY) != 0 )&& (DownCounter != 0)))
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{
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DownCounter--;
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}
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if(DownCounter != 0)
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{
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Swif = SUCCESS;
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}
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else
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{
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Swif = ERROR;
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}
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}
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else /* CLK_SwitchMode == CLK_SWITCHMODE_MANUAL */
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{
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/* Enables or Disables Switch interrupt if required */
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if (ITState != DISABLE)
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{
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CLK->SWCR |= CLK_SWCR_SWIEN;
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}
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else
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{
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CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
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}
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/* Selection of the target clock source */
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CLK->SWR = (uint8_t)CLK_NewClock;
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/* Wait until the target clock source is ready */
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while((((CLK->SWCR & CLK_SWCR_SWIF) != 0 ) && (DownCounter != 0)))
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{
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DownCounter--;
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}
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if(DownCounter != 0)
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{
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/* Enables Clock switch */
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CLK->SWCR |= CLK_SWCR_SWEN;
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Swif = SUCCESS;
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}
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else
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{
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Swif = ERROR;
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}
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}
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if(Swif != ERROR)
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{
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/* Switch OFF current clock if required */
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if((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSI))
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{
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_HSIEN);
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}
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else if((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_LSI))
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{
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CLK->ICKR &= (uint8_t)(~CLK_ICKR_LSIEN);
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}
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else if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSE))
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{
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CLK->ECKR &= (uint8_t)(~CLK_ECKR_HSEEN);
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}
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}
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return(Swif);
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}
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/**
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* @brief Configures the HSI clock dividers.
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* @param HSIPrescaler : Specifies the HSI clock divider to apply.
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* This parameter can be any of the @ref CLK_Prescaler_TypeDef enumeration.
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* @retval None
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*/
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void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler)
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{
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/* check the parameters */
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assert_param(IS_CLK_HSIPRESCALER_OK(HSIPrescaler));
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/* Clear High speed internal clock prescaler */
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CLK->CKDIVR &= (uint8_t)(~CLK_CKDIVR_HSIDIV);
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/* Set High speed internal clock prescaler */
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CLK->CKDIVR |= (uint8_t)HSIPrescaler;
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}
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/**
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* @brief Output the selected clock on a dedicated I/O pin.
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* @param CLK_CCO : Specifies the clock source.
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* This parameter can be any of the @ref CLK_Output_TypeDef enumeration.
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* @retval None
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* @par Required preconditions:
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* The dedicated I/O pin must be set at 1 in the corresponding Px_CR1 register \n
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* to be set as input with pull-up or push-pull output.
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*/
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void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO)
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{
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/* check the parameters */
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assert_param(IS_CLK_OUTPUT_OK(CLK_CCO));
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/* Clears of the CCO type bits part */
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CLK->CCOR &= (uint8_t)(~CLK_CCOR_CCOSEL);
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/* Selects the source provided on cco_ck output */
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CLK->CCOR |= (uint8_t)CLK_CCO;
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/* Enable the clock output */
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CLK->CCOR |= CLK_CCOR_CCOEN;
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}
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/**
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* @brief Enables or disables the specified CLK interrupts.
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* @param CLK_IT This parameter specifies the interrupt sources.
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* It can be one of the values of @ref CLK_IT_TypeDef.
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* @param NewState New state of the Interrupt.
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* Value accepted ENABLE, DISABLE.
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* @retval None
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*/
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void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
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{
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/* check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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assert_param(IS_CLK_IT_OK(CLK_IT));
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if (NewState != DISABLE)
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{
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switch (CLK_IT)
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{
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case CLK_IT_SWIF: /* Enable the clock switch interrupt */
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CLK->SWCR |= CLK_SWCR_SWIEN;
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break;
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case CLK_IT_CSSD: /* Enable the clock security system detection interrupt */
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CLK->CSSR |= CLK_CSSR_CSSDIE;
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break;
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default:
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break;
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}
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}
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else /*(NewState == DISABLE)*/
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{
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switch (CLK_IT)
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{
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case CLK_IT_SWIF: /* Disable the clock switch interrupt */
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CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
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break;
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case CLK_IT_CSSD: /* Disable the clock security system detection interrupt */
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CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
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break;
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default:
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break;
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}
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}
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}
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/**
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* @brief Configures the HSI and CPU clock dividers.
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* @param CLK_Prescaler Specifies the HSI or CPU clock divider to apply.
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* @retval None
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*/
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void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler)
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{
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/* check the parameters */
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assert_param(IS_CLK_PRESCALER_OK(CLK_Prescaler));
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if (((uint8_t)CLK_Prescaler & (uint8_t)0x80) == 0x00) /* Bit7 = 0 means HSI divider */
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{
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CLK->CKDIVR &= (uint8_t)(~CLK_CKDIVR_HSIDIV);
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CLK->CKDIVR |= (uint8_t)((uint8_t)CLK_Prescaler & (uint8_t)CLK_CKDIVR_HSIDIV);
|
}
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else /* Bit7 = 1 means CPU divider */
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{
|
CLK->CKDIVR &= (uint8_t)(~CLK_CKDIVR_CPUDIV);
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CLK->CKDIVR |= (uint8_t)((uint8_t)CLK_Prescaler & (uint8_t)CLK_CKDIVR_CPUDIV);
|
}
|
}
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/**
|
* @brief Configures the SWIM clock frequency on the fly.
|
* @param CLK_SWIMDivider Specifies the SWIM clock divider to apply.
|
* can be one of the value of @ref CLK_SWIMDivider_TypeDef
|
* @retval None
|
*/
|
void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider)
|
{
|
/* check the parameters */
|
assert_param(IS_CLK_SWIMDIVIDER_OK(CLK_SWIMDivider));
|
|
if (CLK_SWIMDivider != CLK_SWIMDIVIDER_2)
|
{
|
/* SWIM clock is not divided by 2 */
|
CLK->SWIMCCR |= CLK_SWIMCCR_SWIMDIV;
|
}
|
else /* CLK_SWIMDivider == CLK_SWIMDIVIDER_2 */
|
{
|
/* SWIM clock is divided by 2 */
|
CLK->SWIMCCR &= (uint8_t)(~CLK_SWIMCCR_SWIMDIV);
|
}
|
}
|
|
/**
|
* @brief Enables the Clock Security System.
|
* @par Full description:
|
* once CSS is enabled it cannot be disabled until the next reset.
|
* @param None
|
* @retval None
|
*/
|
void CLK_ClockSecuritySystemEnable(void)
|
{
|
/* Set CSSEN bit */
|
CLK->CSSR |= CLK_CSSR_CSSEN;
|
}
|
|
/**
|
* @brief Returns the clock source used as system clock.
|
* @param None
|
* @retval Clock source used.
|
* can be one of the values of @ref CLK_Source_TypeDef
|
*/
|
CLK_Source_TypeDef CLK_GetSYSCLKSource(void)
|
{
|
return((CLK_Source_TypeDef)CLK->CMSR);
|
}
|
|
/**
|
* @brief This function returns the frequencies of different on chip clocks.
|
* @param None
|
* @retval the master clock frequency
|
*/
|
uint32_t CLK_GetClockFreq(void)
|
{
|
uint32_t clockfrequency = 0;
|
CLK_Source_TypeDef clocksource = CLK_SOURCE_HSI;
|
uint8_t tmp = 0, presc = 0;
|
|
/* Get CLK source. */
|
clocksource = (CLK_Source_TypeDef)CLK->CMSR;
|
|
if (clocksource == CLK_SOURCE_HSI)
|
{
|
tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_HSIDIV);
|
tmp = (uint8_t)(tmp >> 3);
|
presc = HSIDivFactor[tmp];
|
clockfrequency = HSI_VALUE / presc;
|
}
|
else if ( clocksource == CLK_SOURCE_LSI)
|
{
|
clockfrequency = LSI_VALUE;
|
}
|
else
|
{
|
clockfrequency = HSE_VALUE;
|
}
|
|
return((uint32_t)clockfrequency);
|
}
|
|
/**
|
* @brief Adjusts the Internal High Speed oscillator (HSI) calibration value.
|
* @par Full description:
|
* @param CLK_HSICalibrationValue calibration trimming value.
|
* can be one of the values of @ref CLK_HSITrimValue_TypeDef
|
* @retval None
|
*/
|
void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue)
|
{
|
/* check the parameters */
|
assert_param(IS_CLK_HSITRIMVALUE_OK(CLK_HSICalibrationValue));
|
|
/* Store the new value */
|
CLK->HSITRIMR = (uint8_t)( (uint8_t)(CLK->HSITRIMR & (uint8_t)(~CLK_HSITRIMR_HSITRIM))|((uint8_t)CLK_HSICalibrationValue));
|
}
|
|
/**
|
* @brief Reset the SWBSY flag (SWICR Register)
|
* @par Full description:
|
* This function reset SWBSY flag in order to reset clock switch operations (target
|
* oscillator is broken, stabilization is longing too much, etc.). If at the same time \n
|
* software attempts to set SWEN and clear SWBSY, SWBSY action takes precedence.
|
* @param None
|
* @retval None
|
*/
|
void CLK_SYSCLKEmergencyClear(void)
|
{
|
CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWBSY);
|
}
|
|
/**
|
* @brief Checks whether the specified CLK flag is set or not.
|
* @par Full description:
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* @param CLK_FLAG Flag to check.
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* can be one of the values of @ref CLK_Flag_TypeDef
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* @retval FlagStatus, status of the checked flag
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*/
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FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG)
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{
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uint16_t statusreg = 0;
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uint8_t tmpreg = 0;
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FlagStatus bitstatus = RESET;
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/* check the parameters */
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assert_param(IS_CLK_FLAG_OK(CLK_FLAG));
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/* Get the CLK register index */
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statusreg = (uint16_t)((uint16_t)CLK_FLAG & (uint16_t)0xFF00);
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if (statusreg == 0x0100) /* The flag to check is in ICKRregister */
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{
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tmpreg = CLK->ICKR;
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}
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else if (statusreg == 0x0200) /* The flag to check is in ECKRregister */
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{
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tmpreg = CLK->ECKR;
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}
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else if (statusreg == 0x0300) /* The flag to check is in SWIC register */
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{
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tmpreg = CLK->SWCR;
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}
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else if (statusreg == 0x0400) /* The flag to check is in CSS register */
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{
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tmpreg = CLK->CSSR;
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}
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else /* The flag to check is in CCO register */
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{
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tmpreg = CLK->CCOR;
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}
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if ((tmpreg & (uint8_t)CLK_FLAG) != (uint8_t)RESET)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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/* Return the flag status */
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return((FlagStatus)bitstatus);
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}
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/**
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* @brief Checks whether the specified CLK interrupt has is enabled or not.
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* @param CLK_IT specifies the CLK interrupt.
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* can be one of the values of @ref CLK_IT_TypeDef
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* @retval ITStatus, new state of CLK_IT (SET or RESET).
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*/
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ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
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{
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ITStatus bitstatus = RESET;
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/* check the parameters */
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assert_param(IS_CLK_IT_OK(CLK_IT));
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if (CLK_IT == CLK_IT_SWIF)
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{
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/* Check the status of the clock switch interrupt */
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if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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}
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else /* CLK_IT == CLK_IT_CSSDIE */
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{
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/* Check the status of the security system detection interrupt */
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if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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}
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/* Return the CLK_IT status */
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return bitstatus;
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}
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/**
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* @brief Clears the CLKs interrupt pending bits.
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* @param CLK_IT specifies the interrupt pending bits.
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* can be one of the values of @ref CLK_IT_TypeDef
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* @retval None
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*/
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void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
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{
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/* check the parameters */
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assert_param(IS_CLK_IT_OK(CLK_IT));
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if (CLK_IT == (uint8_t)CLK_IT_CSSD)
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{
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/* Clear the status of the security system detection interrupt */
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CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSD);
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}
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else /* CLK_PendingBit == (uint8_t)CLK_IT_SWIF */
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{
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/* Clear the status of the clock switch interrupt */
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CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
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}
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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