/**
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********************************************************************************
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* @file stm8s_uart1.c
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* @author MCD Application Team
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* @version V2.3.0
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* @date 16-June-2017
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* @brief This file contains all the functions for the UART1 peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_uart1.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/* Public functions ----------------------------------------------------------*/
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/**
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* @addtogroup UART1_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the UART peripheral.
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* @param None
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* @retval None
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*/
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void UART1_DeInit(void)
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{
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/* Clear the Idle Line Detected bit in the status register by a read
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to the UART1_SR register followed by a Read to the UART1_DR register */
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(void)UART1->SR;
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(void)UART1->DR;
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UART1->BRR2 = UART1_BRR2_RESET_VALUE; /* Set UART1_BRR2 to reset value 0x00 */
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UART1->BRR1 = UART1_BRR1_RESET_VALUE; /* Set UART1_BRR1 to reset value 0x00 */
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UART1->CR1 = UART1_CR1_RESET_VALUE; /* Set UART1_CR1 to reset value 0x00 */
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UART1->CR2 = UART1_CR2_RESET_VALUE; /* Set UART1_CR2 to reset value 0x00 */
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UART1->CR3 = UART1_CR3_RESET_VALUE; /* Set UART1_CR3 to reset value 0x00 */
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UART1->CR4 = UART1_CR4_RESET_VALUE; /* Set UART1_CR4 to reset value 0x00 */
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UART1->CR5 = UART1_CR5_RESET_VALUE; /* Set UART1_CR5 to reset value 0x00 */
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UART1->GTR = UART1_GTR_RESET_VALUE;
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UART1->PSCR = UART1_PSCR_RESET_VALUE;
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}
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/**
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* @brief Initializes the UART1 according to the specified parameters.
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* @note Configure in Push Pull or Open Drain mode the Tx pin by setting the
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* correct I/O Port register according the product package and line
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* configuration
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* @param BaudRate: The baudrate.
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* @param WordLength : This parameter can be any of the
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* @ref UART1_WordLength_TypeDef enumeration.
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* @param StopBits: This parameter can be any of the
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* @ref UART1_StopBits_TypeDef enumeration.
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* @param Parity: This parameter can be any of the
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* @ref UART1_Parity_TypeDef enumeration.
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* @param SyncMode: This parameter can be any of the
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* @ref UART1_SyncMode_TypeDef values.
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* @param Mode: This parameter can be any of the @ref UART1_Mode_TypeDef values
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* @retval None
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*/
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void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength,
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UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity,
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UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode)
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{
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uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0;
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/* Check the parameters */
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assert_param(IS_UART1_BAUDRATE_OK(BaudRate));
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assert_param(IS_UART1_WORDLENGTH_OK(WordLength));
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assert_param(IS_UART1_STOPBITS_OK(StopBits));
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assert_param(IS_UART1_PARITY_OK(Parity));
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assert_param(IS_UART1_MODE_OK((uint8_t)Mode));
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assert_param(IS_UART1_SYNCMODE_OK((uint8_t)SyncMode));
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/* Clear the word length bit */
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UART1->CR1 &= (uint8_t)(~UART1_CR1_M);
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/* Set the word length bit according to UART1_WordLength value */
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UART1->CR1 |= (uint8_t)WordLength;
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/* Clear the STOP bits */
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UART1->CR3 &= (uint8_t)(~UART1_CR3_STOP);
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/* Set the STOP bits number according to UART1_StopBits value */
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UART1->CR3 |= (uint8_t)StopBits;
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/* Clear the Parity Control bit */
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UART1->CR1 &= (uint8_t)(~(UART1_CR1_PCEN | UART1_CR1_PS ));
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/* Set the Parity Control bit to UART1_Parity value */
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UART1->CR1 |= (uint8_t)Parity;
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/* Clear the LSB mantissa of UART1DIV */
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UART1->BRR1 &= (uint8_t)(~UART1_BRR1_DIVM);
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/* Clear the MSB mantissa of UART1DIV */
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UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVM);
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/* Clear the Fraction bits of UART1DIV */
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UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVF);
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/* Set the UART1 BaudRates in BRR1 and BRR2 registers according to UART1_BaudRate value */
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BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4));
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BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4));
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/* Set the fraction of UART1DIV */
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UART1->BRR2 |= (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100)) << 4) / 100) & (uint8_t)0x0F);
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/* Set the MSB mantissa of UART1DIV */
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UART1->BRR2 |= (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0);
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/* Set the LSB mantissa of UART1DIV */
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UART1->BRR1 |= (uint8_t)BaudRate_Mantissa;
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/* Disable the Transmitter and Receiver before setting the LBCL, CPOL and CPHA bits */
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UART1->CR2 &= (uint8_t)~(UART1_CR2_TEN | UART1_CR2_REN);
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/* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */
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UART1->CR3 &= (uint8_t)~(UART1_CR3_CPOL | UART1_CR3_CPHA | UART1_CR3_LBCL);
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/* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */
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UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & (uint8_t)(UART1_CR3_CPOL |
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UART1_CR3_CPHA | UART1_CR3_LBCL));
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if ((uint8_t)(Mode & UART1_MODE_TX_ENABLE))
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{
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/* Set the Transmitter Enable bit */
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UART1->CR2 |= (uint8_t)UART1_CR2_TEN;
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}
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else
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{
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/* Clear the Transmitter Disable bit */
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UART1->CR2 &= (uint8_t)(~UART1_CR2_TEN);
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}
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if ((uint8_t)(Mode & UART1_MODE_RX_ENABLE))
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{
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/* Set the Receiver Enable bit */
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UART1->CR2 |= (uint8_t)UART1_CR2_REN;
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}
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else
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{
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/* Clear the Receiver Disable bit */
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UART1->CR2 &= (uint8_t)(~UART1_CR2_REN);
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}
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/* Set the Clock Enable bit, lock Polarity, lock Phase and Last Bit Clock
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pulse bits according to UART1_Mode value */
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if ((uint8_t)(SyncMode & UART1_SYNCMODE_CLOCK_DISABLE))
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{
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/* Clear the Clock Enable bit */
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UART1->CR3 &= (uint8_t)(~UART1_CR3_CKEN);
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}
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else
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{
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UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & UART1_CR3_CKEN);
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}
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}
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/**
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* @brief Enable the UART1 peripheral.
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* @param NewState : The new state of the UART Communication.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void UART1_Cmd(FunctionalState NewState)
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{
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if (NewState != DISABLE)
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{
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/* UART1 Enable */
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UART1->CR1 &= (uint8_t)(~UART1_CR1_UARTD);
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}
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else
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{
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/* UART Disable */
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UART1->CR1 |= UART1_CR1_UARTD;
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}
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}
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/**
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* @brief Enables or disables the specified USART interrupts.
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* @param UART1_IT specifies the USART interrupt sources to be enabled or disabled.
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* This parameter can be one of the following values:
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* - UART1_IT_TXE: Transmit Data Register empty interrupt
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* - UART1_IT_TC: Transmission complete interrupt
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* - UART1_IT_RXNE_OR: Receive Data register not empty and Overrun interrupt
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* - UART1_IT_IDLE: Idle line detection interrupt
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* - USRT1_IT_ERR: Error interrupt
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* @param NewState new state of the specified USART interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState)
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{
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uint8_t uartreg = 0, itpos = 0x00;
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/* Check the parameters */
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assert_param(IS_UART1_CONFIG_IT_OK(UART1_IT));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Get the UART1 register index */
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uartreg = (uint8_t)((uint16_t)UART1_IT >> 0x08);
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/* Get the UART1 IT index */
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itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
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if (NewState != DISABLE)
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{
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/**< Enable the Interrupt bits according to UART1_IT mask */
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if (uartreg == 0x01)
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{
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UART1->CR1 |= itpos;
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}
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else if (uartreg == 0x02)
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{
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UART1->CR2 |= itpos;
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}
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else
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{
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UART1->CR4 |= itpos;
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}
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}
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else
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{
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/**< Disable the interrupt bits according to UART1_IT mask */
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if (uartreg == 0x01)
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{
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UART1->CR1 &= (uint8_t)(~itpos);
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}
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else if (uartreg == 0x02)
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{
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UART1->CR2 &= (uint8_t)(~itpos);
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}
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else
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{
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UART1->CR4 &= (uint8_t)(~itpos);
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}
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}
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}
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/**
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* @brief Enables or disables the UARTs Half Duplex communication.
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* @param NewState new state of the UART Communication.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_HalfDuplexCmd(FunctionalState NewState)
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{
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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UART1->CR5 |= UART1_CR5_HDSEL; /**< UART1 Half Duplex Enable */
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}
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else
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{
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UART1->CR5 &= (uint8_t)~UART1_CR5_HDSEL; /**< UART1 Half Duplex Disable */
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}
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}
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/**
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* @brief Configures the UARTs IrDA interface.
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* @param UART1_IrDAMode specifies the IrDA mode.
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* This parameter can be any of the @ref UART1_IrDAMode_TypeDef values.
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* @retval None
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*/
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void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode)
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{
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assert_param(IS_UART1_IRDAMODE_OK(UART1_IrDAMode));
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if (UART1_IrDAMode != UART1_IRDAMODE_NORMAL)
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{
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UART1->CR5 |= UART1_CR5_IRLP;
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}
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else
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{
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UART1->CR5 &= ((uint8_t)~UART1_CR5_IRLP);
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}
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}
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/**
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* @brief Enables or disables the UARTs IrDA interface.
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* @param NewState new state of the IrDA mode.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_IrDACmd(FunctionalState NewState)
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{
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/* Check parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the IrDA mode by setting the IREN bit in the CR3 register */
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UART1->CR5 |= UART1_CR5_IREN;
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}
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else
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{
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/* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
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UART1->CR5 &= ((uint8_t)~UART1_CR5_IREN);
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}
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}
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/**
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* @brief Sets the UART1 LIN Break detection length.
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* @param UART1_LINBreakDetectionLength specifies the LIN break detection length.
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* This parameter can be any of the
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* @ref UART1_LINBreakDetectionLength_TypeDef values.
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* @retval None
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*/
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void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength)
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{
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assert_param(IS_UART1_LINBREAKDETECTIONLENGTH_OK(UART1_LINBreakDetectionLength));
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if (UART1_LINBreakDetectionLength != UART1_LINBREAKDETECTIONLENGTH_10BITS)
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{
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UART1->CR4 |= UART1_CR4_LBDL;
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}
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else
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{
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UART1->CR4 &= ((uint8_t)~UART1_CR4_LBDL);
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}
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}
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/**
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* @brief Enables or disables the UART1s LIN mode.
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* @param NewState is new state of the UART1 LIN mode.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_LINCmd(FunctionalState NewState)
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{
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the LIN mode by setting the LINE bit in the CR2 register */
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UART1->CR3 |= UART1_CR3_LINEN;
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}
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else
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{
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/* Disable the LIN mode by clearing the LINE bit in the CR2 register */
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UART1->CR3 &= ((uint8_t)~UART1_CR3_LINEN);
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}
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}
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/**
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* @brief Enables or disables the UART1 Smart Card mode.
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* @param NewState: new state of the Smart Card mode.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_SmartCardCmd(FunctionalState NewState)
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{
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the SC mode by setting the SCEN bit in the CR5 register */
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UART1->CR5 |= UART1_CR5_SCEN;
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}
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else
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{
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/* Disable the SC mode by clearing the SCEN bit in the CR5 register */
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UART1->CR5 &= ((uint8_t)(~UART1_CR5_SCEN));
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}
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}
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/**
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* @brief Enables or disables NACK transmission.
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* @note This function is valid only for UART1 because is related to SmartCard mode.
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* @param NewState: new state of the Smart Card mode.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_SmartCardNACKCmd(FunctionalState NewState)
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{
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the NACK transmission by setting the NACK bit in the CR5 register */
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UART1->CR5 |= UART1_CR5_NACK;
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}
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else
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{
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/* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
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UART1->CR5 &= ((uint8_t)~(UART1_CR5_NACK));
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}
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}
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/**
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* @brief Selects the UART1 WakeUp method.
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* @param UART1_WakeUp: specifies the UART1 wakeup method.
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* This parameter can be any of the @ref UART1_WakeUp_TypeDef values.
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* @retval None
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*/
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void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp)
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{
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assert_param(IS_UART1_WAKEUP_OK(UART1_WakeUp));
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UART1->CR1 &= ((uint8_t)~UART1_CR1_WAKE);
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UART1->CR1 |= (uint8_t)UART1_WakeUp;
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}
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/**
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* @brief Determines if the UART1 is in mute mode or not.
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* @param NewState: new state of the UART1 mode.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART1_ReceiverWakeUpCmd(FunctionalState NewState)
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{
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the mute mode UART1 by setting the RWU bit in the CR2 register */
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UART1->CR2 |= UART1_CR2_RWU;
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}
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else
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{
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/* Disable the mute mode UART1 by clearing the RWU bit in the CR1 register */
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UART1->CR2 &= ((uint8_t)~UART1_CR2_RWU);
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}
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}
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/**
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* @brief Returns the most recent received data by the UART1 peripheral.
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* @param None
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* @retval The received data.
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*/
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uint8_t UART1_ReceiveData8(void)
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{
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return ((uint8_t)UART1->DR);
|
}
|
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/**
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* @brief Returns the most recent received data by the UART1 peripheral.
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* @param None
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* @retval The received data.
|
*/
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uint16_t UART1_ReceiveData9(void)
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{
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uint16_t temp = 0;
|
|
temp = (uint16_t)(((uint16_t)( (uint16_t)UART1->CR1 & (uint16_t)UART1_CR1_R8)) << 1);
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return (uint16_t)( (((uint16_t) UART1->DR) | temp ) & ((uint16_t)0x01FF));
|
}
|
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/**
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* @brief Transmits 8 bit data through the UART1 peripheral.
|
* @param Data: The data to transmit.
|
* @retval None
|
*/
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void UART1_SendData8(uint8_t Data)
|
{
|
/* Transmit Data */
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UART1->DR = Data;
|
}
|
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/**
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* @brief Transmits 9 bit data through the UART peripheral.
|
* @param Data : The data to transmit.
|
* This parameter should be lower than 0x1FF.
|
* @retval None
|
*/
|
void UART1_SendData9(uint16_t Data)
|
{
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/**< Clear the transmit data bit 8 [8] */
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UART1->CR1 &= ((uint8_t)~UART1_CR1_T8);
|
/**< Write the transmit data bit [8] */
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UART1->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART1_CR1_T8);
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/**< Write the transmit data bit [0:7] */
|
UART1->DR = (uint8_t)(Data);
|
}
|
|
/**
|
* @brief Transmits break characters.
|
* @param None
|
* @retval None
|
*/
|
void UART1_SendBreak(void)
|
{
|
UART1->CR2 |= UART1_CR2_SBK;
|
}
|
|
/**
|
* @brief Sets the address of the UART1 node.
|
* @param UART1_Address: Indicates the address of the UART1 node.
|
* @retval None
|
*/
|
void UART1_SetAddress(uint8_t UART1_Address)
|
{
|
/*assert_param for UART1_Address*/
|
assert_param(IS_UART1_ADDRESS_OK(UART1_Address));
|
|
/* Clear the UART1 address */
|
UART1->CR4 &= ((uint8_t)~UART1_CR4_ADD);
|
/* Set the UART1 address node */
|
UART1->CR4 |= UART1_Address;
|
}
|
|
/**
|
* @brief Sets the specified UART guard time.
|
* @note SmartCard Mode should be Enabled
|
* @param UART1_GuardTime: specifies the guard time.
|
* @retval None
|
*/
|
void UART1_SetGuardTime(uint8_t UART1_GuardTime)
|
{
|
/* Set the UART1 guard time */
|
UART1->GTR = UART1_GuardTime;
|
}
|
|
/**
|
* @brief Sets the system clock prescaler.
|
* @note IrDA Low Power mode or smartcard mode should be enabled
|
* @note This function is related to SmartCard and IrDa mode.
|
* @param UART1_Prescaler: specifies the prescaler clock.
|
* This parameter can be one of the following values:
|
* @par IrDA Low Power Mode
|
* The clock source is divided by the value given in the register (8 bits)
|
* - 0000 0000 Reserved
|
* - 0000 0001 divides the clock source by 1
|
* - 0000 0010 divides the clock source by 2
|
* - ...
|
* @par Smart Card Mode
|
* The clock source is divided by the value given in the register
|
* (5 significant bits) multiplied by 2
|
* - 0 0000 Reserved
|
* - 0 0001 divides the clock source by 2
|
* - 0 0010 divides the clock source by 4
|
* - 0 0011 divides the clock source by 6
|
* - ...
|
* @retval None
|
*/
|
void UART1_SetPrescaler(uint8_t UART1_Prescaler)
|
{
|
/* Load the UART1 prescaler value*/
|
UART1->PSCR = UART1_Prescaler;
|
}
|
|
/**
|
* @brief Checks whether the specified UART1 flag is set or not.
|
* @param UART1_FLAG specifies the flag to check.
|
* This parameter can be any of the @ref UART1_Flag_TypeDef enumeration.
|
* @retval FlagStatus (SET or RESET)
|
*/
|
FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG)
|
{
|
FlagStatus status = RESET;
|
|
/* Check parameters */
|
assert_param(IS_UART1_FLAG_OK(UART1_FLAG));
|
|
|
/* Check the status of the specified UART1 flag*/
|
if (UART1_FLAG == UART1_FLAG_LBDF)
|
{
|
if ((UART1->CR4 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
|
{
|
/* UART1_FLAG is set*/
|
status = SET;
|
}
|
else
|
{
|
/* UART1_FLAG is reset*/
|
status = RESET;
|
}
|
}
|
else if (UART1_FLAG == UART1_FLAG_SBK)
|
{
|
if ((UART1->CR2 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
|
{
|
/* UART1_FLAG is set*/
|
status = SET;
|
}
|
else
|
{
|
/* UART1_FLAG is reset*/
|
status = RESET;
|
}
|
}
|
else
|
{
|
if ((UART1->SR & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
|
{
|
/* UART1_FLAG is set*/
|
status = SET;
|
}
|
else
|
{
|
/* UART1_FLAG is reset*/
|
status = RESET;
|
}
|
}
|
/* Return the UART1_FLAG status*/
|
return status;
|
}
|
|
/**
|
* @brief Clears the UART1 flags.
|
* @param UART1_FLAG specifies the flag to clear
|
* This parameter can be any combination of the following values:
|
* - UART1_FLAG_LBDF: LIN Break detection flag.
|
* - UART1_FLAG_RXNE: Receive data register not empty flag.
|
* @note
|
* - PE (Parity error), FE (Framing error), NE (Noise error),
|
* OR (OverRun error) and IDLE (Idle line detected) flags are
|
* cleared by software sequence: a read operation to UART1_SR register
|
* (UART1_GetFlagStatus())followed by a read operation to UART1_DR
|
* register(UART1_ReceiveData8() or UART1_ReceiveData9()).
|
*
|
* - RXNE flag can be also cleared by a read to the UART1_DR register
|
* (UART1_ReceiveData8()or UART1_ReceiveData9()).
|
*
|
* - TC flag can be also cleared by software sequence: a read operation
|
* to UART1_SR register (UART1_GetFlagStatus()) followed by a write
|
* operation to UART1_DR register (UART1_SendData8() or UART1_SendData9()).
|
*
|
* - TXE flag is cleared only by a write to the UART1_DR register
|
* (UART1_SendData8() or UART1_SendData9()).
|
*
|
* - SBK flag is cleared during the stop bit of break.
|
* @retval None
|
*/
|
void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG)
|
{
|
assert_param(IS_UART1_CLEAR_FLAG_OK(UART1_FLAG));
|
|
/* Clear the Receive Register Not Empty flag */
|
if (UART1_FLAG == UART1_FLAG_RXNE)
|
{
|
UART1->SR = (uint8_t)~(UART1_SR_RXNE);
|
}
|
/* Clear the LIN Break Detection flag */
|
else
|
{
|
UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
|
}
|
}
|
|
/**
|
* @brief Checks whether the specified UART1 interrupt has occurred or not.
|
* @param UART1_IT: Specifies the UART1 interrupt pending bit to check.
|
* This parameter can be one of the following values:
|
* - UART1_IT_LBDF: LIN Break detection interrupt
|
* - UART1_IT_TXE: Transmit Data Register empty interrupt
|
* - UART1_IT_TC: Transmission complete interrupt
|
* - UART1_IT_RXNE: Receive Data register not empty interrupt
|
* - UART1_IT_IDLE: Idle line detection interrupt
|
* - UART1_IT_OR: OverRun Error interrupt
|
* - UART1_IT_PE: Parity Error interrupt
|
* @retval The new state of UART1_IT (SET or RESET).
|
*/
|
ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT)
|
{
|
ITStatus pendingbitstatus = RESET;
|
uint8_t itpos = 0;
|
uint8_t itmask1 = 0;
|
uint8_t itmask2 = 0;
|
uint8_t enablestatus = 0;
|
|
/* Check parameters */
|
assert_param(IS_UART1_GET_IT_OK(UART1_IT));
|
|
/* Get the UART1 IT index */
|
itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
|
/* Get the UART1 IT index */
|
itmask1 = (uint8_t)((uint8_t)UART1_IT >> (uint8_t)4);
|
/* Set the IT mask*/
|
itmask2 = (uint8_t)((uint8_t)1 << itmask1);
|
|
|
/* Check the status of the specified UART1 pending bit*/
|
if (UART1_IT == UART1_IT_PE)
|
{
|
/* Get the UART1_IT enable bit status*/
|
enablestatus = (uint8_t)((uint8_t)UART1->CR1 & itmask2);
|
/* Check the status of the specified UART1 interrupt*/
|
|
if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
|
{
|
/* Interrupt occurred*/
|
pendingbitstatus = SET;
|
}
|
else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
|
}
|
|
else if (UART1_IT == UART1_IT_LBDF)
|
{
|
/* Get the UART1_IT enable bit status*/
|
enablestatus = (uint8_t)((uint8_t)UART1->CR4 & itmask2);
|
/* Check the status of the specified UART1 interrupt*/
|
if (((UART1->CR4 & itpos) != (uint8_t)0x00) && enablestatus)
|
{
|
/* Interrupt occurred*/
|
pendingbitstatus = SET;
|
}
|
else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
|
}
|
else
|
{
|
/* Get the UART1_IT enable bit status*/
|
enablestatus = (uint8_t)((uint8_t)UART1->CR2 & itmask2);
|
/* Check the status of the specified UART1 interrupt*/
|
if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
|
{
|
/* Interrupt occurred*/
|
pendingbitstatus = SET;
|
}
|
else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
|
}
|
|
/* Return the UART1_IT status*/
|
return pendingbitstatus;
|
}
|
|
/**
|
* @brief Clears the UART1 pending flags.
|
* @param UART1_IT specifies the pending bit to clear
|
* This parameter can be one of the following values:
|
* - UART1_IT_LBDF: LIN Break detection interrupt
|
* - UART1_IT_RXNE: Receive Data register not empty interrupt.
|
* @note
|
* - PE (Parity error), FE (Framing error), NE (Noise error),
|
* OR (OverRun error) and IDLE (Idle line detected) pending bits are
|
* cleared by software sequence: a read operation to UART1_SR register
|
* (UART1_GetITStatus()) followed by a read operation to UART1_DR register
|
* (UART1_ReceiveData8() or UART1_ReceiveData9()).
|
*
|
* - RXNE pending bit can be also cleared by a read to the UART1_DR register
|
* (UART1_ReceiveData8() or UART1_ReceiveData9()).
|
*
|
* - TC (Transmit complete) pending bit can be cleared by software
|
* sequence: a read operation to UART1_SR register (UART1_GetITStatus())
|
* followed by a write operation to UART1_DR register (UART1_SendData8()
|
* or UART1_SendData9()).
|
*
|
* - TXE pending bit is cleared only by a write to the UART1_DR register
|
* (UART1_SendData8() or UART1_SendData9()).
|
* @retval None
|
*/
|
void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT)
|
{
|
assert_param(IS_UART1_CLEAR_IT_OK(UART1_IT));
|
|
/* Clear the Receive Register Not Empty pending bit */
|
if (UART1_IT == UART1_IT_RXNE)
|
{
|
UART1->SR = (uint8_t)~(UART1_SR_RXNE);
|
}
|
/* Clear the LIN Break Detection pending bit */
|
else
|
{
|
UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
|
}
|
}
|
|
void assert_failed(u8* file, u32 line)
|
{
|
/* User can add his own implementation to report the file name and line number,
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
/* Infinite loop */
|
while (1)
|
{
|
}
|
}
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
