/**
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******************************************************************************
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* @file stm8s_spi.c
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* @author MCD Application Team
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* @version V2.3.0
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* @date 16-June-2017
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* @brief This file contains all the functions for the SPI peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_spi.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @addtogroup SPI_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the SPI peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void SPI_DeInit(void)
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{
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SPI->CR1 = SPI_CR1_RESET_VALUE;
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SPI->CR2 = SPI_CR2_RESET_VALUE;
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SPI->ICR = SPI_ICR_RESET_VALUE;
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SPI->SR = SPI_SR_RESET_VALUE;
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SPI->CRCPR = SPI_CRCPR_RESET_VALUE;
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}
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/**
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* @brief Initializes the SPI according to the specified parameters.
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* @param FirstBit : This parameter can be any of the
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* @ref SPI_FirstBit_TypeDef enumeration.
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* @param BaudRatePrescaler : This parameter can be any of the
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* @ref SPI_BaudRatePrescaler_TypeDef enumeration.
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* @param Mode : This parameter can be any of the
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* @ref SPI_Mode_TypeDef enumeration.
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* @param ClockPolarity : This parameter can be any of the
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* @ref SPI_ClockPolarity_TypeDef enumeration.
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* @param ClockPhase : This parameter can be any of the
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* @ref SPI_ClockPhase_TypeDef enumeration.
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* @param Data_Direction : This parameter can be any of the
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* @ref SPI_DataDirection_TypeDef enumeration.
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* @param Slave_Management : This parameter can be any of the
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* @ref SPI_NSS_TypeDef enumeration.
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* @param CRCPolynomial : Configures the CRC polynomial.
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* @retval None
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*/
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void SPI_Init(SPI_FirstBit_TypeDef FirstBit, SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity, SPI_ClockPhase_TypeDef ClockPhase, SPI_DataDirection_TypeDef Data_Direction, SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial)
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{
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/* Check structure elements */
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assert_param(IS_SPI_FIRSTBIT_OK(FirstBit));
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assert_param(IS_SPI_BAUDRATE_PRESCALER_OK(BaudRatePrescaler));
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assert_param(IS_SPI_MODE_OK(Mode));
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assert_param(IS_SPI_POLARITY_OK(ClockPolarity));
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assert_param(IS_SPI_PHASE_OK(ClockPhase));
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assert_param(IS_SPI_DATA_DIRECTION_OK(Data_Direction));
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assert_param(IS_SPI_SLAVEMANAGEMENT_OK(Slave_Management));
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assert_param(IS_SPI_CRC_POLYNOMIAL_OK(CRCPolynomial));
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/* Frame Format, BaudRate, Clock Polarity and Phase configuration */
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SPI->CR1 = (uint8_t)((uint8_t)((uint8_t)FirstBit | BaudRatePrescaler) |
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(uint8_t)((uint8_t)ClockPolarity | ClockPhase));
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/* Data direction configuration: BDM, BDOE and RXONLY bits */
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SPI->CR2 = (uint8_t)((uint8_t)(Data_Direction) | (uint8_t)(Slave_Management));
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if (Mode == SPI_MODE_MASTER)
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{
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SPI->CR2 |= (uint8_t)SPI_CR2_SSI;
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}
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else
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{
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SPI->CR2 &= (uint8_t)~(SPI_CR2_SSI);
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}
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/* Master/Slave mode configuration */
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SPI->CR1 |= (uint8_t)(Mode);
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/* CRC configuration */
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SPI->CRCPR = (uint8_t)CRCPolynomial;
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}
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/**
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* @brief Enables or disables the SPI peripheral.
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* @param NewState New state of the SPI peripheral.
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* This parameter can be: ENABLE or DISABLE
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* @retval None
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*/
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void SPI_Cmd(FunctionalState NewState)
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{
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/* Check function parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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SPI->CR1 |= SPI_CR1_SPE; /* Enable the SPI peripheral*/
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}
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else
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{
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SPI->CR1 &= (uint8_t)(~SPI_CR1_SPE); /* Disable the SPI peripheral*/
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}
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}
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/**
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* @brief Enables or disables the specified interrupts.
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* @param SPI_IT Specifies the SPI interrupts sources to be enabled or disabled.
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* @param NewState: The new state of the specified SPI interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState)
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{
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uint8_t itpos = 0;
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/* Check function parameters */
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assert_param(IS_SPI_CONFIG_IT_OK(SPI_IT));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Get the SPI IT index */
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itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)SPI_IT & (uint8_t)0x0F));
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if (NewState != DISABLE)
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{
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SPI->ICR |= itpos; /* Enable interrupt*/
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}
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else
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{
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SPI->ICR &= (uint8_t)(~itpos); /* Disable interrupt*/
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}
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}
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/**
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* @brief Transmits a Data through the SPI peripheral.
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* @param Data : Byte to be transmitted.
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* @retval None
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*/
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void SPI_SendData(uint8_t Data)
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{
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SPI->DR = Data; /* Write in the DR register the data to be sent*/
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}
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/**
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* @brief Returns the most recent received data by the SPI peripheral.
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* @param None
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* @retval The value of the received data.
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*/
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uint8_t SPI_ReceiveData(void)
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{
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return ((uint8_t)SPI->DR); /* Return the data in the DR register*/
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}
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/**
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* @brief Configures internally by software the NSS pin.
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* @param NewState Indicates the new state of the SPI Software slave management.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_NSSInternalSoftwareCmd(FunctionalState NewState)
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{
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/* Check function parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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SPI->CR2 |= SPI_CR2_SSI; /* Set NSS pin internally by software*/
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}
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else
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{
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SPI->CR2 &= (uint8_t)(~SPI_CR2_SSI); /* Reset NSS pin internally by software*/
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}
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}
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/**
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* @brief Enables the transmit of the CRC value.
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* @param None
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* @retval None
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*/
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void SPI_TransmitCRC(void)
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{
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SPI->CR2 |= SPI_CR2_CRCNEXT; /* Enable the CRC transmission*/
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}
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/**
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* @brief Enables or disables the CRC value calculation of the transferred bytes.
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* @param NewState Indicates the new state of the SPI CRC value calculation.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_CalculateCRCCmd(FunctionalState NewState)
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{
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/* Check function parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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SPI->CR2 |= SPI_CR2_CRCEN; /* Enable the CRC calculation*/
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}
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else
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{
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SPI->CR2 &= (uint8_t)(~SPI_CR2_CRCEN); /* Disable the CRC calculation*/
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}
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}
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/**
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* @brief Returns the transmit or the receive CRC register value.
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* @param SPI_CRC Specifies the CRC register to be read.
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* @retval The selected CRC register value.
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*/
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uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC)
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{
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uint8_t crcreg = 0;
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/* Check function parameters */
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assert_param(IS_SPI_CRC_OK(SPI_CRC));
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if (SPI_CRC != SPI_CRC_RX)
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{
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crcreg = SPI->TXCRCR; /* Get the Tx CRC register*/
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}
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else
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{
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crcreg = SPI->RXCRCR; /* Get the Rx CRC register*/
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}
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/* Return the selected CRC register status*/
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return crcreg;
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}
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/**
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* @brief Reset the Rx CRCR and Tx CRCR registers.
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* @param None
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* @retval None
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*/
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void SPI_ResetCRC(void)
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{
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/* Rx CRCR & Tx CRCR registers are reset when CRCEN (hardware calculation)
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bit in SPI_CR2 is written to 1 (enable) */
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SPI_CalculateCRCCmd(ENABLE);
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/* Previous function disable the SPI */
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SPI_Cmd(ENABLE);
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}
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/**
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* @brief Returns the CRC Polynomial register value.
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* @param None
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* @retval The CRC Polynomial register value.
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*/
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uint8_t SPI_GetCRCPolynomial(void)
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{
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return SPI->CRCPR; /* Return the CRC polynomial register */
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}
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/**
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* @brief Selects the data transfer direction in bi-directional mode.
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* @param SPI_Direction Specifies the data transfer direction in bi-directional mode.
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* @retval None
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*/
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void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction)
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{
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/* Check function parameters */
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assert_param(IS_SPI_DIRECTION_OK(SPI_Direction));
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if (SPI_Direction != SPI_DIRECTION_RX)
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{
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SPI->CR2 |= SPI_CR2_BDOE; /* Set the Tx only mode*/
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}
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else
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{
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SPI->CR2 &= (uint8_t)(~SPI_CR2_BDOE); /* Set the Rx only mode*/
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}
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}
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/**
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* @brief Checks whether the specified SPI flag is set or not.
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* @param SPI_FLAG : Specifies the flag to check.
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* This parameter can be any of the @ref SPI_Flag_TypeDef enumeration.
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* @retval FlagStatus : Indicates the state of SPI_FLAG.
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* This parameter can be any of the @ref FlagStatus enumeration.
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*/
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FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG)
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{
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FlagStatus status = RESET;
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/* Check parameters */
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assert_param(IS_SPI_FLAGS_OK(SPI_FLAG));
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/* Check the status of the specified SPI flag */
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if ((SPI->SR & (uint8_t)SPI_FLAG) != (uint8_t)RESET)
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{
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status = SET; /* SPI_FLAG is set */
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}
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else
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{
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status = RESET; /* SPI_FLAG is reset*/
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}
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/* Return the SPI_FLAG status */
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return status;
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}
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/**
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* @brief Clears the SPI flags.
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* @param SPI_FLAG : Specifies the flag to clear.
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* This parameter can be one of the following values:
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* - SPI_FLAG_CRCERR
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* - SPI_FLAG_WKUP
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* @note - OVR (OverRun Error) interrupt pending bit is cleared by software
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* sequence:
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* a read operation to SPI_DR register (SPI_ReceiveData()) followed by
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* a read operation to SPI_SR register (SPI_GetFlagStatus()).
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* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
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* a read/write operation to SPI_SR register (SPI_GetFlagStatus()) followed by
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* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
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* @retval None
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*/
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void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG)
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{
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assert_param(IS_SPI_CLEAR_FLAGS_OK(SPI_FLAG));
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/* Clear the flag bit */
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SPI->SR = (uint8_t)(~SPI_FLAG);
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}
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/**
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* @brief Checks whether the specified interrupt has occurred or not.
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* @param SPI_IT: Specifies the SPI interrupt pending bit to check.
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* This parameter can be one of the following values:
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* - SPI_IT_CRCERR
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* - SPI_IT_WKUP
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* - SPI_IT_OVR
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* - SPI_IT_MODF
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* - SPI_IT_RXNE
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* - SPI_IT_TXE
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* @retval ITStatus : Indicates the state of the SPI_IT.
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* This parameter can be any of the @ref ITStatus enumeration.
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*/
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ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT)
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{
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ITStatus pendingbitstatus = RESET;
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uint8_t itpos = 0;
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uint8_t itmask1 = 0;
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uint8_t itmask2 = 0;
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uint8_t enablestatus = 0;
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assert_param(IS_SPI_GET_IT_OK(SPI_IT));
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/* Get the SPI IT index */
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itpos = (uint8_t)((uint8_t)1 << ((uint8_t)SPI_IT & (uint8_t)0x0F));
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/* Get the SPI IT mask */
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itmask1 = (uint8_t)((uint8_t)SPI_IT >> (uint8_t)4);
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/* Set the IT mask */
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itmask2 = (uint8_t)((uint8_t)1 << itmask1);
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/* Get the SPI_ITPENDINGBIT enable bit status */
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enablestatus = (uint8_t)((uint8_t)SPI->SR & itmask2);
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/* Check the status of the specified SPI interrupt */
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if (((SPI->ICR & itpos) != RESET) && enablestatus)
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{
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/* SPI_ITPENDINGBIT is set */
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pendingbitstatus = SET;
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}
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else
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{
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/* SPI_ITPENDINGBIT is reset */
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pendingbitstatus = RESET;
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}
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/* Return the SPI_ITPENDINGBIT status */
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return pendingbitstatus;
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}
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/**
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* @brief Clears the interrupt pending bits.
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* @param SPI_IT: Specifies the interrupt pending bit to clear.
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* This parameter can be one of the following values:
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* - SPI_IT_CRCERR
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* - SPI_IT_WKUP
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* @note - OVR (OverRun Error) interrupt pending bit is cleared by software sequence:
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* a read operation to SPI_DR register (SPI_ReceiveData()) followed by
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* a read operation to SPI_SR register (SPI_GetITStatus()).
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* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
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* a read/write operation to SPI_SR register (SPI_GetITStatus()) followed by
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* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
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* @retval None
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*/
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void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT)
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{
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uint8_t itpos = 0;
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assert_param(IS_SPI_CLEAR_IT_OK(SPI_IT));
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/* Clear SPI_IT_CRCERR or SPI_IT_WKUP interrupt pending bits */
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/* Get the SPI pending bit index */
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itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)(SPI_IT & (uint8_t)0xF0) >> 4));
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/* Clear the pending bit */
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SPI->SR = (uint8_t)(~itpos);
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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