/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_cmplx_mat_mult_q15.c
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* Description: Q15 complex matrix multiplication
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*
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* $Date: 27. January 2017
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* $Revision: V.1.5.1
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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/**
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* @ingroup groupMatrix
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*/
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/**
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* @addtogroup CmplxMatrixMult
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* @{
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*/
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/**
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* @brief Q15 Complex matrix multiplication
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* @param[in] *pSrcA points to the first input complex matrix structure
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* @param[in] *pSrcB points to the second input complex matrix structure
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* @param[out] *pDst points to output complex matrix structure
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* @param[in] *pScratch points to the array for storing intermediate results
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* @return The function returns either
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* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
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*
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* \par Conditions for optimum performance
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* Input, output and state buffers should be aligned by 32-bit
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*
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* \par Restrictions
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* If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
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* In this case input, output, scratch buffers should be aligned by 32-bit
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*
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* @details
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* <b>Scaling and Overflow Behavior:</b>
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*
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* \par
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* The function is implemented using a 64-bit internal accumulator. The inputs to the
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* multiplications are in 1.15 format and multiplications yield a 2.30 result.
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* The 2.30 intermediate
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* results are accumulated in a 64-bit accumulator in 34.30 format. This approach
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* provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
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* truncated to 34.15 format by discarding the low 15 bits and then saturated to
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* 1.15 format.
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*
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* \par
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* Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function.
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*
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*/
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arm_status arm_mat_cmplx_mult_q15(
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const arm_matrix_instance_q15 * pSrcA,
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const arm_matrix_instance_q15 * pSrcB,
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arm_matrix_instance_q15 * pDst,
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q15_t * pScratch)
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{
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/* accumulator */
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q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */
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q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
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q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
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q15_t *px; /* Temporary output data matrix pointer */
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uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
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uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
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uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
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uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
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uint16_t col, i = 0U, row = numRowsB, colCnt; /* loop counters */
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arm_status status; /* status of matrix multiplication */
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q63_t sumReal, sumImag;
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#ifdef UNALIGNED_SUPPORT_DISABLE
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q15_t in; /* Temporary variable to hold the input value */
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q15_t a, b, c, d;
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#else
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q31_t in; /* Temporary variable to hold the input value */
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q31_t prod1, prod2;
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q31_t pSourceA, pSourceB;
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#endif
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#ifdef ARM_MATH_MATRIX_CHECK
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/* Check for matrix mismatch condition */
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if ((pSrcA->numCols != pSrcB->numRows) ||
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(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
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{
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/* Set status as ARM_MATH_SIZE_MISMATCH */
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status = ARM_MATH_SIZE_MISMATCH;
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}
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else
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#endif
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{
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/* Matrix transpose */
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do
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{
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/* Apply loop unrolling and exchange the columns with row elements */
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col = numColsB >> 2;
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/* The pointer px is set to starting address of the column being processed */
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px = pSrcBT + i;
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/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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** a second loop below computes the remaining 1 to 3 samples. */
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while (col > 0U)
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{
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#ifdef UNALIGNED_SUPPORT_DISABLE
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/* Read two elements from the row */
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in = *pInB++;
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*px = in;
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in = *pInB++;
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px[1] = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *pInB++;
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*px = in;
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in = *pInB++;
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px[1] = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *pInB++;
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*px = in;
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in = *pInB++;
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px[1] = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *pInB++;
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*px = in;
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in = *pInB++;
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px[1] = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Decrement the column loop counter */
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col--;
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}
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/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
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** No loop unrolling is used. */
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col = numColsB % 0x4U;
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while (col > 0U)
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{
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/* Read two elements from the row */
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in = *pInB++;
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*px = in;
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in = *pInB++;
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px[1] = in;
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#else
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/* Read two elements from the row */
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in = *__SIMD32(pInB)++;
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*__SIMD32(px) = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *__SIMD32(pInB)++;
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*__SIMD32(px) = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *__SIMD32(pInB)++;
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*__SIMD32(px) = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Read two elements from the row */
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in = *__SIMD32(pInB)++;
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*__SIMD32(px) = in;
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Decrement the column loop counter */
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col--;
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}
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/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
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** No loop unrolling is used. */
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col = numColsB % 0x4U;
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while (col > 0U)
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{
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/* Read two elements from the row */
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in = *__SIMD32(pInB)++;
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*__SIMD32(px) = in;
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#endif
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/* Update the pointer px to point to the next row of the transposed matrix */
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px += numRowsB * 2;
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/* Decrement the column loop counter */
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col--;
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}
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i = i + 2U;
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/* Decrement the row loop counter */
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row--;
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} while (row > 0U);
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/* Reset the variables for the usage in the following multiplication process */
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row = numRowsA;
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i = 0U;
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px = pDst->pData;
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/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
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/* row loop */
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do
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{
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/* For every row wise process, the column loop counter is to be initiated */
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col = numColsB;
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/* For every row wise process, the pIn2 pointer is set
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** to the starting address of the transposed pSrcB data */
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pInB = pSrcBT;
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/* column loop */
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do
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{
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/* Set the variable sum, that acts as accumulator, to zero */
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sumReal = 0;
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sumImag = 0;
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/* Apply loop unrolling and compute 2 MACs simultaneously. */
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colCnt = numColsA >> 1;
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/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
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pInA = pSrcA->pData + i * 2;
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/* matrix multiplication */
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while (colCnt > 0U)
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{
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/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
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#ifdef UNALIGNED_SUPPORT_DISABLE
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/* read real and imag values from pSrcA buffer */
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a = *pInA;
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b = *(pInA + 1U);
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/* read real and imag values from pSrcB buffer */
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c = *pInB;
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d = *(pInB + 1U);
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/* Multiply and Accumlates */
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sumReal += (q31_t) a *c;
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sumImag += (q31_t) a *d;
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sumReal -= (q31_t) b *d;
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sumImag += (q31_t) b *c;
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/* read next real and imag values from pSrcA buffer */
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a = *(pInA + 2U);
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b = *(pInA + 3U);
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/* read next real and imag values from pSrcB buffer */
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c = *(pInB + 2U);
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d = *(pInB + 3U);
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/* update pointer */
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pInA += 4U;
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/* Multiply and Accumlates */
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sumReal += (q31_t) a *c;
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sumImag += (q31_t) a *d;
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sumReal -= (q31_t) b *d;
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sumImag += (q31_t) b *c;
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/* update pointer */
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pInB += 4U;
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#else
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/* read real and imag values from pSrcA and pSrcB buffer */
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pSourceA = *__SIMD32(pInA)++;
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pSourceB = *__SIMD32(pInB)++;
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/* Multiply and Accumlates */
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#ifdef ARM_MATH_BIG_ENDIAN
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prod1 = -__SMUSD(pSourceA, pSourceB);
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#else
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prod1 = __SMUSD(pSourceA, pSourceB);
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#endif
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prod2 = __SMUADX(pSourceA, pSourceB);
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sumReal += (q63_t) prod1;
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sumImag += (q63_t) prod2;
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/* read real and imag values from pSrcA and pSrcB buffer */
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pSourceA = *__SIMD32(pInA)++;
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pSourceB = *__SIMD32(pInB)++;
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/* Multiply and Accumlates */
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#ifdef ARM_MATH_BIG_ENDIAN
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prod1 = -__SMUSD(pSourceA, pSourceB);
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#else
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prod1 = __SMUSD(pSourceA, pSourceB);
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#endif
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prod2 = __SMUADX(pSourceA, pSourceB);
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sumReal += (q63_t) prod1;
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sumImag += (q63_t) prod2;
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#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
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/* Decrement the loop counter */
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colCnt--;
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}
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/* process odd column samples */
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if ((numColsA & 0x1U) > 0U)
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{
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/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
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#ifdef UNALIGNED_SUPPORT_DISABLE
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/* read real and imag values from pSrcA and pSrcB buffer */
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a = *pInA++;
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b = *pInA++;
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c = *pInB++;
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d = *pInB++;
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/* Multiply and Accumlates */
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sumReal += (q31_t) a *c;
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sumImag += (q31_t) a *d;
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sumReal -= (q31_t) b *d;
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sumImag += (q31_t) b *c;
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#else
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/* read real and imag values from pSrcA and pSrcB buffer */
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pSourceA = *__SIMD32(pInA)++;
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pSourceB = *__SIMD32(pInB)++;
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/* Multiply and Accumlates */
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#ifdef ARM_MATH_BIG_ENDIAN
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prod1 = -__SMUSD(pSourceA, pSourceB);
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#else
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prod1 = __SMUSD(pSourceA, pSourceB);
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#endif
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prod2 = __SMUADX(pSourceA, pSourceB);
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sumReal += (q63_t) prod1;
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sumImag += (q63_t) prod2;
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#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
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}
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/* Saturate and store the result in the destination buffer */
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*px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
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*px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
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/* Decrement the column loop counter */
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col--;
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} while (col > 0U);
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i = i + numColsA;
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/* Decrement the row loop counter */
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row--;
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} while (row > 0U);
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/* set status as ARM_MATH_SUCCESS */
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status = ARM_MATH_SUCCESS;
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}
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/* Return to application */
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return (status);
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}
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/**
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* @} end of MatrixMult group
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*/
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