diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/Makefile u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/Makefile
|
--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/Makefile 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/Makefile 2014-01-04 09:13:24.728450119 +0800
|
@@ -30,7 +30,7 @@
|
|
SOBJS = reset.o
|
|
-COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
|
+COBJS-$(CONFIG_S3C64XX) += cpu_init.o speed.o
|
COBJS-y += timer.o
|
|
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
|
diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/speed.c u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/speed.c
|
--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/speed.c 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/speed.c 2014-01-04 09:13:24.728450119 +0800
|
@@ -132,7 +132,7 @@
|
|
int print_cpuinfo(void)
|
{
|
- printf("\nCPU: S3C6400@%luMHz\n", get_ARMCLK() / 1000000);
|
+ printf("\nCPU: S3C6410@%luMHz\n", get_ARMCLK() / 1000000);
|
printf(" Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
|
get_FCLK() / 1000000, get_HCLK() / 1000000,
|
get_PCLK() / 1000000);
|
diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/timer.c u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/timer.c
|
--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/timer.c 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/timer.c 2014-01-04 09:13:24.736448718 +0800
|
@@ -43,7 +43,7 @@
|
#include <asm/arch/s3c6400.h>
|
#include <div64.h>
|
|
-static ulong timer_load_val;
|
+DECLARE_GLOBAL_DATA_PTR;
|
|
#define PRESCALER 167
|
|
@@ -60,12 +60,6 @@
|
return timers->TCNTO4;
|
}
|
|
-/* Internal tick units */
|
-/* Last decremneter snapshot */
|
-static unsigned long lastdec;
|
-/* Monotonic incrementing timer */
|
-static unsigned long long timestamp;
|
-
|
int timer_init(void)
|
{
|
s3c64xx_timers *const timers = s3c64xx_get_base_timers();
|
@@ -83,20 +77,18 @@
|
* the prescaler automatically for other PCLK frequencies.
|
*/
|
timers->TCFG0 = PRESCALER << 8;
|
- if (timer_load_val == 0) {
|
- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
|
- timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
|
- }
|
+ gd->timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
|
+ timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
|
|
/* load value for 10 ms timeout */
|
- lastdec = timers->TCNTB4 = timer_load_val;
|
+ gd->lastinc = timers->TCNTB4 = gd->timer_rate_hz;
|
/* auto load, manual update of Timer 4 */
|
timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
|
TCON_4_UPDATE;
|
|
/* auto load, start Timer 4 */
|
timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
|
- timestamp = 0;
|
+ gd->timer_reset_value = 0;
|
|
return 0;
|
}
|
@@ -113,16 +105,16 @@
|
{
|
ulong now = read_timer();
|
|
- if (lastdec >= now) {
|
+ if (gd->lastinc >= now) {
|
/* normal mode */
|
- timestamp += lastdec - now;
|
+ gd->timer_reset_value += gd->lastinc - now;
|
} else {
|
/* we have an overflow ... */
|
- timestamp += lastdec + timer_load_val - now;
|
+ gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now;
|
}
|
- lastdec = now;
|
+ gd->lastinc = now;
|
|
- return timestamp;
|
+ return gd->timer_reset_value;
|
}
|
|
/*
|
@@ -132,14 +124,14 @@
|
ulong get_tbclk(void)
|
{
|
/* We overrun in 100s */
|
- return (ulong)(timer_load_val / 100);
|
+ return (ulong)(gd->timer_rate_hz / 100);
|
}
|
|
void reset_timer_masked(void)
|
{
|
/* reset time */
|
- lastdec = read_timer();
|
- timestamp = 0;
|
+ gd->lastinc = read_timer();
|
+ gd->timer_reset_value = 0;
|
}
|
|
void reset_timer(void)
|
@@ -150,7 +142,7 @@
|
ulong get_timer_masked(void)
|
{
|
unsigned long long res = get_ticks();
|
- do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
|
+ do_div(res, (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ)));
|
return res;
|
}
|
|
@@ -161,7 +153,7 @@
|
|
void set_timer(ulong t)
|
{
|
- timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
|
+ gd->timer_reset_value = t * (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ));
|
}
|
|
void __udelay(unsigned long usec)
|
@@ -170,7 +162,7 @@
|
ulong tmo;
|
|
tmo = (usec + 9) / 10;
|
- tmp = get_ticks() + tmo; /* get current timestamp */
|
+ tmp = get_ticks() + tmo; /* get current timer_reset_value */
|
|
while (get_ticks() < tmp)/* loop till event */
|
/*NOP*/;
|
diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/start.S u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/start.S
|
--- u-boot-2010.09/arch/arm/cpu/arm1176/start.S 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/start.S 2014-01-04 09:13:24.744448764 +0800
|
@@ -36,6 +36,8 @@
|
#include <asm/proc/domain.h>
|
#endif
|
|
+#include <asm/arch/s3c6400.h>
|
+
|
#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
|
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
|
#endif
|
@@ -232,6 +234,59 @@
|
ble copy_loop
|
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
|
|
+#ifdef CONFIG_BOOT_NAND
|
+relocate: /* relocate U-Boot to RAM */
|
+ adr r0, _start /* r0 <- current position of code */
|
+ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
|
+ cmp r0, r1 /* don't reloc during debug */
|
+ beq stack_setup
|
+
|
+ /* Prepare to call C functions */
|
+ ldr sp, _TEXT_PHY_BASE /* setup temp stack pointer */
|
+ sub sp, sp, #12
|
+ mov fp, #0 /* no previous frame, so fp=0 */
|
+
|
+ bl copy_uboot_to_ram /* Jump to C functions */
|
+ tst r0, #0x0 /* Check return value */
|
+ bne copy_failed
|
+
|
+ ldr r0, =0x0c000000 /*The first 8K data in internal SRAM*/
|
+ ldr r1, _TEXT_PHY_BASE /*The first 8K data read from Nandflash into SDRAM*/
|
+ mov r2, #0x1000 /*The compare data length: 4K*/
|
+
|
+compare_next_byte:
|
+ ldr r3, [r0], #4
|
+ ldr r4, [r1], #4
|
+ teq r3, r4
|
+ bne copy_failed
|
+
|
+ subs r2, r2, #4
|
+ bne compare_next_byte /* Compare not finished */
|
+
|
+#ifdef CONFIG_OK6410_LED
|
+ /*Turn LED1 on*/
|
+ ldr r0, =ELFIN_GPIO_BASE
|
+ ldr r1, [r0, #GPMDAT_OFFSET]
|
+ bic r1, r1, #0x1
|
+ str r1, [r0, #GPMDAT_OFFSET]
|
+#endif
|
+
|
+ beq stack_setup /* Compare finish and it's ok, start setup stack */
|
+
|
+copy_failed: /* compare failed */
|
+#ifdef CONFIG_OK6410_LED
|
+ /*Turn LED4 on*/
|
+ ldr r0, =ELFIN_GPIO_BASE
|
+ ldr r1, [r0, #GPMDAT_OFFSET]
|
+ bic r1, r1, #0x8
|
+ str r1, [r0, #GPMDAT_OFFSET]
|
+#endif
|
+
|
+ nop
|
+ b copy_failed
|
+#endif /* CONFIG_BOOT_FROM_NORFLASH */
|
+
|
+
|
#ifdef CONFIG_ENABLE_MMU
|
enable_mmu:
|
/* enable domain access */
|
diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/u-boot.lds u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/u-boot.lds
|
--- u-boot-2010.09/arch/arm/cpu/arm1176/u-boot.lds 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/u-boot.lds 2014-01-04 09:13:24.744448764 +0800
|
@@ -32,6 +32,9 @@
|
.text :
|
{
|
arch/arm/cpu/arm1176/start.o (.text)
|
+ arch/arm/cpu/arm1176/s3c64xx/cpu_init.o (.text)
|
+ board/kkernel/ok6410/lowlevel_init.o (.text)
|
+ board/kkernel/ok6410/nand_cp.o (.text)
|
*(.text)
|
}
|
|
diff -Nuar u-boot-2010.09/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h u-boot-2010.09-ok6410/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
|
--- u-boot-2010.09/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h 2014-01-04 09:13:24.745447999 +0800
|
@@ -34,7 +34,7 @@
|
#ifndef __S3C64XX_H__
|
#define __S3C64XX_H__
|
|
-#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
|
+#if defined(CONFIG_SYNC_MODE) && (defined(CONFIG_S3C6400) || defined(CONFIG_S3C6410))
|
#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
|
#endif
|
|
diff -Nuar u-boot-2010.09/arch/arm/include/asm/global_data.h u-boot-2010.09-ok6410/arch/arm/include/asm/global_data.h
|
--- u-boot-2010.09/arch/arm/include/asm/global_data.h 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/arch/arm/include/asm/global_data.h 2014-01-04 09:13:24.745447999 +0800
|
@@ -47,6 +47,14 @@
|
#ifdef CONFIG_FSL_ESDHC
|
unsigned long sdhc_clk;
|
#endif
|
+#ifdef CONFIG_ARM /* Add by guowenxue from u-boot-2012.10 */
|
+ /* "static data" needed by most of timer.c on ARM platforms */
|
+ unsigned long timer_rate_hz;
|
+ unsigned long tbl;
|
+ unsigned long tbu;
|
+ unsigned long long timer_reset_value;
|
+ unsigned long lastinc;
|
+#endif
|
#if 0
|
unsigned long cpu_clk; /* CPU clock in Hz! */
|
unsigned long bus_clk;
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/config.mk u-boot-2010.09-ok6410/board/kkernel/ok6410/config.mk
|
--- u-boot-2010.09/board/kkernel/ok6410/config.mk 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/config.mk 2014-01-04 09:13:24.745447999 +0800
|
@@ -0,0 +1,32 @@
|
+#
|
+# (C) Copyright 2002
|
+# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
|
+#
|
+# (C) Copyright 2008
|
+# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+#
|
+# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
|
+#
|
+# see http://www.samsung.com/ for more information on SAMSUNG
|
+
|
+# On SMDK6400 we use the 64 MB SDRAM bank at
|
+#
|
+# 0x50000000 to 0x58000000
|
+#
|
+# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
|
+#
|
+# we load ourselves to 0x57e00000 without MMU
|
+# with MMU, load address is changed to 0xc7e00000
|
+#
|
+# download area is 0x5000c000
|
+
|
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
|
+
|
+ifndef CONFIG_NAND_SPL
|
+TEXT_BASE = $(RAM_TEXT)
|
+else
|
+TEXT_BASE = 0
|
+endif
|
+
|
+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/lowlevel_init.S u-boot-2010.09-ok6410/board/kkernel/ok6410/lowlevel_init.S
|
--- u-boot-2010.09/board/kkernel/ok6410/lowlevel_init.S 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/lowlevel_init.S 2014-01-04 09:13:24.746456662 +0800
|
@@ -0,0 +1,322 @@
|
+/*
|
+ * Memory Setup stuff - taken from blob memsetup.S
|
+ *
|
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
+ *
|
+ * Modified for the Samsung SMDK2410 by
|
+ * (C) Copyright 2002
|
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
|
+ *
|
+ * (C) Copyright 2008
|
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+ *
|
+ * See file CREDITS for list of people who contributed to this
|
+ * project.
|
+ *
|
+ * This program is free software; you can redistribute it and/or
|
+ * modify it under the terms of the GNU General Public License as
|
+ * published by the Free Software Foundation; either version 2 of
|
+ * the License, or (at your option) any later version.
|
+ *
|
+ * This program is distributed in the hope that it will be useful,
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+ * GNU General Public License for more details.
|
+ *
|
+ * You should have received a copy of the GNU General Public License
|
+ * along with this program; if not, write to the Free Software
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+ * MA 02111-1307 USA
|
+ */
|
+
|
+
|
+#include <config.h>
|
+#include <version.h>
|
+
|
+#include <asm/arch/s3c6400.h>
|
+
|
+#ifdef CONFIG_SERIAL1
|
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
|
+#elif defined(CONFIG_SERIAL2)
|
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
|
+#else
|
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET)
|
+#endif
|
+
|
+_TEXT_BASE:
|
+ .word TEXT_BASE
|
+
|
+ .globl lowlevel_init
|
+lowlevel_init:
|
+ mov r12, lr
|
+
|
+#ifdef CONFIG_OK6410_LED
|
+ ldr r0, =ELFIN_GPIO_BASE
|
+ ldr r1, [r0, #GPMCON_OFFSET]
|
+ bic r1, r1, #0x00FF /*Set GPMCON for GPM0,GPM1 as 0x00 */
|
+ orr r1, r1, #0x0011 /*Set GPMCON for GPM0,GPM1 as GPIOOUT, 0x01*/
|
+ bic r1, r1, #0xFF00 /*Set GPMCON for GPM2,GPM3 as 0x00*/
|
+ orr r1, r1, #0x1100 /*Set GPMCON for GPM2,GPM3 as GPIOOUT, 0x01*/
|
+ str r1, [r0, #GPMCON_OFFSET]
|
+
|
+ /* Turn off LED1, LED2, LED3, LED4 */
|
+ ldr r1, [r0, #GPMDAT_OFFSET]
|
+ orr r1, r1, #0xF /*Set bit[0:3] as high level*/
|
+ str r1, [r0, #GPMDAT_OFFSET]
|
+#endif
|
+
|
+ /* Disable Watchdog */
|
+ ldr r0, =0x7e000000 @0x7e004000
|
+ orr r0, r0, #0x4000
|
+ mov r1, #0
|
+ str r1, [r0]
|
+
|
+ /* External interrupt pending clear */
|
+ ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/
|
+ ldr r1, [r0]
|
+ str r1, [r0]
|
+
|
+ ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000
|
+ ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000
|
+
|
+ /* Disable all interrupts (VIC0 and VIC1) */
|
+ mvn r3, #0x0
|
+ str r3, [r0, #oINTMSK]
|
+ str r3, [r1, #oINTMSK]
|
+
|
+ /* Set all interrupts as IRQ */
|
+ mov r3, #0x0
|
+ str r3, [r0, #oINTMOD]
|
+ str r3, [r1, #oINTMOD]
|
+
|
+ /* Pending Interrupt Clear */
|
+ mov r3, #0x0
|
+ str r3, [r0, #oVECTADDR]
|
+ str r3, [r1, #oVECTADDR]
|
+
|
+ /* init system clock */
|
+ bl system_clock_init
|
+
|
+#ifndef CONFIG_NAND_SPL
|
+ /* for UART */
|
+ bl uart_asm_init
|
+#endif
|
+
|
+#ifdef CONFIG_BOOT_NAND
|
+ /* simple init for NAND */
|
+ bl nand_asm_init
|
+#endif
|
+
|
+ /* Memory subsystem address 0x7e00f120 */
|
+ ldr r0, =ELFIN_MEM_SYS_CFG
|
+
|
+ /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
|
+ mov r1, #S3C64XX_MEM_SYS_CFG_NAND
|
+ str r1, [r0]
|
+
|
+ bl mem_ctrl_asm_init
|
+
|
+/* Wakeup support. Don't know if it's going to be used, untested. */
|
+ ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
|
+ ldr r1, [r0]
|
+ bic r1, r1, #0xfffffff7
|
+ cmp r1, #0x8
|
+ beq wakeup_reset
|
+
|
+1:
|
+ mov lr, r12
|
+ mov pc, lr
|
+
|
+wakeup_reset:
|
+
|
+ /* Clear wakeup status register */
|
+ ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
|
+ ldr r1, [r0]
|
+ str r1, [r0]
|
+
|
+ /* Load return address and jump to kernel */
|
+ ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
|
+ /* r1 = physical address of s3c6410_cpu_resume function */
|
+ ldr r1, [r0]
|
+ /* Jump to kernel (sleep-s3c6410.S) */
|
+ mov pc, r1
|
+ nop
|
+ nop
|
+/*
|
+ * system_clock_init: Initialize core clock and bus clock.
|
+ * void system_clock_init(void)
|
+ */
|
+system_clock_init:
|
+ ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
|
+
|
+#ifdef CONFIG_SYNC_MODE
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ mov r2, #0x40
|
+ orr r1, r1, r2
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+
|
+ nop
|
+ nop
|
+ nop
|
+ nop
|
+ nop
|
+
|
+ ldr r2, =0x80
|
+ orr r1, r1, r2
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+
|
+check_syncack:
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ ldr r2, =0xf00
|
+ and r1, r1, r2
|
+ cmp r1, #0xf00
|
+ bne check_syncack
|
+#else /* ASYNC Mode */
|
+ nop
|
+ nop
|
+ nop
|
+ nop
|
+ nop
|
+
|
+ /*
|
+ * This was unconditional in original Samsung sources, but it doesn't
|
+ * seem to make much sense on S3C6400.
|
+ */
|
+#ifndef CONFIG_S3C6410
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ bic r1, r1, #0xC0
|
+ orr r1, r1, #0x40
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+
|
+wait_for_async:
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ and r1, r1, #0xf00
|
+ cmp r1, #0x0
|
+ bne wait_for_async
|
+#endif
|
+
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ bic r1, r1, #0x40
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+#endif
|
+
|
+ mov r1, #0xff00
|
+ orr r1, r1, #0xff
|
+ str r1, [r0, #APLL_LOCK_OFFSET]
|
+ str r1, [r0, #MPLL_LOCK_OFFSET]
|
+
|
+ /* Set Clock Divider */
|
+ ldr r1, [r0, #CLK_DIV0_OFFSET]
|
+ bic r1, r1, #0x30000
|
+ bic r1, r1, #0xff00
|
+ bic r1, r1, #0xff
|
+ ldr r2, =CLK_DIV_VAL
|
+ orr r1, r1, r2
|
+ str r1, [r0, #CLK_DIV0_OFFSET]
|
+
|
+ ldr r1, =APLL_VAL
|
+ str r1, [r0, #APLL_CON_OFFSET]
|
+ ldr r1, =MPLL_VAL
|
+ str r1, [r0, #MPLL_CON_OFFSET]
|
+
|
+ /* FOUT of EPLL is 48MHz */
|
+ ldr r1, =0x80200103
|
+ str r1, [r0, #EPLL_CON0_OFFSET]
|
+ ldr r1, =0x0
|
+ str r1, [r0, #EPLL_CON1_OFFSET]
|
+
|
+ /* APLL, MPLL, EPLL select to Fout */
|
+ ldr r1, [r0, #CLK_SRC_OFFSET]
|
+ orr r1, r1, #0x7
|
+ str r1, [r0, #CLK_SRC_OFFSET]
|
+
|
+ /* wait at least 200us to stablize all clock */
|
+ mov r1, #0x10000
|
+1: subs r1, r1, #1
|
+ bne 1b
|
+
|
+ /* Synchronization for VIC port */
|
+#if defined(CONFIG_SYNC_MODE)
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ orr r1, r1, #0x20
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+#elif !defined(CONFIG_S3C6410)
|
+ /* According to 661558um_S3C6400X_rev10.pdf 0x20 is reserved */
|
+ ldr r1, [r0, #OTHERS_OFFSET]
|
+ bic r1, r1, #0x20
|
+ str r1, [r0, #OTHERS_OFFSET]
|
+#endif
|
+ mov pc, lr
|
+
|
+
|
+#ifndef CONFIG_NAND_SPL
|
+/*
|
+ * uart_asm_init: Initialize UART's pins
|
+ */
|
+uart_asm_init:
|
+ /* set GPIO to enable UART */
|
+ ldr r0, =ELFIN_GPIO_BASE
|
+ ldr r1, =0x220022
|
+ str r1, [r0, #GPACON_OFFSET]
|
+ mov pc, lr
|
+#endif
|
+
|
+#ifdef CONFIG_BOOT_NAND
|
+/*
|
+ * NAND Interface init for SMDK6400
|
+ */
|
+nand_asm_init:
|
+ ldr r0, =ELFIN_NAND_BASE
|
+ ldr r1, [r0, #NFCONF_OFFSET]
|
+ orr r1, r1, #0x70
|
+ orr r1, r1, #0x7700
|
+ str r1, [r0, #NFCONF_OFFSET]
|
+
|
+ ldr r1, [r0, #NFCONT_OFFSET]
|
+ orr r1, r1, #0x07
|
+ str r1, [r0, #NFCONT_OFFSET]
|
+
|
+ mov pc, lr
|
+#endif
|
+
|
+#ifdef CONFIG_ENABLE_MMU
|
+/*
|
+ * MMU Table for SMDK6400
|
+ */
|
+
|
+ /* form a first-level section entry */
|
+.macro FL_SECTION_ENTRY base,ap,d,c,b
|
+ .word (\base << 20) | (\ap << 10) | \
|
+ (\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1)
|
+.endm
|
+
|
+.section .mmudata, "a"
|
+ .align 14
|
+ /* the following alignment creates the mmu table at address 0x4000. */
|
+ .globl mmu_table
|
+mmu_table:
|
+ .set __base, 0
|
+ /* 1:1 mapping for debugging */
|
+ .rept 0xA00
|
+ FL_SECTION_ENTRY __base, 3, 0, 0, 0
|
+ .set __base, __base + 1
|
+ .endr
|
+
|
+ /* access is not allowed. */
|
+ .rept 0xC00 - 0xA00
|
+ .word 0x00000000
|
+ .endr
|
+
|
+ /* 128MB for SDRAM 0xC0000000 -> 0x50000000 */
|
+ .set __base, 0x500
|
+ .rept 0xC80 - 0xC00
|
+ FL_SECTION_ENTRY __base, 3, 0, 1, 1
|
+ .set __base, __base + 1
|
+ .endr
|
+
|
+ /* access is not allowed. */
|
+ .rept 0x1000 - 0xc80
|
+ .word 0x00000000
|
+ .endr
|
+#endif
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/Makefile u-boot-2010.09-ok6410/board/kkernel/ok6410/Makefile
|
--- u-boot-2010.09/board/kkernel/ok6410/Makefile 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/Makefile 2014-01-04 09:13:24.754448618 +0800
|
@@ -0,0 +1,54 @@
|
+#
|
+# (C) Copyright 2000, 2001, 2002
|
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
+#
|
+# (C) Copyright 2008
|
+# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+#
|
+# See file CREDITS for list of people who contributed to this
|
+# project.
|
+#
|
+# This program is free software; you can redistribute it and/or
|
+# modify it under the terms of the GNU General Public License as
|
+# published by the Free Software Foundation; either version 2 of
|
+# the License, or (at your option) any later version.
|
+#
|
+# This program is distributed in the hope that it will be useful,
|
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+# GNU General Public License for more details.
|
+#
|
+# You should have received a copy of the GNU General Public License
|
+# along with this program; if not, write to the Free Software
|
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+# MA 02111-1307 USA
|
+#
|
+
|
+include $(TOPDIR)/config.mk
|
+
|
+LIB = $(obj)lib$(BOARD).a
|
+
|
+COBJS-y := ok6410.o nand_cp.o
|
+SOBJS := lowlevel_init.o
|
+
|
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
+OBJS := $(addprefix $(obj),$(COBJS-y))
|
+SOBJS := $(addprefix $(obj),$(SOBJS))
|
+
|
+$(LIB): $(obj).depend $(SOBJS) $(OBJS)
|
+ $(AR) $(ARFLAGS) $@ $(SOBJS) $(OBJS)
|
+
|
+clean:
|
+ rm -f $(SOBJS) $(OBJS)
|
+
|
+distclean: clean
|
+ rm -f $(LIB) core *.bak $(obj).depend
|
+
|
+#########################################################################
|
+
|
+# defines $(obj).depend target
|
+include $(SRCTREE)/rules.mk
|
+
|
+sinclude $(obj).depend
|
+
|
+#########################################################################
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/nand_cp.c u-boot-2010.09-ok6410/board/kkernel/ok6410/nand_cp.c
|
--- u-boot-2010.09/board/kkernel/ok6410/nand_cp.c 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/nand_cp.c 2014-01-04 09:21:24.663450211 +0800
|
@@ -0,0 +1,121 @@
|
+/*********************************************************************************
|
+ * Copyright: (C) 2013 Guo Wenxue<guowenxue@gmail.com>
|
+ * All rights reserved.
|
+ *
|
+ * Filename: nand_cp.c
|
+ * Description: This file
|
+ *
|
+ * Version: 1.0.0(03/08/2013~)
|
+ * Author: Guo Wenxue <guowenxue@gmail.com>
|
+ * ChangeLog: 1, Release initial version on "03/08/2013 11:35:45 PM"
|
+ *
|
+ ********************************************************************************/
|
+
|
+#include <common.h>
|
+#ifdef CONFIG_S3C64XX
|
+#include <asm/io.h>
|
+#include <linux/mtd/nand.h>
|
+#include <asm/arch/s3c6400.h>
|
+
|
+#define UBOOT_LENGTH 0x60000 /* 384K */
|
+#define NAND_DISABLE_CE() (NFCONT_REG |= (1 << 1))
|
+#define NAND_ENABLE_CE() (NFCONT_REG &= ~(1 << 1))
|
+#define NF_TRANSRnB() do{ while(!(NFSTAT_REG & (1 << 0))); } while(0)
|
+
|
+static int nandll_read_page(uchar * buf, ulong addr, int large_block)
|
+{
|
+ int i;
|
+ int page_size = 512;
|
+
|
+ if (large_block == 1)
|
+ page_size = 2048;
|
+ if (large_block == 2)
|
+ page_size = 4096;
|
+
|
+ NAND_ENABLE_CE();
|
+ NFCMD_REG = NAND_CMD_READ0;
|
+ NFADDR_REG = 0; /* Write Address */
|
+
|
+ if (large_block)
|
+ NFADDR_REG = 0;
|
+
|
+ NFADDR_REG = (addr) & 0xff;
|
+ NFADDR_REG = (addr >> 8) & 0xff;
|
+ NFADDR_REG = (addr >> 16) & 0xff;
|
+
|
+ if (large_block)
|
+ NFCMD_REG = NAND_CMD_READSTART;
|
+
|
+ NF_TRANSRnB();
|
+
|
+ for (i = 0; i < page_size; i++)
|
+ {
|
+ *buf++ = NFDATA8_REG;
|
+ }
|
+
|
+ NAND_DISABLE_CE();
|
+ return 0;
|
+}
|
+
|
+static int nandll_read_blocks(ulong dst_addr, ulong size, int large_block)
|
+{
|
+ uchar *buf = (uchar *) dst_addr;
|
+ int i;
|
+ uint page_shift = 9;
|
+
|
+ if (large_block == 1)
|
+ page_shift = 11;
|
+
|
+ /* Read pages */
|
+ if (large_block == 2)
|
+ page_shift = 12;
|
+
|
+ if (large_block == 2)
|
+ {
|
+ /* Read pages */
|
+ for (i = 0; i < 4; i++, buf += (1 << (page_shift - 1)))
|
+ {
|
+ nandll_read_page(buf, i, large_block);
|
+ }
|
+
|
+ /* Read pages */
|
+ for (i = 4; i < (UBOOT_LENGTH >> page_shift); i++, buf += (1 << page_shift))
|
+ {
|
+ nandll_read_page(buf, i, large_block);
|
+ }
|
+ }
|
+ else
|
+ {
|
+ for (i = 0; i < (UBOOT_LENGTH >> page_shift); i++, buf += (1 << page_shift))
|
+ {
|
+ nandll_read_page(buf, i, large_block);
|
+ }
|
+ }
|
+
|
+ return 0;
|
+}
|
+
|
+int copy_uboot_to_ram(void)
|
+{
|
+ int large_block = 0;
|
+ int i;
|
+ vu_char id;
|
+
|
+ NAND_ENABLE_CE();
|
+ NFCMD_REG = NAND_CMD_READID;
|
+ NFADDR_REG = 0x00;
|
+
|
+ /* wait for a while */
|
+ for (i = 0; i < 200; i++) ;
|
+ id = NFDATA8_REG;
|
+ id = NFDATA8_REG;
|
+
|
+ if (id > 0x80)
|
+ large_block = 1;
|
+ if (id == 0xd5)
|
+ large_block = 2;
|
+
|
+ return nandll_read_blocks(CONFIG_SYS_PHY_UBOOT_BASE, UBOOT_LENGTH, large_block);
|
+}
|
+
|
+#endif
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/ok6410.c u-boot-2010.09-ok6410/board/kkernel/ok6410/ok6410.c
|
--- u-boot-2010.09/board/kkernel/ok6410/ok6410.c 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/ok6410.c 2014-01-04 09:13:24.777448690 +0800
|
@@ -0,0 +1,163 @@
|
+/*
|
+ * (C) Copyright 2002
|
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
+ * Marius Groeger <mgroeger@sysgo.de>
|
+ *
|
+ * (C) Copyright 2002
|
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
|
+ *
|
+ * (C) Copyright 2008
|
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+ *
|
+ * See file CREDITS for list of people who contributed to this
|
+ * project.
|
+ *
|
+ * This program is free software; you can redistribute it and/or
|
+ * modify it under the terms of the GNU General Public License as
|
+ * published by the Free Software Foundation; either version 2 of
|
+ * the License, or (at your option) any later version.
|
+ *
|
+ * This program is distributed in the hope that it will be useful,
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+ * GNU General Public License for more details.
|
+ *
|
+ * You should have received a copy of the GNU General Public License
|
+ * along with this program; if not, write to the Free Software
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+ * MA 02111-1307 USA
|
+ */
|
+
|
+#include <common.h>
|
+#include <netdev.h>
|
+#include <asm/arch/s3c6400.h>
|
+
|
+/* ------------------------------------------------------------------------- */
|
+#define CS8900_Tacs 0x0 /* 0clk address set-up */
|
+#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
|
+#define CS8900_Tacc 0xE /* 14clk access cycle */
|
+#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */
|
+#define CS8900_Tah 0x4 /* 4clk address holding time */
|
+#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */
|
+#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */
|
+
|
+#define DM9000_Tacs 0x0 /* 0clk address set-up */
|
+#define DM9000_Tcos 0x4 /* 4clk chip selection set-up */
|
+#define DM9000_Tacc 0xE /* 14clk access cycle */
|
+#define DM9000_Tcoh 0x1 /* 1clk chip selection hold */
|
+#define DM9000_Tah 0x4 /* 4clk address holding time */
|
+#define DM9000_Tacp 0x6 /* 6clk page mode access cycle */
|
+#define DM9000_PMC 0x0 /* normal(1data)page mode configuration */
|
+
|
+static inline void delay(unsigned long loops)
|
+{
|
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
|
+ "bne 1b"
|
+ : "=r" (loops) : "0" (loops));
|
+}
|
+
|
+/*
|
+ * Miscellaneous platform dependent initialisations
|
+ */
|
+
|
+#ifdef CONFIG_CS8900
|
+static void cs8900_pre_init(void)
|
+{
|
+ SROM_BW_REG &= ~(0xf << 4);
|
+ SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
|
+ SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) +
|
+ (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) +
|
+ (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC);
|
+}
|
+#endif
|
+
|
+#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
|
+static void dm9000_pre_init(void)
|
+{
|
+ SROM_BW_REG &= ~(0xf << 4);
|
+ SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
|
+ SROM_BC1_REG = ((DM9000_Tacs << 28) + (DM9000_Tcos << 24) +
|
+ (DM9000_Tacc << 16) + (DM9000_Tcoh << 12) +
|
+ (DM9000_Tah << 8) + (DM9000_Tacp << 4) + DM9000_PMC);
|
+}
|
+#endif
|
+
|
+int board_init(void)
|
+{
|
+ DECLARE_GLOBAL_DATA_PTR;
|
+
|
+#ifdef CONFIG_CS8900
|
+ cs8900_pre_init();
|
+#endif
|
+
|
+#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
|
+ dm9000_pre_init();
|
+#endif
|
+
|
+ /* NOR-flash in SROM0 */
|
+
|
+ /* Enable WAIT */
|
+ SROM_BW_REG |= 4 | 8 | 1;
|
+
|
+ gd->bd->bi_arch_number = MACH_TYPE;
|
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
|
+
|
+ return 0;
|
+}
|
+
|
+int dram_init(void)
|
+{
|
+ DECLARE_GLOBAL_DATA_PTR;
|
+
|
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
+
|
+ return 0;
|
+}
|
+
|
+#ifdef CONFIG_DISPLAY_BOARDINFO
|
+int checkboard(void)
|
+{
|
+ printf("Board: OK6410\n");
|
+ return 0;
|
+}
|
+#endif
|
+
|
+#ifdef CONFIG_ENABLE_MMU
|
+ulong virt_to_phy_smdk6400(ulong addr)
|
+{
|
+ if ((0xc0000000 <= addr) && (addr < 0xc8000000))
|
+ return addr - 0xc0000000 + 0x50000000;
|
+ else
|
+ printf("do not support this address : %08lx\n", addr);
|
+
|
+ return addr;
|
+}
|
+#endif
|
+
|
+#ifndef CONFIG_SYS_NO_FLASH /* Comment by guowenxue */
|
+ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
|
+{
|
+ if (banknum == 0) { /* non-CFI boot flash */
|
+ info->portwidth = FLASH_CFI_16BIT;
|
+ info->chipwidth = FLASH_CFI_BY16;
|
+ info->interface = FLASH_CFI_X16;
|
+ return 1;
|
+ } else
|
+ return 0;
|
+}
|
+#endif
|
+
|
+#ifdef CONFIG_CMD_NET
|
+int board_eth_init(bd_t *bis)
|
+{
|
+ int rc = 0;
|
+#ifdef CONFIG_CS8900
|
+ rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
|
+#endif
|
+#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
|
+ rc = dm9000_initialize(bis);
|
+#endif
|
+ return rc;
|
+}
|
+#endif
|
diff -Nuar u-boot-2010.09/board/kkernel/ok6410/u-boot-nand.lds u-boot-2010.09-ok6410/board/kkernel/ok6410/u-boot-nand.lds
|
--- u-boot-2010.09/board/kkernel/ok6410/u-boot-nand.lds 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/board/kkernel/ok6410/u-boot-nand.lds 2014-01-04 09:13:24.777448690 +0800
|
@@ -0,0 +1,65 @@
|
+/*
|
+ * (C) Copyright 2002
|
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
+ *
|
+ * (C) Copyright 2008
|
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+ *
|
+ * See file CREDITS for list of people who contributed to this
|
+ * project.
|
+ *
|
+ * This program is free software; you can redistribute it and/or
|
+ * modify it under the terms of the GNU General Public License as
|
+ * published by the Free Software Foundation; either version 2 of
|
+ * the License, or (at your option) any later version.
|
+ *
|
+ * This program is distributed in the hope that it will be useful,
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+ * GNU General Public License for more details.
|
+ *
|
+ * You should have received a copy of the GNU General Public License
|
+ * along with this program; if not, write to the Free Software
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+ * MA 02111-1307 USA
|
+ */
|
+
|
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
+OUTPUT_ARCH(arm)
|
+ENTRY(_start)
|
+SECTIONS
|
+{
|
+ . = 0x00000000;
|
+
|
+ . = ALIGN(4);
|
+ .text :
|
+ {
|
+ arch/arm/cpu/arm1176/start.o (.text)
|
+ arch/arm/cpu/arm1176/s3c64xx/cpu_init.o (.text)
|
+ board/kkernel/ok6410/lowlevel_init.o (.text)
|
+ board/kkernel/ok6410/nand_cp.o (.text)
|
+ arch/arm/lib/board.o (.text)
|
+ *(.text)
|
+ }
|
+
|
+ . = ALIGN(4);
|
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
+
|
+ . = ALIGN(4);
|
+ .data : { *(.data) }
|
+
|
+ . = ALIGN(4);
|
+ .got : { *(.got) }
|
+
|
+ __u_boot_cmd_start = .;
|
+ .u_boot_cmd : { *(.u_boot_cmd) }
|
+ __u_boot_cmd_end = .;
|
+
|
+ . = ALIGN(4);
|
+ .mmudata : { *(.mmudata) }
|
+
|
+ . = ALIGN(4);
|
+ __bss_start = .;
|
+ .bss : { *(.bss) . = ALIGN(4); }
|
+ _end = .;
|
+}
|
diff -Nuar u-boot-2010.09/common/env_common.c u-boot-2010.09-ok6410/common/env_common.c
|
--- u-boot-2010.09/common/env_common.c 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/common/env_common.c 2014-01-04 09:13:24.778447811 +0800
|
@@ -59,6 +59,23 @@
|
#ifdef CONFIG_BOOTCOMMAND
|
"bootcmd=" CONFIG_BOOTCOMMAND "\0"
|
#endif
|
+/* This part add by guowenxue */
|
+#if defined(CONFIG_CPU) /* Burn bootloader image */
|
+ "cpu=" CONFIG_CPU "\0"
|
+#endif
|
+#if defined(CONFIG_BURNBL) /* Burn bootloader image to Nandflash*/
|
+ "bbl=" CONFIG_BURNBL "\0"
|
+#endif
|
+#if defined(CONFIG_BURNKERNEL) /* Burn Linux kernel image */
|
+ "bkr=" CONFIG_BURNKERNEL "\0"
|
+#endif
|
+#ifdef CONFIG_BUBIFS
|
+ "bubifs=" CONFIG_BUBIFS "\0"
|
+#endif
|
+#if defined(CONFIG_TFTPBOOT) /* TFTP download system image and boot */
|
+ "tpb=" CONFIG_TFTPBOOT "\0"
|
+#endif
|
+/* Add by guowenxue end */
|
#ifdef CONFIG_RAMBOOTCOMMAND
|
"ramboot=" CONFIG_RAMBOOTCOMMAND "\0"
|
#endif
|
diff -Nuar u-boot-2010.09/drivers/usb/host/ohci-hcd.c u-boot-2010.09-ok6410/drivers/usb/host/ohci-hcd.c
|
--- u-boot-2010.09/drivers/usb/host/ohci-hcd.c 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/drivers/usb/host/ohci-hcd.c 2014-01-04 09:13:24.778447811 +0800
|
@@ -67,6 +67,7 @@
|
#if defined(CONFIG_ARM920T) || \
|
defined(CONFIG_S3C24X0) || \
|
defined(CONFIG_S3C6400) || \
|
+ defined(CONFIG_S3C6410) || \
|
defined(CONFIG_440EP) || \
|
defined(CONFIG_PCI_OHCI) || \
|
defined(CONFIG_MPC5200) || \
|
diff -Nuar u-boot-2010.09/include/common.h u-boot-2010.09-ok6410/include/common.h
|
--- u-boot-2010.09/include/common.h 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/include/common.h 2014-01-04 09:13:24.779447911 +0800
|
@@ -507,6 +507,7 @@
|
#if defined(CONFIG_S3C24X0) || \
|
defined(CONFIG_LH7A40X) || \
|
defined(CONFIG_S3C6400) || \
|
+ defined(CONFIG_S3C6410) || \
|
defined(CONFIG_EP93XX)
|
ulong get_FCLK (void);
|
ulong get_HCLK (void);
|
diff -Nuar u-boot-2010.09/include/configs/ok6410.h u-boot-2010.09-ok6410/include/configs/ok6410.h
|
--- u-boot-2010.09/include/configs/ok6410.h 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/include/configs/ok6410.h 2014-01-04 09:27:06.729448779 +0800
|
@@ -0,0 +1,358 @@
|
+/*
|
+ * (C) Copyright 2002
|
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
+ * Marius Groeger <mgroeger@sysgo.de>
|
+ * Gary Jennejohn <garyj@denx.de>
|
+ * David Mueller <d.mueller@elsoft.ch>
|
+ *
|
+ * (C) Copyright 2008
|
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+ *
|
+ * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
|
+ *
|
+ * (C) Copyright 2013
|
+ * Guo Wenxue, Wuhan Lingyun Embedded System Trainning, <guowenxue@gmail.com>
|
+ * Configuation settings for the FeiLing OK6410 board.
|
+ *
|
+ * See file CREDITS for list of people who contributed to this
|
+ * project.
|
+ *
|
+ * This program is free software; you can redistribute it and/or
|
+ * modify it under the terms of the GNU General Public License as
|
+ * published by the Free Software Foundation; either version 2 of
|
+ * the License, or (at your option) any later version.
|
+ *
|
+ * This program is distributed in the hope that it will be useful,
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+ * GNU General Public License for more details.
|
+ *
|
+ * You should have received a copy of the GNU General Public License
|
+ * along with this program; if not, write to the Free Software
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+ * MA 02111-1307 USA
|
+ */
|
+
|
+#ifndef __CONFIG_H
|
+#define __CONFIG_H
|
+
|
+/*
|
+ * High Level Configuration Options
|
+ * (easy to change)
|
+ */
|
+#define CONFIG_S3C6410 1 /* in a SAMSUNG S3C6410 SoC */
|
+#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
|
+#define CONFIG_OK6410 1 /* on a SAMSUNG OK6410 Board */
|
+#define CONFIG_OK6410_LED 1 /* LED on OK6410 Board */
|
+
|
+#define CONFIG_SKIP_RELOCATE_UBOOT
|
+
|
+#define CONFIG_PERIPORT_REMAP
|
+#define CONFIG_PERIPORT_BASE 0x70000000
|
+#define CONFIG_PERIPORT_SIZE 0x13
|
+
|
+#define CONFIG_SYS_SDRAM_BASE 0x50000000
|
+
|
+/* input clock of PLL: OK6410 has 12MHz input clock */
|
+#define CONFIG_SYS_CLK_FREQ 12000000
|
+
|
+#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
|
+#define CONFIG_ENABLE_MMU
|
+#endif
|
+
|
+#define CONFIG_SETUP_MEMORY_TAGS
|
+#define CONFIG_CMDLINE_TAG
|
+#define CONFIG_INITRD_TAG
|
+
|
+#define CONFIG_USE_UBIFS 1 /* Use UBIFS rootfs boot up*/
|
+
|
+/*
|
+ * Architecture magic and machine type, match linux-3.0/include/generated/mach-types.h
|
+ */
|
+#define MACH_TYPE 1626 /* MACH_TYPE_SMDK6410 in Linux kernel*/
|
+
|
+#define CONFIG_DISPLAY_CPUINFO
|
+#define CONFIG_DISPLAY_BOARDINFO
|
+
|
+/*
|
+ * Size of malloc() pool
|
+ */
|
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
|
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
|
+
|
+/*
|
+ * Hardware drivers
|
+ */
|
+#define CONFIG_NET_MULTI 1
|
+#define CONFIG_NET_RETRY_COUNT 20
|
+#define CONFIG_DRIVER_DM9000 1
|
+#define CONFIG_DM9000_BASE 0x18000300 //XM0CSN1
|
+#define DM9000_IO CONFIG_DM9000_BASE
|
+#define DM9000_DATA (CONFIG_DM9000_BASE+4) //ADDR2
|
+#define CONFIG_DM9000_USE_16BIT 1
|
+#define CONFIG_DM9000_NO_SROM 1
|
+#undef CONFIG_DM9000_DEBUG
|
+
|
+#define CONFIG_ETHADDR 08:00:60:26:0a:6b
|
+#define CONFIG_NETMASK 255.255.255.0
|
+#define CONFIG_IPADDR 192.168.1.246
|
+#define CONFIG_SERVERIP 192.168.1.2
|
+#define CONFIG_GATEWAYIP 192.168.1.1
|
+
|
+#define CONFIG_CPU "s3c6410"
|
+#define CONFIG_BURNBL "nand erase 0 100000;tftp 50000000 u-boot-$cpu.bin;nand write $fileaddr 0 $filesize"
|
+#define CONFIG_BURNKERNEL "tftp 50008000 linuxrom-$cpu.bin;nand erase 100000 a00000;nand write $fileaddr 100000 $filesize"
|
+#define CONFIG_TFTPBOOT "tftp 50008000 linuxrom-$cpu.bin;bootm $fileaddr"
|
+#define CONFIG_BOOTCOMMAND "nand read 50008000 100000 a00000;bootm 50008000"
|
+#define CONFIG_BOOTARGS "console=ttySAC,115200"
|
+
|
+#ifdef CONFIG_USE_UBIFS /* Use UBIFS rootfs file system */
|
+ #undef CONFIG_BOOTARGS
|
+ #define CONFIG_BOOTARGS "console=ttySAC,115200 mem=64M ubi.mtd=3 root=ubi0:rootfs rootwait rootfstype=ubifs rw loglevel=7"
|
+ #define CONFIG_BUBIFS "tftp 50800000 ubifs-$cpu.rootfs;nand erase 3800000 6400000;nand write 50800000 3800000 $filesize"
|
+#endif
|
+/*
|
+ * select serial console configuration
|
+ */
|
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OK6410 */
|
+
|
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
+#ifdef CONFIG_SYS_HUSH_PARSER
|
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
+#endif
|
+
|
+#define CONFIG_CMDLINE_EDITING
|
+
|
+/* allow to overwrite serial and ethaddr */
|
+#define CONFIG_ENV_OVERWRITE
|
+
|
+#define CONFIG_BAUDRATE 115200
|
+
|
+/***********************************************************
|
+ * Command definition
|
+ ***********************************************************/
|
+#include <config_cmd_default.h>
|
+
|
+#define CONFIG_CMD_CACHE
|
+#define CONFIG_CMD_REGINFO
|
+#define CONFIG_CMD_LOADS
|
+#define CONFIG_CMD_LOADB
|
+#define CONFIG_CMD_SAVEENV
|
+#define CONFIG_CMD_NAND
|
+#if defined(CONFIG_BOOT_ONENAND)
|
+#define CONFIG_CMD_ONENAND
|
+#endif
|
+#define CONFIG_CMD_PING
|
+#define CONFIG_CMD_ELF
|
+#define CONFIG_CMD_FAT
|
+#define CONFIG_CMD_EXT2
|
+
|
+#define CONFIG_BOOTDELAY 3
|
+
|
+#define CONFIG_ZERO_BOOTDELAY_CHECK
|
+
|
+#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
|
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
|
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
|
+#endif
|
+
|
+/*
|
+ * Miscellaneous configurable options
|
+ */
|
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
+#define CONFIG_SYS_PROMPT "[ OK6410A@guowenxue ]# " /* Monitor Command Prompt */
|
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
+#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
|
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
+
|
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
|
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
|
+
|
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
|
+
|
+#define CONFIG_SYS_HZ 1000
|
+
|
+/* valid baudrates */
|
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
+
|
+/*-----------------------------------------------------------------------
|
+ * Stack sizes
|
+ *
|
+ * The stack sizes are set up in start.S using the settings below
|
+ */
|
+#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */
|
+
|
+/**********************************
|
+ Support Clock Settings
|
+ **********************************
|
+ Setting SYNC ASYNC
|
+ ----------------------------------
|
+ 667_133_66 X O
|
+ 533_133_66 O O
|
+ 400_133_66 X O
|
+ 400_100_50 O O
|
+ **********************************/
|
+
|
+#define CONFIG_CLK_667_133_66
|
+/*
|
+#define CONFIG_CLK_533_133_66
|
+#define CONFIG_CLK_400_100_50
|
+#define CONFIG_CLK_400_133_66
|
+#define CONFIG_SYNC_MODE
|
+*/
|
+
|
+/* OK6410 has 2 banks of DRAM, but we use only one in U-Boot */
|
+#define CONFIG_NR_DRAM_BANKS 1
|
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
|
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
|
+
|
+#if 1 /* NOR flash - no real flash on this board, add by guowenxue */
|
+#define CONFIG_SYS_NO_FLASH 1
|
+#undef CONFIG_CMD_IMLS
|
+#else
|
+#define CONFIG_SYS_FLASH_BASE 0x10000000
|
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
|
+
|
+/*-----------------------------------------------------------------------
|
+ * FLASH and environment organization
|
+ */
|
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
+/* AM29LV160B has 35 sectors, AM29LV800B - 19 */
|
+#define CONFIG_SYS_MAX_FLASH_SECT 40
|
+
|
+#define CONFIG_AMD_LV800
|
+#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */
|
+/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
|
+#define CONFIG_FLASH_CFI_DRIVER 1
|
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
|
+#define CONFIG_FLASH_CFI_LEGACY
|
+#define CONFIG_SYS_FLASH_LEGACY_512Kx16
|
+
|
+/* timeout values are in ticks */
|
+#define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
+#define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
+#endif
|
+
|
+#define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
|
+#define CONFIG_ENV_OFFSET 0x0060000
|
+
|
+/*
|
+ * OK6410 board specific data
|
+ */
|
+
|
+#define CONFIG_IDENT_STRING " for OK6410 by Guo Wenxue<QQ: 281143292>"
|
+
|
+/* base address for uboot */
|
+#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
|
+/* total memory available to uboot */
|
+#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
|
+
|
+/* Put environment copies after the end of U-Boot owned RAM */
|
+//#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
|
+
|
+#ifdef CONFIG_ENABLE_MMU
|
+#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
|
+#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;bootm 0xc0018000"
|
+#else
|
+#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
|
+//#define CONFIG_BOOTCOMMAND "nand read 50008000 100000 a00000;bootm 50008000"
|
+#endif
|
+
|
+/* NAND U-Boot load and start address */
|
+#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
|
+
|
+
|
+/* NAND configuration */
|
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
+#define CONFIG_SYS_NAND_BASE 0x70200010
|
+#define CONFIG_SYS_S3C_NAND_HWECC
|
+
|
+#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
|
+#define CONFIG_SYS_NAND_WP 1
|
+#define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */
|
+#define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */
|
+
|
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */
|
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */
|
+
|
+#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */
|
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */
|
+
|
+/* NAND chip page size */
|
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
|
+/* NAND chip block size */
|
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
+/* NAND chip page per block count */
|
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
|
+/* Location of the bad-block label */
|
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
|
+/* Extra address cycle for > 128MiB */
|
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
+
|
+/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
|
+#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
|
+/* Number of ECC bytes per OOB - S3C6410 calculates 4 bytes ECC in 1-bit mode */
|
+#define CONFIG_SYS_NAND_ECCBYTES 4
|
+/* Number of ECC-blocks per NAND page */
|
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
|
+/* Size of a single OOB region */
|
+#define CONFIG_SYS_NAND_OOBSIZE 64
|
+/* Number of ECC bytes per page */
|
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
|
+/* ECC byte positions */
|
+#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
|
+ 48, 49, 50, 51, 52, 53, 54, 55, \
|
+ 56, 57, 58, 59, 60, 61, 62, 63}
|
+
|
+/* Boot configuration (define only one of next 3) */
|
+#define CONFIG_BOOT_NAND
|
+/* None of these are currently implemented. Left from the original Samsung
|
+ * version for reference
|
+#define CONFIG_BOOT_NOR
|
+#define CONFIG_BOOT_MOVINAND
|
+#define CONFIG_BOOT_ONENAND
|
+*/
|
+
|
+#define CONFIG_NAND
|
+#define CONFIG_NAND_S3C64XX
|
+/* Unimplemented or unsupported. See comment above.
|
+#define CONFIG_ONENAND
|
+#define CONFIG_MOVINAND
|
+*/
|
+
|
+/* Settings as above boot configuration */
|
+#define CONFIG_ENV_IS_IN_NAND
|
+
|
+#if !defined(CONFIG_ENABLE_MMU)
|
+#define CONFIG_CMD_USB 1
|
+#define CONFIG_USB_S3C64XX
|
+#define CONFIG_USB_OHCI_NEW 1
|
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
|
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6410"
|
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
|
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
|
+
|
+#define CONFIG_USB_STORAGE 1
|
+#endif
|
+#define CONFIG_DOS_PARTITION 1
|
+
|
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
|
+# error "usb_ohci.c is currently broken with MMU enabled."
|
+#endif
|
+
|
+#ifdef CONFIG_USE_UBIFS /* Enable UBIFS support */
|
+#define CONFIG_CMD_UBI
|
+#define CONFIG_CMD_UBIFS
|
+#define CONFIG_RBTREE
|
+#define CONFIG_LZO
|
+
|
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
|
+#define CONFIG_MTD_PARTITIONS
|
+#define CONFIG_CMD_MTDPARTS
|
+#define MTDIDS_DEFAULT "nand0=nand0"
|
+#define MTDPARTS_DEFAULT "mtdparts=nand0:1m(u-boot),15m(kernel),40m(rootfs),100m(rootfs),-(user)"
|
+#define MTD_ACTIVE_PART "nand0,3"
|
+#endif /* end of CONFIG_USE_UBIFS*/
|
+
|
+#endif /* __CONFIG_H */
|
diff -Nuar u-boot-2010.09/Makefile u-boot-2010.09-ok6410/Makefile
|
--- u-boot-2010.09/Makefile 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/Makefile 2014-01-04 09:13:24.780447865 +0800
|
@@ -154,6 +154,8 @@
|
# load ARCH, BOARD, and CPU configuration
|
include $(obj)include/config.mk
|
export ARCH CPU BOARD VENDOR SOC
|
+ARCH=arm
|
+CROSS_COMPILE ?= /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
|
|
# set default to nothing for native builds
|
ifeq ($(HOSTARCH),$(ARCH))
|
@@ -308,6 +310,7 @@
|
ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
|
|
all: $(ALL)
|
+ cp u-boot.bin u-boot-s3c6410.bin
|
|
$(obj)u-boot.hex: $(obj)u-boot
|
$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
|
@@ -2242,6 +2245,12 @@
|
@$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
|
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
|
+ok6410_config : unconfig
|
+ @echo "#define CONFiG_NAND_U_BOOT" > $(obj)include/config.h
|
+ @echo "RAM_TEXT = 0x57e00000" >> $(obj)board/kkernel/ok6410/config.tmp;
|
+ @$(MKCONFIG) ok6410 arm arm1176 ok6410 kkernel s3c64xx
|
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
+
|
#========================================================================
|
# MIPS
|
#========================================================================
|
diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/config.mk u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/config.mk
|
--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/config.mk 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/config.mk 2014-01-04 09:13:24.780447865 +0800
|
@@ -0,0 +1,40 @@
|
+#
|
+# (C) Copyright 2006
|
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
+#
|
+# See file CREDITS for list of people who contributed to this
|
+# project.
|
+#
|
+# This program is free software; you can redistribute it and/or
|
+# modify it under the terms of the GNU General Public License as
|
+# published by the Free Software Foundation; either version 2 of
|
+# the License, or (at your option) any later version.
|
+#
|
+# This program is distributed in the hope that it will be useful,
|
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+# GNU General Public License for more details.
|
+#
|
+# You should have received a copy of the GNU General Public License
|
+# along with this program; if not, write to the Free Software
|
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+# MA 02111-1307 USA
|
+#
|
+#
|
+# Samsung S3C64xx Reference Platform (smdk6400) board
|
+
|
+# TEXT_BASE for SPL:
|
+#
|
+# On S3C64xx platforms the SPL is located in SRAM at 0.
|
+#
|
+# TEXT_BASE = 0
|
+
|
+include $(TOPDIR)/board/$(BOARDDIR)/config.mk
|
+
|
+# PAD_TO used to generate a 4kByte binary needed for the combined image
|
+# -> PAD_TO = TEXT_BASE + 4096
|
+PAD_TO := $(shell expr $$[$(TEXT_BASE) + 4096])
|
+
|
+ifeq ($(debug),1)
|
+PLATFORM_CPPFLAGS += -DDEBUG
|
+endif
|
diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/Makefile u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/Makefile
|
--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/Makefile 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/Makefile 2014-01-04 09:13:24.781447895 +0800
|
@@ -0,0 +1,113 @@
|
+#
|
+# (C) Copyright 2006-2007
|
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
+#
|
+# (C) Copyright 2008
|
+# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+#
|
+# See file CREDITS for list of people who contributed to this
|
+# project.
|
+#
|
+# This program is free software; you can redistribute it and/or
|
+# modify it under the terms of the GNU General Public License as
|
+# published by the Free Software Foundation; either version 2 of
|
+# the License, or (at your option) any later version.
|
+#
|
+# This program is distributed in the hope that it will be useful,
|
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+# GNU General Public License for more details.
|
+#
|
+# You should have received a copy of the GNU General Public License
|
+# along with this program; if not, write to the Free Software
|
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+# MA 02111-1307 USA
|
+#
|
+
|
+CONFIG_NAND_SPL = y
|
+
|
+include $(TOPDIR)/config.mk
|
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
|
+
|
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
|
+AFLAGS += -DCONFIG_NAND_SPL
|
+CFLAGS += -DCONFIG_NAND_SPL
|
+
|
+SOBJS = start.o cpu_init.o lowlevel_init.o
|
+COBJS = nand_boot.o nand_ecc.o s3c64xx.o nand_cp.o
|
+
|
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
+__OBJS := $(SOBJS) $(COBJS)
|
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
|
+
|
+nandobj := $(OBJTREE)/nand_spl/
|
+
|
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
|
+
|
+all: $(obj).depend $(ALL)
|
+
|
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
|
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
|
+
|
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
|
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
+
|
+$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
|
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
|
+ -Map $(nandobj)u-boot-spl.map \
|
+ -o $(nandobj)u-boot-spl
|
+
|
+$(nandobj)u-boot.lds: $(LDSCRIPT)
|
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
|
+
|
+# create symbolic links for common files
|
+
|
+# from cpu directory
|
+$(obj)start.S:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
|
+
|
+# from SoC directory
|
+$(obj)cpu_init.S:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
|
+
|
+# from board directory
|
+$(obj)lowlevel_init.S:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/board/kkernel/ok6410/lowlevel_init.S $@
|
+
|
+$(obj)nand_cp.c:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/board/kkernel/ok6410/nand_cp.c $@
|
+
|
+# from nand_spl directory
|
+$(obj)nand_boot.c:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
|
+
|
+# from drivers/mtd/nand directory
|
+$(obj)nand_ecc.c:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/drivers/mtd/nand/nand_ecc.c $@
|
+
|
+$(obj)s3c64xx.c:
|
+ @rm -f $@
|
+ @ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
|
+
|
+#########################################################################
|
+
|
+$(obj)%.o: $(obj)%.S
|
+ $(CC) $(AFLAGS) -c -o $@ $<
|
+
|
+$(obj)%.o: $(obj)%.c
|
+ $(CC) $(CFLAGS) -c -o $@ $<
|
+
|
+# defines $(obj).depend target
|
+include $(SRCTREE)/rules.mk
|
+
|
+sinclude $(obj).depend
|
+
|
+#########################################################################
|
diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/u-boot.lds u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/u-boot.lds
|
--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/u-boot.lds 1970-01-01 08:00:00.000000000 +0800
|
+++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/u-boot.lds 2014-01-04 09:13:24.781447895 +0800
|
@@ -0,0 +1,61 @@
|
+/*
|
+ * (C) Copyright 2002
|
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
+ *
|
+ * (C) Copyright 2008
|
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
+ *
|
+ * See file CREDITS for list of people who contributed to this
|
+ * project.
|
+ *
|
+ * This program is free software; you can redistribute it and/or
|
+ * modify it under the terms of the GNU General Public License as
|
+ * published by the Free Software Foundation; either version 2 of
|
+ * the License, or (at your option) any later version.
|
+ *
|
+ * This program is distributed in the hope that it will be useful,
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
+ * GNU General Public License for more details.
|
+ *
|
+ * You should have received a copy of the GNU General Public License
|
+ * along with this program; if not, write to the Free Software
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
+ * MA 02111-1307 USA
|
+ */
|
+
|
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
+OUTPUT_ARCH(arm)
|
+ENTRY(_start)
|
+SECTIONS
|
+{
|
+ . = 0x00000000;
|
+
|
+ . = ALIGN(4);
|
+ .text :
|
+ {
|
+ start.o (.text)
|
+ cpu_init.o (.text)
|
+ nand_boot.o (.text)
|
+
|
+ *(.text)
|
+ }
|
+
|
+ . = ALIGN(4);
|
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
+
|
+ . = ALIGN(4);
|
+ .data : { *(.data) }
|
+
|
+ . = ALIGN(4);
|
+ .got : { *(.got) }
|
+
|
+ __u_boot_cmd_start = .;
|
+ .u_boot_cmd : { *(.u_boot_cmd) }
|
+ __u_boot_cmd_end = .;
|
+
|
+ . = ALIGN(4);
|
+ __bss_start = .;
|
+ .bss : { *(.bss) . = ALIGN(4); }
|
+ _end = .;
|
+}
|
diff -Nuar u-boot-2010.09/net/net.c u-boot-2010.09-ok6410/net/net.c
|
--- u-boot-2010.09/net/net.c 2010-09-29 05:20:55.000000000 +0800
|
+++ u-boot-2010.09-ok6410/net/net.c 2014-01-04 09:13:24.782447844 +0800
|
@@ -527,6 +527,11 @@
|
printf("Bytes transferred = %ld (%lx hex)\n",
|
NetBootFileXferSize,
|
NetBootFileXferSize);
|
+ #define PAGESIZE_BIT 17 /* Add by guowenxue to make the filesize page align */
|
+ if(NetBootFileXferSize%(1<<PAGESIZE_BIT))
|
+ {
|
+ NetBootFileXferSize = ((NetBootFileXferSize>>PAGESIZE_BIT)+1) <<PAGESIZE_BIT;
|
+ }
|
sprintf(buf, "%lX", NetBootFileXferSize);
|
setenv("filesize", buf);
|
|
