/*
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* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MT76_MAC_H
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#define __MT76_MAC_H
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struct mt76_tx_status {
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u8 valid:1;
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u8 success:1;
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u8 aggr:1;
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u8 ack_req:1;
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u8 is_probe:1;
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u8 wcid;
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u8 pktid;
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u8 retry;
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u16 rate;
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} __packed __aligned(2);
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/* Note: values in original "RSSI" and "SNR" fields are not actually what they
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* are called for MT7601U, names used by this driver are educated guesses
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* (see vendor mac/ral_omac.c).
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*/
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struct mt7601u_rxwi {
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__le32 rxinfo;
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__le32 ctl;
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__le16 frag_sn;
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__le16 rate;
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u8 unknown;
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u8 zero[3];
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u8 snr;
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u8 ant;
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u8 gain;
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u8 freq_off;
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__le32 resv2;
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__le32 expert_ant;
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} __packed __aligned(4);
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#define MT_RXINFO_BA BIT(0)
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#define MT_RXINFO_DATA BIT(1)
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#define MT_RXINFO_NULL BIT(2)
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#define MT_RXINFO_FRAG BIT(3)
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#define MT_RXINFO_U2M BIT(4)
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#define MT_RXINFO_MULTICAST BIT(5)
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#define MT_RXINFO_BROADCAST BIT(6)
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#define MT_RXINFO_MYBSS BIT(7)
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#define MT_RXINFO_CRCERR BIT(8)
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#define MT_RXINFO_ICVERR BIT(9)
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#define MT_RXINFO_MICERR BIT(10)
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#define MT_RXINFO_AMSDU BIT(11)
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#define MT_RXINFO_HTC BIT(12)
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#define MT_RXINFO_RSSI BIT(13)
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#define MT_RXINFO_L2PAD BIT(14)
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#define MT_RXINFO_AMPDU BIT(15)
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#define MT_RXINFO_DECRYPT BIT(16)
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#define MT_RXINFO_BSSIDX3 BIT(17)
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#define MT_RXINFO_WAPI_KEY BIT(18)
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#define MT_RXINFO_PN_LEN GENMASK(21, 19)
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#define MT_RXINFO_SW_PKT_80211 BIT(22)
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#define MT_RXINFO_TCP_SUM_BYPASS BIT(28)
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#define MT_RXINFO_IP_SUM_BYPASS BIT(29)
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#define MT_RXINFO_TCP_SUM_ERR BIT(30)
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#define MT_RXINFO_IP_SUM_ERR BIT(31)
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#define MT_RXWI_CTL_WCID GENMASK(7, 0)
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#define MT_RXWI_CTL_KEY_IDX GENMASK(9, 8)
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#define MT_RXWI_CTL_BSS_IDX GENMASK(12, 10)
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#define MT_RXWI_CTL_UDF GENMASK(15, 13)
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#define MT_RXWI_CTL_MPDU_LEN GENMASK(27, 16)
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#define MT_RXWI_CTL_TID GENMASK(31, 28)
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#define MT_RXWI_FRAG GENMASK(3, 0)
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#define MT_RXWI_SN GENMASK(15, 4)
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#define MT_RXWI_RATE_MCS GENMASK(6, 0)
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#define MT_RXWI_RATE_BW BIT(7)
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#define MT_RXWI_RATE_SGI BIT(8)
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#define MT_RXWI_RATE_STBC GENMASK(10, 9)
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#define MT_RXWI_RATE_ETXBF BIT(11)
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#define MT_RXWI_RATE_SND BIT(12)
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#define MT_RXWI_RATE_ITXBF BIT(13)
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#define MT_RXWI_RATE_PHY GENMASK(15, 14)
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#define MT_RXWI_GAIN_RSSI_VAL GENMASK(5, 0)
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#define MT_RXWI_GAIN_RSSI_LNA_ID GENMASK(7, 6)
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#define MT_RXWI_ANT_AUX_LNA BIT(7)
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#define MT_RXWI_EANT_ENC_ANT_ID GENMASK(7, 0)
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enum mt76_phy_type {
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MT_PHY_TYPE_CCK,
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MT_PHY_TYPE_OFDM,
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MT_PHY_TYPE_HT,
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MT_PHY_TYPE_HT_GF,
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};
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enum mt76_phy_bandwidth {
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MT_PHY_BW_20,
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MT_PHY_BW_40,
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};
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struct mt76_txwi {
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__le16 flags;
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__le16 rate_ctl;
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u8 ack_ctl;
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u8 wcid;
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__le16 len_ctl;
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__le32 iv;
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__le32 eiv;
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u8 aid;
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u8 txstream;
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__le16 ctl;
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} __packed __aligned(4);
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#define MT_TXWI_FLAGS_FRAG BIT(0)
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#define MT_TXWI_FLAGS_MMPS BIT(1)
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#define MT_TXWI_FLAGS_CFACK BIT(2)
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#define MT_TXWI_FLAGS_TS BIT(3)
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#define MT_TXWI_FLAGS_AMPDU BIT(4)
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#define MT_TXWI_FLAGS_MPDU_DENSITY GENMASK(7, 5)
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#define MT_TXWI_FLAGS_TXOP GENMASK(9, 8)
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#define MT_TXWI_FLAGS_CWMIN GENMASK(12, 10)
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#define MT_TXWI_FLAGS_NO_RATE_FALLBACK BIT(13)
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#define MT_TXWI_FLAGS_TX_RPT BIT(14)
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#define MT_TXWI_FLAGS_TX_RATE_LUT BIT(15)
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#define MT_TXWI_RATE_MCS GENMASK(6, 0)
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#define MT_TXWI_RATE_BW BIT(7)
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#define MT_TXWI_RATE_SGI BIT(8)
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#define MT_TXWI_RATE_STBC GENMASK(10, 9)
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#define MT_TXWI_RATE_PHY_MODE GENMASK(15, 14)
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#define MT_TXWI_ACK_CTL_REQ BIT(0)
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#define MT_TXWI_ACK_CTL_NSEQ BIT(1)
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#define MT_TXWI_ACK_CTL_BA_WINDOW GENMASK(7, 2)
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#define MT_TXWI_LEN_BYTE_CNT GENMASK(11, 0)
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#define MT_TXWI_LEN_PKTID GENMASK(15, 12)
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#define MT_TXWI_CTL_TX_POWER_ADJ GENMASK(3, 0)
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#define MT_TXWI_CTL_CHAN_CHECK_PKT BIT(4)
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#define MT_TXWI_CTL_PIFS_REV BIT(6)
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u32 mt76_mac_process_rx(struct mt7601u_dev *dev, struct sk_buff *skb,
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u8 *data, void *rxi);
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int mt76_mac_wcid_set_key(struct mt7601u_dev *dev, u8 idx,
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struct ieee80211_key_conf *key);
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void mt76_mac_wcid_set_rate(struct mt7601u_dev *dev, struct mt76_wcid *wcid,
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const struct ieee80211_tx_rate *rate);
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int mt76_mac_shared_key_setup(struct mt7601u_dev *dev, u8 vif_idx, u8 key_idx,
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struct ieee80211_key_conf *key);
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u16 mt76_mac_tx_rate_val(struct mt7601u_dev *dev,
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const struct ieee80211_tx_rate *rate, u8 *nss_val);
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struct mt76_tx_status
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mt7601u_mac_fetch_tx_status(struct mt7601u_dev *dev);
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void mt76_send_tx_status(struct mt7601u_dev *dev, struct mt76_tx_status *stat);
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#endif
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