/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#if PHYDM_SUPPORT_EDCA
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void
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odm_edca_turbo_init(
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void *p_dm_void)
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{
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struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct _ADAPTER *adapter = NULL;
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HAL_DATA_TYPE *p_hal_data = NULL;
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if (p_dm_odm->adapter == NULL) {
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboInit fail!!!\n"));
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return;
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}
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adapter = p_dm_odm->adapter;
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p_hal_data = GET_HAL_DATA(adapter);
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p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
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p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
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p_hal_data->is_any_non_be_pkts = false;
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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struct _ADAPTER *adapter = p_dm_odm->adapter;
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p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
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p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
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adapter->recvpriv.is_any_non_be_pkts = false;
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#endif
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VO_PARAM)));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VI_PARAM)));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BK_PARAM)));
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} /* ODM_InitEdcaTurbo */
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void
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odm_edca_turbo_check(
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void *p_dm_void
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)
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{
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/* */
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/* For AP/ADSL use struct rtl8192cd_priv* */
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/* For CE/NIC use struct _ADAPTER* */
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/* */
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/* */
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/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
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/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
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/* HW dynamic mechanism. */
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/* */
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struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_edca_turbo_check========================>\n"));
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if (!(p_dm_odm->support_ability & ODM_MAC_EDCA_TURBO))
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return;
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switch (p_dm_odm->support_platform) {
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case ODM_WIN:
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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odm_edca_turbo_check_mp(p_dm_odm);
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#endif
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break;
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case ODM_CE:
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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odm_edca_turbo_check_ce(p_dm_odm);
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#endif
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break;
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}
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_edca_turbo_check\n"));
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} /* odm_CheckEdcaTurbo */
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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void
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odm_edca_turbo_check_ce(
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void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _ADAPTER *adapter = p_dm_odm->adapter;
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u32 EDCA_BE_UL = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_UL[p_mgnt_info->iot_peer]; */
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u32 EDCA_BE_DL = 0x00a42b;/* Parameter suggested by Scott */ /* edca_setting_DL[p_mgnt_info->iot_peer]; */
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u32 ic_type = p_dm_odm->support_ic_type;
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u32 iot_peer = 0;
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u8 wireless_mode = 0xFF; /* invalid value */
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u32 traffic_index;
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u32 edca_param;
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u64 cur_tx_bytes = 0;
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u64 cur_rx_bytes = 0;
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u8 bbtchange = _TRUE;
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u8 is_bias_on_rx = _FALSE;
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HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter);
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struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
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struct recv_priv *precvpriv = &(adapter->recvpriv);
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struct registry_priv *pregpriv = &adapter->registrypriv;
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struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
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struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
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if (p_dm_odm->is_linked != _TRUE) {
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precvpriv->is_any_non_be_pkts = _FALSE;
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return;
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}
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if ((pregpriv->wifi_spec == 1)) { /* || (pmlmeinfo->HT_enable == 0)) */
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precvpriv->is_any_non_be_pkts = _FALSE;
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return;
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}
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if (p_dm_odm->p_wireless_mode != NULL)
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wireless_mode = *(p_dm_odm->p_wireless_mode);
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iot_peer = pmlmeinfo->assoc_AP_vendor;
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if (iot_peer >= HT_IOT_PEER_MAX) {
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precvpriv->is_any_non_be_pkts = _FALSE;
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return;
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}
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if (p_dm_odm->support_ic_type & ODM_RTL8188E) {
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if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS))
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is_bias_on_rx = _TRUE;
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}
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/* Check if the status needs to be changed. */
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if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) {
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cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;
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cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;
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/* traffic, TX or RX */
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if (is_bias_on_rx) {
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if (cur_tx_bytes > (cur_rx_bytes << 2)) {
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/* Uplink TP is present. */
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traffic_index = UP_LINK;
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} else {
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/* Balance TP is present. */
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traffic_index = DOWN_LINK;
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}
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} else {
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if (cur_rx_bytes > (cur_tx_bytes << 2)) {
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/* Downlink TP is present. */
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traffic_index = DOWN_LINK;
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} else {
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/* Balance TP is present. */
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traffic_index = UP_LINK;
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}
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}
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/* if ((p_dm_odm->dm_edca_table.prv_traffic_idx != traffic_index) || (!p_dm_odm->dm_edca_table.is_current_turbo_edca)) */
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{
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if (p_dm_odm->support_interface == ODM_ITRF_PCIE) {
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EDCA_BE_UL = 0x6ea42b;
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EDCA_BE_DL = 0x6ea42b;
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}
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/* 92D txop can't be set to 0x3e for cisco1250 */
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if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
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EDCA_BE_DL = edca_setting_DL[iot_peer];
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EDCA_BE_UL = edca_setting_UL[iot_peer];
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}
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/* merge from 92s_92c_merge temp brunch v2445 20120215 */
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else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
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EDCA_BE_DL = edca_setting_dl_g_mode[iot_peer];
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else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
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EDCA_BE_DL = 0xa630;
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else if (iot_peer == HT_IOT_PEER_MARVELL) {
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EDCA_BE_DL = edca_setting_DL[iot_peer];
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EDCA_BE_UL = edca_setting_UL[iot_peer];
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} else if (iot_peer == HT_IOT_PEER_ATHEROS) {
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/* Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. */
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EDCA_BE_DL = edca_setting_DL[iot_peer];
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}
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if ((ic_type == ODM_RTL8812) || (ic_type == ODM_RTL8821) || (ic_type == ODM_RTL8192E)) { /* add 8812AU/8812AE */
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EDCA_BE_UL = 0x5ea42b;
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EDCA_BE_DL = 0x5ea42b;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x", EDCA_BE_UL, EDCA_BE_DL));
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}
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if (traffic_index == DOWN_LINK)
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edca_param = EDCA_BE_DL;
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else
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edca_param = EDCA_BE_UL;
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rtw_write32(adapter, REG_EDCA_BE_PARAM, edca_param);
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p_dm_odm->dm_edca_table.prv_traffic_idx = traffic_index;
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}
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p_dm_odm->dm_edca_table.is_current_turbo_edca = _TRUE;
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} else {
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/* */
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/* Turn Off EDCA turbo here. */
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/* Restore original EDCA according to the declaration of AP. */
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/* */
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if (p_dm_odm->dm_edca_table.is_current_turbo_edca) {
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rtw_write32(adapter, REG_EDCA_BE_PARAM, p_hal_data->ac_param_be);
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p_dm_odm->dm_edca_table.is_current_turbo_edca = _FALSE;
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}
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}
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}
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#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void
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odm_edca_turbo_check_mp(
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void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _ADAPTER *adapter = p_dm_odm->adapter;
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HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
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struct _ADAPTER *p_default_adapter = get_default_adapter(adapter);
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struct _ADAPTER *p_ext_adapter = get_first_ext_adapter(adapter); /* NULL; */
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PMGNT_INFO p_mgnt_info = &adapter->MgntInfo;
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PSTA_QOS p_sta_qos = adapter->MgntInfo.p_sta_qos;
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/* [Win7 count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's adapter is always Default. 2009.08.20, by Bohn */
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u64 ext_cur_tx_ok_cnt = 0;
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u64 ext_cur_rx_ok_cnt = 0;
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/* For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
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u8 two_port_status = (u8)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
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/* Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. */
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u64 cur_tx_ok_cnt = 0;
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u64 cur_rx_ok_cnt = 0;
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u32 EDCA_BE_UL = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_UL[p_mgnt_info->iot_peer]; */
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u32 EDCA_BE_DL = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_DL[p_mgnt_info->iot_peer]; */
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u32 EDCA_BE = 0x5ea42b;
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u8 iot_peer = 0;
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bool *p_is_cur_rdl_state = NULL;
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bool is_last_is_cur_rdl_state = false;
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bool is_bias_on_rx = false;
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bool is_edca_turbo_on = false;
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u8 tx_rate = 0xFF;
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u64 value64;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_edca_turbo_check_mp========================>"));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
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/* *******************************
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* list paramter for different platform
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* ******************************* */
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is_last_is_cur_rdl_state = p_dm_odm->dm_edca_table.is_cur_rdl_state;
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p_is_cur_rdl_state = &(p_dm_odm->dm_edca_table.is_cur_rdl_state);
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/* 2012/09/14 MH Add */
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if (p_mgnt_info->num_non_be_pkt > p_mgnt_info->reg_edca_thresh && !(adapter->MgntInfo.wifi_confg & RT_WIFI_LOGO))
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p_hal_data->is_any_non_be_pkts = true;
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p_mgnt_info->num_non_be_pkt = 0;
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/* Caculate TX/RX TP: */
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cur_tx_ok_cnt = p_dm_odm->cur_tx_ok_cnt;
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cur_rx_ok_cnt = p_dm_odm->cur_rx_ok_cnt;
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if (p_ext_adapter == NULL)
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p_ext_adapter = p_default_adapter;
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ext_cur_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast - p_mgnt_info->ext_last_tx_ok_cnt;
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ext_cur_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast - p_mgnt_info->ext_last_rx_ok_cnt;
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get_two_port_shared_resource(adapter, TWO_PORT_SHARED_OBJECT__STATUS, NULL, &two_port_status);
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/* For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
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if (two_port_status == TWO_PORT_STATUS__EXTENSION_ONLY) {
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cur_tx_ok_cnt = ext_cur_tx_ok_cnt ;
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cur_rx_ok_cnt = ext_cur_rx_ok_cnt ;
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}
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/* */
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iot_peer = p_mgnt_info->iot_peer;
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is_bias_on_rx = (p_mgnt_info->iot_action & HT_IOT_ACT_EDCA_BIAS_ON_RX) ? true : false;
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is_edca_turbo_on = ((!p_hal_data->is_any_non_be_pkts)) ? true : false;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_any_non_be_pkts : 0x%lx\n", p_hal_data->is_any_non_be_pkts));
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/* *******************************
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* check if edca turbo is disabled
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* ******************************* */
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if (odm_is_edca_turbo_disable(p_dm_odm)) {
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p_hal_data->is_any_non_be_pkts = false;
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p_mgnt_info->last_tx_ok_cnt = adapter->tx_stats.num_tx_bytes_unicast;
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p_mgnt_info->last_rx_ok_cnt = adapter->rx_stats.num_rx_bytes_unicast;
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p_mgnt_info->ext_last_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast;
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p_mgnt_info->ext_last_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast;
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}
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/* *******************************
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* remove iot case out
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* ******************************* */
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odm_edca_para_sel_by_iot(p_dm_odm, &EDCA_BE_UL, &EDCA_BE_DL);
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/* *******************************
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* Check if the status needs to be changed.
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* ******************************* */
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if (is_edca_turbo_on) {
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_edca_turbo_on : 0x%x is_bias_on_rx : 0x%x\n", is_edca_turbo_on, is_bias_on_rx));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_tx_ok_cnt : 0x%lx\n", cur_tx_ok_cnt));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_rx_ok_cnt : 0x%lx\n", cur_rx_ok_cnt));
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if (is_bias_on_rx)
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odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt, true, p_is_cur_rdl_state);
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else
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odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt, false, p_is_cur_rdl_state);
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/* modify by Guo.Mingzhi 2011-12-29 */
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if (adapter->AP_EDCA_PARAM[0] != EDCA_BE)
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EDCA_BE = adapter->AP_EDCA_PARAM[0];
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else
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EDCA_BE = ((*p_is_cur_rdl_state) == true) ? EDCA_BE_DL : EDCA_BE_UL;
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/*For TPLINK 8188EU test*/
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if ((IS_HARDWARE_TYPE_8188EU(adapter)) && (p_hal_data->UndecoratedSmoothedPWDB < 28)) { /* Set to origimal EDCA 0x5EA42B now need to update.*/
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} else { /*Use TPLINK preferred EDCA parameters.*/
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EDCA_BE = p_mgnt_info->EDCABEPara;
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}
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if (IS_HARDWARE_TYPE_8821U(adapter)) {
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if (p_mgnt_info->reg_tx_duty_enable) {
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/* 2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) */
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if (!p_mgnt_info->forced_data_rate) { /* auto rate */
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if (p_dm_odm->tx_rate != 0xFF)
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tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
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} else /* force rate */
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tx_rate = (u8) p_mgnt_info->forced_data_rate;
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value64 = (cur_rx_ok_cnt << 2);
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if (cur_tx_ok_cnt < value64) /* Downlink */
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
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else { /* Uplink */
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/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
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/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
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if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
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else {
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switch (tx_rate) {
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case MGN_VHT1SS_MCS6:
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case MGN_VHT1SS_MCS5:
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case MGN_MCS6:
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case MGN_MCS5:
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case MGN_48M:
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case MGN_54M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea42b);
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break;
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case MGN_VHT1SS_MCS4:
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case MGN_MCS4:
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case MGN_36M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa42b);
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break;
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case MGN_VHT1SS_MCS3:
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case MGN_MCS3:
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case MGN_24M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa47f);
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break;
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case MGN_VHT1SS_MCS2:
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case MGN_MCS2:
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case MGN_18M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa57f);
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break;
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case MGN_VHT1SS_MCS1:
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case MGN_MCS1:
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case MGN_9M:
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case MGN_12M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa77f);
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break;
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case MGN_VHT1SS_MCS0:
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case MGN_MCS0:
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case MGN_6M:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
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break;
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default:
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
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break;
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}
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}
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}
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} else
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odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
|
} else if (IS_HARDWARE_TYPE_8812AU(adapter)) {
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if (p_mgnt_info->reg_tx_duty_enable) {
|
/* 2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) */
|
/* it;s the same issue as 8811AU */
|
if (!p_mgnt_info->forced_data_rate) { /* auto rate */
|
if (p_dm_odm->tx_rate != 0xFF)
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tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
|
} else /* force rate */
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tx_rate = (u8) p_mgnt_info->forced_data_rate;
|
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value64 = (cur_rx_ok_cnt << 2);
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if (cur_tx_ok_cnt < value64) /* Downlink */
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
else { /* Uplink */
|
/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
|
/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
|
if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
else {
|
switch (tx_rate) {
|
case MGN_VHT2SS_MCS9:
|
case MGN_VHT1SS_MCS9:
|
case MGN_VHT1SS_MCS8:
|
case MGN_MCS15:
|
case MGN_MCS7:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea44f);
|
case MGN_VHT2SS_MCS8:
|
case MGN_VHT1SS_MCS7:
|
case MGN_MCS14:
|
case MGN_MCS6:
|
case MGN_54M:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa44f);
|
case MGN_VHT2SS_MCS7:
|
case MGN_VHT2SS_MCS6:
|
case MGN_VHT1SS_MCS6:
|
case MGN_VHT1SS_MCS5:
|
case MGN_MCS13:
|
case MGN_MCS5:
|
case MGN_48M:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa630);
|
break;
|
case MGN_VHT2SS_MCS5:
|
case MGN_VHT2SS_MCS4:
|
case MGN_VHT1SS_MCS4:
|
case MGN_VHT1SS_MCS3:
|
case MGN_MCS12:
|
case MGN_MCS4:
|
case MGN_MCS3:
|
case MGN_36M:
|
case MGN_24M:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa730);
|
break;
|
case MGN_VHT2SS_MCS3:
|
case MGN_VHT2SS_MCS2:
|
case MGN_VHT2SS_MCS1:
|
case MGN_VHT1SS_MCS2:
|
case MGN_VHT1SS_MCS1:
|
case MGN_MCS11:
|
case MGN_MCS10:
|
case MGN_MCS9:
|
case MGN_MCS2:
|
case MGN_MCS1:
|
case MGN_18M:
|
case MGN_12M:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa830);
|
break;
|
case MGN_VHT2SS_MCS0:
|
case MGN_VHT1SS_MCS0:
|
case MGN_MCS0:
|
case MGN_MCS8:
|
case MGN_9M:
|
case MGN_6M:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
|
break;
|
default:
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
break;
|
}
|
}
|
}
|
} else
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
} else
|
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
|
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA Turbo on: EDCA_BE:0x%lx\n", EDCA_BE));
|
|
p_dm_odm->dm_edca_table.is_current_turbo_edca = true;
|
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx\n", EDCA_BE_DL, EDCA_BE_UL, EDCA_BE));
|
|
} else {
|
/* Turn Off EDCA turbo here. */
|
/* Restore original EDCA according to the declaration of AP. */
|
if (p_dm_odm->dm_edca_table.is_current_turbo_edca) {
|
phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(p_sta_qos->wmm_param_ele, AC0_BE));
|
|
p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Restore EDCA BE: 0x%lx\n", p_dm_odm->WMMEDCA_BE));
|
|
}
|
}
|
|
}
|
|
|
/* check if edca turbo is disabled */
|
bool
|
odm_is_edca_turbo_disable(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
PMGNT_INFO p_mgnt_info = &adapter->MgntInfo;
|
u32 iot_peer = p_mgnt_info->iot_peer;
|
|
if (p_dm_odm->is_bt_disable_edca_turbo) {
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));
|
return true;
|
}
|
|
if ((!(p_dm_odm->support_ability & ODM_MAC_EDCA_TURBO)) ||
|
(p_dm_odm->wifi_test & RT_WIFI_LOGO) ||
|
(iot_peer >= HT_IOT_PEER_MAX)) {
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboDisable\n"));
|
return true;
|
}
|
|
|
/* 1. We do not turn on EDCA turbo mode for some AP that has IOT issue */
|
/* 2. User may disable EDCA Turbo mode with OID settings. */
|
if (p_mgnt_info->iot_action & HT_IOT_ACT_DISABLE_EDCA_TURBO) {
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("iot_action:EdcaTurboDisable\n"));
|
return true;
|
}
|
|
return false;
|
|
|
}
|
|
/* add iot case here: for MP/CE */
|
void
|
odm_edca_para_sel_by_iot(
|
void *p_dm_void,
|
u32 *EDCA_BE_UL,
|
u32 *EDCA_BE_DL
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
u32 iot_peer = 0;
|
u32 ic_type = p_dm_odm->support_ic_type;
|
u8 wireless_mode = 0xFF; /* invalid value */
|
u32 iot_peer_sub_type = 0;
|
|
PMGNT_INFO p_mgnt_info = &adapter->MgntInfo;
|
u8 two_port_status = (u8)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
|
|
if (p_dm_odm->p_wireless_mode != NULL)
|
wireless_mode = *(p_dm_odm->p_wireless_mode);
|
|
/* ========================================================= */
|
/* list paramter for different platform */
|
|
iot_peer = p_mgnt_info->iot_peer;
|
iot_peer_sub_type = p_mgnt_info->iot_peer_subtype;
|
get_two_port_shared_resource(adapter, TWO_PORT_SHARED_OBJECT__STATUS, NULL, &two_port_status);
|
|
/* ****************************
|
* / IOT case for MP
|
* **************************** */
|
if (p_dm_odm->support_interface == ODM_ITRF_PCIE) {
|
(*EDCA_BE_UL) = 0x6ea42b;
|
(*EDCA_BE_DL) = 0x6ea42b;
|
}
|
|
if (two_port_status == TWO_PORT_STATUS__EXTENSION_ONLY) {
|
(*EDCA_BE_UL) = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_UL[ExtAdapter->mgnt_info.iot_peer]; */
|
(*EDCA_BE_DL) = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_DL[ExtAdapter->mgnt_info.iot_peer]; */
|
}
|
|
#if (INTEL_PROXIMITY_SUPPORT == 1)
|
if (p_mgnt_info->intel_class_mode_info.is_enable_ca == true)
|
(*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;
|
else
|
#endif
|
{
|
if ((p_mgnt_info->iot_action & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP | HT_IOT_ACT_AMSDU_ENABLE))) {
|
/* To check whether we shall force turn on TXOP configuration. */
|
if (!((*EDCA_BE_UL) & 0xffff0000))
|
(*EDCA_BE_UL) |= 0x005e0000; /* Force TxOP limit to 0x005e for UL. */
|
if (!((*EDCA_BE_DL) & 0xffff0000))
|
(*EDCA_BE_DL) |= 0x005e0000; /* Force TxOP limit to 0x005e for DL. */
|
}
|
|
/* 92D txop can't be set to 0x3e for cisco1250 */
|
if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
|
(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
|
(*EDCA_BE_UL) = edca_setting_UL[iot_peer];
|
}
|
/* merge from 92s_92c_merge temp brunch v2445 20120215 */
|
else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
|
(*EDCA_BE_DL) = edca_setting_dl_g_mode[iot_peer];
|
else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
|
(*EDCA_BE_DL) = 0xa630;
|
|
else if (iot_peer == HT_IOT_PEER_MARVELL) {
|
(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
|
(*EDCA_BE_UL) = edca_setting_UL[iot_peer];
|
} else if (iot_peer == HT_IOT_PEER_ATHEROS && iot_peer_sub_type != HT_IOT_PEER_TPLINK_AC1750) {
|
/* Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. */
|
if (wireless_mode == ODM_WM_G)
|
(*EDCA_BE_DL) = edca_setting_dl_g_mode[iot_peer];
|
else
|
(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
|
|
if (ic_type == ODM_RTL8821)
|
(*EDCA_BE_DL) = 0x5ea630;
|
|
}
|
}
|
|
if ((ic_type == ODM_RTL8812) || (ic_type == ODM_RTL8192E)) { /* add 8812AU/8812AE */
|
(*EDCA_BE_UL) = 0x5ea42b;
|
(*EDCA_BE_DL) = 0x5ea42b;
|
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n", (*EDCA_BE_UL), (*EDCA_BE_DL)));
|
}
|
|
if ((ic_type == ODM_RTL8814A) && (iot_peer == HT_IOT_PEER_REALTEK)) { /*8814AU and 8814AR*/
|
(*EDCA_BE_UL) = 0x5ea42b;
|
(*EDCA_BE_DL) = 0xa42b;
|
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n", (*EDCA_BE_UL), (*EDCA_BE_DL)));
|
}
|
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, iot_peer = %d\n", (*EDCA_BE_UL), (*EDCA_BE_DL), iot_peer));
|
|
}
|
|
|
void
|
odm_edca_choose_traffic_idx(
|
void *p_dm_void,
|
u64 cur_tx_bytes,
|
u64 cur_rx_bytes,
|
bool is_bias_on_rx,
|
bool *p_is_cur_rdl_state
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
|
if (is_bias_on_rx) {
|
|
if (cur_tx_bytes > (cur_rx_bytes * 4)) {
|
*p_is_cur_rdl_state = false;
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Uplink Traffic\n "));
|
|
} else {
|
*p_is_cur_rdl_state = true;
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Balance Traffic\n"));
|
|
}
|
} else {
|
if (cur_rx_bytes > (cur_tx_bytes * 4)) {
|
*p_is_cur_rdl_state = true;
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Downlink Traffic\n"));
|
|
} else {
|
*p_is_cur_rdl_state = false;
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Balance Traffic\n"));
|
}
|
}
|
|
return ;
|
}
|
|
#endif
|
#endif /*PHYDM_SUPPORT_EDCA*/
|
