/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __PHYDMEDCATURBOCHECK_H__
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#define __PHYDMEDCATURBOCHECK_H__
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#if PHYDM_SUPPORT_EDCA
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/*#define EDCATURBO_VERSION "2.1"*/
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#define EDCATURBO_VERSION "2.3" /*2015.07.29 by YuChen*/
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struct _EDCA_TURBO_ {
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bool is_current_turbo_edca;
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bool is_cur_rdl_state;
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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u32 prv_traffic_idx; /* edca turbo */
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#endif
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};
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) */
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{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
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static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) */
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{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
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static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP */
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{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
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#endif
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void
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odm_edca_turbo_check(
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void *p_dm_void
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);
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void
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odm_edca_turbo_init(
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void *p_dm_void
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);
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void
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odm_edca_turbo_check_mp(
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void *p_dm_void
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);
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/* check if edca turbo is disabled */
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bool
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odm_is_edca_turbo_disable(
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void *p_dm_void
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);
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/* choose edca paramter for special IOT case */
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void
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odm_edca_para_sel_by_iot(
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void *p_dm_void,
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u32 *EDCA_BE_UL,
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u32 *EDCA_BE_DL
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);
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/* check if it is UL or DL */
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void
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odm_edca_choose_traffic_idx(
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void *p_dm_void,
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u64 cur_tx_bytes,
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u64 cur_rx_bytes,
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bool is_bias_on_rx,
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bool *p_is_cur_rdl_state
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);
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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void
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odm_edca_turbo_check_ce(
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void *p_dm_void
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);
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#endif
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#endif /*PHYDM_SUPPORT_EDCA*/
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#endif
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