/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __PHYDMPOWERTRACKING_H__
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#define __PHYDMPOWERTRACKING_H__
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#define POWRTRACKING_VERSION "1.1"
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#define DPK_DELTA_MAPPING_NUM 13
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#define index_mapping_HP_NUM 15
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#define TXSCALE_TABLE_SIZE 37
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#define CCK_TABLE_SIZE_8723D 41
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#define TXPWR_TRACK_TABLE_SIZE 30
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#define DELTA_SWINGIDX_SIZE 30
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#define DELTA_SWINTSSI_SIZE 61
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#define BAND_NUM 3
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#define MAX_RF_PATH 4
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#define CCK_TABLE_SIZE_88F 21
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#define dm_check_txpowertracking odm_txpowertracking_check
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#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
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#define AVG_THERMAL_NUM 8
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#define HP_THERMAL_NUM 8
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#define iqk_matrix_reg_num 8
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#define IQK_MAC_REG_NUM 4
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#define IQK_ADDA_REG_NUM 16
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#define IQK_BB_REG_NUM 9
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extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
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extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
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extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
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extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
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extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
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extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
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extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
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extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
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extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
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extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
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extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
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/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
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static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
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static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
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void
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odm_txpowertracking_check(
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void *p_dm_void
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);
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void
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odm_txpowertracking_check_ap(
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void *p_dm_void
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);
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void
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odm_txpowertracking_thermal_meter_init(
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void *p_dm_void
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);
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void
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odm_txpowertracking_init(
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void *p_dm_void
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);
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void
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odm_txpowertracking_check_mp(
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void *p_dm_void
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);
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void
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odm_txpowertracking_check_ce(
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void *p_dm_void
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);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
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void
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odm_txpowertracking_thermal_meter_check(
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struct _ADAPTER *adapter
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);
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#endif
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struct _IQK_MATRIX_REGS_SETTING {
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bool is_iqk_done;
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s32 value[3][iqk_matrix_reg_num];
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bool is_bw_iqk_result_saved[3];
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};
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struct odm_rf_calibration_structure {
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/* for tx power tracking */
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u32 rega24; /* for TempCCK */
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s32 rege94;
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s32 rege9c;
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s32 regeb4;
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s32 regebc;
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/* u8 is_txpowertracking; */
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u8 tx_powercount;
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bool is_txpowertracking_init;
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bool is_txpowertracking;
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u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
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u8 tm_trigger;
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u8 internal_pa_5g[2]; /* pathA / pathB */
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u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
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u8 thermal_value;
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u8 thermal_value_lck;
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u8 thermal_value_iqk;
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s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
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u8 thermal_value_avg[AVG_THERMAL_NUM];
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u8 thermal_value_avg_index;
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u8 thermal_value_rx_gain;
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bool is_reloadtxpowerindex;
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u8 is_rf_pi_enable;
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u32 txpowertracking_callback_cnt; /* cosa add for debug */
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/* ------------------------- Tx power Tracking ------------------------- */
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u8 is_cck_in_ch14;
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u8 CCK_index;
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u8 OFDM_index[MAX_RF_PATH];
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s8 power_index_offset[MAX_RF_PATH];
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s8 delta_power_index[MAX_RF_PATH];
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s8 delta_power_index_last[MAX_RF_PATH];
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bool is_tx_power_changed;
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s8 xtal_offset;
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s8 xtal_offset_last;
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u8 thermal_value_hp[HP_THERMAL_NUM];
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u8 thermal_value_hp_index;
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struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
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u8 delta_lck;
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s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
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u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
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u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
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u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
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s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
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s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
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u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
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u8 bb_swing_idx_ofdm[MAX_RF_PATH];
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u8 bb_swing_idx_ofdm_current;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
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#else
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u8 bb_swing_idx_ofdm_base;
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#endif
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bool default_bb_swing_index_flag;
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bool bb_swing_flag_ofdm;
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u8 bb_swing_idx_cck;
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u8 bb_swing_idx_cck_current;
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u8 bb_swing_idx_cck_base;
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u8 default_ofdm_index;
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u8 default_cck_index;
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bool bb_swing_flag_cck;
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s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
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s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
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s8 absolute_cck_swing_idx[MAX_RF_PATH];
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s8 remnant_cck_swing_idx;
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s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
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bool modify_tx_agc_flag_path_a;
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bool modify_tx_agc_flag_path_b;
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bool modify_tx_agc_flag_path_c;
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bool modify_tx_agc_flag_path_d;
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bool modify_tx_agc_flag_path_a_cck;
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s8 kfree_offset[MAX_RF_PATH];
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/* -------------------------------------------------------------------- */
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/* for IQK */
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u32 regc04;
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u32 reg874;
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u32 regc08;
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u32 regb68;
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u32 regb6c;
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u32 reg870;
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u32 reg860;
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u32 reg864;
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bool is_iqk_initialized;
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bool is_lck_in_progress;
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bool is_antenna_detected;
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bool is_need_iqk;
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bool is_iqk_in_progress;
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bool is_iqk_pa_off;
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u8 delta_iqk;
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u32 ADDA_backup[IQK_ADDA_REG_NUM];
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u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
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u32 IQK_BB_backup_recover[9];
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u32 IQK_BB_backup[IQK_BB_REG_NUM];
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u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
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u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
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u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
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u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
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u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
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u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
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u64 iqk_start_time;
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u64 iqk_total_progressing_time;
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u64 iqk_progressing_time;
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u32 lok_result;
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u8 iqk_step;
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u8 kcount;
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u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
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bool is_mp_mode;
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/* for APK */
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u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
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u8 is_ap_kdone;
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u8 is_apk_thermal_meter_ignore;
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/* DPK */
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bool is_dpk_fail;
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u8 is_dp_done;
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u8 is_dp_path_aok;
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u8 is_dp_path_bok;
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u32 tx_lok[2];
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u32 dpk_tx_agc;
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s32 dpk_gain;
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u32 dpk_thermal[4];
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s8 modify_tx_agc_value_ofdm;
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s8 modify_tx_agc_value_cck;
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/*Add by Yuchen for Kfree Phydm*/
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u8 reg_rf_kfree_enable; /*for registry*/
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u8 rf_kfree_enable; /*for efuse enable check*/
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HALMAC_PWR_TRACKING_OPTION HALMAC_PWR_TRACKING_INFO;
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};
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#endif
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