SAMA5D4 Xplained Ultra Board BSP
guowenxue
2019-08-19 2e7235d10c6dbff81960282e1a1e2e798f9b8db8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
/******************************************************************************
 *
 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 *
 *
 ******************************************************************************/
 
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
 
/*--------------------------Define Parameters-------------------------------*/
#define    IQK_DELAY_TIME_88E        10        /* ms */
#define    index_mapping_NUM_88E    15
#define AVG_THERMAL_NUM_88E    4
 
#include "../halphyrf_ap.h"
 
void configure_txpower_track_8188e(
    struct _TXPWRTRACK_CFG    *p_config
);
 
void do_iqk_8188e(
    void        *p_dm_void,
    u8        delta_thermal_index,
    u8        thermal_value,
    u8        threshold
);
 
void
odm_tx_pwr_track_set_pwr88_e(
    struct PHY_DM_STRUCT            *p_dm_odm,
    enum pwrtrack_method    method,
    u8                rf_path,
    u8                channel_mapped_index
);
 
/* 1 7.    IQK */
 
void
phy_iq_calibrate_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm,
#else
    struct _ADAPTER    *adapter,
#endif
    bool    is_recovery);
 
 
/*
 * LC calibrate
 *   */
void
phy_lc_calibrate_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm
#else
    struct _ADAPTER    *p_adapter
#endif
);
 
/*
 * AP calibrate
 *   */
void
phy_ap_calibrate_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm,
#else
    struct _ADAPTER    *p_adapter,
#endif
    s8        delta);
void
phy_digital_predistortion_8188e(struct _ADAPTER    *p_adapter);
 
 
void
_phy_save_adda_registers(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm,
#else
    struct _ADAPTER    *p_adapter,
#endif
    u32        *adda_reg,
    u32        *adda_backup,
    u32        register_num
);
 
void
_phy_path_adda_on(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm,
#else
    struct _ADAPTER    *p_adapter,
#endif
    u32        *adda_reg,
    bool        is_path_a_on,
    bool        is2T
);
 
void
_phy_mac_setting_calibration(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm,
#else
    struct _ADAPTER    *p_adapter,
#endif
    u32        *mac_reg,
    u32        *mac_backup
);
 
 
void
_phy_path_a_stand_by(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
    struct PHY_DM_STRUCT        *p_dm_odm
#else
    struct _ADAPTER    *p_adapter
#endif
);
 
 
#endif    /*  #ifndef __HAL_PHY_RF_8188E_H__ */