/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8723A_HAL_H__
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#define __RTL8723A_HAL_H__
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//#include "hal_com.h"
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#if 1
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#include "hal_data.h"
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#else
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#include "../hal/OUTSRC/odm_precomp.h"
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#endif
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#include "rtl8723a_spec.h"
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#include "rtl8723a_pg.h"
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#include "Hal8723APhyReg.h"
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#include "Hal8723APhyCfg.h"
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#include "rtl8723a_rf.h"
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#include "rtl8723a_dm.h"
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#include "rtl8723a_recv.h"
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#include "rtl8723a_xmit.h"
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#include "rtl8723a_cmd.h"
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#include "rtl8723a_led.h"
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#include "Hal8723PwrSeq.h"
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#ifdef DBG_CONFIG_ERROR_DETECT
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#include "rtl8723a_sreset.h"
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#endif
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#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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//2TODO: We should define 8192S firmware related macro settings here!!
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#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
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#define RTL819X_TOTAL_RF_PATH 2
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//---------------------------------------------------------------------
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// RTL8723S From file
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//---------------------------------------------------------------------
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#define RTL8723_FW_UMC_IMG "rtl8723S\\rtl8723fw.bin"
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#define RTL8723_FW_UMC_B_IMG "rtl8723S\\rtl8723fw_B.bin"
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#define RTL8723_PHY_REG "rtl8723S\\PHY_REG_1T.txt"
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#define RTL8723_PHY_RADIO_A "rtl8723S\\radio_a_1T.txt"
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#define RTL8723_PHY_RADIO_B "rtl8723S\\radio_b_1T.txt"
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#define RTL8723_AGC_TAB "rtl8723S\\AGC_TAB_1T.txt"
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#define RTL8723_PHY_MACREG "rtl8723S\\MAC_REG.txt"
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#define RTL8723_PHY_REG_PG "rtl8723S\\PHY_REG_PG.txt"
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#define RTL8723_PHY_REG_MP "rtl8723S\\PHY_REG_MP.txt"
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//---------------------------------------------------------------------
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// RTL8723S From header
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//---------------------------------------------------------------------
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// Fw Array
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#define Rtl8723_FwImageArray Rtl8723SFwImgArray
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#define Rtl8723_FwUMCBCutImageArrayWithBT Rtl8723SFwUMCBCutImgArrayWithBT
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#define Rtl8723_FwUMCBCutImageArrayWithoutBT Rtl8723SFwUMCBCutImgArrayWithoutBT
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#define Rtl8723_ImgArrayLength Rtl8723SImgArrayLength
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#define Rtl8723_UMCBCutImgArrayWithBTLength Rtl8723SUMCBCutImgArrayWithBTLength
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#define Rtl8723_UMCBCutImgArrayWithoutBTLength Rtl8723SUMCBCutImgArrayWithoutBTLength
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#define Rtl8723_PHY_REG_Array_PG Rtl8723SPHY_REG_Array_PG
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#define Rtl8723_PHY_REG_Array_PGLength Rtl8723SPHY_REG_Array_PGLength
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#if MP_DRIVER == 1
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#define Rtl8723E_FwBTImgArray Rtl8723EFwBTImgArray
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#define Rtl8723E_FwBTImgArrayLength Rtl8723EBTImgArrayLength
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#define Rtl8723_FwUMCBCutMPImageArray Rtl8723SFwUMCBCutMPImgArray
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#define Rtl8723_UMCBCutMPImgArrayLength Rtl8723SUMCBCutMPImgArrayLength
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#define Rtl8723_PHY_REG_Array_MP Rtl8723SPHY_REG_Array_MP
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#define Rtl8723_PHY_REG_Array_MPLength Rtl8723SPHY_REG_Array_MPLength
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#endif
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#endif // CONFIG_SDIO_HCI
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#ifdef CONFIG_USB_HCI
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//2TODO: We should define 8192S firmware related macro settings here!!
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#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
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#define RTL819X_TOTAL_RF_PATH 2
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//TODO: The following need to check!!
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#define RTL8723_FW_UMC_IMG "rtl8192CU\\rtl8723fw.bin"
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#define RTL8723_FW_UMC_B_IMG "rtl8192CU\\rtl8723fw_B.bin"
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#define RTL8723_PHY_REG "rtl8723S\\PHY_REG_1T.txt"
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#define RTL8723_PHY_RADIO_A "rtl8723S\\radio_a_1T.txt"
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#define RTL8723_PHY_RADIO_B "rtl8723S\\radio_b_1T.txt"
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#define RTL8723_AGC_TAB "rtl8723S\\AGC_TAB_1T.txt"
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#define RTL8723_PHY_MACREG "rtl8723S\\MAC_REG.txt"
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#define RTL8723_PHY_REG_PG "rtl8723S\\PHY_REG_PG.txt"
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#define RTL8723_PHY_REG_MP "rtl8723S\\PHY_REG_MP.txt"
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//---------------------------------------------------------------------
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// RTL8723S From header
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//---------------------------------------------------------------------
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// Fw Array
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#define Rtl8723_FwImageArray Rtl8723UFwImgArray
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#define Rtl8723_FwUMCBCutImageArrayWithBT Rtl8723UFwUMCBCutImgArrayWithBT
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#define Rtl8723_FwUMCBCutImageArrayWithoutBT Rtl8723UFwUMCBCutImgArrayWithoutBT
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#define Rtl8723_ImgArrayLength Rtl8723UImgArrayLength
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#define Rtl8723_UMCBCutImgArrayWithBTLength Rtl8723UUMCBCutImgArrayWithBTLength
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#define Rtl8723_UMCBCutImgArrayWithoutBTLength Rtl8723UUMCBCutImgArrayWithoutBTLength
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#define Rtl8723_PHY_REG_Array_PG Rtl8723UPHY_REG_Array_PG
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#define Rtl8723_PHY_REG_Array_PGLength Rtl8723UPHY_REG_Array_PGLength
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#if MP_DRIVER == 1
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#define Rtl8723E_FwBTImgArray Rtl8723EFwBTImgArray
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#define Rtl8723E_FwBTImgArrayLength Rtl8723EBTImgArrayLength
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#define Rtl8723_FwUMCBCutMPImageArray Rtl8723SFwUMCBCutMPImgArray
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#define Rtl8723_UMCBCutMPImgArrayLength Rtl8723SUMCBCutMPImgArrayLength
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#define Rtl8723_PHY_REG_Array_MP Rtl8723UPHY_REG_Array_MP
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#define Rtl8723_PHY_REG_Array_MPLength Rtl8723UPHY_REG_Array_MPLength
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#endif
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#endif
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#define FW_8723A_SIZE 0x8000
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#define FW_8723A_START_ADDRESS 0x1000
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#define FW_8723A_END_ADDRESS 0x1FFF //0x5FFF
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#define IS_FW_HEADER_EXIST_8723A(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
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(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
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(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)
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typedef struct _RT_FIRMWARE_8723A {
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FIRMWARE_SOURCE eFWSource;
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#ifdef CONFIG_EMBEDDED_FWIMG
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u8* szFwBuffer;
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#else
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u8 szFwBuffer[FW_8723A_SIZE];
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#endif
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u32 ulFwLength;
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#ifdef CONFIG_EMBEDDED_FWIMG
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u8* szBTFwBuffer;
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#else
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u8 szBTFwBuffer[FW_8723A_SIZE];
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#endif
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u32 ulBTFwLength;
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} RT_FIRMWARE_8723A, *PRT_FIRMWARE_8723A;
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//
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// This structure must be cared byte-ordering
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//
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// Added by tynli. 2009.12.04.
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typedef struct _RT_8723A_FIRMWARE_HDR
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{
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// 8-byte alinment required
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//--- LONG WORD 0 ----
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u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
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u8 Category; // AP/NIC and USB/PCI
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u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
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u16 Version; // FW Version
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u8 Subversion; // FW Subversion, default 0x00
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u16 Rsvd1;
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//--- LONG WORD 1 ----
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u8 Month; // Release time Month field
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u8 Date; // Release time Date field
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u8 Hour; // Release time Hour field
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u8 Minute; // Release time Minute field
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u16 RamCodeSize; // The size of RAM code
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u16 Rsvd2;
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//--- LONG WORD 2 ----
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u32 SvnIdx; // The SVN entry index
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u32 Rsvd3;
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//--- LONG WORD 3 ----
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u32 Rsvd4;
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u32 Rsvd5;
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}RT_8723A_FIRMWARE_HDR, *PRT_8723A_FIRMWARE_HDR;
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#define DRIVER_EARLY_INT_TIME_8723A 0x05
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#define BCN_DMA_ATIME_INT_TIME_8723A 0x02
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//For General Reserved Page Number(Beacon Queue is reserved page)
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//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1
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#define BCNQ_PAGE_NUM_8723A 0x08
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#define TX_TOTAL_PAGE_NUMBER_8723A (0xFF - BCNQ_PAGE_NUM_8723A)
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#define TX_PAGE_BOUNDARY_8723A (TX_TOTAL_PAGE_NUMBER_8723A + 1)
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#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A TX_TOTAL_PAGE_NUMBER_8723A
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#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A + 1)
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// For Normal Chip Setting
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// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723A
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#define NORMAL_PAGE_NUM_HPQ_8723A 0x0C
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#define NORMAL_PAGE_NUM_LPQ_8723A 0x02
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#define NORMAL_PAGE_NUM_NPQ_8723A 0x02
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// Note: For Normal Chip Setting, modify later
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#define WMM_NORMAL_PAGE_NUM_HPQ_8723A 0x29
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#define WMM_NORMAL_PAGE_NUM_LPQ_8723A 0x1C
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#define WMM_NORMAL_PAGE_NUM_NPQ_8723A 0x1C
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//-------------------------------------------------------------------------
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// Chip specific
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//-------------------------------------------------------------------------
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#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
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#define CHIP_BONDING_92C_1T2R 0x1
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#define CHIP_BONDING_88C_USB_MCARD 0x2
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#define CHIP_BONDING_88C_USB_HP 0x1
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//-------------------------------------------------------------------------
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// Channel Plan
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//-------------------------------------------------------------------------
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#define HAL_EFUSE_MEMORY
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#define EFUSE_REAL_CONTENT_LEN 512
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#define EFUSE_MAP_LEN 128
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#define EFUSE_MAX_SECTION 16
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#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
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//
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// <Roger_Notes>
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// To prevent out of boundary programming case,
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// leave 1byte and program full section
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// 9bytes + 1byt + 5bytes and pre 1byte.
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// For worst case:
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// | 1byte|----8bytes----|1byte|--5bytes--|
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// | | Reserved(14bytes) |
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//
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// PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
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#define EFUSE_OOB_PROTECT_BYTES 15
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#define EFUSE_REAL_CONTENT_LEN_8723A 512
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#define EFUSE_MAP_LEN_8723A 256
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#define EFUSE_MAX_SECTION_8723A 32
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//========================================================
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// EFUSE for BT definition
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//========================================================
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#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512
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#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3
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#define EFUSE_BT_MAP_LEN 1024 // 1k bytes
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#define EFUSE_BT_MAX_SECTION 128 // 1024/8
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#define EFUSE_PROTECT_BYTES_BANK 16
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// Description: Determine the types of C2H events that are the same in driver and Fw.
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// Fisrt constructed by tynli. 2009.10.09.
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typedef enum _RTL8192C_C2H_EVT
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{
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C2H_DBG = 0,
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C2H_TSF = 1,
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C2H_AP_RPT_RSP = 2,
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C2H_CCX_TX_RPT = 3, // The FW notify the report of the specific tx packet.
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C2H_BT_RSSI = 4,
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C2H_BT_OP_MODE = 5,
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C2H_EXT_RA_RPT = 6,
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C2H_HW_INFO_EXCH = 10,
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C2H_C2H_H2C_TEST = 11,
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C2H_BT_INFO = 12,
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C2H_BT_MP_INFO = 15,
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MAX_C2HEVENT
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} RTL8192C_C2H_EVT;
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#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
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#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
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typedef struct rxreport_8723a
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{
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u32 pktlen:14;
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u32 crc32:1;
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u32 icverr:1;
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u32 drvinfosize:4;
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u32 security:3;
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u32 qos:1;
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u32 shift:2;
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u32 physt:1;
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u32 swdec:1;
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u32 ls:1;
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u32 fs:1;
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u32 eor:1;
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u32 own:1;
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u32 macid:5;
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u32 tid:4;
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u32 hwrsvd:4;
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u32 amsdu:1;
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u32 paggr:1;
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u32 faggr:1;
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u32 a1fit:4;
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u32 a2fit:4;
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u32 pam:1;
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u32 pwr:1;
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u32 md:1;
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u32 mf:1;
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u32 type:2;
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u32 mc:1;
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u32 bc:1;
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u32 seq:12;
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u32 frag:4;
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u32 nextpktlen:14;
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u32 nextind:1;
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u32 rsvd0831:1;
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u32 rxmcs:6;
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u32 rxht:1;
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u32 gf:1;
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u32 splcp:1;
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u32 bw:1;
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u32 htc:1;
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u32 eosp:1;
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u32 bssidfit:2;
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u32 rsvd1214:16;
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u32 unicastwake:1;
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u32 magicwake:1;
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u32 pattern0match:1;
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u32 pattern1match:1;
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u32 pattern2match:1;
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u32 pattern3match:1;
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u32 pattern4match:1;
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u32 pattern5match:1;
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u32 pattern6match:1;
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u32 pattern7match:1;
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u32 pattern8match:1;
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u32 pattern9match:1;
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u32 patternamatch:1;
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u32 patternbmatch:1;
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u32 patterncmatch:1;
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u32 rsvd1613:19;
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u32 tsfl;
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u32 bassn:12;
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u32 bavld:1;
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u32 rsvd2413:19;
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} RXREPORT, *PRXREPORT;
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typedef struct phystatus_8723a
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{
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u32 rxgain_a:7;
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u32 trsw_a:1;
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u32 rxgain_b:7;
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u32 trsw_b:1;
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u32 chcorr_l:16;
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u32 sigqualcck:8;
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u32 cfo_a:8;
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u32 cfo_b:8;
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u32 chcorr_h:8;
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u32 noisepwrdb_h:8;
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u32 cfo_tail_a:8;
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u32 cfo_tail_b:8;
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u32 rsvd0824:8;
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u32 rsvd1200:8;
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u32 rxevm_a:8;
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u32 rxevm_b:8;
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u32 rxsnr_a:8;
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u32 rxsnr_b:8;
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u32 noisepwrdb_l:8;
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u32 rsvd1616:8;
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u32 postsnr_a:8;
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u32 postsnr_b:8;
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u32 csi_a:8;
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u32 csi_b:8;
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u32 targetcsi_a:8;
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u32 targetcsi_b:8;
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u32 sigevm:8;
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u32 maxexpwr:8;
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u32 exintflag:1;
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u32 sgien:1;
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u32 rxsc:2;
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u32 idlelong:1;
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u32 anttrainen:1;
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u32 antselb:1;
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u32 antsel:1;
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} PHYSTATUS, *PPHYSTATUS;
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// rtl8723a_hal_init.c
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s32 rtl8723a_FirmwareDownload(PADAPTER padapter);
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void rtl8723a_FirmwareSelfReset(PADAPTER padapter);
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void rtl8723a_InitializeFirmwareVars(PADAPTER padapter);
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void rtl8723a_InitAntenna_Selection(PADAPTER padapter);
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void rtl8723a_DeinitAntenna_Selection(PADAPTER padapter);
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void rtl8723a_CheckAntenna_Selection(PADAPTER padapter);
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void rtl8723a_init_default_value(PADAPTER padapter);
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s32 InitLLTTable(PADAPTER padapter, u32 boundary);
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s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU);
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s32 CardDisableWithoutHWSM(PADAPTER padapter);
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// EFuse
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u8 GetEEPROMSize8723A(PADAPTER padapter);
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void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent);
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void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo);
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void Hal_EfuseParseTxPowerInfo_8723A(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseBTCoexistInfo_8723A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseEEPROMVer(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void rtl8723a_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseCustomerID(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseAntennaDiversity(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseRateIndicationOption(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseXtal_8723A(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail);
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void Hal_EfuseParseThermalMeter_8723A(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail);
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//RT_CHANNEL_DOMAIN rtl8723a_HalMapChannelPlan(PADAPTER padapter, u8 HalChannelPlan);
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//VERSION_8192C rtl8723a_ReadChipVersion(PADAPTER padapter);
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//void rtl8723a_ReadBluetoothCoexistInfo(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoloadFail);
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void Hal_InitChannelPlan(PADAPTER padapter);
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void rtl8723a_set_hal_ops(struct hal_ops *pHalFunc);
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void SetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val);
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void GetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val);
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#ifdef CONFIG_BT_COEXIST
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void rtl8723a_SingleDualAntennaDetection(PADAPTER padapter);
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#endif
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int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware);
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// register
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void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
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void rtl8723a_InitBeaconParameters(PADAPTER padapter);
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void rtl8723a_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode);
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void rtl8723a_start_thread(_adapter *padapter);
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void rtl8723a_stop_thread(_adapter *padapter);
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s32 c2h_id_filter_ccx_8723a(u8 *buf);
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void _InitTransferPageSize(PADAPTER padapter);
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#endif// __RTL8723A_HAL_H__
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