STM32 V5 source code
guowenxue
2018-02-04 785deec23b4cb1e7c4c4d81eb808f195adb1d98a
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/****************************************************************************
*   Copyright: (C)2014 Î人ÁèÔÆÇ¶ÈëʽʵÑéÊÒ www.emblinux.com
*      Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
* Description: ·Ü¶·STM32v5¿ª·¢°åOV7670µÄ¼Ä´æÆ÷±í£¬Ö¡Í¬²½ÖжÏÅäÖã¬
*              ÒÔ¼°ÉãÏñÍ·OV7670+FIFO(AL422B)µÄÒý½Å³õʼ»¯£º
*   ChangeLog:
*        °æ±¾ºÅ     ÈÕÆÚ       ×÷Õß      ËµÃ÷
*        V1.0.0  2014.08.25  GuoWenxue   ·¢²¼¸Ã°æ±¾
****************************************************************************/
/* CF7670C-V3ÉãÏñÍ·Ä£¿éPin¹Ü½ÅºÍSTM32v5 Á¬½Ó±í:
*| ²Î¿¼<CF7670C-V3 ¼òҪ˵Ã÷.pdf>ºÍ<·Ü¶·STM32¿ª·¢°åV5Ô­Àíͼ.pdf>
*+---------------------------------------+------------------------------+
*|   CF7670C-V3ÉãÏñÍ·Ä£¿éÒý½Å¼°ËµÃ÷      |     STM32¶ËÒý½ÅÁ¬½Ó¼°ËµÃ÷    |
*+---------------------------------------+------------------------------+
*| Pin1-VCC(3.3V,·½º¸Å̱ê¼ÇµÄΪµÚÒ»½Å)   |        3.3V                  |
*| Pin2-GND                              |        GND                   |
*| Pin3-SCL(SCCB_SCL²»´øÉÏÀ­µç×è)        |        PE2                   |
*| Pin4-SDA(SCCB_SDA ´ø4.7KÉÏÀ­µç×è)     |        PE3                   |
*| Pin5-VSYNC(OV7670  Ö¡Í¬²½ÐźÅ)        |        PE4                   |
*| Pin6-HREF(OV7670  ÐÐͬ²½ÐźÅ)         |        NC                    |
*| Pin7-WEN(FIFO(AL422)дÔÊÐí,¸ßµçƽÓÐЧ |        PE5                   |
*| Pin8-XCLK(NC/RE# ¿Õ½Å)                |        NC                    |
*| Pin9-RRST(FIFO¶ÁµØÖ·¸´Î»              |        PE6                   |
*| Pin10-OE#(FIFOÊý¾ÝÊä³öʹÄÜ,µÍµçƽÓÐЧ |        GND                   |
*| Pin11-RCK#(FIFO¶ÁÊý¾ÝʱÖÓ             |        PD12                  |
*| Pin12-GND                             |        GND                   |
*|                                       |                              |
*| Pin13-D0     FIFOÊý¾Ý¿ÚÊä³öBIT0       |        PC0                   |
*| Pin14-D1     FIFOÊý¾Ý¿ÚÊä³öBIT1       |        PC1                   |
*| Pin15-D2     FIFOÊý¾Ý¿ÚÊä³öBIT2       |        PC2                   |
*| Pin16-D3     FIFOÊý¾Ý¿ÚÊä³öBIT3       |        PC3                   |
*| Pin17-D4     FIFOÊý¾Ý¿ÚÊä³öBIT4       |        PC4                   |
*| Pin18-D5     FIFOÊý¾Ý¿ÚÊä³öBIT5       |        PC5                   |
*| Pin19-D6     FIFOÊý¾Ý¿ÚÊä³öBIT6       |        PC6                   |
*| Pin20-D7     FIFOÊý¾Ý¿ÚÊä³öBIT7       |        PC7                   |
*+------------------+-----------------+---------------------------------+
*/
 
#ifndef __STM32V5_OV7670_H
#define __STM32V5_OV7670_H
 
#define LEVEL_HIGH           1
#define LEVEL_LOW            0
 
#define QVGA_XPIX                         320
#define QVGA_YPIX                         240
#define OV7670_OUT_XPIX                   QVGA_XPIX
#define OV7670_OUT_YPIX                   QVGA_YPIX
#define OV7670_OUT_MAX_PIXS               (OV7670_OUT_XPIX*OV7670_OUT_YPIX)
 
#define OV7670_ADDR                       0x42   /* I2C¶ÁµØÖ· */
#define OV7670_VERID                      0x73
 
#define OV7670_REG_NUM                    114
#define OV7670_REG_VERID                  0x0B   
#define OV7670_REG_COM7                   0x12
 
#define PORT_VSYNC_CMOS                   GPIOE
#define RCC_APB2Periph_PORT_VSYNC_CMOS    RCC_APB2Periph_GPIOE
#define PIN_VSYNC_CMOS                    GPIO_Pin_4
#define EXTI_LINE_VSYNC_CMOS              EXTI_Line4
#define PORT_SOURCE_VSYNC_CMOS            GPIO_PortSourceGPIOE
#define PIN_SOURCE_VSYNC_CMOS             GPIO_PinSource4
 
//#define FIFO_CS_PIN                       GPIO_Pin_0   /* FIFOƬѡ */ 
#define FIFO_RRST_PIN                     GPIO_Pin_6   /* FIFO¶ÁµØÖ·¸´Î», PE6*/ 
#define FIFO_RCLK_PIN                     GPIO_Pin_12  /* FIFO¶ÁʱÖÓ, PD12 */ 
#define FIFO_WE_PIN                       GPIO_Pin_5   /* FIFOдÔÊÐí, PE5 */
 
/* FIFO Pin operation macro function */
#define FIFO_RRST_H()                     GPIOE->BSRR =FIFO_RRST_PIN    
#define FIFO_RRST_L()                     GPIOE->BRR  =FIFO_RRST_PIN
 
#define FIFO_RCLK_H()                     GPIOD->BSRR =FIFO_RCLK_PIN
#define FIFO_RCLK_L()                     GPIOD->BRR  =FIFO_RCLK_PIN
 
#define FIFO_WE_H()                       GPIOE->BSRR =FIFO_WE_PIN   /*À­¸ßʹFIFOдʹÄÜ*/
#define FIFO_WE_L()                       GPIOE->BRR  =FIFO_WE_PIN   /*À­¸ßʹFIFOд½ûÖ¹*/
 
#define OV7670_FIFO_READ_PREPARE() \
do{ \
       FIFO_RRST_L(); \
       FIFO_RCLK_L(); \
       FIFO_RCLK_H(); \
       FIFO_RRST_H(); \
       FIFO_RCLK_L(); \
       FIFO_RCLK_H(); \
    }while(0)
    
enum
{
  CAM_FIFO_PIN_RRST = 0,
    CAM_FIFO_PIN_RCLK,
    CAM_FIFO_PIN_WE,
    CAM_FIFO_PIN_MAX,
};
 
enum
{
  FMT_QVGA_YUV422,
    FMT_QVGA_RGB565,
    FMT_QVGA_RGB444,
    FMT_QVGA_RAWRGB,
};
 
typedef struct cam_fifo_pin_s
{
    int                 num;    /* LED±àºÅ */
    GPIO_TypeDef        *group; /* LEDʹÓõÄGPIOÔÚÄÄÒ»×é: GPIOB or GPIOD */    
  uint16_t            pin;    /* LEDʹÓõÄGPIO×éÖеÄÄÇÒ»¸öpin: GPIO_Pin_x */
} cam_fifo_pin_t;
 
/* g_OV7670_VSYNCÓÃÀ´±êʾһ֡µÄ¿ªÊ¼ºÍ½áÊø:
 * OV7670µÄÊý¾ÝÒÔVGAʱÐòÊä³ö,ÔÚ¸ÃʱÐòÖÐVSYNCµÄϽµÑرíʾһ֡µÄÊý¾Ý¿ªÊ¼,¶øÉÏÉýÑØ±íʾһ֡µÄÊý¾Ý½áÊø.
 * ËùÒÔÎÒÃǽ«VSYNC¹Ü½ÅPE4ÅäÖóÉEXTI4ÉÏÉýÑØ´¥·¢Ä£Ê½.ÔÚEXTI4µÄÖжϴ¦Àí³ÌÐòEXTI4_IRQHandler()ÖÐ,µÚÒ»´Î
 * ½øÈëÖжϵÄʱºò,˵Ã÷ÉÏÒ»Ö¡Êý¾ÝÒѾ­½áÊø(ÕâÒ²Òâζ×ÅÕâÒ»Ö¡Êý¾ÝµÄ¿ªÊ¼),ÎÒÃÇ¿ªÊ¼Ê¹ÄÜÉãÏñÍ·Êý¾ÝдÈëFIFO
 * ²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ1;µ±µÚ¶þ´Î½øÈëÖжϵÄʱºò,˵Ã÷ÕâÒ»Ö¡Êý¾ÝµÄ´«ÊäÒѾ­½áÊø,ÎÒÃǾͽûÖ¹
 * ÉãÏñÍ·Êý¾ÝдÈëFIFO²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ2;  
 * ÔÚÓ¦ÓóÌÐòÖÐ,ÒªÅжÏg_OV7670_VSYNCµÄÖµÊÇ·ñΪ2,Èç¹ûΪ2Ôò¿ÉÒÔ´ÓFIFOÖжÁÈ¡Êý¾Ý,¶ÁÍêºó¸üÐÂÆä״ֵ̬Ϊ0.
 */
extern uint8_t g_OV7670_VSYNC;
 
extern void set_ov7670_fifo_pin(int which, int level);
extern void ov7670_fifo_read_prepare(void);
extern int OV7670_Initialize(int output_fmt);
 
#endif