| | |
| | | +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb |
| | | diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | new file mode 100644 |
| | | index 000000000..c9b644bb0 |
| | | index 000000000..b0c36a3c0 |
| | | --- /dev/null |
| | | +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | @@ -0,0 +1,532 @@ |
| | | @@ -0,0 +1,690 @@ |
| | | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| | | +/* |
| | | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp |
| | |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | Misc Devices | |
| | | + +------------------------+*/ |
| | | + |
| | | +/* Buzzer */ |
| | | +&pwm1 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_pwm1>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +&i2c2 { |
| | | + clock-frequency = <100000>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c2>; |
| | | + status = "okay"; |
| | | + |
| | | + rtc1208@6f { |
| | | + compatible = "isil,isl1208"; |
| | | + reg = <0x6f>; |
| | | + status = "okay"; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | CAN/RS485 interface | |
| | | + +------------------------+*/ |
| | | +/* RS485 */ |
| | | +&uart3 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_uart3>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/* CAN */ |
| | | +&flexcan1 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_flexcan1>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +&flexcan2 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_flexcan2>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | MikroBUS interface | |
| | | + +------------------------+*/ |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #32 */ |
| | | +&pwm3 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_pwm3>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #19, #21, #23, #24 */ |
| | | +&uart1 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_uart1>; |
| | | + assigned-clocks = <&clk IMX8MP_CLK_UART1>; |
| | | + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface */ |
| | | +&ecspi2 { |
| | | + #address-cells = <1>; |
| | | + #size-cells = <0>; |
| | | + fsl,spi-num-chipselects = <1>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_ecspi2>; |
| | | + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; |
| | | + status = "okay"; |
| | | + |
| | | + spidev@0 { |
| | | + compatible = "fsl,spidev", "semtech,sx1301"; |
| | | + reg = <0>; |
| | | + spi-max-frequency = <2000000>; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #3, #5 */ |
| | | +&i2c5 { |
| | | + clock-frequency = <100000>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c5>; |
| | | + status = "okay"; |
| | | + |
| | | + hdc1080@40 { |
| | | + compatible = "ti,hdc1080"; |
| | | + reg = <0x40>; |
| | | + status = "okay"; |
| | | + }; |
| | | + |
| | | + eeprom@50 { |
| | | + compatible = "microchip,24c32", "atmel,24c32"; |
| | | + reg = <0x50>; |
| | | + pagesize = <32>; |
| | | + num-addresses = <8>; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | PCA9450CHN PMIC | |
| | | + +------------------------+*/ |
| | | + |
| | | +&i2c1 { |
| | | + clock-frequency = <400000>; |
| | | + pinctrl-names = "default", "gpio"; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c1>; |
| | | + pinctrl-1 = <&pinctrl_i2c1_gpio>; |
| | | + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; |
| | | + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; |
| | | + status = "okay"; |
| | | + |
| | | + pmic@25 { |
| | |
| | | +&iomuxc { |
| | | + pinctrl-names = "default"; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_leds: ledsgrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + pinctrl_pwm1: pwm1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + MX8MP_IOMUXC_GPIO1_IO08__PWM1_OUT 0x116 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm3: pwm3grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT 0x116 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart1: uart1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 |
| | | + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart3: uart3grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x82 |
| | | + MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x82 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan1: flexcan1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 |
| | | + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan2: flexcan2grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154 |
| | | + MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_ecspi2: ecspi2grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c1: i2c1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c1_gpio: i2c1grp-gpio { |
| | | + pinctrl_i2c2: i2c2grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1c3 |
| | | + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1c3 |
| | | + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 |
| | | + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c5: i2c5grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SD1_CMD__I2C5_SDA 0x400001c2 |
| | | + MX8MP_IOMUXC_SD1_CLK__I2C5_SCL 0x400001c2 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | +}; |
| | | diff --git a/arch/arm64/configs/igkboard-imx8mp_defconfig b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | new file mode 100644 |
| | | index 000000000..d6d6206f2 |
| | | index 000000000..d5bb6e7bf |
| | | --- /dev/null |
| | | +++ b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | @@ -0,0 +1,1129 @@ |
| | | @@ -0,0 +1,1108 @@ |
| | | +CONFIG_SYSVIPC=y |
| | | +CONFIG_POSIX_MQUEUE=y |
| | | +CONFIG_AUDIT=y |
| | |
| | | +CONFIG_QRTR_SMD=m |
| | | +CONFIG_QRTR_TUN=m |
| | | +CONFIG_NET_PKTGEN=m |
| | | +CONFIG_CAN=m |
| | | +CONFIG_CAN=y |
| | | +CONFIG_CAN_ISOTP=y |
| | | +CONFIG_BT=y |
| | | +CONFIG_BT_RFCOMM=y |
| | | +CONFIG_BT_RFCOMM_TTY=y |
| | |
| | | +CONFIG_CFG80211_WEXT=y |
| | | +CONFIG_MAC80211=y |
| | | +CONFIG_MAC80211_LEDS=y |
| | | +CONFIG_NET_9P=y |
| | | +CONFIG_NET_9P_VIRTIO=y |
| | | +CONFIG_NFC=m |
| | | +CONFIG_NFC_NCI=m |
| | | +CONFIG_NFC_S3FWRN5_I2C=m |
| | |
| | | +CONFIG_BLK_DEV_NVME=y |
| | | +CONFIG_SRAM=y |
| | | +CONFIG_PCI_ENDPOINT_TEST=y |
| | | +CONFIG_EEPROM_AT24=m |
| | | +CONFIG_EEPROM_AT25=m |
| | | +CONFIG_EEPROM_AT24=y |
| | | +CONFIG_UACCE=m |
| | | +# CONFIG_SCSI_PROC_FS is not set |
| | | +CONFIG_BLK_DEV_SD=y |
| | |
| | | +CONFIG_REALTEK_PHY=y |
| | | +CONFIG_ROCKCHIP_PHY=y |
| | | +CONFIG_VITESSE_PHY=y |
| | | +CONFIG_CAN_FLEXCAN=m |
| | | +CONFIG_CAN_FLEXCAN=y |
| | | +CONFIG_MDIO_BITBANG=y |
| | | +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y |
| | | +CONFIG_MDIO_BUS_MUX_MMIOREG=y |
| | |
| | | +CONFIG_EDAC_LAYERSCAPE=m |
| | | +CONFIG_EDAC_SYNOPSYS=y |
| | | +CONFIG_RTC_CLASS=y |
| | | +CONFIG_RTC_DRV_DS1307=m |
| | | +CONFIG_RTC_DRV_HYM8563=m |
| | | +CONFIG_RTC_DRV_MAX77686=y |
| | | +CONFIG_RTC_DRV_RK808=m |
| | | +CONFIG_RTC_DRV_PCF85363=m |
| | | +CONFIG_RTC_DRV_M41T80=m |
| | | +CONFIG_RTC_DRV_RX8581=m |
| | | +CONFIG_RTC_DRV_RV3028=m |
| | | +CONFIG_RTC_DRV_RV8803=m |
| | | +CONFIG_RTC_DRV_S5M=y |
| | | +CONFIG_RTC_DRV_DS3232=y |
| | | +CONFIG_RTC_DRV_PCF2127=m |
| | | +CONFIG_RTC_DRV_PCF2131=m |
| | | +CONFIG_RTC_DRV_EFI=y |
| | | +CONFIG_RTC_DRV_CROS_EC=y |
| | | +CONFIG_RTC_DRV_FSL_FTM_ALARM=m |
| | | +CONFIG_RTC_DRV_PL031=y |
| | | +CONFIG_RTC_DRV_SNVS=y |
| | | +CONFIG_RTC_DRV_BBNSM=y |
| | | +CONFIG_RTC_DRV_IMX_SC=y |
| | | +CONFIG_RTC_DRV_IMX_RPMSG=y |
| | | +CONFIG_RTC_DRV_ISL1208=y |
| | | +CONFIG_DMADEVICES=y |
| | | +CONFIG_FSL_EDMA=y |
| | | +CONFIG_FSL_QDMA=m |
| | |
| | | +CONFIG_QCOM_SPMI_ADC5=m |
| | | +CONFIG_IIO_CROS_EC_SENSORS_CORE=m |
| | | +CONFIG_IIO_CROS_EC_SENSORS=m |
| | | +CONFIG_FXAS21002C=y |
| | | +CONFIG_BMG160=m |
| | | +CONFIG_IIO_ST_GYRO_3AXIS=m |
| | | +CONFIG_MAX30100=m |
| | | +CONFIG_MAX30102=m |
| | | +CONFIG_DHT11=y |
| | | +CONFIG_HDC100X=y |
| | | +CONFIG_HTS221=y |
| | | +CONFIG_FXOS8700_I2C=y |
| | | +CONFIG_RPMSG_IIO_PEDOMETER=m |
| | | +CONFIG_INV_MPU6050_I2C=m |
| | | +CONFIG_IIO_ST_LSM6DSX=y |
| | | +CONFIG_IIO_CROS_EC_LIGHT_PROX=m |
| | | +CONFIG_SENSORS_ISL29018=y |
| | | +CONFIG_VCNL4000=m |
| | | +CONFIG_VCNL4035=m |
| | | +CONFIG_IIO_ST_MAGN_3AXIS=m |
| | | +CONFIG_IIO_CROS_EC_BARO=m |
| | | +CONFIG_MPL3115=y |
| | |
| | | +CONFIG_NFS_V4_1=y |
| | | +CONFIG_NFS_V4_2=y |
| | | +CONFIG_ROOT_NFS=y |
| | | +CONFIG_9P_FS=y |
| | | +CONFIG_NLS_CODEPAGE_437=y |
| | | +CONFIG_NLS_CODEPAGE_936=y |
| | | +CONFIG_NLS_CODEPAGE_950=y |