update linux-imx-igkboard.patch, uart7 and spi1 failed for conflict with lcdif

guowenxue

2022-04-13 24fcd59701a7877b10829c3506577e7a76ee6e86

 bsp/kernel/patch/linux-imx-igkboard.patch

@@ -1,88 +1,128 @@
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard-emmc.dts linux-imx-igkboard/arch/arm/boot/dts/igkboard-emmc.dts
--- linux-imx/arch/arm/boot/dts/igkboard-emmc.dts   1970-01-01 08:00:00.000000000 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/igkboard-emmc.dts   2021-12-22 19:31:56.922407534 +0800
@@ -0,0 +1,10 @@
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts
--- linux-imx/arch/arm/boot/dts/igkboard.dts   1970-01-01 08:00:00.000000000 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts   2022-04-13 23:40:46.669880257 +0800
@@ -0,0 +1,796 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * LingYun IoT System Studio IGK(IoT Gateway Kit) Board device tree
+ * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board)
+ * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * Copyright (C) 2022 LingYun IoT System Studio.
+ */
+
+#include "imx6ul-14x14-evk-emmc.dts"
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi linux-imx-igkboard/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
--- linux-imx/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi   2021-12-18 21:41:22.474200827 +0800
@@ -31,7 +31,41 @@
       brightness-levels = <0 4 8 16 32 64 128 255>;
       default-brightness-level = <6>;
       status = "okay";
-   };
+   }; 
+/dts-v1/;
+
+   buzzer: pwm-buzzer {
+        compatible = "pwm-beeper";
+        pwms = <&pwm2 0 500000>;
+        status = "okay";
+#include "imx6ul.dtsi"
+
+/ {
+   model = "LingYun IoT System Studio IoT Gateway Board";
+   compatible = "lingyun,igkboard", "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
+
+   chosen {
+      stdout-path = &uart1;
+   };
+
+    leds {
+        compatible = "gpio-leds";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpio_leds>;
+                status = "okay";
+   memory@80000000 {
+      device_type = "memory";
+      reg = <0x80000000 0x20000000>;
+   };
+
+        sysled {
+            lable = "sysled";
+            gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+            linux,default-trigger = "heartbeat";
+            default-state = "off";
+        };
+    };
+   reserved-memory {
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges;
+
+    keys {
+        compatible = "gpio-keys";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpio_keys>;
+        autorepeat; 
+        status = "okay";
+      linux,cma {
+         compatible = "shared-dma-pool";
+         reusable;
+         size = <0xa000000>;
+         linux,cma-default;
+      };
+   };
+
+        key_user {
+            lable = "key_user";
+            gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
+            linux,code = <KEY_ENTER>;
+        };
+    };
 
    pxp_v4l2 {
       compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
@@ -43,19 +77,16 @@
       regulator-name = "VSD_3V3";
       regulator-min-microvolt = <3300000>;
       regulator-max-microvolt = <3300000>;
-      gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
       off-on-delay-us = <20000>;
       enable-active-high;
    };
 
    reg_peri_3v3: regulator-peri-3v3 {
       compatible = "regulator-fixed";
-      pinctrl-names = "default";
-      pinctrl-0 = <&pinctrl_peri_3v3>;
       regulator-name = "VPERI_3V3";
       regulator-min-microvolt = <3300000>;
       regulator-max-microvolt = <3300000>;
-      gpio = <&gpio5 2 GPIO_ACTIVE_LOW>;
+   backlight_display: backlight-display {
+      compatible = "pwm-backlight";
+      pwms = <&pwm1 0 5000000>;
+      brightness-levels = <0 4 8 16 32 64 128 255>;
+      default-brightness-level = <6>;
+      status = "okay";
+   };
+
       /*
        * If you want to want to make this dynamic please
        * check schematics and test all affected peripherals:
@@ -78,6 +109,24 @@
       gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
    };
 
+   buzzer: pwm-buzzer {
+      compatible = "pwm-beeper";
+      pwms = <&pwm2 0 500000>;
+      status = "okay";
+   };
+
+   leds {
+      compatible = "gpio-leds";
+      pinctrl-names = "default";
+      pinctrl-0 = <&pinctrl_gpio_leds>;
+      status = "okay";
+
+      sysled {
+         lable = "sysled";
+         gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+         linux,default-trigger = "heartbeat";
+         default-state = "off";
+      };
+   };
+
+   keys {
+      compatible = "gpio-keys";
+      pinctrl-names = "default";
+      pinctrl-0 = <&pinctrl_gpio_keys>;
+      autorepeat;
+      status = "okay";
+
+      key_user {
+         lable = "key_user";
+         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
+         linux,code = <KEY_ENTER>;
+      };
+   };
+
+   pxp_v4l2 {
+      compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
+      status = "okay";
+   };
+
+   reg_sd1_vmmc: regulator-sd1-vmmc {
+      compatible = "regulator-fixed";
+      regulator-name = "VSD_3V3";
+      regulator-min-microvolt = <3300000>;
+      regulator-max-microvolt = <3300000>;
+      off-on-delay-us = <20000>;
+      enable-active-high;
+   };
+
+   reg_peri_3v3: regulator-peri-3v3 {
+      compatible = "regulator-fixed";
+      regulator-name = "VPERI_3V3";
+      regulator-min-microvolt = <3300000>;
+      regulator-max-microvolt = <3300000>;
+
+      /*
+       * If you want to want to make this dynamic please
+       * check schematics and test all affected peripherals:
+       *
+       * - sensors
+       * - ethernet phy
+       * - can
+       * - bluetooth
+       * - wm8960 audio codec
+       * - ov5640 camera
+       */
+      regulator-always-on;
+   };
+
+   reg_can_3v3: regulator-can-3v3 {
+      compatible = "regulator-fixed";
+      regulator-name = "can-3v3";
+      regulator-min-microvolt = <3300000>;
+      regulator-max-microvolt = <3300000>;
+   };
+
+   reg_3p3v: 3p3v {
+      compatible = "regulator-fixed";
+      regulator-name = "3P3V";
@@ -101,13 +141,7 @@
+      regulator-always-on;
+   };
+
    sound {
       compatible = "simple-audio-card";
       simple-audio-card,name = "mx6ul-wm8960";
@@ -115,6 +164,15 @@
       };
    };
 
+/*
+   sound-mqs {
+      compatible = "fsl,imx-audio-mqs";
+      model = "mqs-audio";
@@ -116,138 +150,241 @@
+      audio-codec = <&mqs>;
+      status = "okay";
+   };
+*/
+
    sound-wm8960 {
       compatible = "fsl,imx6ul-evk-wm8960",
             "fsl,imx-audio-wm8960";
@@ -142,7 +200,7 @@
       compatible = "spi-gpio";
       pinctrl-names = "default";
       pinctrl-0 = <&pinctrl_spi4>;
-      status = "okay";
+      status = "disabled"; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with fec1 reset pin */
       pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
       gpio-sck = <&gpio5 11 0>;
       gpio-mosi = <&gpio5 10 0>;
@@ -169,7 +227,7 @@
 };
 
 &csi {
-   status = "disabled";
+};
+
+&clks {
+   assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+   assigned-clock-rates = <786432000>;
+};
+
+/* 40Pin Header start */
+&i2c1 {
+   clock-frequency = <100000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c1>;
+   status = "okay";
 
    port {
       csi1_ep: endpoint {
@@ -184,6 +242,26 @@
    pinctrl-0 = <&pinctrl_i2c2>;
    status = "okay";
 
+    gt9xx@5d {
+        compatible = "goodix,gt9147";
+        reg = <0x5d>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ts_pins>;
+};
+
+        irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+        reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
+        interrupt-parent = <&gpio5>;
+        interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+&uart2 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart2>;
+   status = "okay";
+};
+
+        status = "okay";
+    };
+&uart3 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart3>;
+   status = "okay";
+};
+
+    rtc@6f {
+        compatible = "isil,isl1208";
+        reg = <0x6f>;
+        status = "okay";
+    };
+&uart4 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart4>;
+   status = "okay";
+};
+
    codec: wm8960@1a {
       #sound-dai-cells = <0>;
       compatible = "wlf,wm8960";
@@ -192,7 +270,8 @@
       wlf,hp-cfg = <3 2 3>;
       wlf,gpio-cfg = <1 3>;
       clocks = <&clks IMX6UL_CLK_SAI2>;
-      clock-names = "mclk";
+      clock-names = "mclk"; 
+        status = "disabled";
    };
 
    ov5640: ov5640@3c {
@@ -202,12 +281,19 @@
       pinctrl-0 = <&pinctrl_csi1>;
       clocks = <&clks IMX6UL_CLK_CSI>;
       clock-names = "csi_mclk";
-      pwn-gpios = <&gpio_spi 6 1>;
-      rst-gpios = <&gpio_spi 5 0>;
+&uart7 { /* conflict with lcdif */
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart7>;
+   status = "okay";
+};
+
+&ecspi1 { /* conflict with lcdif */
+   cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_ecspi1>;
+   status = "okay";
+
+   spidev@0 {
+      compatible = "semtech,sx1301";
+      reg = <0>;
+      spi-max-frequency = <2000000>;
+   };
+};
+
+&pwm7 {
+   #pwm-cells = <2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm7>;
+   status = "okay";
+};
+
+&pwm8 {
+   #pwm-cells = <2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm8>;
+   status = "okay";
+};
+
+&can1 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_flexcan1>;
+    xceiver-supply = <&reg_can_3v3>;
+    status = "okay";
+};
+
+/* CAN2 is multiplexed with UART2 RTS/CTS */
+&can2 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_flexcan2>;
+    xceiver-supply = <&reg_can_3v3>;
+    status = "okay";
+};
+/* 40Pin Header end */
+
+&snvs_poweroff {
+   status = "okay";
+};
+
+&snvs_pwrkey {
+   status = "okay";
+};
+
+&uart1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_uart1>;
+   status = "okay";
+};
+
+&pwm1 { /* backlight */
+   #pwm-cells = <2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm1>;
+   status = "okay";
+};
+
+&pwm2 { /* buzzer */
+   #pwm-cells = <2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm2>;
+   status = "okay";
+};
+
+&i2c2 {
+   clock-frequency = <100000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c2>;
+   status = "okay";
+
+   gt9xx@5d {
+      compatible = "goodix,gt9147";
+      reg = <0x5d>;
+      pinctrl-names = "default";
+      pinctrl-0 = <&pinctrl_ts_pins>;
+
+      irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+      reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
+      interrupt-parent = <&gpio5>;
+      interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+
+      status = "okay";
+   };
+
+   rtc@6f {
+      compatible = "isil,isl1208";
+      reg = <0x6f>;
+      status = "okay";
+   };
+
+   ov5640: ov5640@3c {
+      compatible = "ovti,ov5640";
+      reg = <0x3c>;
+      pinctrl-names = "default";
+      pinctrl-0 = <&pinctrl_csi1>;
+      clocks = <&clks IMX6UL_CLK_CSI>;
+      clock-names = "csi_mclk";
+
+      DOVDD-supply = <&reg_3p3v>;
+      VDD-supply = <&reg_1p8v>;
+      AVDD-supply = <&reg_3p3v>;
+      DVDD-supply = <&reg_3p3v>;
+
+        pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
+        rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
       csi_id = <0>;
       mclk = <24000000>;
       mclk_source = <0>;
-      status = "disabled";
+        /* rotation = <180>; */
+      pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
+      rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+      csi_id = <0>;
+      mclk = <24000000>;
+      mclk_source = <0>;
+      /* rotation = <180>; */
+      status = "okay";
       port {
          ov5640_ep: endpoint {
             remote-endpoint = <&csi1_ep>;
@@ -222,6 +308,9 @@
    phy-mode = "rmii";
    phy-handle = <&ethphy0>;
    phy-supply = <&reg_peri_3v3>;
+    phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with spi4 */
+    phy-reset-duration = <50>;
+    phy-reset-post-delay = <15>;
    status = "okay";
 };
 
@@ -231,14 +320,17 @@
    phy-mode = "rmii";
    phy-handle = <&ethphy1>;
    phy-supply = <&reg_peri_3v3>;
+    phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with sai2 */
+    phy-reset-duration = <50>;
+    phy-reset-post-delay = <15>;
    status = "okay";
 
    mdio {
       #address-cells = <1>;
       #size-cells = <0>;
 
-      ethphy0: ethernet-phy@2 {
-         reg = <2>;
+      port {
+         ov5640_ep: endpoint {
+            remote-endpoint = <&csi1_ep>;
+         };
+      };
+   };
+};
+
+&csi { /* camera ov5640 */
+   status = "okay";
+   port {
+      csi1_ep: endpoint {
+         remote-endpoint = <&ov5640_ep>;
+      };
+   };
+};
+
+&fec1 { /* eth0 */
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_enet1>;
+   phy-mode = "rmii";
+   phy-handle = <&ethphy0>;
+   phy-supply = <&reg_peri_3v3>;
+   phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with spi4 */
+   phy-reset-duration = <50>;
+   phy-reset-post-delay = <15>;
+   status = "okay";
+};
+
+&fec2 { /* eth1 */
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_enet2>;
+   phy-mode = "rmii";
+   phy-handle = <&ethphy1>;
+   phy-supply = <&reg_peri_3v3>;
+   phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with sai2 */
+   phy-reset-duration = <50>;
+   phy-reset-post-delay = <15>;
+   status = "okay";
+
+   mdio {
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      ethphy0: ethernet-phy@0 {
+         reg = <0>;
          micrel,led-mode = <1>;
          clocks = <&clks IMX6UL_CLK_ENET_REF>;
          clock-names = "rmii-ref";
@@ -301,21 +393,21 @@
 
    display0: display@0 {
       bits-per-pixel = <16>;
-      bus-width = <24>;
+         micrel,led-mode = <1>;
+         clocks = <&clks IMX6UL_CLK_ENET_REF>;
+         clock-names = "rmii-ref";
+      };
+
+      ethphy1: ethernet-phy@1 {
+         reg = <1>;
+         micrel,led-mode = <1>;
+         clocks = <&clks IMX6UL_CLK_ENET2_REF>;
+         clock-names = "rmii-ref";
+      };
+   };
+};
+
+&lcdif {
+   assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
+   assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_lcdif_dat
+          &pinctrl_lcdif_ctrl>;
+   display = <&display0>;
+   status = "okay";
+
+   display0: display@0 {
+      bits-per-pixel = <16>;
+      bus-width = <16>;
 
       display-timings {
          native-mode = <&timing0>;
 
          timing0: timing0 {
-            clock-frequency = <9200000>;
-            hactive = <480>;
-            vactive = <272>;
-            hfront-porch = <8>;
-            hback-porch = <4>;
-            hsync-len = <41>;
-            vback-porch = <2>;
-            vfront-porch = <4>;
-            vsync-len = <10>;
+
+      display-timings {
+         native-mode = <&timing0>;
+
+         timing0: timing0 {
+            clock-frequency = <30000000>;
+            hactive = <800>;
+            vactive = <480>;
@@ -257,224 +394,424 @@
+            vback-porch = <32>;
+            vfront-porch = <13>;
+            vsync-len = <3>;
             hsync-active = <0>;
             vsync-active = <0>;
             de-active = <1>;
@@ -332,6 +424,13 @@
    status = "okay";
 };
 
+&pwm2 {
+   #pwm-cells = <2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_pwm2>;
+            hsync-active = <0>;
+            vsync-active = <0>;
+            de-active = <1>;
+            pixelclk-active = <0>;
+         };
+      };
+   };
+};
+
+&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
+   status = "okay";
+};
+
 &pxp {
    status = "okay";
 };
@@ -339,7 +438,7 @@
 &qspi {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_qspi>;
-   status = "okay";
+   status = "disabled"; /* disable it for the pins conflict with GPIO Led and Key */
 
    flash0: n25q256a@0 {
       #address-cells = <1>;
@@ -352,6 +451,24 @@
    };
 };
 
+/*
+&mqs {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_mqs>;
+    clocks = <&clks IMX6UL_CLK_SAI1>;
+    clock-names = "mclk";
+    status = "okay";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_mqs>;
+   clocks = <&clks IMX6UL_CLK_SAI1>;
+   clock-names = "mclk";
+   status = "okay";
+};
+*/
+
+&usbotg1 {
+   dr_mode = "otg";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_otg1>;
+   status = "okay";
+};
+
+
+&sai1 {
+   assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
+           <&clks IMX6UL_CLK_SAI1>;
+   assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+   assigned-clock-rates = <0>, <24576000>;
+    fsl,sai-mclk-direction-output;
+    status = "okay";
+&usbotg2 {
+   dr_mode = "host";
+   disable-over-current;
+   status = "okay";
+};
+
 &sai2 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_sai2>;
@@ -360,7 +477,7 @@
    assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
    assigned-clock-rates = <0>, <12288000>;
    fsl,sai-mclk-direction-output;
-   status = "okay";
+   status = "disabled"; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with fec2 reset pin */
 };
 
 &snvs_poweroff {
@@ -384,7 +501,7 @@
    pinctrl-assert-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
    port = <1>;
    sven_low_active;
-   status = "okay";
+   status = "disabled";
 };
 
 &tsc {
@@ -439,6 +556,7 @@
    pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
    pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
    cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+    no-1-8-v;
    keep-power-in-suspend;
    wakeup-source;
    vmmc-supply = <&reg_sd1_vmmc>;
@@ -446,8 +564,8 @@
 };
 
 &usdhc2 {
-   pinctrl-names = "default";
-   pinctrl-0 = <&pinctrl_usdhc2>;
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_usdhc2>;
    non-removable;
    keep-power-in-suspend;
    wakeup-source;
@@ -463,6 +581,32 @@
 &iomuxc {
    pinctrl-names = "default";
 
+    pinctrl_gpio_leds: gpio-leds {
+        fsl,pins = <
+            MX6UL_PAD_NAND_DQS__GPIO4_IO16      0x17059 /* led run */
+        >;
+    }; 
+&usbphy1 {
+   fsl,tx-d-cal = <106>;
+};
+
+    pinctrl_gpio_keys: gpio-keys {
+&usbphy2 {
+   fsl,tx-d-cal = <106>;
+};
+
+&usdhc1 { /* tf card slot */
+   pinctrl-names = "default", "state_100mhz", "state_200mhz";
+   pinctrl-0 = <&pinctrl_usdhc1>;
+   pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+   pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+   cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+   no-1-8-v;
+   keep-power-in-suspend;
+   wakeup-source;
+   vmmc-supply = <&reg_sd1_vmmc>;
+   status = "okay";
+};
+
+&usdhc2 { /* emmc */
+   pinctrl-names = "default", "state_100mhz", "state_200mhz";
+   pinctrl-0 = <&pinctrl_usdhc2_8bit>;
+   pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
+   pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
+   bus-width = <8>;
+   non-removable;
+   status = "okay";
+};
+
+&wdog1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_wdog>;
+   fsl,ext-reset-output;
+};
+
+/* imx6ul-pinfunc.h */
+&iomuxc {
+   pinctrl-names = "default";
+
+/* 40Pin Header end */
+   pinctrl_extgpio: extgpiogrp{
+      fsl,pins = <
+         MX6UL_PAD_UART1_CTS_B__GPIO1_IO18   0x17059 /*  7#  GPIO    */
+         MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01  0x17059 /* 35#  GPIO    */
+         MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08  0x17059 /* 37#  GPIO    */
+         MX6UL_PAD_LCD_DATA18__GPIO3_IO23    0x17059 /* 22# GPIO     */
+         MX6UL_PAD_LCD_DATA19__GPIO3_IO24    0x17059 /* 26# GPIO     */
+         MX6UL_PAD_JTAG_TMS__GPIO1_IO11      0x17059 /* 36# GPIO */
+         MX6UL_PAD_JTAG_MOD__GPIO1_IO10      0x17059 /* 38# GPIO */
+         MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x17059 /* 40# GPIO */
+      >;
+   };
+
+   pinctrl_i2c1: i2c1grp {
+      fsl,pins = <
+         MX6UL_PAD_GPIO1_IO03__I2C1_SDA      0x4001b8b0
+         MX6UL_PAD_GPIO1_IO02__I2C1_SCL      0x4001b8b0
+      >;
+   };
+
+   pinctrl_uart2: uart2grp {
+      fsl,pins = <
+         MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
+         MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
+      >;
+   };
+
+   pinctrl_uart3: uart3grp {
+      fsl,pins = <
+         MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX   0x1b0b1
+         MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX   0x1b0b1
+      >;
+   };
+
+   pinctrl_uart4: uart4grp {
+      fsl,pins = <
+         MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX   0x1b0b1
+         MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX   0x1b0b1
+      >;
+   };
+
+   pinctrl_uart7: uart7grp {
+      fsl,pins = <
+         MX6UL_PAD_LCD_DATA16__UART7_DCE_TX      0x1b0b1
+         MX6UL_PAD_LCD_DATA17__UART7_DCE_RX      0x1b0b1
+      >;
+   };
+
+    pinctrl_ecspi1: ecspi1-grp {
+        fsl,pins = <
+            MX6UL_PAD_NAND_CE1_B__GPIO4_IO14    0x17059 /* gpio key */
+         MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK   0x10b0
+         MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI   0x10b0
+         MX6UL_PAD_LCD_DATA23__ECSPI1_MISO   0x10b0
+         MX6UL_PAD_LCD_DATA21__GPIO3_IO26    0x10b0
+        >;
+    };
+
+    pinctrl_mqs: pinctrl-mqs-pins {
+        fsl,pins = <
+            MX6UL_PAD_JTAG_TDI__MQS_LEFT        0x11088 /* MQS Left  */
+            MX6UL_PAD_JTAG_TDO__MQS_RIGHT       0x11088 /* MQS Right */
+        >;
+    };
+   pinctrl_pwm7: pwm7grp {
+      fsl,pins = <
+         MX6UL_PAD_JTAG_TCK__PWM7_OUT      0x110b0
+      >;
+   };
+
+    pinctrl_ts_pins: pinctrl-ts-pins {
+        fsl,pins = <
+            MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02  0x17059 /* TouchScreen IRQ */
+            MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03  0x17059 /* TouchScreen RST */
+        >;
+    };
+   pinctrl_pwm8: pwm8grp {
+      fsl,pins = <
+         MX6UL_PAD_JTAG_TRST_B__PWM8_OUT      0x110b0
+      >;
+   };
+
    pinctrl_csi1: csi1grp {
       fsl,pins = <
          MX6UL_PAD_CSI_MCLK__CSI_MCLK      0x1b088
@@ -490,6 +634,7 @@
          MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00   0x1b0b0
          MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01   0x1b0b0
          MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1   0x4001b031
+         MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07       0x10B0 /* ENET1 RESET conflict with pinctrl_spi4 */
       >;
    };
 
@@ -505,6 +650,7 @@
          MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00   0x1b0b0
          MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01   0x1b0b0
          MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2   0x4001b031
+   pinctrl_flexcan1: flexcan1grp{
+      fsl,pins = <
+         MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX   0x1b020
+         MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX   0x1b020
+      >;
+   };
+
+   pinctrl_flexcan2: flexcan2grp{
+      fsl,pins = <
+         MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX   0x1b020
+         MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX   0x1b020
+      >;
+   };
+/* 40Pin Header end */
+
+   pinctrl_gpio_leds: gpio-leds {
+      fsl,pins = <
+         MX6UL_PAD_NAND_DQS__GPIO4_IO16      0x17059 /* led run */
+      >;
+   };
+
+   pinctrl_gpio_keys: gpio-keys {
+      fsl,pins = <
+         MX6UL_PAD_NAND_CE1_B__GPIO4_IO14   0x17059 /* gpio key */
+      >;
+   };
+
+   pinctrl_mqs: pinctrl-mqs-pins {
+      fsl,pins = <
+         MX6UL_PAD_JTAG_TDI__MQS_LEFT      0x11088 /* MQS Left  */
+         MX6UL_PAD_JTAG_TDO__MQS_RIGHT      0x11088 /* MQS Right */
+      >;
+   };
+
+   pinctrl_ts_pins: pinctrl-ts-pins {
+      fsl,pins = <
+         MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02   0x17059 /* TouchScreen IRQ */
+         MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03   0x17059 /* TouchScreen RST */
+      >;
+   };
+
+   pinctrl_csi1: csi1grp {
+      fsl,pins = <
+         MX6UL_PAD_CSI_MCLK__CSI_MCLK      0x1b088
+         MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK   0x1b088
+         MX6UL_PAD_CSI_VSYNC__CSI_VSYNC      0x1b088
+         MX6UL_PAD_CSI_HSYNC__CSI_HSYNC      0x1b088
+         MX6UL_PAD_CSI_DATA00__CSI_DATA02   0x1b088
+         MX6UL_PAD_CSI_DATA01__CSI_DATA03   0x1b088
+         MX6UL_PAD_CSI_DATA02__CSI_DATA04   0x1b088
+         MX6UL_PAD_CSI_DATA03__CSI_DATA05   0x1b088
+         MX6UL_PAD_CSI_DATA04__CSI_DATA06   0x1b088
+         MX6UL_PAD_CSI_DATA05__CSI_DATA07   0x1b088
+         MX6UL_PAD_CSI_DATA06__CSI_DATA08   0x1b088
+         MX6UL_PAD_CSI_DATA07__CSI_DATA09   0x1b088
+      >;
+   };
+
+   pinctrl_enet1: enet1grp {
+      fsl,pins = <
+         MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN   0x1b0b0
+         MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER   0x1b0b0
+         MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+         MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+         MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN   0x1b0b0
+         MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+         MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+         MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1   0x4001b031
+         MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x10B0 /* ENET1 RESET conflict with pinctrl_spi4 */
+      >;
+   };
+
+   pinctrl_enet2: enet2grp {
+      fsl,pins = <
+         MX6UL_PAD_GPIO1_IO07__ENET2_MDC      0x1b0b0
+         MX6UL_PAD_GPIO1_IO06__ENET2_MDIO   0x1b0b0
+         MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN   0x1b0b0
+         MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER   0x1b0b0
+         MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+         MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+         MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN   0x1b0b0
+         MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+         MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+         MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2   0x4001b031
+         MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04   0x10B0 /* ENET2 RESET conflict with pinctrl_sai2 */
       >;
    };
 
@@ -594,19 +740,18 @@
          MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA   0x11088
          MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA   0x11088
          MX6UL_PAD_JTAG_TMS__SAI2_MCLK      0x17088
-         MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04   0x17059
       >;
    };
 
-   pinctrl_peri_3v3: peri3v3grp {
+   pinctrl_pwm1: pwm1grp {
       fsl,pins = <
-         MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02   0x1b0b0
+         MX6UL_PAD_GPIO1_IO08__PWM1_OUT   0x110b0
       >;
    };
 
-   pinctrl_pwm1: pwm1grp {
+   pinctrl_pwm2: pwm2grp {
       fsl,pins = <
-         MX6UL_PAD_GPIO1_IO08__PWM1_OUT   0x110b0
+         MX6UL_PAD_GPIO1_IO09__PWM2_OUT   0x110b0
       >;
    };
 
@@ -625,7 +770,6 @@
       fsl,pins = <
          MX6UL_PAD_BOOT_MODE0__GPIO5_IO10   0x70a1
          MX6UL_PAD_BOOT_MODE1__GPIO5_IO11   0x70a1
-         MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07   0x70a1
          MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08   0x80000000
       >;
    };
@@ -678,9 +822,7 @@
          MX6UL_PAD_SD1_DATA1__USDHC1_DATA1    0x17059
          MX6UL_PAD_SD1_DATA2__USDHC1_DATA2    0x17059
          MX6UL_PAD_SD1_DATA3__USDHC1_DATA3    0x17059
-         MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
-         MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
-         MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
+         MX6UL_PAD_UART1_RTS_B__GPIO1_IO19   0x17059 /* SD1 CD */ 
       >;
    };
 
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/imx6ul.dtsi linux-imx-igkboard/arch/arm/boot/dts/imx6ul.dtsi
--- linux-imx/arch/arm/boot/dts/imx6ul.dtsi   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/imx6ul.dtsi   2021-12-18 21:41:22.474200827 +0800
@@ -727,6 +727,7 @@
                offset = <0x34>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled"; /* disable CPU builtin RTC and will use ISL1208 */
             };
 
             snvs_poweroff: snvs-poweroff {
@@ -791,6 +792,12 @@
             reg = <0x020e4000 0x4000>;
          };
 
+         mqs: mqs {
+            compatible = "fsl,imx6sx-mqs";
+            gpr = <&gpr>;
+            status = "disabled";
+         };
+      >;
+   };
+
          gpt2: timer@20e8000 {
             compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
             reg = <0x020e8000 0x4000>;
+   pinctrl_i2c2: i2c2grp {
+      fsl,pins = <
+         MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+         MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+      >;
+   };
+
+   pinctrl_lcdif_dat: lcdifdatgrp {
+      fsl,pins = <
+         MX6UL_PAD_LCD_DATA00__LCDIF_DATA00   0x79
+         MX6UL_PAD_LCD_DATA01__LCDIF_DATA01   0x79
+         MX6UL_PAD_LCD_DATA02__LCDIF_DATA02   0x79
+         MX6UL_PAD_LCD_DATA03__LCDIF_DATA03   0x79
+         MX6UL_PAD_LCD_DATA04__LCDIF_DATA04   0x79
+         MX6UL_PAD_LCD_DATA05__LCDIF_DATA05   0x79
+         MX6UL_PAD_LCD_DATA06__LCDIF_DATA06   0x79
+         MX6UL_PAD_LCD_DATA07__LCDIF_DATA07   0x79
+         MX6UL_PAD_LCD_DATA08__LCDIF_DATA08   0x79
+         MX6UL_PAD_LCD_DATA09__LCDIF_DATA09   0x79
+         MX6UL_PAD_LCD_DATA10__LCDIF_DATA10   0x79
+         MX6UL_PAD_LCD_DATA11__LCDIF_DATA11   0x79
+         MX6UL_PAD_LCD_DATA12__LCDIF_DATA12   0x79
+         MX6UL_PAD_LCD_DATA13__LCDIF_DATA13   0x79
+         MX6UL_PAD_LCD_DATA14__LCDIF_DATA14   0x79
+         MX6UL_PAD_LCD_DATA15__LCDIF_DATA15   0x79
+         MX6UL_PAD_LCD_DATA16__LCDIF_DATA16   0x79
+         MX6UL_PAD_LCD_DATA17__LCDIF_DATA17   0x79
+         MX6UL_PAD_LCD_DATA18__LCDIF_DATA18   0x79
+         MX6UL_PAD_LCD_DATA19__LCDIF_DATA19   0x79
+         MX6UL_PAD_LCD_DATA20__LCDIF_DATA20   0x79
+         MX6UL_PAD_LCD_DATA21__LCDIF_DATA21   0x79
+         MX6UL_PAD_LCD_DATA22__LCDIF_DATA22   0x79
+         MX6UL_PAD_LCD_DATA23__LCDIF_DATA23   0x79
+      >;
+   };
+
+   pinctrl_lcdif_ctrl: lcdifctrlgrp {
+      fsl,pins = <
+         MX6UL_PAD_LCD_CLK__LCDIF_CLK      0x79
+         MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE   0x79
+         MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC   0x79
+         MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC   0x79
+         /* used for lcd reset */
+         MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09   0x79
+      >;
+   };
+
+   pinctrl_pwm1: pwm1grp {
+      fsl,pins = <
+         MX6UL_PAD_GPIO1_IO08__PWM1_OUT    0x110b0
+      >;
+   };
+
+   pinctrl_pwm2: pwm2grp {
+      fsl,pins = <
+         MX6UL_PAD_GPIO1_IO09__PWM2_OUT    0x110b0
+      >;
+   };
+
+   pinctrl_uart1: uart1grp {
+      fsl,pins = <
+         MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+         MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+      >;
+   };
+
+   pinctrl_usb_otg1: usbotg1grp {
+      fsl,pins = <
+         MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID   0x17059
+      >;
+   };
+
+   pinctrl_usdhc1: usdhc1grp {
+      fsl,pins = <
+         MX6UL_PAD_SD1_CMD__USDHC1_CMD      0x17059
+         MX6UL_PAD_SD1_CLK__USDHC1_CLK      0x10071
+         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0   0x17059
+         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1   0x17059
+         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2   0x17059
+         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3   0x17059
+         MX6UL_PAD_UART1_RTS_B__GPIO1_IO19   0x17059 /* SD1 CD */
+      >;
+   };
+
+   pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+      fsl,pins = <
+         MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
+         MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
+         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+      >;
+   };
+
+   pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+      fsl,pins = <
+         MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
+         MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
+         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+      >;
+   };
+
+   pinctrl_usdhc2: usdhc2grp {
+      fsl,pins = <
+         MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x17059
+         MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x17059
+         MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+         MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+         MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+         MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+      >;
+   };
+
+   pinctrl_usdhc2_8bit: usdhc2grp_8bit {
+      fsl,pins = <
+         MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x10069
+         MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x17059
+         MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+         MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+         MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+         MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+         MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+         MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+         MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+         MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+      >;
+   };
+
+   pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
+      fsl,pins = <
+         MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x100b9
+         MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x170b9
+         MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+         MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+         MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+         MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+         MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
+         MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
+         MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
+         MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
+      >;
+   };
+
+   pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
+      fsl,pins = <
+         MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x100f9
+         MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x170f9
+         MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+         MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+         MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+         MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+         MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
+         MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
+         MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
+         MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
+      >;
+   };
+
+   pinctrl_wdog: wdoggrp {
+      fsl,pins = <
+         MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+      >;
+   };
+};
+
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-igkboard/arch/arm/boot/dts/Makefile
--- linux-imx/arch/arm/boot/dts/Makefile   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/Makefile   2021-12-22 19:41:12.058569872 +0800
+++ linux-imx-igkboard/arch/arm/boot/dts/Makefile   2022-04-13 23:15:49.155016887 +0800
@@ -678,6 +678,7 @@
    imx6ul-tx6ul-0010.dtb \
    imx6ul-tx6ul-0011.dtb \
    imx6ul-tx6ul-mainboard.dtb \
+   igkboard-emmc.dtb \
+   igkboard.dtb \
    imx6ull-14x14-evk.dtb \
    imx6ull-14x14-evk-emmc.dtb \
    imx6ull-14x14-evk-btwifi.dtb \
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-igkboard/arch/arm/configs/igkboard_defconfig
--- linux-imx/arch/arm/configs/igkboard_defconfig   1970-01-01 08:00:00.000000000 +0800
+++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig   2021-12-22 19:45:31.209601680 +0800
+++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig   2022-04-13 23:41:00.413708382 +0800
@@ -0,0 +1,722 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_SYSVIPC=y
@@ -1200,7 +1537,7 @@
+# CONFIG_FTRACE is not set
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-igkboard/Makefile
--- linux-imx/Makefile   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/Makefile   2021-12-22 19:45:15.333652470 +0800
+++ linux-imx-igkboard/Makefile   2022-04-13 23:15:49.159016848 +0800
@@ -367,7 +367,8 @@
 # Alternatively CROSS_COMPILE can be set in the environment.
 # Default value for CROSS_COMPILE is not to prefix executables
@@ -1211,27 +1548,3 @@
 
 # Architecture as present in compile.h
 UTS_MACHINE    := $(ARCH)
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/sound/soc/fsl/fsl_mqs.c linux-imx-igkboard/sound/soc/fsl/fsl_mqs.c
--- linux-imx/sound/soc/fsl/fsl_mqs.c   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/sound/soc/fsl/fsl_mqs.c   2021-12-18 21:41:22.474200827 +0800
@@ -247,6 +247,8 @@
          &fsl_mqs_dai, 1);
    if (ret)
       goto err_free_gpr_np;
+
+    printk("NXP mqs sound card driver register ok\n");
    return 0;
 
 err_free_gpr_np:
diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/sound/soc/fsl/fsl_sai.c linux-imx-igkboard/sound/soc/fsl/fsl_sai.c
--- linux-imx/sound/soc/fsl/fsl_sai.c   2021-09-08 18:41:11.000000000 +0800
+++ linux-imx-igkboard/sound/soc/fsl/fsl_sai.c   2021-12-18 21:41:22.474200827 +0800
@@ -1349,7 +1349,7 @@
       sai->bus_clk = NULL;
    }
 
-   for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
+   for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {
       sprintf(tmp, "mclk%d", i);
       sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
       if (IS_ERR(sai->mclk_clk[i])) {