| New file | 
 |  |  | 
 |  |  | diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile | 
 |  |  | index 30408b4b2..1da13a13e 100644 | 
 |  |  | --- a/arch/arm/boot/dts/Makefile | 
 |  |  | +++ b/arch/arm/boot/dts/Makefile | 
 |  |  | @@ -776,6 +776,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ | 
 |  |  |      imx6ul-tx6ul-0011.dtb \ | 
 |  |  |      imx6ul-tx6ul-mainboard.dtb \ | 
 |  |  |      imx6ull-14x14-evk.dtb \ | 
 |  |  | +    alientek-imx6ull-v20.dtb \ | 
 |  |  | +    alientek-imx6ull-v24.dtb \ | 
 |  |  |      imx6ull-14x14-evk-emmc.dtb \ | 
 |  |  |      imx6ull-14x14-evk-btwifi.dtb \ | 
 |  |  |      imx6ull-14x14-evk-gpmi-weim.dtb \ | 
 |  |  | diff --git a/arch/arm/boot/dts/alientek-imx6ull-v20.dts b/arch/arm/boot/dts/alientek-imx6ull-v20.dts | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..3dee0233b | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm/boot/dts/alientek-imx6ull-v20.dts | 
 |  |  | @@ -0,0 +1,41 @@ | 
 |  |  | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | 
 |  |  | +// | 
 |  |  | +// Copyright (C) 2022 LingYun IoT System Studio. | 
 |  |  | + | 
 |  |  | +/dts-v1/; | 
 |  |  | + | 
 |  |  | +#include "alientek-imx6ull.dts" | 
 |  |  | + | 
 |  |  | +&fec2 { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_enet2>; | 
 |  |  | +    phy-mode = "rmii"; | 
 |  |  | +    phy-handle = <ðphy1>; | 
 |  |  | +    phy-supply = <®_peri_3v3>; | 
 |  |  | +    phy-reset-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; | 
 |  |  | +    phy-reset-duration = <100>; | 
 |  |  | +    phy-reset-post-delay = <100>; | 
 |  |  | +    status = "okay"; | 
 |  |  | + | 
 |  |  | +    mdio { | 
 |  |  | +        #address-cells = <1>; | 
 |  |  | +        #size-cells = <0>; | 
 |  |  | + | 
 |  |  | +        ethphy0: ethernet-phy@2 { | 
 |  |  | +            compatible = "ethernet-phy-id0022.1560"; | 
 |  |  | +            reg = <0>; | 
 |  |  | +            micrel,led-mode = <1>; | 
 |  |  | +            clocks = <&clks IMX6UL_CLK_ENET_REF>; | 
 |  |  | +            clock-names = "rmii-ref"; | 
 |  |  | +        }; | 
 |  |  | + | 
 |  |  | +        ethphy1: ethernet-phy@1 { | 
 |  |  | +            compatible = "ethernet-phy-id0022.1560"; | 
 |  |  | +            reg = <1>; | 
 |  |  | +            micrel,led-mode = <1>; | 
 |  |  | +            clocks = <&clks IMX6UL_CLK_ENET2_REF>; | 
 |  |  | +            clock-names = "rmii-ref"; | 
 |  |  | +        }; | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | diff --git a/arch/arm/boot/dts/alientek-imx6ull-v24.dts b/arch/arm/boot/dts/alientek-imx6ull-v24.dts | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..e78bf08d5 | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm/boot/dts/alientek-imx6ull-v24.dts | 
 |  |  | @@ -0,0 +1,47 @@ | 
 |  |  | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | 
 |  |  | +// | 
 |  |  | +// Copyright (C) 2022 LingYun IoT System Studio. | 
 |  |  | + | 
 |  |  | +/dts-v1/; | 
 |  |  | + | 
 |  |  | +#include "alientek-imx6ull.dts" | 
 |  |  | + | 
 |  |  | +&fec1 { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_enet1>; | 
 |  |  | +    phy-mode = "rmii"; | 
 |  |  | +    phy-handle = <ðphy0>; | 
 |  |  | +    phy-supply = <®_peri_3v3>; | 
 |  |  | +    status = "okay"; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +&fec2 { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_enet2>; | 
 |  |  | +    phy-mode = "rmii"; | 
 |  |  | +    phy-handle = <ðphy1>; | 
 |  |  | +    phy-supply = <®_peri_3v3>; | 
 |  |  | +    status = "okay"; | 
 |  |  | + | 
 |  |  | +    mdio { | 
 |  |  | +        #address-cells = <1>; | 
 |  |  | +        #size-cells = <0>; | 
 |  |  | + | 
 |  |  | +        ethphy0: ethernet-phy@2 { | 
 |  |  | +            compatible = "ethernet-phy-id001c.c800"; | 
 |  |  | +            reg = <2>; | 
 |  |  | +            micrel,led-mode = <1>; | 
 |  |  | +            clocks = <&clks IMX6UL_CLK_ENET_REF>; | 
 |  |  | +            clock-names = "rmii-ref"; | 
 |  |  | +        }; | 
 |  |  | + | 
 |  |  | +        ethphy1: ethernet-phy@1 { | 
 |  |  | +            compatible = "ethernet-phy-id001c.c800"; | 
 |  |  | +            reg = <1>; | 
 |  |  | +            micrel,led-mode = <1>; | 
 |  |  | +            clocks = <&clks IMX6UL_CLK_ENET2_REF>; | 
 |  |  | +            clock-names = "rmii-ref"; | 
 |  |  | +        }; | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | diff --git a/arch/arm/boot/dts/alientek-imx6ull.dts b/arch/arm/boot/dts/alientek-imx6ull.dts | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..93a117fc0 | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm/boot/dts/alientek-imx6ull.dts | 
 |  |  | @@ -0,0 +1,237 @@ | 
 |  |  | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | 
 |  |  | +// | 
 |  |  | +// Copyright (C) 2022 LingYun IoT System Studio. | 
 |  |  | + | 
 |  |  | +/dts-v1/; | 
 |  |  | + | 
 |  |  | +#include "imx6ull.dtsi" | 
 |  |  | + | 
 |  |  | +/{ | 
 |  |  | +    model = "Freescale i.MX6 ULL 14x14 EVK Board"; | 
 |  |  | +    compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; | 
 |  |  | + | 
 |  |  | +    chosen { | 
 |  |  | +        stdout-path = &uart1; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    memory@80000000 { | 
 |  |  | +        device_type = "memory"; | 
 |  |  | +        reg = <0x80000000 0x20000000>; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    reserved-memory { | 
 |  |  | +        #address-cells = <1>; | 
 |  |  | +        #size-cells = <1>; | 
 |  |  | +        ranges; | 
 |  |  | + | 
 |  |  | +        linux,cma { | 
 |  |  | +            compatible = "shared-dma-pool"; | 
 |  |  | +            reusable; | 
 |  |  | +            size = <0xa000000>; | 
 |  |  | +            linux,cma-default; | 
 |  |  | +        }; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    reg_sd1_vmmc: regulator-sd1-vmmc { | 
 |  |  | +        compatible = "regulator-fixed"; | 
 |  |  | +        regulator-name = "VSD_3V3"; | 
 |  |  | +        regulator-min-microvolt = <3300000>; | 
 |  |  | +        regulator-max-microvolt = <3300000>; | 
 |  |  | +        gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; | 
 |  |  | +        off-on-delay-us = <20000>; | 
 |  |  | +        enable-active-high; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    reg_peri_3v3: regulator-peri-3v3 { | 
 |  |  | +        compatible = "regulator-fixed"; | 
 |  |  | +        pinctrl-names = "default"; | 
 |  |  | +        pinctrl-0 = <&pinctrl_peri_3v3>; | 
 |  |  | +        regulator-name = "VPERI_3V3"; | 
 |  |  | +        regulator-min-microvolt = <3300000>; | 
 |  |  | +        regulator-max-microvolt = <3300000>; | 
 |  |  | +        gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; | 
 |  |  | +        regulator-always-on; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    leds { | 
 |  |  | +        compatible = "gpio-leds"; | 
 |  |  | +        status = "okay"; | 
 |  |  | +        led0 { | 
 |  |  | +            label = "red"; | 
 |  |  | +            gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; | 
 |  |  | +            linux,default-trigger = "heartbeat"; | 
 |  |  | +            default-state = "on"; | 
 |  |  | +        }; | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | + | 
 |  |  | +&clks { | 
 |  |  | +    assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; | 
 |  |  | +    assigned-clock-rates = <786432000>; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +&uart1 { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_uart1>; | 
 |  |  | +    status = "okay"; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +&usdhc1 { | 
 |  |  | +    pinctrl-names = "default", "state_100mhz", "state_200mhz"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_usdhc1>; | 
 |  |  | +    pinctrl-1 = <&pinctrl_usdhc1_100mhz>; | 
 |  |  | +    pinctrl-2 = <&pinctrl_usdhc1_200mhz>; | 
 |  |  | +    cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; | 
 |  |  | +    keep-power-in-suspend; | 
 |  |  | +    wakeup-source; | 
 |  |  | +    vmmc-supply = <®_sd1_vmmc>; | 
 |  |  | +    status = "okay"; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +&usdhc2 { | 
 |  |  | +    pinctrl-names = "default", "state_100mhz", "state_200mhz"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_usdhc2_8bit>; | 
 |  |  | +    pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>; | 
 |  |  | +    pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>; | 
 |  |  | +    bus-width = <8>; | 
 |  |  | +    non-removable; | 
 |  |  | +    status = "okay"; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +&iomuxc { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl_enet1: enet1grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1    0x4001b031 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_enet2: enet2grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_GPIO1_IO07__ENET2_MDC            0x1b0b0 | 
 |  |  | +            MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN        0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 | 
 |  |  | +            MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2    0x4001b031 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_peri_3v3: peri3v3grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02        0x1b0b0 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_uart1: uart1grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX     0x1b0b1 | 
 |  |  | +            MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX     0x1b0b1 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc1: usdhc1grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_SD1_CMD__USDHC1_CMD            0x17059 | 
 |  |  | +            MX6UL_PAD_SD1_CLK__USDHC1_CLK            0x10071 | 
 |  |  | +            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0        0x17059 | 
 |  |  | +            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1        0x17059 | 
 |  |  | +            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2        0x17059 | 
 |  |  | +            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3        0x17059 | 
 |  |  | +            MX6UL_PAD_UART1_RTS_B__GPIO1_IO19        0x17059 /* SD1 CD */ | 
 |  |  | +            MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */ | 
 |  |  | +            MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */ | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc1_100mhz: usdhc1grp100mhz { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_SD1_CMD__USDHC1_CMD              0x170b9 | 
 |  |  | +            MX6UL_PAD_SD1_CLK__USDHC1_CLK              0x100b9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0         0x170b9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1         0x170b9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2         0x170b9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3         0x170b9 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc1_200mhz: usdhc1grp200mhz { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_SD1_CMD__USDHC1_CMD              0x170f9 | 
 |  |  | +            MX6UL_PAD_SD1_CLK__USDHC1_CLK              0x100f9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0         0x170f9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1         0x170f9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2         0x170f9 | 
 |  |  | +            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3         0x170f9 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc2: usdhc2grp { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_NAND_RE_B__USDHC2_CLK            0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_WE_B__USDHC2_CMD            0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x17059 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc2_8bit: usdhc2grp_8bit { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_NAND_RE_B__USDHC2_CLK            0x10069 | 
 |  |  | +            MX6UL_PAD_NAND_WE_B__USDHC2_CMD            0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6     0x17059 | 
 |  |  | +            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7     0x17059 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_NAND_RE_B__USDHC2_CLK            0x100b9 | 
 |  |  | +            MX6UL_PAD_NAND_WE_B__USDHC2_CMD            0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6     0x170b9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7     0x170b9 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { | 
 |  |  | +        fsl,pins = < | 
 |  |  | +            MX6UL_PAD_NAND_RE_B__USDHC2_CLK            0x100f9 | 
 |  |  | +            MX6UL_PAD_NAND_WE_B__USDHC2_CMD            0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6     0x170f9 | 
 |  |  | +            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7     0x170f9 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | diff --git a/arch/arm/configs/alientek-imx6ull-v20_defconfig b/arch/arm/configs/alientek-imx6ull-v20_defconfig | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..591aaaeff | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm/configs/alientek-imx6ull-v20_defconfig | 
 |  |  | @@ -0,0 +1,615 @@ | 
 |  |  | +CONFIG_SYSVIPC=y | 
 |  |  | +CONFIG_POSIX_MQUEUE=y | 
 |  |  | +CONFIG_NO_HZ_IDLE=y | 
 |  |  | +CONFIG_HIGH_RES_TIMERS=y | 
 |  |  | +CONFIG_BPF_SYSCALL=y | 
 |  |  | +CONFIG_PREEMPT=y | 
 |  |  | +CONFIG_IKCONFIG=y | 
 |  |  | +CONFIG_IKCONFIG_PROC=y | 
 |  |  | +CONFIG_LOG_BUF_SHIFT=18 | 
 |  |  | +CONFIG_CGROUPS=y | 
 |  |  | +CONFIG_CGROUP_BPF=y | 
 |  |  | +CONFIG_MEMCG=y | 
 |  |  | +CONFIG_CGROUP_PIDS=y | 
 |  |  | +CONFIG_CGROUP_FREEZER=y | 
 |  |  | +CONFIG_CGROUP_DEVICE=y | 
 |  |  | +CONFIG_NAMESPACES=y | 
 |  |  | +CONFIG_USER_NS=y | 
 |  |  | +CONFIG_RELAY=y | 
 |  |  | +CONFIG_BLK_DEV_INITRD=y | 
 |  |  | +CONFIG_EXPERT=y | 
 |  |  | +CONFIG_PERF_EVENTS=y | 
 |  |  | +CONFIG_ARCH_MULTI_V6=y | 
 |  |  | +CONFIG_ARCH_MXC=y | 
 |  |  | +CONFIG_SOC_IMX31=y | 
 |  |  | +CONFIG_SOC_IMX35=y | 
 |  |  | +CONFIG_SOC_IMX50=y | 
 |  |  | +CONFIG_SOC_IMX51=y | 
 |  |  | +CONFIG_SOC_IMX53=y | 
 |  |  | +CONFIG_SOC_IMX6Q=y | 
 |  |  | +CONFIG_SOC_IMX6SL=y | 
 |  |  | +CONFIG_SOC_IMX6SLL=y | 
 |  |  | +CONFIG_SOC_IMX6SX=y | 
 |  |  | +CONFIG_SOC_IMX6UL=y | 
 |  |  | +CONFIG_SOC_IMX7D=y | 
 |  |  | +CONFIG_SOC_IMX7ULP=y | 
 |  |  | +CONFIG_SOC_VF610=y | 
 |  |  | +CONFIG_FXAS21002C=y | 
 |  |  | +CONFIG_FXOS8700_I2C=y | 
 |  |  | +CONFIG_RPMSG_IIO_PEDOMETER=m | 
 |  |  | +CONFIG_SENSORS_ISL29018=y | 
 |  |  | +CONFIG_MAG3110=y | 
 |  |  | +CONFIG_MPL3115=y | 
 |  |  | +CONFIG_MMA8452=y | 
 |  |  | +CONFIG_SMP=y | 
 |  |  | +CONFIG_ARM_PSCI=y | 
 |  |  | +CONFIG_HIGHMEM=y | 
 |  |  | +CONFIG_ARCH_FORCE_MAX_ORDER=14 | 
 |  |  | +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" | 
 |  |  | +CONFIG_KEXEC=y | 
 |  |  | +CONFIG_CPU_FREQ=y | 
 |  |  | +CONFIG_CPU_FREQ_STAT=y | 
 |  |  | +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | 
 |  |  | +CONFIG_CPUFREQ_DT=y | 
 |  |  | +CONFIG_ARM_IMX6Q_CPUFREQ=y | 
 |  |  | +CONFIG_ARM_IMX_CPUFREQ_DT=y | 
 |  |  | +CONFIG_ARM_IMX7ULP_CPUFREQ=y | 
 |  |  | +CONFIG_CPU_IDLE=y | 
 |  |  | +CONFIG_ARM_CPUIDLE=y | 
 |  |  | +CONFIG_ARM_PSCI_CPUIDLE=y | 
 |  |  | +CONFIG_VFP=y | 
 |  |  | +CONFIG_NEON=y | 
 |  |  | +CONFIG_PM_DEBUG=y | 
 |  |  | +CONFIG_PM_TEST_SUSPEND=y | 
 |  |  | +CONFIG_KPROBES=y | 
 |  |  | +CONFIG_MODULES=y | 
 |  |  | +CONFIG_MODULE_UNLOAD=y | 
 |  |  | +CONFIG_MODVERSIONS=y | 
 |  |  | +CONFIG_MODULE_SRCVERSION_ALL=y | 
 |  |  | +CONFIG_BINFMT_MISC=m | 
 |  |  | +# CONFIG_COMPAT_BRK is not set | 
 |  |  | +CONFIG_CMA=y | 
 |  |  | +CONFIG_SECCOMP=y | 
 |  |  | +CONFIG_NET=y | 
 |  |  | +CONFIG_PACKET=y | 
 |  |  | +CONFIG_UNIX=y | 
 |  |  | +CONFIG_INET=y | 
 |  |  | +CONFIG_IP_MULTICAST=y | 
 |  |  | +CONFIG_IP_PNP=y | 
 |  |  | +CONFIG_IP_PNP_DHCP=y | 
 |  |  | +CONFIG_NETFILTER=y | 
 |  |  | +CONFIG_VLAN_8021Q=m | 
 |  |  | +CONFIG_LLC2=y | 
 |  |  | +CONFIG_CAN=y | 
 |  |  | +CONFIG_BT=y | 
 |  |  | +CONFIG_BT_RFCOMM=y | 
 |  |  | +CONFIG_BT_RFCOMM_TTY=y | 
 |  |  | +CONFIG_BT_BNEP=y | 
 |  |  | +CONFIG_BT_BNEP_MC_FILTER=y | 
 |  |  | +CONFIG_BT_BNEP_PROTO_FILTER=y | 
 |  |  | +CONFIG_BT_HIDP=y | 
 |  |  | +CONFIG_BT_HCIBTUSB=y | 
 |  |  | +CONFIG_BT_HCIUART=y | 
 |  |  | +CONFIG_BT_HCIUART_BCSP=y | 
 |  |  | +CONFIG_BT_HCIUART_LL=y | 
 |  |  | +CONFIG_BT_HCIUART_3WIRE=y | 
 |  |  | +CONFIG_BT_HCIUART_MRVL=y | 
 |  |  | +CONFIG_BT_HCIVHCI=y | 
 |  |  | +CONFIG_BT_MRVL=y | 
 |  |  | +CONFIG_BT_MRVL_SDIO=y | 
 |  |  | +CONFIG_CFG80211=y | 
 |  |  | +CONFIG_NL80211_TESTMODE=y | 
 |  |  | +CONFIG_CFG80211_WEXT=y | 
 |  |  | +CONFIG_MAC80211=y | 
 |  |  | +CONFIG_PCI=y | 
 |  |  | +CONFIG_PCI_MSI=y | 
 |  |  | +CONFIG_PCI_IMX6_HOST=y | 
 |  |  | +CONFIG_PCI_IMX6_EP=y | 
 |  |  | +CONFIG_PCI_ENDPOINT=y | 
 |  |  | +CONFIG_PCI_ENDPOINT_CONFIGFS=y | 
 |  |  | +CONFIG_PCI_EPF_TEST=y | 
 |  |  | +CONFIG_DEVTMPFS=y | 
 |  |  | +CONFIG_DEVTMPFS_MOUNT=y | 
 |  |  | +# CONFIG_STANDALONE is not set | 
 |  |  | +CONFIG_FW_LOADER_USER_HELPER=y | 
 |  |  | +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y | 
 |  |  | +CONFIG_IMX_WEIM=y | 
 |  |  | +CONFIG_CONNECTOR=y | 
 |  |  | +CONFIG_MTD=y | 
 |  |  | +CONFIG_MTD_CMDLINE_PARTS=y | 
 |  |  | +CONFIG_MTD_BLOCK=y | 
 |  |  | +CONFIG_MTD_CFI=y | 
 |  |  | +CONFIG_MTD_JEDECPROBE=y | 
 |  |  | +CONFIG_MTD_CFI_INTELEXT=y | 
 |  |  | +CONFIG_MTD_CFI_AMDSTD=y | 
 |  |  | +CONFIG_MTD_CFI_STAA=y | 
 |  |  | +CONFIG_MTD_PHYSMAP=y | 
 |  |  | +CONFIG_MTD_PHYSMAP_OF=y | 
 |  |  | +CONFIG_MTD_DATAFLASH=y | 
 |  |  | +CONFIG_MTD_SST25L=y | 
 |  |  | +CONFIG_MTD_RAW_NAND=y | 
 |  |  | +CONFIG_MTD_NAND_GPMI_NAND=y | 
 |  |  | +CONFIG_MTD_NAND_VF610_NFC=y | 
 |  |  | +CONFIG_MTD_NAND_MXC=y | 
 |  |  | +CONFIG_MTD_SPI_NOR=y | 
 |  |  | +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set | 
 |  |  | +CONFIG_MTD_UBI=y | 
 |  |  | +CONFIG_MTD_UBI_FASTMAP=y | 
 |  |  | +CONFIG_MTD_UBI_BLOCK=y | 
 |  |  | +CONFIG_OF_OVERLAY=y | 
 |  |  | +CONFIG_BLK_DEV_LOOP=y | 
 |  |  | +CONFIG_BLK_DEV_RAM=y | 
 |  |  | +CONFIG_BLK_DEV_RAM_SIZE=65536 | 
 |  |  | +CONFIG_EEPROM_AT24=y | 
 |  |  | +CONFIG_EEPROM_AT25=y | 
 |  |  | +# CONFIG_SCSI_PROC_FS is not set | 
 |  |  | +CONFIG_BLK_DEV_SD=y | 
 |  |  | +# CONFIG_BLK_DEV_BSG is not set | 
 |  |  | +CONFIG_SCSI_CONSTANTS=y | 
 |  |  | +CONFIG_SCSI_LOGGING=y | 
 |  |  | +CONFIG_SCSI_SCAN_ASYNC=y | 
 |  |  | +CONFIG_ATA=y | 
 |  |  | +CONFIG_SATA_AHCI_PLATFORM=y | 
 |  |  | +CONFIG_AHCI_IMX=y | 
 |  |  | +CONFIG_PATA_IMX=y | 
 |  |  | +CONFIG_MD=y | 
 |  |  | +CONFIG_BLK_DEV_MD=m | 
 |  |  | +CONFIG_BLK_DEV_DM=m | 
 |  |  | +CONFIG_DM_CRYPT=m | 
 |  |  | +CONFIG_NETDEVICES=y | 
 |  |  | +# CONFIG_NET_VENDOR_BROADCOM is not set | 
 |  |  | +CONFIG_CS89x0_PLATFORM=y | 
 |  |  | +# CONFIG_NET_VENDOR_FARADAY is not set | 
 |  |  | +# CONFIG_NET_VENDOR_INTEL is not set | 
 |  |  | +# CONFIG_NET_VENDOR_MARVELL is not set | 
 |  |  | +# CONFIG_NET_VENDOR_MICREL is not set | 
 |  |  | +# CONFIG_NET_VENDOR_MICROCHIP is not set | 
 |  |  | +# CONFIG_NET_VENDOR_NATSEMI is not set | 
 |  |  | +# CONFIG_NET_VENDOR_SEEQ is not set | 
 |  |  | +CONFIG_SMC91X=y | 
 |  |  | +CONFIG_SMC911X=y | 
 |  |  | +CONFIG_SMSC911X=y | 
 |  |  | +# CONFIG_NET_VENDOR_STMICRO is not set | 
 |  |  | +CONFIG_MICREL_PHY=y | 
 |  |  | +CONFIG_AT803X_PHY=y | 
 |  |  | +CONFIG_CAN_FLEXCAN=y | 
 |  |  | +CONFIG_USB_PEGASUS=m | 
 |  |  | +CONFIG_USB_RTL8150=m | 
 |  |  | +CONFIG_USB_RTL8152=y | 
 |  |  | +CONFIG_USB_LAN78XX=y | 
 |  |  | +CONFIG_USB_USBNET=y | 
 |  |  | +CONFIG_USB_NET_CDC_EEM=m | 
 |  |  | +CONFIG_USB_NET_SMSC95XX=y | 
 |  |  | +CONFIG_USB_NET_MCS7830=y | 
 |  |  | +CONFIG_ATH10K=m | 
 |  |  | +CONFIG_ATH10K_SDIO=m | 
 |  |  | +CONFIG_HOSTAP=y | 
 |  |  | +CONFIG_WL12XX=m | 
 |  |  | +CONFIG_WL18XX=m | 
 |  |  | +CONFIG_WLCORE_SDIO=m | 
 |  |  | +# CONFIG_WILINK_PLATFORM_DATA is not set | 
 |  |  | +CONFIG_INPUT_EVDEV=y | 
 |  |  | +CONFIG_INPUT_EVBUG=m | 
 |  |  | +CONFIG_KEYBOARD_GPIO=y | 
 |  |  | +CONFIG_KEYBOARD_RPMSG=y | 
 |  |  | +CONFIG_KEYBOARD_SNVS_PWRKEY=y | 
 |  |  | +CONFIG_KEYBOARD_IMX=y | 
 |  |  | +CONFIG_MOUSE_PS2=m | 
 |  |  | +CONFIG_MOUSE_PS2_ELANTECH=y | 
 |  |  | +CONFIG_INPUT_TOUCHSCREEN=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ADS7846=y | 
 |  |  | +CONFIG_TOUCHSCREEN_AD7879=y | 
 |  |  | +CONFIG_TOUCHSCREEN_AD7879_I2C=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ATMEL_MXT=y | 
 |  |  | +CONFIG_TOUCHSCREEN_DA9052=y | 
 |  |  | +CONFIG_TOUCHSCREEN_EGALAX=y | 
 |  |  | +CONFIG_TOUCHSCREEN_GOODIX=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ILI210X=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ELAN_TS=y | 
 |  |  | +CONFIG_TOUCHSCREEN_FTS=y | 
 |  |  | +CONFIG_TOUCHSCREEN_MAX11801=y | 
 |  |  | +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y | 
 |  |  | +CONFIG_TOUCHSCREEN_EDT_FT5X06=y | 
 |  |  | +CONFIG_TOUCHSCREEN_MC13783=y | 
 |  |  | +CONFIG_TOUCHSCREEN_TSC2004=y | 
 |  |  | +CONFIG_TOUCHSCREEN_TSC2007=y | 
 |  |  | +CONFIG_TOUCHSCREEN_STMPE=y | 
 |  |  | +CONFIG_TOUCHSCREEN_SX8654=y | 
 |  |  | +CONFIG_TOUCHSCREEN_COLIBRI_VF50=y | 
 |  |  | +CONFIG_INPUT_MISC=y | 
 |  |  | +CONFIG_INPUT_MMA8450=y | 
 |  |  | +CONFIG_SERIO_SERPORT=m | 
 |  |  | +# CONFIG_LEGACY_PTYS is not set | 
 |  |  | +CONFIG_SERIAL_IMX=y | 
 |  |  | +CONFIG_SERIAL_IMX_CONSOLE=y | 
 |  |  | +CONFIG_SERIAL_FSL_LPUART=y | 
 |  |  | +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y | 
 |  |  | +CONFIG_SERIAL_DEV_BUS=y | 
 |  |  | +# CONFIG_I2C_COMPAT is not set | 
 |  |  | +CONFIG_I2C_CHARDEV=y | 
 |  |  | +CONFIG_I2C_MUX=y | 
 |  |  | +CONFIG_I2C_MUX_GPIO=y | 
 |  |  | +# CONFIG_I2C_HELPER_AUTO is not set | 
 |  |  | +CONFIG_I2C_ALGOPCF=m | 
 |  |  | +CONFIG_I2C_ALGOPCA=m | 
 |  |  | +CONFIG_I2C_GPIO=y | 
 |  |  | +CONFIG_I2C_IMX=y | 
 |  |  | +CONFIG_I2C_IMX_LPI2C=y | 
 |  |  | +CONFIG_SPI=y | 
 |  |  | +CONFIG_SPI_FSL_QUADSPI=y | 
 |  |  | +CONFIG_SPI_FSL_LPSPI=y | 
 |  |  | +CONFIG_SPI_GPIO=y | 
 |  |  | +CONFIG_SPI_IMX=y | 
 |  |  | +CONFIG_SPI_SPIDEV=y | 
 |  |  | +CONFIG_SPI_FSL_DSPI=y | 
 |  |  | +CONFIG_SPI_SLAVE=y | 
 |  |  | +CONFIG_SPI_SLAVE_TIME=y | 
 |  |  | +CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y | 
 |  |  | +CONFIG_GPIO_SYSFS=y | 
 |  |  | +CONFIG_GPIO_MXC=y | 
 |  |  | +CONFIG_GPIO_IMX_RPMSG=y | 
 |  |  | +CONFIG_GPIO_SIOX=m | 
 |  |  | +CONFIG_GPIO_MAX732X=y | 
 |  |  | +CONFIG_GPIO_PCA953X=y | 
 |  |  | +CONFIG_GPIO_PCF857X=y | 
 |  |  | +CONFIG_GPIO_STMPE=y | 
 |  |  | +CONFIG_GPIO_74X164=y | 
 |  |  | +CONFIG_POWER_RESET=y | 
 |  |  | +CONFIG_POWER_RESET_SYSCON=y | 
 |  |  | +CONFIG_POWER_RESET_SYSCON_POWEROFF=y | 
 |  |  | +CONFIG_RN5T618_POWER=m | 
 |  |  | +CONFIG_SABRESD_MAX8903=y | 
 |  |  | +CONFIG_PCI_ENDPOINT_TEST=y | 
 |  |  | +CONFIG_SENSORS_MC13783_ADC=y | 
 |  |  | +CONFIG_SENSORS_GPIO_FAN=y | 
 |  |  | +CONFIG_SENSORS_MAX17135=y | 
 |  |  | +CONFIG_SENSORS_IIO_HWMON=y | 
 |  |  | +CONFIG_THERMAL=y | 
 |  |  | +CONFIG_THERMAL_STATISTICS=y | 
 |  |  | +CONFIG_THERMAL_WRITABLE_TRIPS=y | 
 |  |  | +CONFIG_CPU_THERMAL=y | 
 |  |  | +CONFIG_IMX_THERMAL=y | 
 |  |  | +CONFIG_DEVICE_THERMAL=y | 
 |  |  | +CONFIG_WATCHDOG=y | 
 |  |  | +CONFIG_DA9063_WATCHDOG=m | 
 |  |  | +CONFIG_DA9062_WATCHDOG=y | 
 |  |  | +CONFIG_RN5T618_WATCHDOG=y | 
 |  |  | +CONFIG_IMX2_WDT=y | 
 |  |  | +CONFIG_IMX7ULP_WDT=y | 
 |  |  | +CONFIG_MFD_DA9052_I2C=y | 
 |  |  | +CONFIG_MFD_DA9062=y | 
 |  |  | +CONFIG_MFD_DA9063=y | 
 |  |  | +CONFIG_MFD_MC13XXX_SPI=y | 
 |  |  | +CONFIG_MFD_MC13XXX_I2C=y | 
 |  |  | +CONFIG_MFD_MAX17135=y | 
 |  |  | +CONFIG_MFD_RN5T618=y | 
 |  |  | +CONFIG_MFD_SI476X_CORE=y | 
 |  |  | +CONFIG_MFD_STMPE=y | 
 |  |  | +CONFIG_REGULATOR_FIXED_VOLTAGE=y | 
 |  |  | +CONFIG_REGULATOR_ANATOP=y | 
 |  |  | +CONFIG_REGULATOR_DA9052=y | 
 |  |  | +CONFIG_REGULATOR_DA9062=y | 
 |  |  | +CONFIG_REGULATOR_DA9063=y | 
 |  |  | +CONFIG_REGULATOR_GPIO=y | 
 |  |  | +CONFIG_REGULATOR_LTC3676=y | 
 |  |  | +CONFIG_REGULATOR_MAX17135=y | 
 |  |  | +CONFIG_REGULATOR_MC13783=y | 
 |  |  | +CONFIG_REGULATOR_MC13892=y | 
 |  |  | +CONFIG_REGULATOR_PF1550_RPMSG=y | 
 |  |  | +CONFIG_REGULATOR_PFUZE100=y | 
 |  |  | +CONFIG_REGULATOR_RN5T618=y | 
 |  |  | +CONFIG_RC_CORE=y | 
 |  |  | +CONFIG_RC_DEVICES=y | 
 |  |  | +CONFIG_IR_GPIO_CIR=y | 
 |  |  | +CONFIG_MEDIA_SUPPORT=y | 
 |  |  | +CONFIG_MEDIA_RADIO_SUPPORT=y | 
 |  |  | +CONFIG_MEDIA_USB_SUPPORT=y | 
 |  |  | +CONFIG_USB_VIDEO_CLASS=m | 
 |  |  | +CONFIG_V4L_PLATFORM_DRIVERS=y | 
 |  |  | +CONFIG_V4L_MEM2MEM_DRIVERS=y | 
 |  |  | +CONFIG_VIDEO_MUX=y | 
 |  |  | +CONFIG_VIDEO_MXC_OUTPUT=y | 
 |  |  | +CONFIG_VIDEO_MXC_CAPTURE=m | 
 |  |  | +CONFIG_VIDEO_MXC_CSI_CAMERA=m | 
 |  |  | +CONFIG_MXC_VADC=m | 
 |  |  | +CONFIG_MXC_MIPI_CSI=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_V2=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_MIPI=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m | 
 |  |  | +CONFIG_MXC_TVIN_ADV7180=m | 
 |  |  | +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m | 
 |  |  | +CONFIG_VIDEO_MXC_IPU_OUTPUT=y | 
 |  |  | +CONFIG_VIDEO_MXC_PXP_V4L2=y | 
 |  |  | +CONFIG_VIDEO_CODA=m | 
 |  |  | +CONFIG_VIDEO_IMX_PXP=y | 
 |  |  | +CONFIG_VIDEO_OV2680=m | 
 |  |  | +CONFIG_VIDEO_OV5645=m | 
 |  |  | +CONFIG_VIDEO_ADV7180=m | 
 |  |  | +CONFIG_RADIO_SI476X=y | 
 |  |  | +CONFIG_DRM=y | 
 |  |  | +CONFIG_DRM_MSM=y | 
 |  |  | +CONFIG_DRM_PANEL_LVDS=y | 
 |  |  | +CONFIG_DRM_PANEL_SIMPLE=y | 
 |  |  | +CONFIG_DRM_PANEL_EDP=y | 
 |  |  | +CONFIG_DRM_PANEL_SEIKO_43WVF1G=y | 
 |  |  | +CONFIG_DRM_TI_TFP410=y | 
 |  |  | +CONFIG_FB=y | 
 |  |  | +CONFIG_FB_MXS=y | 
 |  |  | +CONFIG_FB_MXC_EINK_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_EINK_V2_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y | 
 |  |  | +CONFIG_FB_MXC_ADV7535=y | 
 |  |  | +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_TRULY_PANEL_TFT3P5581E=y | 
 |  |  | +CONFIG_FB_MXC_RK_PANEL_RK055AHD042=y | 
 |  |  | +CONFIG_FB_MXC_RK_PANEL_RK055IQH042=y | 
 |  |  | +CONFIG_FB_MXC_SYNC_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_OVERLAY=y | 
 |  |  | +CONFIG_FB_MXC_LDB=y | 
 |  |  | +CONFIG_FB_MXC_HDMI=y | 
 |  |  | +CONFIG_FB_MXS_SII902X=y | 
 |  |  | +CONFIG_FB_MXC_DCIC=y | 
 |  |  | +CONFIG_LCD_CLASS_DEVICE=y | 
 |  |  | +CONFIG_LCD_L4F00242T03=y | 
 |  |  | +CONFIG_LCD_PLATFORM=y | 
 |  |  | +CONFIG_BACKLIGHT_PWM=y | 
 |  |  | +CONFIG_BACKLIGHT_GPIO=y | 
 |  |  | +CONFIG_FRAMEBUFFER_CONSOLE=y | 
 |  |  | +CONFIG_LOGO=y | 
 |  |  | +CONFIG_SOUND=y | 
 |  |  | +CONFIG_SND=y | 
 |  |  | +CONFIG_SND_USB_AUDIO=m | 
 |  |  | +CONFIG_SND_SOC=y | 
 |  |  | +CONFIG_SND_SOC_FSL_ASRC=y | 
 |  |  | +CONFIG_SND_SOC_FSL_MQS=y | 
 |  |  | +CONFIG_SND_SOC_FSL_RPMSG=y | 
 |  |  | +CONFIG_SND_IMX_SOC=y | 
 |  |  | +CONFIG_SND_SOC_EUKREA_TLV320=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SII902X=y | 
 |  |  | +CONFIG_SND_SOC_IMX_WM8958=y | 
 |  |  | +CONFIG_SND_SOC_IMX_RPMSG=y | 
 |  |  | +CONFIG_SND_SOC_IMX_ES8328=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SGTL5000=y | 
 |  |  | +CONFIG_SND_SOC_IMX_MQS=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SPDIF=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SI476X=y | 
 |  |  | +CONFIG_SND_SOC_IMX_HDMI=y | 
 |  |  | +CONFIG_SND_SOC_IMX6QDL_HDMI=y | 
 |  |  | +CONFIG_SND_SOC_AC97_CODEC=y | 
 |  |  | +CONFIG_SND_SOC_TLV320AIC3X_I2C=y | 
 |  |  | +CONFIG_SND_SOC_FSL_ASOC_CARD=y | 
 |  |  | +CONFIG_SND_SOC_CS42XX8_I2C=y | 
 |  |  | +CONFIG_SND_SOC_WM8960=y | 
 |  |  | +CONFIG_SND_SOC_WM8962=y | 
 |  |  | +CONFIG_SND_SOC_RPMSG_WM8960=y | 
 |  |  | +CONFIG_SND_SIMPLE_CARD=y | 
 |  |  | +CONFIG_HID_MULTITOUCH=y | 
 |  |  | +CONFIG_HID_WACOM=y | 
 |  |  | +CONFIG_I2C_HID_OF=y | 
 |  |  | +CONFIG_USB=y | 
 |  |  | +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | 
 |  |  | +CONFIG_USB_OTG_WHITELIST=y | 
 |  |  | +CONFIG_USB_EHCI_HCD=y | 
 |  |  | +CONFIG_USB_HCD_TEST_MODE=y | 
 |  |  | +CONFIG_USB_ACM=m | 
 |  |  | +CONFIG_USB_STORAGE=y | 
 |  |  | +CONFIG_USB_CHIPIDEA=y | 
 |  |  | +CONFIG_USB_CHIPIDEA_UDC=y | 
 |  |  | +CONFIG_USB_CHIPIDEA_HOST=y | 
 |  |  | +CONFIG_USB_SERIAL=m | 
 |  |  | +CONFIG_USB_SERIAL_GENERIC=y | 
 |  |  | +CONFIG_USB_SERIAL_FTDI_SIO=m | 
 |  |  | +CONFIG_USB_SERIAL_OPTION=m | 
 |  |  | +CONFIG_USB_TEST=m | 
 |  |  | +CONFIG_USB_EHSET_TEST_FIXTURE=m | 
 |  |  | +CONFIG_NOP_USB_XCEIV=y | 
 |  |  | +CONFIG_USB_MXS_PHY=y | 
 |  |  | +CONFIG_USB_GADGET=y | 
 |  |  | +CONFIG_USB_CONFIGFS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_SERIAL=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ACM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_OBEX=y | 
 |  |  | +CONFIG_USB_CONFIGFS_NCM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ECM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ECM_SUBSET=y | 
 |  |  | +CONFIG_USB_CONFIGFS_RNDIS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_EEM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_MASS_STORAGE=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_LB_SS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_FS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UAC1=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UAC2=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_MIDI=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_HID=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UVC=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_PRINTER=y | 
 |  |  | +CONFIG_USB_ZERO=m | 
 |  |  | +CONFIG_USB_AUDIO=m | 
 |  |  | +CONFIG_USB_ETH=m | 
 |  |  | +CONFIG_USB_G_NCM=m | 
 |  |  | +CONFIG_USB_GADGETFS=m | 
 |  |  | +CONFIG_USB_FUNCTIONFS=m | 
 |  |  | +CONFIG_USB_MASS_STORAGE=m | 
 |  |  | +CONFIG_USB_G_SERIAL=m | 
 |  |  | +CONFIG_MMC=y | 
 |  |  | +CONFIG_MMC_SDHCI=y | 
 |  |  | +CONFIG_MMC_SDHCI_PLTFM=y | 
 |  |  | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | 
 |  |  | +CONFIG_MXC_SIM=y | 
 |  |  | +CONFIG_MXC_SIMv2=y | 
 |  |  | +CONFIG_LEDS_GPIO=y | 
 |  |  | +CONFIG_LEDS_PWM=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_TIMER=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_ONESHOT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_BACKLIGHT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_GPIO=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | 
 |  |  | +CONFIG_RTC_CLASS=y | 
 |  |  | +CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 
 |  |  | +CONFIG_RTC_DRV_DS1307=y | 
 |  |  | +CONFIG_RTC_DRV_ISL1208=y | 
 |  |  | +CONFIG_RTC_DRV_PCF8523=y | 
 |  |  | +CONFIG_RTC_DRV_PCF8563=y | 
 |  |  | +CONFIG_RTC_DRV_M41T80=y | 
 |  |  | +CONFIG_RTC_DRV_RC5T619=y | 
 |  |  | +CONFIG_RTC_DRV_RV3029C2=y | 
 |  |  | +CONFIG_RTC_DRV_DA9063=y | 
 |  |  | +CONFIG_RTC_DRV_MC13XXX=y | 
 |  |  | +CONFIG_RTC_DRV_MXC=y | 
 |  |  | +CONFIG_RTC_DRV_MXC_V2=y | 
 |  |  | +CONFIG_RTC_DRV_SNVS=y | 
 |  |  | +CONFIG_RTC_DRV_IMX_RPMSG=y | 
 |  |  | +CONFIG_DMADEVICES=y | 
 |  |  | +CONFIG_FSL_EDMA=y | 
 |  |  | +CONFIG_IMX_SDMA=m | 
 |  |  | +CONFIG_MXS_DMA=y | 
 |  |  | +CONFIG_MXC_PXP_V2=y | 
 |  |  | +CONFIG_MXC_PXP_V3=y | 
 |  |  | +CONFIG_DMATEST=m | 
 |  |  | +CONFIG_STAGING=y | 
 |  |  | +CONFIG_STAGING_MEDIA=y | 
 |  |  | +CONFIG_COMMON_CLK_PWM=y | 
 |  |  | +CONFIG_EXTCON_USB_GPIO=y | 
 |  |  | +CONFIG_IIO=y | 
 |  |  | +CONFIG_IMX7D_ADC=y | 
 |  |  | +CONFIG_RN5T618_ADC=y | 
 |  |  | +CONFIG_STMPE_ADC=y | 
 |  |  | +CONFIG_VF610_ADC=y | 
 |  |  | +CONFIG_PWM=y | 
 |  |  | +CONFIG_PWM_FSL_FTM=y | 
 |  |  | +CONFIG_PWM_IMX27=y | 
 |  |  | +CONFIG_PWM_IMX_TPM=y | 
 |  |  | +CONFIG_PHY_MIXEL_LVDS=y | 
 |  |  | +CONFIG_PHY_MIXEL_LVDS_COMBO=y | 
 |  |  | +CONFIG_MAILBOX=y | 
 |  |  | +CONFIG_IMX_MBOX=y | 
 |  |  | +CONFIG_REMOTEPROC=y | 
 |  |  | +CONFIG_IMX_REMOTEPROC=y | 
 |  |  | +CONFIG_NVMEM_IMX_OCOTP=y | 
 |  |  | +CONFIG_NVMEM_VF610_OCOTP=y | 
 |  |  | +CONFIG_NVMEM_SNVS_LPGPR=y | 
 |  |  | +CONFIG_TEE=y | 
 |  |  | +CONFIG_OPTEE=y | 
 |  |  | +CONFIG_MUX_MMIO=y | 
 |  |  | +CONFIG_SIOX=m | 
 |  |  | +CONFIG_SIOX_BUS_GPIO=m | 
 |  |  | +CONFIG_MXC_IPU=y | 
 |  |  | +CONFIG_MXC_GPU_VIV=y | 
 |  |  | +CONFIG_MXC_IPU_V3_PRE=y | 
 |  |  | +CONFIG_MXC_MLB150=y | 
 |  |  | +CONFIG_MXC_MIPI_CSI2=y | 
 |  |  | +CONFIG_MXC_HDMI_CEC=y | 
 |  |  | +CONFIG_EXT2_FS=y | 
 |  |  | +CONFIG_EXT2_FS_XATTR=y | 
 |  |  | +CONFIG_EXT2_FS_POSIX_ACL=y | 
 |  |  | +CONFIG_EXT2_FS_SECURITY=y | 
 |  |  | +CONFIG_EXT3_FS=y | 
 |  |  | +CONFIG_EXT3_FS_POSIX_ACL=y | 
 |  |  | +CONFIG_EXT3_FS_SECURITY=y | 
 |  |  | +CONFIG_QUOTA=y | 
 |  |  | +CONFIG_QUOTA_NETLINK_INTERFACE=y | 
 |  |  | +# CONFIG_PRINT_QUOTA_WARNING is not set | 
 |  |  | +CONFIG_AUTOFS4_FS=y | 
 |  |  | +CONFIG_FUSE_FS=y | 
 |  |  | +CONFIG_OVERLAY_FS=y | 
 |  |  | +CONFIG_ISO9660_FS=m | 
 |  |  | +CONFIG_JOLIET=y | 
 |  |  | +CONFIG_ZISOFS=y | 
 |  |  | +CONFIG_UDF_FS=m | 
 |  |  | +CONFIG_MSDOS_FS=m | 
 |  |  | +CONFIG_VFAT_FS=y | 
 |  |  | +CONFIG_TMPFS=y | 
 |  |  | +CONFIG_TMPFS_POSIX_ACL=y | 
 |  |  | +CONFIG_JFFS2_FS=y | 
 |  |  | +CONFIG_UBIFS_FS=y | 
 |  |  | +CONFIG_NFS_FS=y | 
 |  |  | +CONFIG_NFS_V3_ACL=y | 
 |  |  | +CONFIG_NFS_V4=y | 
 |  |  | +CONFIG_NFS_V4_1=y | 
 |  |  | +CONFIG_NFS_V4_2=y | 
 |  |  | +CONFIG_ROOT_NFS=y | 
 |  |  | +CONFIG_NLS_DEFAULT="cp437" | 
 |  |  | +CONFIG_NLS_CODEPAGE_437=y | 
 |  |  | +CONFIG_NLS_ASCII=y | 
 |  |  | +CONFIG_NLS_ISO8859_1=y | 
 |  |  | +CONFIG_NLS_ISO8859_15=m | 
 |  |  | +CONFIG_NLS_UTF8=y | 
 |  |  | +CONFIG_SECURITYFS=y | 
 |  |  | +CONFIG_CRYPTO_USER=y | 
 |  |  | +CONFIG_CRYPTO_TEST=m | 
 |  |  | +CONFIG_CRYPTO_ECHAINIV=m | 
 |  |  | +CONFIG_CRYPTO_TLS=m | 
 |  |  | +CONFIG_CRYPTO_CTS=m | 
 |  |  | +CONFIG_CRYPTO_LRW=m | 
 |  |  | +CONFIG_CRYPTO_XTS=m | 
 |  |  | +CONFIG_CRYPTO_XXHASH=m | 
 |  |  | +CONFIG_CRYPTO_BLAKE2B=m | 
 |  |  | +CONFIG_CRYPTO_BLAKE2S=m | 
 |  |  | +CONFIG_CRYPTO_MD4=m | 
 |  |  | +CONFIG_CRYPTO_MD5=m | 
 |  |  | +CONFIG_CRYPTO_RMD160=m | 
 |  |  | +CONFIG_CRYPTO_SHA512=m | 
 |  |  | +CONFIG_CRYPTO_SHA3=m | 
 |  |  | +CONFIG_CRYPTO_TGR192=m | 
 |  |  | +CONFIG_CRYPTO_WP512=m | 
 |  |  | +CONFIG_CRYPTO_ARC4=m | 
 |  |  | +CONFIG_CRYPTO_BLOWFISH=m | 
 |  |  | +CONFIG_CRYPTO_CAMELLIA=m | 
 |  |  | +CONFIG_CRYPTO_CAST5=m | 
 |  |  | +CONFIG_CRYPTO_CAST6=m | 
 |  |  | +CONFIG_CRYPTO_SERPENT=m | 
 |  |  | +CONFIG_CRYPTO_TWOFISH=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m | 
 |  |  | +CONFIG_CRYPTO_DEV_SAHARA=y | 
 |  |  | +CONFIG_CRYPTO_DEV_MXS_DCP=y | 
 |  |  | +CONFIG_CRYPTO_CFB=m | 
 |  |  | +CONFIG_CRYPTO_OFB=m | 
 |  |  | +CONFIG_CRYPTO_PCBC=m | 
 |  |  | +CONFIG_CRYPTO_XCBC=m | 
 |  |  | +CONFIG_CRYPTO_VMAC=m | 
 |  |  | +CONFIG_CRYPTO_SM3=m | 
 |  |  | +CONFIG_CRYPTO_STREEBOG=m | 
 |  |  | +CONFIG_CRYPTO_ANUBIS=m | 
 |  |  | +CONFIG_CRYPTO_DES=m | 
 |  |  | +CONFIG_CRYPTO_FCRYPT=m | 
 |  |  | +CONFIG_CRYPTO_KHAZAD=m | 
 |  |  | +CONFIG_CRYPTO_SALSA20=m | 
 |  |  | +CONFIG_CRYPTO_SEED=m | 
 |  |  | +CONFIG_CRYPTO_SM4=m | 
 |  |  | +CONFIG_CRYPTO_TEA=m | 
 |  |  | +CONFIG_CRYPTO_ANSI_CPRNG=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_RNG=m | 
 |  |  | +CONFIG_CRYPTO_SHA1=m | 
 |  |  | +CONFIG_CRC_T10DIF=y | 
 |  |  | +CONFIG_CRC7=m | 
 |  |  | +CONFIG_LIBCRC32C=m | 
 |  |  | +CONFIG_DMA_CMA=y | 
 |  |  | +CONFIG_FONTS=y | 
 |  |  | +CONFIG_FONT_8x8=y | 
 |  |  | +CONFIG_FONT_8x16=y | 
 |  |  | +CONFIG_PRINTK_TIME=y | 
 |  |  | +# CONFIG_DEBUG_BUGVERBOSE is not set | 
 |  |  | +CONFIG_MAGIC_SYSRQ=y | 
 |  |  | +CONFIG_DEBUG_FS=y | 
 |  |  | +# CONFIG_SLUB_DEBUG is not set | 
 |  |  | +# CONFIG_SCHED_DEBUG is not set | 
 |  |  | +CONFIG_PROVE_LOCKING=y | 
 |  |  | +# CONFIG_FTRACE is not set | 
 |  |  | + | 
 |  |  | +# enable AF_ALG | 
 |  |  | +CONFIG_CRYPTO_USER_API_HASH=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_SKCIPHER=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_AEAD=m | 
 |  |  | + | 
 |  |  | +# enable KTLS | 
 |  |  | +CONFIG_TLS=y | 
 |  |  | +CONFIG_TLS_DEVICE=y | 
 |  |  | diff --git a/arch/arm/configs/alientek-imx6ull-v24_defconfig b/arch/arm/configs/alientek-imx6ull-v24_defconfig | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..87c777f33 | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm/configs/alientek-imx6ull-v24_defconfig | 
 |  |  | @@ -0,0 +1,596 @@ | 
 |  |  | +CONFIG_SYSVIPC=y | 
 |  |  | +CONFIG_POSIX_MQUEUE=y | 
 |  |  | +CONFIG_NO_HZ=y | 
 |  |  | +CONFIG_HIGH_RES_TIMERS=y | 
 |  |  | +CONFIG_PREEMPT=y | 
 |  |  | +CONFIG_IKCONFIG=y | 
 |  |  | +CONFIG_IKCONFIG_PROC=y | 
 |  |  | +CONFIG_LOG_BUF_SHIFT=18 | 
 |  |  | +CONFIG_CGROUPS=y | 
 |  |  | +CONFIG_MEMCG=y | 
 |  |  | +CONFIG_CGROUP_PIDS=y | 
 |  |  | +CONFIG_CGROUP_FREEZER=y | 
 |  |  | +CONFIG_CGROUP_DEVICE=y | 
 |  |  | +CONFIG_NAMESPACES=y | 
 |  |  | +CONFIG_USER_NS=y | 
 |  |  | +CONFIG_RELAY=y | 
 |  |  | +CONFIG_BLK_DEV_INITRD=y | 
 |  |  | +CONFIG_EXPERT=y | 
 |  |  | +CONFIG_KALLSYMS_ALL=y | 
 |  |  | +CONFIG_PERF_EVENTS=y | 
 |  |  | +CONFIG_ARCH_MXC=y | 
 |  |  | +CONFIG_SOC_IMX6Q=y | 
 |  |  | +CONFIG_SOC_IMX6SL=y | 
 |  |  | +CONFIG_SOC_IMX6SLL=y | 
 |  |  | +CONFIG_SOC_IMX6SX=y | 
 |  |  | +CONFIG_SOC_IMX6UL=y | 
 |  |  | +CONFIG_SOC_IMX7D=y | 
 |  |  | +CONFIG_SOC_IMX7ULP=y | 
 |  |  | +CONFIG_SMP=y | 
 |  |  | +CONFIG_VMSPLIT_2G=y | 
 |  |  | +CONFIG_ARM_PSCI=y | 
 |  |  | +CONFIG_HIGHMEM=y | 
 |  |  | +CONFIG_ARCH_FORCE_MAX_ORDER=14 | 
 |  |  | +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" | 
 |  |  | +CONFIG_KEXEC=y | 
 |  |  | +CONFIG_CPU_FREQ=y | 
 |  |  | +CONFIG_CPU_FREQ_STAT=y | 
 |  |  | +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | 
 |  |  | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | 
 |  |  | +CONFIG_CPUFREQ_DT=y | 
 |  |  | +CONFIG_ARM_IMX6Q_CPUFREQ=y | 
 |  |  | +CONFIG_ARM_IMX_CPUFREQ_DT=y | 
 |  |  | +CONFIG_CPU_IDLE=y | 
 |  |  | +CONFIG_ARM_CPUIDLE=y | 
 |  |  | +CONFIG_ARM_PSCI_CPUIDLE=y | 
 |  |  | +CONFIG_VFP=y | 
 |  |  | +CONFIG_NEON=y | 
 |  |  | +CONFIG_PM_DEBUG=y | 
 |  |  | +CONFIG_PM_TEST_SUSPEND=y | 
 |  |  | +CONFIG_KPROBES=y | 
 |  |  | +CONFIG_MODULES=y | 
 |  |  | +CONFIG_MODULE_UNLOAD=y | 
 |  |  | +CONFIG_MODVERSIONS=y | 
 |  |  | +CONFIG_MODULE_SRCVERSION_ALL=y | 
 |  |  | +CONFIG_BINFMT_MISC=m | 
 |  |  | +# CONFIG_COMPAT_BRK is not set | 
 |  |  | +CONFIG_CMA=y | 
 |  |  | +CONFIG_NET=y | 
 |  |  | +CONFIG_PACKET=y | 
 |  |  | +CONFIG_UNIX=y | 
 |  |  | +CONFIG_TLS=y | 
 |  |  | +CONFIG_TLS_DEVICE=y | 
 |  |  | +CONFIG_INET=y | 
 |  |  | +CONFIG_IP_MULTICAST=y | 
 |  |  | +CONFIG_IP_PNP=y | 
 |  |  | +CONFIG_IP_PNP_DHCP=y | 
 |  |  | +CONFIG_NETFILTER=y | 
 |  |  | +CONFIG_VLAN_8021Q=m | 
 |  |  | +CONFIG_LLC2=y | 
 |  |  | +CONFIG_CAN=y | 
 |  |  | +CONFIG_BT=y | 
 |  |  | +CONFIG_BT_RFCOMM=y | 
 |  |  | +CONFIG_BT_RFCOMM_TTY=y | 
 |  |  | +CONFIG_BT_BNEP=y | 
 |  |  | +CONFIG_BT_BNEP_MC_FILTER=y | 
 |  |  | +CONFIG_BT_BNEP_PROTO_FILTER=y | 
 |  |  | +CONFIG_BT_HIDP=y | 
 |  |  | +CONFIG_BT_HCIBTUSB=y | 
 |  |  | +CONFIG_BT_HCIUART=y | 
 |  |  | +CONFIG_BT_HCIUART_BCSP=y | 
 |  |  | +CONFIG_BT_HCIUART_LL=y | 
 |  |  | +CONFIG_BT_HCIUART_3WIRE=y | 
 |  |  | +CONFIG_BT_HCIUART_MRVL=y | 
 |  |  | +CONFIG_BT_HCIVHCI=y | 
 |  |  | +CONFIG_BT_MRVL=y | 
 |  |  | +CONFIG_BT_MRVL_SDIO=y | 
 |  |  | +CONFIG_BT_NXPUART=m | 
 |  |  | +CONFIG_CFG80211=y | 
 |  |  | +CONFIG_NL80211_TESTMODE=y | 
 |  |  | +CONFIG_CFG80211_WEXT=y | 
 |  |  | +CONFIG_MAC80211=y | 
 |  |  | +CONFIG_PCI=y | 
 |  |  | +CONFIG_PCI_MSI=y | 
 |  |  | +CONFIG_PCI_IMX6_HOST=y | 
 |  |  | +CONFIG_PCI_IMX6_EP=y | 
 |  |  | +CONFIG_PCI_ENDPOINT=y | 
 |  |  | +CONFIG_PCI_ENDPOINT_CONFIGFS=y | 
 |  |  | +CONFIG_PCI_EPF_TEST=y | 
 |  |  | +CONFIG_DEVTMPFS=y | 
 |  |  | +CONFIG_DEVTMPFS_MOUNT=y | 
 |  |  | +# CONFIG_STANDALONE is not set | 
 |  |  | +CONFIG_FW_LOADER_USER_HELPER=y | 
 |  |  | +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y | 
 |  |  | +CONFIG_IMX_WEIM=y | 
 |  |  | +CONFIG_CONNECTOR=y | 
 |  |  | +CONFIG_MTD=y | 
 |  |  | +CONFIG_MTD_CMDLINE_PARTS=y | 
 |  |  | +CONFIG_MTD_BLOCK=y | 
 |  |  | +CONFIG_MTD_CFI=y | 
 |  |  | +CONFIG_MTD_JEDECPROBE=y | 
 |  |  | +CONFIG_MTD_CFI_INTELEXT=y | 
 |  |  | +CONFIG_MTD_CFI_AMDSTD=y | 
 |  |  | +CONFIG_MTD_CFI_STAA=y | 
 |  |  | +CONFIG_MTD_PHYSMAP=y | 
 |  |  | +CONFIG_MTD_PHYSMAP_OF=y | 
 |  |  | +CONFIG_MTD_DATAFLASH=y | 
 |  |  | +CONFIG_MTD_SST25L=y | 
 |  |  | +CONFIG_MTD_RAW_NAND=y | 
 |  |  | +CONFIG_MTD_NAND_GPMI_NAND=y | 
 |  |  | +CONFIG_MTD_NAND_MXC=y | 
 |  |  | +CONFIG_MTD_SPI_NOR=y | 
 |  |  | +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set | 
 |  |  | +CONFIG_MTD_UBI=y | 
 |  |  | +CONFIG_MTD_UBI_FASTMAP=y | 
 |  |  | +CONFIG_MTD_UBI_BLOCK=y | 
 |  |  | +CONFIG_OF_OVERLAY=y | 
 |  |  | +CONFIG_BLK_DEV_LOOP=y | 
 |  |  | +CONFIG_BLK_DEV_RAM=y | 
 |  |  | +CONFIG_BLK_DEV_RAM_SIZE=65536 | 
 |  |  | +CONFIG_BLK_DEV_NVME=y | 
 |  |  | +CONFIG_PCI_ENDPOINT_TEST=y | 
 |  |  | +CONFIG_EEPROM_AT24=y | 
 |  |  | +CONFIG_EEPROM_AT25=y | 
 |  |  | +# CONFIG_SCSI_PROC_FS is not set | 
 |  |  | +CONFIG_BLK_DEV_SD=y | 
 |  |  | +# CONFIG_BLK_DEV_BSG is not set | 
 |  |  | +CONFIG_SCSI_CONSTANTS=y | 
 |  |  | +CONFIG_SCSI_LOGGING=y | 
 |  |  | +CONFIG_SCSI_SCAN_ASYNC=y | 
 |  |  | +CONFIG_ATA=y | 
 |  |  | +CONFIG_SATA_AHCI_PLATFORM=y | 
 |  |  | +CONFIG_AHCI_IMX=y | 
 |  |  | +CONFIG_PATA_IMX=y | 
 |  |  | +CONFIG_MD=y | 
 |  |  | +CONFIG_BLK_DEV_MD=m | 
 |  |  | +CONFIG_BLK_DEV_DM=m | 
 |  |  | +CONFIG_DM_CRYPT=m | 
 |  |  | +CONFIG_NETDEVICES=y | 
 |  |  | +CONFIG_TUN=y | 
 |  |  | +# CONFIG_NET_VENDOR_BROADCOM is not set | 
 |  |  | +CONFIG_CS89x0_PLATFORM=y | 
 |  |  | +# CONFIG_NET_VENDOR_FARADAY is not set | 
 |  |  | +CONFIG_E1000E=y | 
 |  |  | +# CONFIG_NET_VENDOR_MARVELL is not set | 
 |  |  | +# CONFIG_NET_VENDOR_MICREL is not set | 
 |  |  | +# CONFIG_NET_VENDOR_MICROCHIP is not set | 
 |  |  | +# CONFIG_NET_VENDOR_NATSEMI is not set | 
 |  |  | +# CONFIG_NET_VENDOR_SEEQ is not set | 
 |  |  | +CONFIG_SMC91X=y | 
 |  |  | +CONFIG_SMC911X=y | 
 |  |  | +CONFIG_SMSC911X=y | 
 |  |  | +# CONFIG_NET_VENDOR_STMICRO is not set | 
 |  |  | +CONFIG_MICREL_PHY=y | 
 |  |  | +CONFIG_AT803X_PHY=y | 
 |  |  | +CONFIG_CAN_FLEXCAN=y | 
 |  |  | +CONFIG_USB_PEGASUS=m | 
 |  |  | +CONFIG_USB_RTL8150=m | 
 |  |  | +CONFIG_USB_RTL8152=y | 
 |  |  | +CONFIG_USB_LAN78XX=y | 
 |  |  | +CONFIG_USB_USBNET=y | 
 |  |  | +CONFIG_USB_NET_CDC_EEM=m | 
 |  |  | +CONFIG_USB_NET_SMSC95XX=y | 
 |  |  | +CONFIG_USB_NET_MCS7830=y | 
 |  |  | +CONFIG_ATH10K=m | 
 |  |  | +CONFIG_ATH10K_SDIO=m | 
 |  |  | +CONFIG_HOSTAP=y | 
 |  |  | +CONFIG_WL12XX=m | 
 |  |  | +CONFIG_WL18XX=m | 
 |  |  | +CONFIG_WLCORE_SDIO=m | 
 |  |  | +# CONFIG_WILINK_PLATFORM_DATA is not set | 
 |  |  | +CONFIG_INPUT_EVDEV=y | 
 |  |  | +CONFIG_INPUT_EVBUG=m | 
 |  |  | +CONFIG_KEYBOARD_GPIO=y | 
 |  |  | +CONFIG_KEYBOARD_RPMSG=y | 
 |  |  | +CONFIG_KEYBOARD_IMX=y | 
 |  |  | +CONFIG_MOUSE_PS2=m | 
 |  |  | +CONFIG_MOUSE_PS2_ELANTECH=y | 
 |  |  | +CONFIG_INPUT_TOUCHSCREEN=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ADS7846=y | 
 |  |  | +CONFIG_TOUCHSCREEN_AD7879=y | 
 |  |  | +CONFIG_TOUCHSCREEN_AD7879_I2C=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ATMEL_MXT=y | 
 |  |  | +CONFIG_TOUCHSCREEN_DA9052=y | 
 |  |  | +CONFIG_TOUCHSCREEN_EGALAX=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ELAN_TS=y | 
 |  |  | +CONFIG_TOUCHSCREEN_GOODIX=y | 
 |  |  | +CONFIG_TOUCHSCREEN_ILI210X=y | 
 |  |  | +CONFIG_TOUCHSCREEN_MAX11801=y | 
 |  |  | +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y | 
 |  |  | +CONFIG_TOUCHSCREEN_EDT_FT5X06=y | 
 |  |  | +CONFIG_TOUCHSCREEN_MC13783=y | 
 |  |  | +CONFIG_TOUCHSCREEN_TSC2004=y | 
 |  |  | +CONFIG_TOUCHSCREEN_TSC2007=y | 
 |  |  | +CONFIG_TOUCHSCREEN_STMPE=y | 
 |  |  | +CONFIG_TOUCHSCREEN_SX8654=y | 
 |  |  | +CONFIG_TOUCHSCREEN_COLIBRI_VF50=y | 
 |  |  | +CONFIG_TOUCHSCREEN_FTS=y | 
 |  |  | +CONFIG_INPUT_MISC=y | 
 |  |  | +CONFIG_INPUT_MMA8450=y | 
 |  |  | +CONFIG_SERIO_SERPORT=m | 
 |  |  | +# CONFIG_LEGACY_PTYS is not set | 
 |  |  | +CONFIG_SERIAL_IMX=y | 
 |  |  | +CONFIG_SERIAL_IMX_CONSOLE=y | 
 |  |  | +CONFIG_SERIAL_FSL_LPUART=y | 
 |  |  | +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y | 
 |  |  | +CONFIG_SERIAL_DEV_BUS=y | 
 |  |  | +# CONFIG_I2C_COMPAT is not set | 
 |  |  | +CONFIG_I2C_CHARDEV=y | 
 |  |  | +CONFIG_I2C_MUX=y | 
 |  |  | +CONFIG_I2C_MUX_GPIO=y | 
 |  |  | +# CONFIG_I2C_HELPER_AUTO is not set | 
 |  |  | +CONFIG_I2C_ALGOPCF=m | 
 |  |  | +CONFIG_I2C_ALGOPCA=m | 
 |  |  | +CONFIG_I2C_GPIO=y | 
 |  |  | +CONFIG_I2C_IMX=y | 
 |  |  | +CONFIG_I2C_IMX_LPI2C=y | 
 |  |  | +CONFIG_I2C_SLAVE_EEPROM=y | 
 |  |  | +CONFIG_SPI=y | 
 |  |  | +CONFIG_SPI_FSL_LPSPI=y | 
 |  |  | +CONFIG_SPI_FSL_QUADSPI=y | 
 |  |  | +CONFIG_SPI_GPIO=y | 
 |  |  | +CONFIG_SPI_IMX=y | 
 |  |  | +CONFIG_SPI_SPIDEV=y | 
 |  |  | +CONFIG_SPI_SLAVE=y | 
 |  |  | +CONFIG_SPI_SLAVE_TIME=y | 
 |  |  | +CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y | 
 |  |  | +CONFIG_GPIO_SYSFS=y | 
 |  |  | +CONFIG_GPIO_IMX_RPMSG=y | 
 |  |  | +CONFIG_GPIO_MXC=y | 
 |  |  | +CONFIG_GPIO_SIOX=m | 
 |  |  | +CONFIG_GPIO_MAX732X=y | 
 |  |  | +CONFIG_GPIO_PCA953X=y | 
 |  |  | +CONFIG_GPIO_PCF857X=y | 
 |  |  | +CONFIG_GPIO_STMPE=y | 
 |  |  | +CONFIG_GPIO_74X164=y | 
 |  |  | +CONFIG_POWER_RESET=y | 
 |  |  | +CONFIG_POWER_RESET_SYSCON=y | 
 |  |  | +CONFIG_POWER_RESET_SYSCON_POWEROFF=y | 
 |  |  | +CONFIG_POWER_SUPPLY=y | 
 |  |  | +CONFIG_SABRESD_MAX8903=y | 
 |  |  | +CONFIG_RN5T618_POWER=m | 
 |  |  | +CONFIG_SENSORS_MC13783_ADC=y | 
 |  |  | +CONFIG_SENSORS_GPIO_FAN=y | 
 |  |  | +CONFIG_SENSORS_IIO_HWMON=y | 
 |  |  | +CONFIG_SENSORS_MAX17135=y | 
 |  |  | +CONFIG_THERMAL=y | 
 |  |  | +CONFIG_THERMAL_STATISTICS=y | 
 |  |  | +CONFIG_THERMAL_WRITABLE_TRIPS=y | 
 |  |  | +CONFIG_CPU_THERMAL=y | 
 |  |  | +CONFIG_IMX_THERMAL=y | 
 |  |  | +CONFIG_DEVICE_THERMAL=y | 
 |  |  | +CONFIG_WATCHDOG=y | 
 |  |  | +CONFIG_DA9063_WATCHDOG=m | 
 |  |  | +CONFIG_DA9062_WATCHDOG=y | 
 |  |  | +CONFIG_RN5T618_WATCHDOG=y | 
 |  |  | +CONFIG_IMX2_WDT=y | 
 |  |  | +CONFIG_IMX7ULP_WDT=y | 
 |  |  | +CONFIG_MFD_DA9052_I2C=y | 
 |  |  | +CONFIG_MFD_DA9062=y | 
 |  |  | +CONFIG_MFD_DA9063=y | 
 |  |  | +CONFIG_MFD_MC13XXX_SPI=y | 
 |  |  | +CONFIG_MFD_MC13XXX_I2C=y | 
 |  |  | +CONFIG_MFD_MAX17135=y | 
 |  |  | +CONFIG_MFD_RN5T618=y | 
 |  |  | +CONFIG_MFD_SI476X_CORE=y | 
 |  |  | +CONFIG_MFD_STMPE=y | 
 |  |  | +CONFIG_REGULATOR=y | 
 |  |  | +CONFIG_REGULATOR_FIXED_VOLTAGE=y | 
 |  |  | +CONFIG_REGULATOR_ANATOP=y | 
 |  |  | +CONFIG_REGULATOR_DA9052=y | 
 |  |  | +CONFIG_REGULATOR_DA9062=y | 
 |  |  | +CONFIG_REGULATOR_DA9063=y | 
 |  |  | +CONFIG_REGULATOR_GPIO=y | 
 |  |  | +CONFIG_REGULATOR_LTC3676=y | 
 |  |  | +CONFIG_REGULATOR_MAX17135=y | 
 |  |  | +CONFIG_REGULATOR_MC13783=y | 
 |  |  | +CONFIG_REGULATOR_MC13892=y | 
 |  |  | +CONFIG_REGULATOR_PF1550_RPMSG=y | 
 |  |  | +CONFIG_REGULATOR_PFUZE100=y | 
 |  |  | +CONFIG_REGULATOR_RN5T618=y | 
 |  |  | +CONFIG_RC_CORE=y | 
 |  |  | +CONFIG_RC_DEVICES=y | 
 |  |  | +CONFIG_IR_GPIO_CIR=y | 
 |  |  | +CONFIG_MEDIA_SUPPORT=y | 
 |  |  | +CONFIG_MEDIA_USB_SUPPORT=y | 
 |  |  | +CONFIG_USB_VIDEO_CLASS=m | 
 |  |  | +CONFIG_RADIO_SI476X=y | 
 |  |  | +CONFIG_V4L_PLATFORM_DRIVERS=y | 
 |  |  | +CONFIG_V4L_MEM2MEM_DRIVERS=y | 
 |  |  | +CONFIG_VIDEO_MUX=y | 
 |  |  | +CONFIG_VIDEO_MXC_CAPTURE=m | 
 |  |  | +CONFIG_VIDEO_MXC_CSI_CAMERA=m | 
 |  |  | +CONFIG_MXC_VADC=m | 
 |  |  | +CONFIG_MXC_MIPI_CSI=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_V2=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_MIPI=m | 
 |  |  | +CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m | 
 |  |  | +CONFIG_MXC_TVIN_ADV7180=m | 
 |  |  | +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m | 
 |  |  | +CONFIG_VIDEO_MXC_OUTPUT=y | 
 |  |  | +CONFIG_VIDEO_MXC_IPU_OUTPUT=y | 
 |  |  | +CONFIG_VIDEO_MXC_PXP_V4L2=y | 
 |  |  | +CONFIG_VIDEO_CODA=m | 
 |  |  | +CONFIG_VIDEO_IMX_PXP=y | 
 |  |  | +CONFIG_VIDEO_OV2680=m | 
 |  |  | +CONFIG_VIDEO_OV5645=m | 
 |  |  | +CONFIG_VIDEO_ADV7180=m | 
 |  |  | +CONFIG_DRM=y | 
 |  |  | +CONFIG_DRM_PANEL_LVDS=y | 
 |  |  | +CONFIG_DRM_PANEL_SIMPLE=y | 
 |  |  | +CONFIG_DRM_PANEL_SEIKO_43WVF1G=y | 
 |  |  | +CONFIG_DRM_TI_TFP410=y | 
 |  |  | +CONFIG_FB=y | 
 |  |  | +CONFIG_FB_MXS=y | 
 |  |  | +CONFIG_FB_MXC_SYNC_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_OVERLAY=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y | 
 |  |  | +CONFIG_FB_MXC_ADV7535=y | 
 |  |  | +CONFIG_FB_MXC_TRULY_PANEL_TFT3P5581E=y | 
 |  |  | +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_RK_PANEL_RK055AHD042=y | 
 |  |  | +CONFIG_FB_MXC_RK_PANEL_RK055IQH042=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y | 
 |  |  | +CONFIG_FB_MXC_MIPI_DSI=y | 
 |  |  | +CONFIG_FB_MXC_LDB=y | 
 |  |  | +CONFIG_FB_MXC_EINK_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_EINK_V2_PANEL=y | 
 |  |  | +CONFIG_FB_MXC_HDMI=y | 
 |  |  | +CONFIG_FB_MXS_SII902X=y | 
 |  |  | +CONFIG_FB_MXC_DCIC=y | 
 |  |  | +CONFIG_LCD_CLASS_DEVICE=y | 
 |  |  | +CONFIG_LCD_L4F00242T03=y | 
 |  |  | +CONFIG_LCD_PLATFORM=y | 
 |  |  | +CONFIG_BACKLIGHT_PWM=y | 
 |  |  | +CONFIG_BACKLIGHT_GPIO=y | 
 |  |  | +CONFIG_FRAMEBUFFER_CONSOLE=y | 
 |  |  | +CONFIG_LOGO=y | 
 |  |  | +CONFIG_SOUND=y | 
 |  |  | +CONFIG_SND=y | 
 |  |  | +CONFIG_SND_USB_AUDIO=m | 
 |  |  | +CONFIG_SND_SOC=y | 
 |  |  | +CONFIG_SND_SOC_FSL_ASRC=y | 
 |  |  | +CONFIG_SND_SOC_FSL_MQS=y | 
 |  |  | +CONFIG_SND_SOC_FSL_RPMSG=y | 
 |  |  | +CONFIG_SND_IMX_SOC=y | 
 |  |  | +CONFIG_SND_SOC_EUKREA_TLV320=y | 
 |  |  | +CONFIG_SND_SOC_IMX_ES8328=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SGTL5000=y | 
 |  |  | +CONFIG_SND_SOC_IMX_SPDIF=y | 
 |  |  | +CONFIG_SND_SOC_FSL_ASOC_CARD=y | 
 |  |  | +CONFIG_SND_SOC_IMX_HDMI=y | 
 |  |  | +CONFIG_SND_SOC_IMX6QDL_HDMI=y | 
 |  |  | +CONFIG_SND_SOC_AC97_CODEC=y | 
 |  |  | +CONFIG_SND_SOC_CS42XX8_I2C=y | 
 |  |  | +CONFIG_SND_SOC_WM8960=y | 
 |  |  | +CONFIG_SND_SOC_WM8962=y | 
 |  |  | +CONFIG_SND_SOC_RPMSG_WM8960=y | 
 |  |  | +CONFIG_SND_SIMPLE_CARD=y | 
 |  |  | +CONFIG_HID_MULTITOUCH=y | 
 |  |  | +CONFIG_USB=y | 
 |  |  | +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | 
 |  |  | +CONFIG_USB_XHCI_HCD=y | 
 |  |  | +CONFIG_USB_EHCI_HCD=y | 
 |  |  | +CONFIG_USB_HCD_TEST_MODE=y | 
 |  |  | +CONFIG_USB_ACM=m | 
 |  |  | +CONFIG_USB_STORAGE=y | 
 |  |  | +CONFIG_USB_CHIPIDEA=y | 
 |  |  | +CONFIG_USB_CHIPIDEA_UDC=y | 
 |  |  | +CONFIG_USB_CHIPIDEA_HOST=y | 
 |  |  | +CONFIG_USB_SERIAL=m | 
 |  |  | +CONFIG_USB_SERIAL_GENERIC=y | 
 |  |  | +CONFIG_USB_SERIAL_FTDI_SIO=m | 
 |  |  | +CONFIG_USB_SERIAL_OPTION=m | 
 |  |  | +CONFIG_USB_TEST=m | 
 |  |  | +CONFIG_USB_EHSET_TEST_FIXTURE=m | 
 |  |  | +CONFIG_NOP_USB_XCEIV=y | 
 |  |  | +CONFIG_USB_MXS_PHY=y | 
 |  |  | +CONFIG_USB_GADGET=y | 
 |  |  | +CONFIG_USB_CONFIGFS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_SERIAL=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ACM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_OBEX=y | 
 |  |  | +CONFIG_USB_CONFIGFS_NCM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ECM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_ECM_SUBSET=y | 
 |  |  | +CONFIG_USB_CONFIGFS_RNDIS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_EEM=y | 
 |  |  | +CONFIG_USB_CONFIGFS_MASS_STORAGE=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_LB_SS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_FS=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UAC1=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UAC2=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_MIDI=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_HID=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_UVC=y | 
 |  |  | +CONFIG_USB_CONFIGFS_F_PRINTER=y | 
 |  |  | +CONFIG_USB_ZERO=m | 
 |  |  | +CONFIG_USB_AUDIO=m | 
 |  |  | +CONFIG_USB_ETH=m | 
 |  |  | +CONFIG_USB_G_NCM=m | 
 |  |  | +CONFIG_USB_GADGETFS=m | 
 |  |  | +CONFIG_USB_FUNCTIONFS=m | 
 |  |  | +CONFIG_USB_MASS_STORAGE=m | 
 |  |  | +CONFIG_USB_G_SERIAL=m | 
 |  |  | +CONFIG_MMC=y | 
 |  |  | +CONFIG_MMC_SDHCI=y | 
 |  |  | +CONFIG_MMC_SDHCI_PLTFM=y | 
 |  |  | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | 
 |  |  | +CONFIG_NEW_LEDS=y | 
 |  |  | +CONFIG_LEDS_CLASS=y | 
 |  |  | +CONFIG_LEDS_GPIO=y | 
 |  |  | +CONFIG_LEDS_PWM=y | 
 |  |  | +CONFIG_LEDS_TRIGGERS=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_TIMER=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_ONESHOT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_BACKLIGHT=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_GPIO=y | 
 |  |  | +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | 
 |  |  | +CONFIG_RTC_CLASS=y | 
 |  |  | +CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 
 |  |  | +CONFIG_RTC_DRV_DS1307=y | 
 |  |  | +CONFIG_RTC_DRV_ISL1208=y | 
 |  |  | +CONFIG_RTC_DRV_PCF8523=y | 
 |  |  | +CONFIG_RTC_DRV_PCF8563=y | 
 |  |  | +CONFIG_RTC_DRV_M41T80=y | 
 |  |  | +CONFIG_RTC_DRV_RC5T619=y | 
 |  |  | +CONFIG_RTC_DRV_DA9063=y | 
 |  |  | +CONFIG_RTC_DRV_MC13XXX=y | 
 |  |  | +CONFIG_RTC_DRV_MXC=y | 
 |  |  | +CONFIG_RTC_DRV_MXC_V2=y | 
 |  |  | +CONFIG_RTC_DRV_SNVS=y | 
 |  |  | +CONFIG_RTC_DRV_IMX_RPMSG=y | 
 |  |  | +CONFIG_DMADEVICES=y | 
 |  |  | +CONFIG_FSL_EDMA=y | 
 |  |  | +CONFIG_IMX_SDMA=y | 
 |  |  | +CONFIG_MXS_DMA=y | 
 |  |  | +CONFIG_MXC_PXP_V2=y | 
 |  |  | +CONFIG_MXC_PXP_V3=y | 
 |  |  | +CONFIG_DMATEST=m | 
 |  |  | +CONFIG_STAGING=y | 
 |  |  | +CONFIG_STAGING_MEDIA=y | 
 |  |  | +CONFIG_COMMON_CLK_PWM=y | 
 |  |  | +CONFIG_REMOTEPROC=y | 
 |  |  | +CONFIG_IMX_REMOTEPROC=y | 
 |  |  | +CONFIG_EXTCON_USB_GPIO=y | 
 |  |  | +CONFIG_IIO=y | 
 |  |  | +CONFIG_FXLS8962AF_I2C=y | 
 |  |  | +CONFIG_MMA8452=y | 
 |  |  | +CONFIG_IMX7D_ADC=y | 
 |  |  | +CONFIG_RN5T618_ADC=y | 
 |  |  | +CONFIG_VF610_ADC=y | 
 |  |  | +CONFIG_FXAS21002C=y | 
 |  |  | +CONFIG_FXOS8700_I2C=y | 
 |  |  | +CONFIG_RPMSG_IIO_PEDOMETER=m | 
 |  |  | +CONFIG_SENSORS_ISL29018=y | 
 |  |  | +CONFIG_MAG3110=y | 
 |  |  | +CONFIG_MPL3115=y | 
 |  |  | +CONFIG_PWM=y | 
 |  |  | +CONFIG_PWM_FSL_FTM=y | 
 |  |  | +CONFIG_PWM_IMX27=y | 
 |  |  | +CONFIG_PWM_IMX_TPM=y | 
 |  |  | +CONFIG_PHY_MIXEL_LVDS=y | 
 |  |  | +CONFIG_PHY_MIXEL_LVDS_COMBO=y | 
 |  |  | +CONFIG_NVMEM_IMX_OCOTP=y | 
 |  |  | +CONFIG_NVMEM_SNVS_LPGPR=y | 
 |  |  | +CONFIG_TEE=y | 
 |  |  | +CONFIG_OPTEE=y | 
 |  |  | +CONFIG_MUX_MMIO=y | 
 |  |  | +CONFIG_SIOX=m | 
 |  |  | +CONFIG_SIOX_BUS_GPIO=m | 
 |  |  | +CONFIG_MXC_SIM=y | 
 |  |  | +CONFIG_MXC_IPU=y | 
 |  |  | +CONFIG_MXC_GPU_VIV=y | 
 |  |  | +CONFIG_MXC_SIMv2=y | 
 |  |  | +CONFIG_MXC_MLB150=y | 
 |  |  | +CONFIG_MXC_IPU_V3_PRE=y | 
 |  |  | +CONFIG_MXC_HDMI_CEC=y | 
 |  |  | +CONFIG_MXC_MIPI_CSI2=y | 
 |  |  | +CONFIG_EXT2_FS=y | 
 |  |  | +CONFIG_EXT2_FS_XATTR=y | 
 |  |  | +CONFIG_EXT2_FS_POSIX_ACL=y | 
 |  |  | +CONFIG_EXT2_FS_SECURITY=y | 
 |  |  | +CONFIG_EXT3_FS=y | 
 |  |  | +CONFIG_EXT3_FS_POSIX_ACL=y | 
 |  |  | +CONFIG_EXT3_FS_SECURITY=y | 
 |  |  | +CONFIG_QUOTA=y | 
 |  |  | +CONFIG_QUOTA_NETLINK_INTERFACE=y | 
 |  |  | +# CONFIG_PRINT_QUOTA_WARNING is not set | 
 |  |  | +CONFIG_AUTOFS4_FS=y | 
 |  |  | +CONFIG_FUSE_FS=y | 
 |  |  | +CONFIG_OVERLAY_FS=y | 
 |  |  | +CONFIG_ISO9660_FS=m | 
 |  |  | +CONFIG_JOLIET=y | 
 |  |  | +CONFIG_ZISOFS=y | 
 |  |  | +CONFIG_UDF_FS=m | 
 |  |  | +CONFIG_MSDOS_FS=m | 
 |  |  | +CONFIG_VFAT_FS=y | 
 |  |  | +CONFIG_TMPFS=y | 
 |  |  | +CONFIG_TMPFS_POSIX_ACL=y | 
 |  |  | +CONFIG_JFFS2_FS=y | 
 |  |  | +CONFIG_UBIFS_FS=y | 
 |  |  | +CONFIG_NFS_FS=y | 
 |  |  | +CONFIG_NFS_V3_ACL=y | 
 |  |  | +CONFIG_NFS_V4=y | 
 |  |  | +CONFIG_NFS_V4_1=y | 
 |  |  | +CONFIG_NFS_V4_2=y | 
 |  |  | +CONFIG_ROOT_NFS=y | 
 |  |  | +CONFIG_NLS_DEFAULT="cp437" | 
 |  |  | +CONFIG_NLS_CODEPAGE_437=y | 
 |  |  | +CONFIG_NLS_ASCII=y | 
 |  |  | +CONFIG_NLS_ISO8859_1=y | 
 |  |  | +CONFIG_NLS_ISO8859_15=m | 
 |  |  | +CONFIG_NLS_UTF8=y | 
 |  |  | +CONFIG_SECURITYFS=y | 
 |  |  | +CONFIG_CRYPTO_USER=y | 
 |  |  | +CONFIG_CRYPTO_TEST=m | 
 |  |  | +CONFIG_CRYPTO_ANUBIS=m | 
 |  |  | +CONFIG_CRYPTO_BLOWFISH=m | 
 |  |  | +CONFIG_CRYPTO_CAMELLIA=m | 
 |  |  | +CONFIG_CRYPTO_CAST5=m | 
 |  |  | +CONFIG_CRYPTO_CAST6=m | 
 |  |  | +CONFIG_CRYPTO_DES=m | 
 |  |  | +CONFIG_CRYPTO_FCRYPT=m | 
 |  |  | +CONFIG_CRYPTO_KHAZAD=m | 
 |  |  | +CONFIG_CRYPTO_SEED=m | 
 |  |  | +CONFIG_CRYPTO_SERPENT=m | 
 |  |  | +CONFIG_CRYPTO_TEA=m | 
 |  |  | +CONFIG_CRYPTO_TWOFISH=m | 
 |  |  | +CONFIG_CRYPTO_ARC4=m | 
 |  |  | +CONFIG_CRYPTO_CFB=m | 
 |  |  | +CONFIG_CRYPTO_CTS=m | 
 |  |  | +CONFIG_CRYPTO_LRW=m | 
 |  |  | +CONFIG_CRYPTO_OFB=m | 
 |  |  | +CONFIG_CRYPTO_PCBC=m | 
 |  |  | +CONFIG_CRYPTO_ECHAINIV=m | 
 |  |  | +CONFIG_CRYPTO_TLS=m | 
 |  |  | +CONFIG_CRYPTO_BLAKE2B=m | 
 |  |  | +CONFIG_CRYPTO_MD4=m | 
 |  |  | +CONFIG_CRYPTO_MD5=m | 
 |  |  | +CONFIG_CRYPTO_RMD160=m | 
 |  |  | +CONFIG_CRYPTO_SHA3=m | 
 |  |  | +CONFIG_CRYPTO_STREEBOG=m | 
 |  |  | +CONFIG_CRYPTO_VMAC=m | 
 |  |  | +CONFIG_CRYPTO_WP512=m | 
 |  |  | +CONFIG_CRYPTO_XCBC=m | 
 |  |  | +CONFIG_CRYPTO_XXHASH=m | 
 |  |  | +CONFIG_CRYPTO_ANSI_CPRNG=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_HASH=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_SKCIPHER=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_RNG=m | 
 |  |  | +CONFIG_CRYPTO_USER_API_AEAD=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM=m | 
 |  |  | +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m | 
 |  |  | +CONFIG_CRYPTO_DEV_SAHARA=y | 
 |  |  | +CONFIG_CRYPTO_DEV_MXS_DCP=y | 
 |  |  | +CONFIG_CRC_T10DIF=y | 
 |  |  | +CONFIG_CRC7=m | 
 |  |  | +CONFIG_LIBCRC32C=m | 
 |  |  | +CONFIG_DMA_CMA=y | 
 |  |  | +CONFIG_FONTS=y | 
 |  |  | +CONFIG_FONT_8x8=y | 
 |  |  | +CONFIG_FONT_8x16=y | 
 |  |  | +CONFIG_PRINTK_TIME=y | 
 |  |  | +# CONFIG_DEBUG_BUGVERBOSE is not set | 
 |  |  | +CONFIG_MAGIC_SYSRQ=y | 
 |  |  | +CONFIG_DEBUG_FS=y | 
 |  |  | +# CONFIG_SLUB_DEBUG is not set | 
 |  |  | +# CONFIG_SCHED_DEBUG is not set | 
 |  |  | +# CONFIG_DEBUG_PREEMPT is not set | 
 |  |  | +# CONFIG_FTRACE is not set | 
 |  |  | + | 
 |  |  | +#enable trust based hardware key | 
 |  |  | +CONFIG_TRUSTED_KEYS=m | 
 |  |  | +CONFIG_TRUSTED_KEYS_TPM=n | 
 |  |  | +CONFIG_TRUSTED_KEYS_TEE=n | 
 |  |  | +CONFIG_TRUSTED_KEYS_CAAM=n | 
 |  |  | +CONFIG_TRUSTED_KEYS_DCP=y | 
 |  |  | +CONFIG_CRYPTO_SM3_GENERIC=m | 
 |  |  | +CONFIG_CRYPTO_SM4_GENERIC=m | 
 |  |  | +CONFIG_CRYPTO_ARIA=m | 
 |  |  | +CONFIG_CRYPTO_POLYVAL_ARM64_CE=m | 
 |  |  | diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c | 
 |  |  | index 23f7604d9..110e34203 100644 | 
 |  |  | --- a/drivers/net/ethernet/freescale/fec_main.c | 
 |  |  | +++ b/drivers/net/ethernet/freescale/fec_main.c | 
 |  |  | @@ -4270,6 +4270,14 @@ fec_probe(struct platform_device *pdev) | 
 |  |  |      int irq_cnt; | 
 |  |  |      struct fec_devinfo *dev_info; | 
 |  |  |   | 
 |  |  | +    void __iomem *IMX6U_ENET1_TX_CLK; | 
 |  |  | +    void __iomem *IMX6U_ENET2_TX_CLK; | 
 |  |  | + | 
 |  |  | +    IMX6U_ENET1_TX_CLK = ioremap(0X020E00DC, 4); | 
 |  |  | +    writel(0X14, IMX6U_ENET1_TX_CLK); | 
 |  |  | +    IMX6U_ENET2_TX_CLK = ioremap(0X020E00FC, 4); | 
 |  |  | +    writel(0X14, IMX6U_ENET2_TX_CLK); | 
 |  |  | + | 
 |  |  |      fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs); | 
 |  |  |   | 
 |  |  |      /* Init network device */ | 
 |  |  | diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c | 
 |  |  | index df2c5435c..0e5a51ba6 100644 | 
 |  |  | --- a/drivers/net/phy/smsc.c | 
 |  |  | +++ b/drivers/net/phy/smsc.c | 
 |  |  | @@ -130,6 +130,8 @@ static int smsc_phy_reset(struct phy_device *phydev) | 
 |  |  |          phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc); | 
 |  |  |      } | 
 |  |  |   | 
 |  |  | +    phy_write(phydev, MII_BMCR, BMCR_RESET); | 
 |  |  | + | 
 |  |  |      /* reset the phy */ | 
 |  |  |      return genphy_soft_reset(phydev); | 
 |  |  |  } |