|  |  | 
 |  |  | +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb | 
 |  |  | diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts | 
 |  |  | new file mode 100644 | 
 |  |  | index 000000000..cddc94704 | 
 |  |  | index 000000000..5b20a7cdc | 
 |  |  | --- /dev/null | 
 |  |  | +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts | 
 |  |  | @@ -0,0 +1,475 @@ | 
 |  |  | @@ -0,0 +1,471 @@ | 
 |  |  | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | 
 |  |  | +/* | 
 |  |  | +/*  | 
 |  |  | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp | 
 |  |  | + * Copyright 2023 LingYun IoT System Studio. | 
 |  |  | + */ | 
 |  |  | + | 
 |  |  | 
 |  |  | +    model = "LingYun IoT Gateway Kits Board based on i.MX8MP"; | 
 |  |  | +    compatible = "lingyun,igkboard-imx8mp", "fsl,imx8mp"; | 
 |  |  | + | 
 |  |  | +    /* console and bootargs */ | 
 |  |  | +    /* console */ | 
 |  |  | +    chosen { | 
 |  |  | +        bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200"; | 
 |  |  | +        stdout-path = &uart2; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    /* MT53D512M32D2DS-053 WT:D, 2GB LPDDR4 */ | 
 |  |  | +    memory@80000000 { | 
 |  |  | +        device_type = "memory"; | 
 |  |  | +        reg = <0x0 0x80000000 0 0x80000000>; | 
 |  |  | +        reg = <0x0 0x80000000 0 0x40000000>; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | +    leds { | 
 |  |  | 
 |  |  | +        sysled { | 
 |  |  | +            label = "sysled"; | 
 |  |  | +            gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; | 
 |  |  | +            default-state = "on"; | 
 |  |  | +            default-state = "heartbeat"; | 
 |  |  | +        }; | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | 
 |  |  | +  |     TF Card on SD2     | | 
 |  |  | +  +------------------------+*/ | 
 |  |  | + | 
 |  |  | +#if 0 | 
 |  |  | +&usdhc2 { | 
 |  |  | +    pinctrl-names = "default", "state_100mhz", "state_200mhz"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; | 
 |  |  | 
 |  |  | +    no-1-8-v; | 
 |  |  | +    status = "okay"; | 
 |  |  | +}; | 
 |  |  | +#endif | 
 |  |  | + | 
 |  |  | +/*+------------------------+ | 
 |  |  | +  | Typec USB for download | | 
 |  |  | 
 |  |  | +    pinctrl-0 = <&pinctrl_eqos>; | 
 |  |  | +    phy-mode = "rgmii-id"; | 
 |  |  | +    phy-handle = <ðphy0>; | 
 |  |  | +    snps,reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; | 
 |  |  | +    snps,reset-delays-us = <100000 200000 150000>; | 
 |  |  | +    status = "okay"; | 
 |  |  | + | 
 |  |  | +    mdio { | 
 |  |  | +        compatible = "snps,dwmac-mdio"; | 
 |  |  | +        #address-cells = <1>; | 
 |  |  | +        #size-cells = <0>; | 
 |  |  | +        clock-frequency = <5000000>; | 
 |  |  | + | 
 |  |  | +        ethphy0: ethernet-phy@0 { /* YT8521SH-CA */ | 
 |  |  | +            compatible = "ethernet-phy-ieee802.3-c22"; | 
 |  |  | 
 |  |  | +    }; | 
 |  |  | +}; | 
 |  |  | + | 
 |  |  | +/* Second 1000Mbps Ethernet on ENET1 */ | 
 |  |  | +/* Second 1000Mbps Ethernet on ENET1, test okay */ | 
 |  |  | +&fec { | 
 |  |  | +    pinctrl-names = "default"; | 
 |  |  | +    pinctrl-0 = <&pinctrl_fec>; | 
 |  |  | +    phy-mode = "rgmii-id"; | 
 |  |  | +    phy-handle = <ðphy1>; | 
 |  |  | +    phy-reset-duration = <200>; | 
 |  |  | +    phy-reset-post-delay = <150>; | 
 |  |  | +    phy-reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; | 
 |  |  | + | 
 |  |  | +    fsl,magic-packet; | 
 |  |  | +    status = "okay"; | 
 |  |  | + | 
 |  |  | +    mdio { | 
 |  |  | +        #address-cells = <1>; | 
 |  |  | +        #size-cells = <0>; | 
 |  |  | +        clock-frequency = <5000000>; | 
 |  |  | + | 
 |  |  | +        ethphy1: ethernet-phy@0 { /* YT8521SH-CA */ | 
 |  |  | +            compatible = "ethernet-phy-ieee802.3-c22"; | 
 |  |  | 
 |  |  | +            MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3                   0x16 | 
 |  |  | +            MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL             0x16 | 
 |  |  | +            MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK   0x16 | 
 |  |  | +            MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06                         0x22 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | + | 
 |  |  | 
 |  |  | +            MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3                     0x16 | 
 |  |  | +            MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL                  0x16 | 
 |  |  | +            MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC                     0x16 | 
 |  |  | +            MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01                         0x11 | 
 |  |  | +        >; | 
 |  |  | +    }; | 
 |  |  | +}; |