add uboot-imx-lf-6.1.36-2.1.0.patch and remove unused old uboot patch

guowenxue

2023-11-06 3576f15a719ed3b15d78149287afaa7ab4c806b5

add uboot-imx-lf-6.1.36-2.1.0.patch and remove unused old uboot patch

Signed-off-by: guowenxue <guowenxue@gmail.com>

 bootloader/patches/igkboard-6ull/uboot-imx-lf-5.10.52-2.1.0.patch

File was deleted

 bootloader/patches/igkboard-6ull/uboot-imx-lf-6.1.36-2.1.0.patch

File was renamed from bootloader/patches/igkboard-6ull/uboot-imx-lf-5.15.32-2.0.0.patch
@@ -1,80 +1,95 @@
diff -Nuar -x lingyun.bmp uboot-imx/arch/arm/dts/igkboard.dts uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/igkboard.dts
--- uboot-imx/arch/arm/dts/igkboard.dts    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/igkboard.dts    2022-09-04 15:05:50.936174546 +0800
@@ -0,0 +1,19 @@
diff -Nuar -x tools uboot-imx/arch/arm/dts/igkboard-6ull.dts uboot-imx-lf-6.1.36-2.1.0/arch/arm/dts/igkboard-6ull.dts
--- uboot-imx/arch/arm/dts/igkboard-6ull.dts    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/arch/arm/dts/igkboard-6ull.dts    2023-11-06 15:07:25.621385161 +0800
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Copyright (C) 2016 Freescale Semiconductor, Inc.
+// Copyright (C) 2023 LingYun IoT System Studio
+
+/dts-v1/;
+
+#include "imx6ull.dtsi"
+#include "imx6ul-14x14-evk.dtsi"
+#include "imx6ul-14x14-evk-u-boot.dtsi"
+
+/ {
+    model = "LingYun IoT Gateway Board";
+    compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
+    model = "LingYun IoT Gateway Kits Board";
+    compatible = "lingyun,igkboard-6ull", "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
+
+    chosen {
+        stdout-path = &uart1;
+    };
+
+    memory@80000000 {
+        device_type = "memory";
+        reg = <0x80000000 0x20000000>;
+    };
+
+    reg_sd1_vmmc: regulator-sd1-vmmc {
+        compatible = "regulator-fixed";
+        regulator-name = "VSD_3V3";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+        off-on-delay-us = <20000>;
+        enable-active-high;
+    };
+};
+
+&clks {
+    assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>;
+    assigned-clock-rates = <320000000>;
+};
diff -Nuar -x lingyun.bmp uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/imx6ul-14x14-evk.dtsi
--- uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi    2022-07-21 17:57:07.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/imx6ul-14x14-evk.dtsi    2022-09-04 15:05:50.936174546 +0800
@@ -83,6 +83,9 @@
     pinctrl-0 = <&pinctrl_enet1>;
     phy-mode = "rmii";
     phy-handle = <&ethphy0>;
+&fec1 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_enet1>;
+    phy-mode = "rmii";
+    phy-handle = <&ethphy0>;
+    phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
+    phy-reset-duration = <50>;
+    phy-reset-post-delay = <15>;
     status = "okay";
 };

@@ -91,14 +94,17 @@
     pinctrl-0 = <&pinctrl_enet2>;
     phy-mode = "rmii";
     phy-handle = <&ethphy1>;
+    status = "okay";
+};
+
+&fec2 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_enet2>;
+    phy-mode = "rmii";
+    phy-handle = <&ethphy1>;
+    phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
+    phy-reset-duration = <50>;
+    phy-reset-post-delay = <15>;
     status = "okay";

     mdio {
         #address-cells = <1>;
         #size-cells = <0>;

-        ethphy0: ethernet-phy@2 {
-            reg = <2>;
+    status = "okay";
+
+    mdio {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethphy0: ethernet-phy@0 {
+            reg = <0>;
             micrel,led-mode = <1>;
             clocks = <&clks IMX6UL_CLK_ENET_REF>;
             clock-names = "rmii-ref";
@@ -151,21 +157,21 @@
     status = "okay";

     display0: display@0 {
-        bits-per-pixel = <24>;
-        bus-width = <24>;
+            micrel,led-mode = <1>;
+            clocks = <&clks IMX6UL_CLK_ENET_REF>;
+            clock-names = "rmii-ref";
+        };
+
+        ethphy1: ethernet-phy@1 {
+            reg = <1>;
+            micrel,led-mode = <1>;
+            clocks = <&clks IMX6UL_CLK_ENET2_REF>;
+            clock-names = "rmii-ref";
+        };
+    };
+};
+
+&lcdif {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_lcdif_dat
+             &pinctrl_lcdif_ctrl>;
+
+    display = <&display0>;
+    status = "okay";
+
+    display0: display@0 {
+        bits-per-pixel = <16>;
+        bus-width = <16>;

         display-timings {
             native-mode = <&timing0>;
             timing0: timing0 {
-            clock-frequency = <9200000>;
-            hactive = <480>;
-            vactive = <272>;
-            hfront-porch = <8>;
-            hback-porch = <4>;
-            hsync-len = <41>;
-            vback-porch = <2>;
-            vfront-porch = <4>;
-            vsync-len = <10>;
+
+        display-timings {
+            native-mode = <&timing0>;
+            timing0: timing0 {
+            clock-frequency = <30000000>;
+            hactive = <800>;
+            vactive = <480>;
@@ -84,13 +99,77 @@
+            vback-porch = <32>;
+            vfront-porch = <13>;
+            vsync-len = <3>;

             hsync-active = <0>;
             vsync-active = <0>;
@@ -284,6 +290,40 @@

 &iomuxc {
     pinctrl-names = "default";
+
+            hsync-active = <0>;
+            vsync-active = <0>;
+            de-active = <1>;
+            pixelclk-active = <0>;
+            };
+        };
+    };
+};
+
+&snvs_poweroff {
+    status = "okay";
+};
+
+&uart1 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_uart1>;
+    status = "okay";
+};
+
+&usbotg1 {
+    dr_mode = "otg";
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_usb_otg1>;
+    status = "okay";
+};
+
+&usbotg2 {
+    dr_mode = "host";
+    disable-over-current;
+    status = "okay";
+};
+
+&usbphy1 {
+    fsl,tx-d-cal = <106>;
+};
+
+&usbphy2 {
+    fsl,tx-d-cal = <106>;
+};
+
+&usdhc1 {
+    pinctrl-names = "default", "state_100mhz", "state_200mhz";
+    pinctrl-0 = <&pinctrl_usdhc1>;
+    pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+    pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+    cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+    keep-power-in-suspend;
+    wakeup-source;
+    vmmc-supply = <&reg_sd1_vmmc>;
+    status = "okay";
+};
+
+&usdhc2 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_usdhc2>;
+    no-1-8-v;
+    broken-cd;
+    keep-power-in-suspend;
+    wakeup-source;
+    status = "okay";
+};
+
+&wdog1 {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_wdog>;
+    fsl,ext-reset-output;
+};
+
+&iomuxc {
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_extgpio>;
+
+    pinctrl_extgpio: extgpiogrp {
@@ -125,75 +204,201 @@
+            MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09    0x17059 /* 40# GPIO */
+        >;
+    };

     pinctrl_csi1: csi1grp {
         fsl,pins = <
@@ -312,6 +352,7 @@
             MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00    0x1b0b0
             MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01    0x1b0b0
             MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1    0x4001b031
+
+    pinctrl_enet1: enet1grp {
+        fsl,pins = <
+            MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN    0x1b0b0
+            MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER    0x1b0b0
+            MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00    0x1b0b0
+            MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01    0x1b0b0
+            MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN    0x1b0b0
+            MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00    0x1b0b0
+            MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01    0x1b0b0
+            MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1    0x4001b031
+            MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0 /* ENET1 RESET */
         >;
     };

@@ -327,6 +368,7 @@
             MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00    0x1b0b0
             MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01    0x1b0b0
             MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2    0x4001b031
+        >;
+    };
+
+    pinctrl_enet2: enet2grp {
+        fsl,pins = <
+            MX6UL_PAD_GPIO1_IO07__ENET2_MDC        0x1b0b0
+            MX6UL_PAD_GPIO1_IO06__ENET2_MDIO    0x1b0b0
+            MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN    0x1b0b0
+            MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER    0x1b0b0
+            MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00    0x1b0b0
+            MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01    0x1b0b0
+            MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN    0x1b0b0
+            MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00    0x1b0b0
+            MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01    0x1b0b0
+            MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2    0x4001b031
+            MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04    0x10B0 /* ENET2 RESET */
         >;
     };

@@ -384,13 +426,6 @@
             MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
             MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
             MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
-            MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
-            MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
-            MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
-            MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
-            MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
-            MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
-            MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
         >;
     };

@@ -423,7 +458,6 @@
             MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA    0x11088
             MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA    0x11088
             MX6UL_PAD_JTAG_TMS__SAI2_MCLK        0x17088
-            MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04    0x17059
         >;
     };

@@ -448,7 +482,6 @@
         fsl,pins = <
             MX6UL_PAD_BOOT_MODE0__GPIO5_IO10    0x70a1
             MX6UL_PAD_BOOT_MODE1__GPIO5_IO11    0x70a1
-            MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07    0x70a1
             MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08    0x80000000
         >;
     };
diff -Nuar -x lingyun.bmp uboot-imx/arch/arm/dts/Makefile uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/Makefile
--- uboot-imx/arch/arm/dts/Makefile    2022-07-21 17:57:07.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/arch/arm/dts/Makefile    2022-09-04 15:05:50.936174546 +0800
@@ -871,6 +871,7 @@
     imx6ull-kontron-n641x-s.dtb

+        >;
+    };
+
+    pinctrl_lcdif_dat: lcdifdatgrp {
+        fsl,pins = <
+            MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
+            MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
+            MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
+            MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
+            MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
+            MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
+            MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
+            MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
+            MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
+            MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
+            MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
+            MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
+            MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
+            MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
+            MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
+            MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
+        >;
+    };
+
+    pinctrl_lcdif_ctrl: lcdifctrlgrp {
+        fsl,pins = <
+            MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
+            MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
+            MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
+            MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
+            /* used for lcd reset */
+            MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
+        >;
+    };
+
+    pinctrl_uart1: uart1grp {
+        fsl,pins = <
+            MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+            MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+        >;
+    };
+
+    pinctrl_usb_otg1: usbotg1grp {
+        fsl,pins = <
+            MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059
+        >;
+    };
+
+    pinctrl_usdhc1: usdhc1grp {
+        fsl,pins = <
+            MX6UL_PAD_SD1_CMD__USDHC1_CMD         0x17059
+            MX6UL_PAD_SD1_CLK__USDHC1_CLK        0x10071
+            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0     0x17059
+            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1     0x17059
+            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2     0x17059
+            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3     0x17059
+            MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
+            MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
+            MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
+        >;
+    };
+
+    pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+        fsl,pins = <
+            MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
+            MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
+            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+
+        >;
+    };
+
+    pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+        fsl,pins = <
+            MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
+            MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
+            MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+            MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+            MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+            MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+        >;
+    };
+
+    pinctrl_usdhc2: usdhc2grp {
+        fsl,pins = <
+            MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x17059
+            MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+        >;
+    };
+
+    pinctrl_usdhc2_8bit: usdhc2grp_8bit {
+        fsl,pins = <
+            MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
+            MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+        >;
+    };
+
+    pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
+        fsl,pins = <
+            MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
+            MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
+            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
+            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
+            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
+            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
+        >;
+    };
+
+    pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
+        fsl,pins = <
+            MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
+            MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
+            MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+            MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+            MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+            MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+            MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
+            MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
+            MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
+            MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
+        >;
+    };
+
+    pinctrl_wdog: wdoggrp {
+        fsl,pins = <
+            MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+        >;
+    };
+};
diff -Nuar -x tools uboot-imx/arch/arm/dts/Makefile uboot-imx-lf-6.1.36-2.1.0/arch/arm/dts/Makefile
--- uboot-imx/arch/arm/dts/Makefile    2023-11-02 17:05:10.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/arch/arm/dts/Makefile    2023-11-06 15:07:25.621385161 +0800
@@ -936,6 +936,7 @@
     imx6ull-kontron-bl.dtb
 
 dtb-$(CONFIG_MX6ULL) += \
+    igkboard.dtb \
+    igkboard-6ull.dtb \
     imx6ull-14x14-ddr3-val.dtb \
     imx6ull-14x14-ddr3-val-epdc.dtb \
     imx6ull-14x14-ddr3-val-emmc.dtb \
diff -Nuar -x lingyun.bmp uboot-imx/arch/arm/mach-imx/mx6/Kconfig uboot-imx-lf-5.15.32-2.0.0/arch/arm/mach-imx/mx6/Kconfig
--- uboot-imx/arch/arm/mach-imx/mx6/Kconfig    2022-07-21 17:57:07.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/arch/arm/mach-imx/mx6/Kconfig    2022-09-04 15:05:50.936174546 +0800
diff -Nuar -x tools uboot-imx/arch/arm/mach-imx/mx6/Kconfig uboot-imx-lf-6.1.36-2.1.0/arch/arm/mach-imx/mx6/Kconfig
--- uboot-imx/arch/arm/mach-imx/mx6/Kconfig    2023-11-02 17:05:10.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/arch/arm/mach-imx/mx6/Kconfig    2023-11-06 15:07:25.621385161 +0800
@@ -157,6 +157,16 @@
     prompt "MX6 board select"
     optional

+config TARGET_LINGYUN_IGKBOARD
+    bool "LingYun IoT Gateway Kits Board(IGKBoard)"
 
+config TARGET_LINGYUN_IGKBOARD_6ULL
+    bool "LingYun i.MX6ULL IoT Gateway Kits Board(IGKBoard-6ULL)"
+    depends on MX6ULL
+    select BOARD_LATE_INIT
+    select DM
@@ -205,17 +410,17 @@
 config TARGET_APALIS_IMX6
     bool "Toradex Apalis iMX6 board"
     depends on MX6Q
@@ -888,5 +898,6 @@
 source "board/warp/Kconfig"
@@ -901,5 +911,6 @@
 source "board/wandboard/Kconfig"
 source "board/BuR/brppt2/Kconfig"
 source "board/out4/o4-imx6ull-nano/Kconfig"
+source "board/lingyun/igkboard/Kconfig"

+source "board/lingyun/igkboard-6ull/Kconfig"
 
 endif
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/igkboard.c uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/igkboard.c
--- uboot-imx/board/lingyun/igkboard/igkboard.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/igkboard.c    2022-09-04 15:05:50.936174546 +0800
@@ -0,0 +1,369 @@
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/igkboard-6ull.c uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/igkboard-6ull.c
--- uboot-imx/board/lingyun/igkboard-6ull/igkboard-6ull.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/igkboard-6ull.c    2023-11-06 15:07:25.621385161 +0800
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
@@ -549,20 +754,6 @@
+    env_set("tee", "yes");
+#endif
+
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+    env_set("board_name", "EVK");
+
+    if (is_mx6ull_9x9_evk())
+        env_set("board_rev", "9X9");
+    else
+        env_set("board_rev", "14X14");
+
+    if (is_cpu_type(MXC_CPU_MX6ULZ)) {
+        env_set("board_name", "ULZ-EVK");
+        env_set("usb_net_cmd", "usb start");
+    }
+#endif
+
+    setup_lcd();
+
+#ifdef CONFIG_ENV_IS_IN_MMC
@@ -581,13 +772,20 @@
+    else if (is_cpu_type(MXC_CPU_MX6ULZ))
+        puts("Board: MX6ULZ 14x14 EVK\n");
+    else
+        puts("Board: IGKBoard\n");
+        puts("Board: IGKBoard-6ULL\n\n");
+
+    return 0;
+}
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/imximage.cfg uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/imximage.cfg
--- uboot-imx/board/lingyun/igkboard/imximage.cfg    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/imximage.cfg    2022-09-04 15:05:50.936174546 +0800
+
+void board_quiesce_devices(void)
+{
+#if defined(CONFIG_VIDEO_MXS)
+    enable_lcdif_clock(LCDIF1_BASE_ADDR, 0);
+#endif
+}
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/imximage.cfg uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/imximage.cfg
--- uboot-imx/board/lingyun/igkboard-6ull/imximage.cfg    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/imximage.cfg    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,120 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
@@ -621,7 +819,7 @@
+
+#ifdef CONFIG_USE_IMXIMG_PLUGIN
+/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
+PLUGIN    board/lingyun/igkboard/plugin.bin 0x00907000
+PLUGIN    board/freescale/mx6ullevk/plugin.bin 0x00907000
+#else
+
+#ifdef CONFIG_IMX_HAB
@@ -709,9 +907,9 @@
+DATA 4 0x021B001C 0x00000000
+
+#endif
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/imximage_lpddr2.cfg uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/imximage_lpddr2.cfg
--- uboot-imx/board/lingyun/igkboard/imximage_lpddr2.cfg    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/imximage_lpddr2.cfg    2022-09-04 15:05:50.936174546 +0800
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg
--- uboot-imx/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
@@ -746,7 +944,7 @@
+
+#ifdef CONFIG_USE_IMXIMG_PLUGIN
+/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
+PLUGIN    board/freescale/mx6ullevk/plugin.bin 0x00907000
+PLUGIN    board/lingyun/igkboard-6ull/plugin.bin 0x00907000
+#else
+
+#ifdef CONFIG_IMX_HAB
@@ -838,47 +1036,47 @@
+DATA 4 0x021B0404 0x00011006
+DATA 4 0x021B001C 0x00000000
+#endif
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/Kconfig uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/Kconfig
--- uboot-imx/board/lingyun/igkboard/Kconfig    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/Kconfig    2022-09-04 15:05:50.936174546 +0800
@@ -0,0 +1,15 @@
+if TARGET_LINGYUN_IGKBOARD
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/Kconfig uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/Kconfig
--- uboot-imx/board/lingyun/igkboard-6ull/Kconfig    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/Kconfig    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,14 @@
+if TARGET_LINGYUN_IGKBOARD_6ULL
+
+config SYS_BOARD
+    default "igkboard"
+    default "igkboard-6ull"
+
+config SYS_VENDOR
+    default "lingyun"
+
+config SYS_CONFIG_NAME
+    default "igkboard"
+    default "igkboard-6ull"
+
+config SYS_TEXT_BASE
+config TEXT_BASE
+    default 0x87800000
+	
+endif
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/MAINTAINERS uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/MAINTAINERS
--- uboot-imx/board/lingyun/igkboard/MAINTAINERS    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/MAINTAINERS    2022-09-04 15:05:50.936174546 +0800
@@ -0,0 +1,6 @@
+LingYun IoT Gateway Board(IGKBoard)
+M:    Wei Huihong <weihuihui586@gmail.com>
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/MAINTAINERS uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/MAINTAINERS
--- uboot-imx/board/lingyun/igkboard-6ull/MAINTAINERS    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/MAINTAINERS    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,7 @@
+LingYun i.MX6ULL IoT Gateway Board(IGKBoard-6ULL)
+M:    Guo Wenxue <guowenxue@gmail.com>
+S:    Maintained
+F:    board/lingyun/igkboard/
+F:    include/configs/igkboard.h
+F:    configs/igkboard_defconfig
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/Makefile uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/Makefile
--- uboot-imx/board/lingyun/igkboard/Makefile    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/Makefile    2022-09-04 15:05:50.936174546 +0800
+F:    board/lingyun/igkboard-6ull/
+F:    include/configs/igkboard-6ull.h
+F:    configs/igkboard-6ull_defconfig
+
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/Makefile uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/Makefile
--- uboot-imx/board/lingyun/igkboard-6ull/Makefile    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/Makefile    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# (C) Copyright 2016 Freescale Semiconductor, Inc.
+
+obj-y  := igkboard.o
+obj-y  := igkboard-6ull.o
+obj-y  += ../../freescale/common/mmc.o
diff -Nuar -x lingyun.bmp uboot-imx/board/lingyun/igkboard/plugin.S uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/plugin.S
--- uboot-imx/board/lingyun/igkboard/plugin.S    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/board/lingyun/igkboard/plugin.S    2022-09-04 15:05:50.940174512 +0800
diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/plugin.S uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/plugin.S
--- uboot-imx/board/lingyun/igkboard-6ull/plugin.S    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/board/lingyun/igkboard-6ull/plugin.S    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,263 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
@@ -1143,29 +1341,32 @@
+
+/* include the common plugin code here */
+#include <asm/arch/mx6_plugin.S>
diff -Nuar -x lingyun.bmp uboot-imx/configs/igkboard_defconfig uboot-imx-lf-5.15.32-2.0.0/configs/igkboard_defconfig
--- uboot-imx/configs/igkboard_defconfig    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/configs/igkboard_defconfig    2022-09-04 16:22:41.743712801 +0800
@@ -0,0 +1,89 @@
diff -Nuar -x tools uboot-imx/configs/igkboard-6ull_defconfig uboot-imx-lf-6.1.36-2.1.0/configs/igkboard-6ull_defconfig
--- uboot-imx/configs/igkboard-6ull_defconfig    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/configs/igkboard-6ull_defconfig    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,86 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xE0000
+CONFIG_IMX_CONFIG="board/lingyun/igkboard/imximage.cfg"
+CONFIG_IMX_CONFIG="board/lingyun/igkboard-6ull/imximage.cfg"
+CONFIG_MX6ULL=y
+CONFIG_TARGET_LINGYUN_IGKBOARD=y
+CONFIG_TARGET_LINGYUN_IGKBOARD_6ULL=y
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="igkboard"
+CONFIG_DEFAULT_DEVICE_TREE="igkboard-6ull"
+CONFIG_SYS_PROMPT="[u-boot@igkboard]# "
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="[u-boot@igkboard]# "
+CONFIG_CMD_BOOTZ=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
@@ -1174,8 +1375,8 @@
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
@@ -1186,9 +1387,9 @@
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_FSL_DCP_RNG=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x83800000
+CONFIG_FASTBOOT_BUF_SIZE=0x40000000
@@ -1204,7 +1405,6 @@
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ8XXX=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
@@ -1213,6 +1413,8 @@
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RNG=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
@@ -1228,21 +1430,15 @@
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MXS=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_BMP_16BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff -Nuar -x lingyun.bmp uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c uboot-imx-lf-5.15.32-2.0.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c
--- uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c    2022-07-21 17:57:08.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c    2022-09-04 15:05:50.940174512 +0800
@@ -188,6 +188,11 @@
diff -Nuar -x tools uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c uboot-imx-lf-6.1.36-2.1.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c
--- uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c    2023-11-02 17:05:11.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c    2023-11-06 15:07:25.625384765 +0800
@@ -188,6 +188,12 @@
             user_partition = FASTBOOT_MMC_USER_PARTITION_ID;
             boot_loader_psize = mmc->capacity_boot;
         }
+
+        /* add by guowenxue to export mmc_no env */
+        env_set_ulong("mmc_no", mmc_no);
+        env_set_ulong("mmcdev", mmc_no);
@@ -1251,32 +1447,30 @@
     } else {
         printf("Can't setup partition table on this device %d\n",
             fastboot_devinfo.type);
diff -Nuar -x lingyun.bmp uboot-imx/drivers/net/phy/phy.c uboot-imx-lf-5.15.32-2.0.0/drivers/net/phy/phy.c
--- uboot-imx/drivers/net/phy/phy.c    2022-07-21 17:57:08.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/drivers/net/phy/phy.c    2022-09-04 15:05:50.940174512 +0800
diff -Nuar -x tools uboot-imx/drivers/net/phy/phy.c uboot-imx-lf-6.1.36-2.1.0/drivers/net/phy/phy.c
--- uboot-imx/drivers/net/phy/phy.c    2023-11-02 17:05:11.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/drivers/net/phy/phy.c    2023-11-06 15:07:25.625384765 +0800
@@ -182,6 +182,8 @@
 {
     int result;

+    phy_reset(phydev);
 
+    phy_reset(phydev); /* Add by guowenxue to reset the ethernet phy */
+
     if (phydev->autoneg != AUTONEG_ENABLE)
         return genphy_setup_forced(phydev);

diff -Nuar -x lingyun.bmp uboot-imx/include/configs/igkboard.h uboot-imx-lf-5.15.32-2.0.0/include/configs/igkboard.h
--- uboot-imx/include/configs/igkboard.h    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/include/configs/igkboard.h    2022-09-04 15:05:50.940174512 +0800
@@ -0,0 +1,172 @@
 
diff -Nuar -x tools uboot-imx/include/configs/igkboard-6ull.h uboot-imx-lf-6.1.36-2.1.0/include/configs/igkboard-6ull.h
--- uboot-imx/include/configs/igkboard-6ull.h    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/include/configs/igkboard-6ull.h    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,111 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ * Copyright (C) 2023 LingYun IoT System Studio
+ *
+ * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
+ * Configuration settings for LingYun IGKBoard(IoT Gateway Kits Board) based on i.MX6ULL
+ */
+#ifndef __IGKBOARD_CONFIG_H
+#define __IGKBOARD_CONFIG_H
+
+#ifndef __IGKBOARD_6ULL_CONFIG_H
+#define __IGKBOARD_6ULL_CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <linux/sizes.h>
@@ -1284,6 +1478,7 @@
+#include "mx6_common.h"
+#include <asm/mach-imx/gpio.h>
+#include "imx_env.h"
+#include "igkboard-dtoverlay.h"
+
+#define is_mx6ull_9x9_evk()    CONFIG_IS_ENABLED(TARGET_MX6ULL_9X9_EVK)
+
@@ -1297,11 +1492,11 @@
+#undef CONFIG_LDO_BYPASS_CHECK
+#endif
+
+#define CONFIG_MXC_UART_BASE        UART1_BASE
+#define CFG_MXC_UART_BASE            UART1_BASE
+
+/* MMC Configs */
+#ifdef CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR    USDHC2_BASE_ADDR
+#define CFG_SYS_FSL_ESDHC_ADDR        USDHC2_BASE_ADDR
+
+/* NAND pin conflicts with usdhc2 */
+#ifdef CONFIG_NAND_MXS
@@ -1319,12 +1514,8 @@
+#define MFG_NAND_PARTITION ""
+#endif
+
+#define CONFIG_CMD_READ
+#define CONFIG_SERIAL_TAG
+#define CONFIG_FASTBOOT_USB_DEV 0
+
+#define CONFIG_MFG_ENV_SETTINGS \
+    CONFIG_MFG_ENV_SETTINGS_DEFAULT \
+#define CFG_MFG_ENV_SETTINGS \
+    CFG_MFG_ENV_SETTINGS_DEFAULT \
+    "initrd_addr=0x86800000\0" \
+    "initrd_high=0xffffffff\0" \
+    "emmc_dev=1\0"\
@@ -1333,63 +1524,36 @@
+    "mtdparts=" MFG_NAND_PARTITION \
+    "\0"\
+
+#if defined(CONFIG_NAND_BOOT)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+    CONFIG_MFG_ENV_SETTINGS \
+    TEE_ENV \
+    "splashimage=0x8c000000\0" \
+    "fdt_addr=0x83000000\0" \
+    "fdt_high=0xffffffff\0"      \
+    "tee_addr=0x84000000\0" \
+#define CFG_EXTRA_ENV_SETTINGS \
+    "console=ttymxc0\0" \
+    "bootargs=console=ttymxc0,115200 ubi.mtd=nandrootfs "  \
+        "root=ubi0:rootfs rootfstype=ubifs "             \
+        BOOTARGS_CMA_SIZE \
+        MFG_NAND_PARTITION \
+        "\0" \
+    "bootcmd=nand read ${loadaddr} 0x4000000 0xc00000;"\
+        "nand read ${fdt_addr} 0x5000000 0x100000;"\
+        "if test ${tee} = yes; then " \
+            "nand read ${tee_addr} 0x6000000 0x400000;"\
+            "bootm ${tee_addr} - ${fdt_addr};" \
+        "else " \
+            "bootz ${loadaddr} - ${fdt_addr};" \
+        "fi\0"
+
+#else
+#include "igkboard_overlay.h"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+    "env_conf=config.txt\0" \
+    "upmode=fastboot 0\0" \
+    "envconf=config.txt\0" \
+    "image=zImage\0" \
+    "console=ttymxc0\0" \
+    "fdt_file=igkboard.dtb\0" \
+    "board=igkboard-6ull\0" \
+    "fdt_file=igkboard-6ull.dtb\0" \
+    "fdt_size=0x10000\0" \
+    "fdt_addr=0x83000000\0" \
+    "dtbo_addr=0x83010000\0" \
+    "dtbo_dir=overlays\0" \
+    "splashimage=0x8c000000\0" \
+    "ipaddr=192.168.2.22\0" \
+    "serverip=192.168.2.2\0" \
+    "mmcpart=1\0" \
+    "mmcargs=setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmc_no}p2 rootwait rw net.ifnames=0\0" \
+    "loadenvconf=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${env_conf};env import -t ${loadaddr} ${filesize}\0" \
+    "loadenvconf=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${envconf};env import -t ${loadaddr} ${filesize}\0" \
+    "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+    "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+    "bootos=bootz ${loadaddr} - ${fdt_addr}\0" \
+    "mmcboot=mmc dev ${mmcdev};run mmcargs;run loadimage;run loadfdt;run bootos\0" \
+    "netboot=tftp $loadaddr $image; tftp $fdt_addr ${fdt_file}; run mmcargs; run bootos\0" \
+    "bbl=tftp ${loadaddr} u-boot-${board}.imx && mmc dev ${mmcdev} 1 && mmc write ${loadaddr} 2 0x800\0" \
+    "bdtb=tftp $fdt_addr $fdt_file && fatwrite mmc 1:1 $fdt_addr $fdt_file $filesize\0" \
+    "bker=tftp $loadaddr $image&& fatwrite mmc 1:1 $loadaddr $image $filesize\0" \
+    "bsys=run bdtb && run bker\0" \
+    "mmcboot=echo Booting from mmc ...; " \
+        "mmc dev ${mmcdev}; " \
+        "run mmcargs; run loadenvconf;" \
+        "run loadimage; run loadfdt; " \
+        "bootz ${loadaddr} - ${fdt_addr}\0" \
+    "netboot=echo Booting from net ...; " \
+        "tftp $loadaddr $image; tftp $fdt_addr ${fdt_file};" \
+        "run mmcargs; " \
+        "bootz ${loadaddr} - ${fdt_addr}\0" \
+    "upmode=fastboot 0\0" \
+    "bbl=tftp ${loadaddr} u-boot-igkboard.imx && mmc dev ${mmcdev} 1 && mmc write ${loadaddr} 2 0x500\0" \
+    MMC_FDT_OVERLAY_SETTING \
+    "bootcmd=run mmcbootdto\0" \
+    "author=weihuihong\0"
+    "bsys=run bdtb && run bker\0"
+
+#ifdef IGKBOARD_DTOVERLAY_SUPPORT
+#undef  CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND      MMC_BOOT_WITH_FDT_OVERLAY
+#endif
+
+/* Miscellaneous configurable options */
@@ -1397,39 +1561,10 @@
+/* Physical Memory Map */
+#define PHYS_SDRAM            MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE        PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR    IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE    IRAM_SIZE
+#define CFG_SYS_SDRAM_BASE        PHYS_SDRAM
+#define CFG_SYS_INIT_RAM_ADDR    IRAM_BASE_ADDR
+#define CFG_SYS_INIT_RAM_SIZE    IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+    (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* environment organization */
+#define CONFIG_SYS_MMC_ENV_DEV        1    /* USDHC2 */
+#define CONFIG_MMCROOT            "/dev/mmcblk1p2"  /* USDHC2 */
+
+#define CONFIG_IOMUX_LPSR
+
+/* NAND stuff */
+#ifdef CONFIG_NAND_MXS
+#define CONFIG_SYS_MAX_NAND_DEVICE    1
+#define CONFIG_SYS_NAND_BASE        0x40000000
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+
+/* DMA stuff, needed for GPMI/MXS NAND support */
+#endif
+
+/* USB Configs */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS   0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#endif
+
+#define CONFIG_FEC_XCV_TYPE             RMII
+#define CONFIG_ETHPRIME            "eth1"
+
+#ifndef CONFIG_SPL_BUILD
@@ -1439,144 +1574,67 @@
+#endif
+
+#endif
diff -Nuar -x lingyun.bmp uboot-imx/include/configs/igkboard_overlay.h uboot-imx-lf-5.15.32-2.0.0/include/configs/igkboard_overlay.h
--- uboot-imx/include/configs/igkboard_overlay.h    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/include/configs/igkboard_overlay.h    2022-09-04 15:05:50.940174512 +0800
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0 */
diff -Nuar -x tools uboot-imx/include/configs/igkboard-dtoverlay.h uboot-imx-lf-6.1.36-2.1.0/include/configs/igkboard-dtoverlay.h
--- uboot-imx/include/configs/igkboard-dtoverlay.h    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-6.1.36-2.1.0/include/configs/igkboard-dtoverlay.h    2023-11-06 15:07:25.625384765 +0800
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022 LingYun IoT System Studio
+ * Copyright (C) 2023 LingYun IoT System Studio
+ *
+ * Device Tree overlay env for the LingYun IoT Gateway Board.
+ */
+#ifndef  __IGKBOARD_OVERLAY_H
+#define  __IGKBOARD_OVERLAY_H
+#ifndef __IGKBOARD_DTOVERLAY_H
+#define __IGKBOARD_DTOVERLAY_H
+
+#if 0
+ dtoverlay_xxx is set in uEnv.txt, then load the corresponding dtbo file
+
+ if env exists dtoverlay_lcd && test ${dtoverlay_lcd} = 1 -o ${dtoverlay_lcd} = yes ; then
+    dtbo_file=lcd.dtbo;
+    echo "Applying DT overlay: $dtbo_file";
+    fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file};
+    fdt addr ${fdt_addr};
+    fdt resize ${fdt_size};
+    fdt apply ${dtbo_addr};
+ fi;
+
+
+ if env exists dtoverlay_uart ; then
+    for i in ${dtoverlay_uart};
+    do
+        dtbo_file=uart$i.dtbo;
+        echo "Applying DT overlay: $dtbo_file";
+        fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file};
+        fdt addr ${fdt_addr};
+        fdt apply ${dtbo_addr};
+    done;
+ fi;
+
+#endif
+
+#define IGKBOARD_DTOVERLAY_SUPPORT
+
+#define FDT_APPLY_OVERLAY()          \
+    "echo Applying DT overlay ==> ${dtbo_file}; " \
+    "fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file}; " \
+    "fdt addr ${fdt_addr}; " \
+    "fdt resize ${fdt_size}; " \
+    "fdt apply ${dtbo_addr}; "
+    "echo Applying DT overlay => ${dtbo_file}; " \
+    "fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file}; " \
+    "fdt addr ${fdt_addr}; " \
+    "fdt resize ${fdt_size}; " \
+    "fdt apply ${dtbo_addr}; "
+
+#define CHECK_APPLY_OVERLAY( name )     \
+    "if env exists dtoverlay_" name " && test ${dtoverlay_" name "} = 1 -o ${dtoverlay_" name "} = yes ; then " \
+        "setenv dtbo_file " name ".dtbo; " \
+        FDT_APPLY_OVERLAY() \
+    "fi; "
+    "if env exists dtoverlay_" name " && test ${dtoverlay_" name "} = 1 -o ${dtoverlay_" name "} = yes ; then " \
+        "setenv dtbo_file " name ".dtbo; " \
+        FDT_APPLY_OVERLAY() \
+    "fi; "
+
+#define CHECK_APPLY_OVERLAYS_IDX( name )     \
+    "if env exists dtoverlay_" name "; then " \
+        "for i in ${dtoverlay_" name "}; do " \
+            "setenv dtbo_file " name "$i.dtbo; " \
+            FDT_APPLY_OVERLAY() \
+        " done;" \
+    "fi; "
+    "if env exists dtoverlay_" name "; then " \
+        "for i in ${dtoverlay_" name "}; do " \
+            "setenv dtbo_file " name "$i.dtbo; " \
+            FDT_APPLY_OVERLAY() \
+        " done;" \
+    "fi; "
+
+#define CHECK_APPLY_OVERLAYS_DTBO( name )     \
+    "if env exists dtoverlay_" name "; then " \
+        "for f in ${dtoverlay_" name "}; do " \
+            "setenv dtbo_file $f.dtbo; " \
+            FDT_APPLY_OVERLAY() \
+        " done;" \
+    "fi; "
+    "if env exists dtoverlay_" name "; then " \
+        "for f in ${dtoverlay_" name "}; do " \
+            "setenv dtbo_file $f.dtbo; " \
+            FDT_APPLY_OVERLAY() \
+        " done;" \
+    "fi; "
+
+#define FDT_ENTRY_DEF_SETTINGS          \
+                CHECK_APPLY_OVERLAY("lcd") \
+                CHECK_APPLY_OVERLAY("cam") \
+                CHECK_APPLY_OVERLAY("i2c1") \
+                CHECK_APPLY_OVERLAY("spi1") \
+                CHECK_APPLY_OVERLAYS_IDX("uart") \
+                CHECK_APPLY_OVERLAYS_IDX("can") \
+                CHECK_APPLY_OVERLAYS_IDX("pwm") \
+                CHECK_APPLY_OVERLAYS_DTBO("extra") \
+                CHECK_APPLY_OVERLAY("lcd") \
+                CHECK_APPLY_OVERLAY("cam") \
+                CHECK_APPLY_OVERLAY("w1") \
+                CHECK_APPLY_OVERLAY("adc") \
+                CHECK_APPLY_OVERLAYS_IDX("i2c") \
+                CHECK_APPLY_OVERLAYS_IDX("spi") \
+                CHECK_APPLY_OVERLAYS_IDX("uart") \
+                CHECK_APPLY_OVERLAYS_IDX("can") \
+                CHECK_APPLY_OVERLAYS_IDX("pwm") \
+                CHECK_APPLY_OVERLAYS_DTBO("extra") \
+
+#define MMC_FDT_OVERLAY_SETTING                  \
+         "fdt_size=0x10000\0" \
+         "dtbo_addr=0x83010000\0" \
+         "dtbo_dir=overlays\0" \
+        "mmcbootdto=echo Booting from mmc with overlay...; "     \
+                 "mmc dev ${mmcdev}; run mmcargs; run loadenvconf; "   \
+                 "run loadimage; run loadfdt; "       \
+                 FDT_ENTRY_DEF_SETTINGS               \
+                 "bootz ${loadaddr} - ${fdt_addr}\0"
+
+#define ENABLE_UENV_FDTO_SUPPORT
+#define MMC_BOOT_WITH_FDT_OVERLAY   \
+    "mmc dev ${mmcdev};"            \
+    "run mmcargs; run loadenvconf;" \
+    "run loadimage; run loadfdt; "  \
+    FDT_ENTRY_DEF_SETTINGS          \
+    "run bootos; "                 \
+
+#endif
+
diff -Nuar -x lingyun.bmp uboot-imx/Makefile uboot-imx-lf-5.15.32-2.0.0/Makefile
--- uboot-imx/Makefile    2022-07-21 17:57:07.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/Makefile    2022-09-04 15:05:50.944174477 +0800
@@ -273,6 +273,9 @@
 CROSS_COMPILE ?=
 endif

+ARCH = arm
+CROSS_COMPILE ?= /opt/buildroot/cortexA7/bin/arm-linux-
+
 KCONFIG_CONFIG    ?= .config
 export KCONFIG_CONFIG

diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/bootm.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/bootm.c
--- uboot-imx/tools/boot/bootm.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/bootm.c    2022-09-04 15:05:57.424118419 +0800
@@ -0,0 +1 @@
+#include <../boot/bootm.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/fdt_region.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/fdt_region.c
--- uboot-imx/tools/boot/fdt_region.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/fdt_region.c    2022-09-04 15:05:57.424118419 +0800
@@ -0,0 +1 @@
+#include <../boot/fdt_region.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/image.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/image.c
--- uboot-imx/tools/boot/image.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/image.c    2022-09-04 15:05:57.472118003 +0800
@@ -0,0 +1 @@
+#include <../boot/image.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/image-cipher.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-cipher.c
--- uboot-imx/tools/boot/image-cipher.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-cipher.c    2022-09-04 15:05:57.420118452 +0800
@@ -0,0 +1 @@
+#include <../boot/image-cipher.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/image-fit.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-fit.c
--- uboot-imx/tools/boot/image-fit.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-fit.c    2022-09-04 15:05:57.388118731 +0800
@@ -0,0 +1 @@
+#include <../boot/image-fit.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/image-fit-sig.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-fit-sig.c
--- uboot-imx/tools/boot/image-fit-sig.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-fit-sig.c    2022-09-04 15:05:57.420118452 +0800
@@ -0,0 +1 @@
+#include <../boot/image-fit-sig.c>
diff -Nuar -x lingyun.bmp uboot-imx/tools/boot/image-host.c uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-host.c
--- uboot-imx/tools/boot/image-host.c    1970-01-01 08:00:00.000000000 +0800
+++ uboot-imx-lf-5.15.32-2.0.0/tools/boot/image-host.c    2022-09-04 15:05:57.472118003 +0800
@@ -0,0 +1 @@
+#include <../boot/image-host.c>
+#endif  /* __IGKBOARD_DTOVERLAY_H */