| | |
| | | diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts |
| | | --- linux-imx/arch/arm/boot/dts/igkboard.dts 1970-01-01 08:00:00.000000000 +0800 |
| | | +++ linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts 2022-04-13 23:40:46.669880257 +0800 |
| | | @@ -0,0 +1,796 @@ |
| | | +++ linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts 2022-04-14 19:53:27.986034399 +0800 |
| | | @@ -0,0 +1,801 @@ |
| | | +// SPDX-License-Identifier: GPL-2.0 |
| | | +/* |
| | | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board) |
| | |
| | | + fsl,ext-reset-output; |
| | | +}; |
| | | + |
| | | +/* imx6ul-pinfunc.h */ |
| | | +/* 40Pin Header pinctrl */ |
| | | +&iomuxc { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_extgpio>; |
| | | + |
| | | +/* 40Pin Header end */ |
| | | + pinctrl_extgpio: extgpiogrp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x17059 /* 7# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059 /* 35# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059 /* 37# GPIO */ |
| | | + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x17059 /* 22# GPIO */ |
| | | + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x17059 /* 26# GPIO */ |
| | | + MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x17059 /* 36# GPIO */ |
| | | + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x17059 /* 38# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x17059 /* 40# GPIO */ |
| | | + >; |
| | | + igkboard_extpin { |
| | | + pinctrl_extgpio: extgpiogrp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x17059 /* 7# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059 /* 35# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059 /* 37# GPIO */ |
| | | + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x17059 /* 22# GPIO */ |
| | | + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x17059 /* 26# GPIO */ |
| | | + MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x17059 /* 36# GPIO */ |
| | | + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x17059 /* 38# GPIO */ |
| | | + MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x17059 /* 40# GPIO */ |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c1: i2c1grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0 |
| | | + MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart2: uart2grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart3: uart3grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart4: uart4grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart7: uart7grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_ecspi1: ecspi1-grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm7: pwm7grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x110b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm8: pwm8grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x110b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan1: flexcan1grp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 |
| | | + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan2: flexcan2grp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 |
| | | + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 |
| | | + >; |
| | | + }; |
| | | + }; |
| | | +}; |
| | | + |
| | | + pinctrl_i2c1: i2c1grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0 |
| | | + MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart2: uart2grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart3: uart3grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart4: uart4grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart7: uart7grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1 |
| | | + MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_ecspi1: ecspi1-grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0 |
| | | + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm7: pwm7grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x110b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm8: pwm8grp { |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x110b0 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan1: flexcan1grp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 |
| | | + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_flexcan2: flexcan2grp{ |
| | | + fsl,pins = < |
| | | + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 |
| | | + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 |
| | | + >; |
| | | + }; |
| | | +/* 40Pin Header end */ |
| | | +&iomuxc { |
| | | + pinctrl-names = "default"; |
| | | + |
| | | + pinctrl_gpio_leds: gpio-leds { |
| | | + fsl,pins = < |
| | |
| | | imx6ull-14x14-evk-btwifi.dtb \ |
| | | diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-igkboard/arch/arm/configs/igkboard_defconfig |
| | | --- linux-imx/arch/arm/configs/igkboard_defconfig 1970-01-01 08:00:00.000000000 +0800 |
| | | +++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig 2022-04-13 23:41:00.413708382 +0800 |
| | | +++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig 2022-04-14 20:08:27.465008910 +0800 |
| | | @@ -0,0 +1,722 @@ |
| | | +CONFIG_KERNEL_LZO=y |
| | | +CONFIG_SYSVIPC=y |
| | |
| | | +# CONFIG_SCHED_DEBUG is not set |
| | | +# CONFIG_DEBUG_PREEMPT is not set |
| | | +# CONFIG_FTRACE is not set |
| | | diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/do.sh linux-imx-igkboard/do.sh |
| | | --- linux-imx/do.sh 1970-01-01 08:00:00.000000000 +0800 |
| | | +++ linux-imx-igkboard/do.sh 2022-04-14 19:56:04.963080600 +0800 |
| | | @@ -0,0 +1,22 @@ |
| | | +#!/bin/bash |
| | | + |
| | | +INST_PATH=/srv/ftp/pub/ |
| | | + |
| | | +JOBS=`cat /proc/cpuinfo | grep processor | wc -l` |
| | | + |
| | | +function do_build() |
| | | +{ |
| | | + make igkboard_defconfig |
| | | + make -j ${JOBS} |
| | | +} |
| | | + |
| | | +function do_install() |
| | | +{ |
| | | + set -x |
| | | + cp arch/arm/boot/zImage $INST_PATH |
| | | + cp arch/arm/boot/dts/igkboard.dtb $INST_PATH |
| | | +} |
| | | + |
| | | +do_build |
| | | + |
| | | +#do_install |
| | | diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-igkboard/Makefile |
| | | --- linux-imx/Makefile 2021-09-08 18:41:11.000000000 +0800 |
| | | +++ linux-imx-igkboard/Makefile 2022-04-13 23:15:49.159016848 +0800 |
| | | +++ linux-imx-igkboard/Makefile 2022-04-14 20:05:02.060376092 +0800 |
| | | @@ -367,7 +367,8 @@ |
| | | # Alternatively CROSS_COMPILE can be set in the environment. |
| | | # Default value for CROSS_COMPILE is not to prefix executables |