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| | | -KH#5M.k+m]J0E;$^lp(>&L<qZo745fo$\gD>hVZ2hL#?93lH'n21D8b3N@a)1(\h
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| | | k.?pc`Rrq^9J0UdZ?M[dJ,~>
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| | | 19 0 obj
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| | | /Type /Font
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| | | /BaseFont /Helvetica
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| | | /LastChar 255
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| | | 37 0 obj
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| | | <<
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| | | /Type /Font
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| | | /BaseFont /Helvetica
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| | | /FirstChar 32
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| | | /LastChar 255
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| | | /Encoding /MacRomanEncoding
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| | | [ /PDF /Text ]
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| | | <<
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| | | /Kids [4 0 R 12 0 R 15 0 R 18 0 R 22 0 R 25 0 R ]
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| | | /Count 6
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| | | /Type /Pages
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| | | /Parent 49 0 R
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| | | >>
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| | | 29 0 obj
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| | | <<
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| | | /Kids [28 0 R 32 0 R 35 0 R 40 0 R 43 0 R 46 0 R ]
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| | | /Count 6
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| | | /Type /Pages
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| | | /Kids [5 0 R 29 0 R ]
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| | | /Count 12
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| | | /MediaBox [ 0 0 595 841 ]
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| | | >>
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| | | endobj
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| | | <<
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| | | /CreationDate (Friday, October 14, 1994 2:10 PM PDT)
|
|---|
| | | /Producer (Acrobat Distiller Command 1.0 for Solaris 1.1/2.3 (SPARC))
|
|---|
| | | >>
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| | | endobj
|
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| | | 3 0 obj
|
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| | | <<
|
|---|
| | | /Pages 49 0 R
|
|---|
| | | /Type /Catalog
|
|---|
| | | >>
|
|---|
| | | endobj
|
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| | | xref
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| | | 0 50
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| | | trailer
|
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| | | <<
|
|---|
| | | /Size 50
|
|---|
| | | /Root 3 0 R
|
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| | | /Info 1 0 R
|
|---|
| | | >>
|
|---|
| | | startxref
|
|---|
| | | 198127
|
|---|
| | | %%EOF
|
|---|
| New file |
| | |
|---|
| | | 1, CPU: STM32103VET(MAX to 72MHz) |
|---|
| | | Flash: 512KB
|
|---|
| | | SRAM: 64KB
|
|---|
| | |
|
|---|
| | | 2, RS232:
|
|---|
| | | USART1_TX -- PA9 |
|---|
| | | USART1_RX -- PA10
|
|---|
| | |
|
|---|
| | | 3, RS485
|
|---|
| | | USART2_TX -- PA3
|
|---|
| | | USART2_RX -- PA2
|
|---|
| | |
|
|---|
| | | 4, ENC28J60CSS(SPI ethernet):
|
|---|
| | | Eth0_INT -- PA1 |
|---|
| | | SPI1_MISO -- PA6 |
|---|
| | | SPI1_MOSI -- PA7
|
|---|
| | | SPI1_SCK -- PA5
|
|---|
| | | SPI1_NSS -- PA4
|
|---|
| | | LCD_RST -- PE1
|
|---|
| | |
|
|---|
| | | 5, CAN
|
|---|
| | | CAN_TX -- PB9
|
|---|
| | | CAN_RX -- PB8
|
|---|
| | |
|
|---|
| | | 6, LED
|
|---|
| | | LED1 -- PB5
|
|---|
| | | LED2 -- PD6
|
|---|
| | | LED3 -- PD3
|
|---|
| | |
|
|---|
| | | 7, Button
|
|---|
| | | KEY1 -- PC5
|
|---|
| | | KEY2 -- PC2
|
|---|
| | | KEY3 -- PC3
|
|---|
| | |
|
|---|
| | | 8, SST25VF016B
|
|---|
| | | SPI1_MISO -- PA6
|
|---|
| | | SPI1_MOSI -- PA7
|
|---|
| | | SPI1_CLK -- PA5
|
|---|
| | | SPI1_CS2 -- PC4
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Implementation of draw function on LCD, Include draw text, image
|
|---|
| | | * and basic shapes (line, rectangle, circle).
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | | #include <string.h>
|
|---|
| | | #include <assert.h>
|
|---|
| | | #include "lcd_font.h"
|
|---|
| | | #include "lcd_r61509v.h"
|
|---|
| | | #include "lcd_draw.h"
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Exported functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Fills the given LCD buffer with a particular color.
|
|---|
| | | *
|
|---|
| | | * \param color Fill color.
|
|---|
| | | */
|
|---|
| | | void LCDD_Fill( uint32_t dwColor )
|
|---|
| | | {
|
|---|
| | | uint32_t i ;
|
|---|
| | |
|
|---|
| | | LCD_SetCursor( 150, 150 ) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | for ( i=BOARD_LCD_WIDTH*BOARD_LCD_HEIGHT; i>0; i-- )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM( dwColor ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draw a pixel on LCD of given color.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of pixel.
|
|---|
| | | * \param y Y-coordinate of pixel.
|
|---|
| | | * \param color Pixel color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t color )
|
|---|
| | | {
|
|---|
| | | LCD_SetCursor( x, y ) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | | LCD_WriteRAM( color ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Read a pixel from LCD.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of pixel.
|
|---|
| | | * \param y Y-coordinate of pixel.
|
|---|
| | | *
|
|---|
| | | * \return color Readed pixel color.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y )
|
|---|
| | | {
|
|---|
| | | uint32_t color;
|
|---|
| | |
|
|---|
| | | LCD_SetCursor(x, y);
|
|---|
| | | LCD_ReadRAM_Prepare();
|
|---|
| | | color = LCD_ReadRAM();
|
|---|
| | |
|
|---|
| | | return color;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draw a line on LCD, horizontal and vertical line are supported.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of line start.
|
|---|
| | | * \param y Y-coordinate of line start.
|
|---|
| | | * \param length line length.
|
|---|
| | | * \param direction line direction: 0 - horizontal, 1 - vertical.
|
|---|
| | | * \param color Pixel color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawLine( uint32_t x, uint32_t y, uint32_t length, uint32_t direction, uint32_t color )
|
|---|
| | | {
|
|---|
| | | uint32_t i = 0 ;
|
|---|
| | |
|
|---|
| | | LCD_SetCursor( x, y ) ;
|
|---|
| | |
|
|---|
| | | if ( direction == DIRECTION_HLINE )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | | for ( i = 0; i < length; i++ )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM( color ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | for ( i = 0; i < length; i++ )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | | LCD_WriteRAM( color ) ;
|
|---|
| | | y++ ;
|
|---|
| | | LCD_SetCursor( x, y ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draws a rectangle on LCD, at the given coordinates.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of upper-left rectangle corner.
|
|---|
| | | * \param y Y-coordinate of upper-left rectangle corner.
|
|---|
| | | * \param width Rectangle width in pixels.
|
|---|
| | | * \param height Rectangle height in pixels.
|
|---|
| | | * \param color Rectangle color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawRectangle( uint32_t x, uint32_t y, uint32_t width, uint32_t height, uint32_t color )
|
|---|
| | | {
|
|---|
| | | LCDD_DrawLine(x, y, width, DIRECTION_HLINE, color);
|
|---|
| | | LCDD_DrawLine(x, (y + height), width, DIRECTION_HLINE, color);
|
|---|
| | |
|
|---|
| | | LCDD_DrawLine(x, y, height, DIRECTION_VLINE, color);
|
|---|
| | | LCDD_DrawLine((x + width), y, height, DIRECTION_VLINE, color);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draws a rectangle with fill inside on LCD, at the given coordinates.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of upper-left rectangle corner.
|
|---|
| | | * \param y Y-coordinate of upper-left rectangle corner.
|
|---|
| | | * \param width Rectangle width in pixels.
|
|---|
| | | * \param height Rectangle height in pixels.
|
|---|
| | | * \param color Rectangle color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor )
|
|---|
| | | {
|
|---|
| | | uint32_t i ;
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( dwX, dwY, dwWidth, dwHeight ) ;
|
|---|
| | | LCD_SetCursor( dwX, dwY ) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | for ( i = dwWidth * dwHeight; i > 0; i-- )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM( dwColor ) ;
|
|---|
| | | }
|
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
|
|---|
| | | LCD_SetCursor( 0, 0 ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws a circle on LCD, at the given coordinates.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of circle center.
|
|---|
| | | * \param y Y-coordinate of circle center.
|
|---|
| | | * \param r circle radius.
|
|---|
| | | * \param color circle color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color )
|
|---|
| | | {
|
|---|
| | | signed int d; /* Decision Variable */
|
|---|
| | | uint32_t curX; /* Current X Value */
|
|---|
| | | uint32_t curY; /* Current Y Value */
|
|---|
| | |
|
|---|
| | | d = 3 - (r << 1);
|
|---|
| | | curX = 0;
|
|---|
| | | curY = r;
|
|---|
| | |
|
|---|
| | | while (curX <= curY)
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel(x + curX, y + curY, color);
|
|---|
| | | LCDD_DrawPixel(x + curX, y - curY, color);
|
|---|
| | | LCDD_DrawPixel(x - curX, y + curY, color);
|
|---|
| | | LCDD_DrawPixel(x - curX, y - curY, color);
|
|---|
| | | LCDD_DrawPixel(x + curY, y + curX, color);
|
|---|
| | | LCDD_DrawPixel(x + curY, y - curX, color);
|
|---|
| | | LCDD_DrawPixel(x - curY, y + curX, color);
|
|---|
| | | LCDD_DrawPixel(x - curY, y - curX, color);
|
|---|
| | |
|
|---|
| | | if (d < 0) {
|
|---|
| | | d += (curX << 2) + 6;
|
|---|
| | | }
|
|---|
| | | else {
|
|---|
| | | d += ((curX - curY) << 2) + 10;
|
|---|
| | | curY--;
|
|---|
| | | }
|
|---|
| | | curX++;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws a string inside a LCD buffer, at the given coordinates. Line breaks
|
|---|
| | | * will be honored.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of string top-left corner.
|
|---|
| | | * \param y Y-coordinate of string top-left corner.
|
|---|
| | | * \param pString String to display.
|
|---|
| | | * \param color String color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color )
|
|---|
| | | {
|
|---|
| | | uint32_t xorg = x ;
|
|---|
| | |
|
|---|
| | | while ( *pString != 0 && *pString > 0x1F && *pString < 0x7F)
|
|---|
| | | {
|
|---|
| | | LCDD_DrawChar( x, y, *pString, color ) ;
|
|---|
| | | if ( *pString == '\n' || x > 220)
|
|---|
| | | {
|
|---|
| | | y += gFont.height + 2 ;
|
|---|
| | | x = xorg ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | x += gFont.width + 2 ;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | pString++ ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws a string inside a LCD buffer, at the given coordinates
|
|---|
| | | * with given background color. Line breaks will be honored.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of string top-left corner.
|
|---|
| | | * \param y Y-coordinate of string top-left corner.
|
|---|
| | | * \param pString String to display.
|
|---|
| | | * \param fontColor String color.
|
|---|
| | | * \param bgColor Background color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor )
|
|---|
| | | {
|
|---|
| | | unsigned xorg = x;
|
|---|
| | |
|
|---|
| | | while ( *pString != 0 )
|
|---|
| | | {
|
|---|
| | | if ( *pString == '\n' )
|
|---|
| | | {
|
|---|
| | | y += gFont.height + 2 ;
|
|---|
| | | x = xorg ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | LCDD_DrawCharWithBGColor( x, y, *pString, fontColor, bgColor ) ;
|
|---|
| | | x += gFont.width + 2;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | pString++;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Returns the width & height in pixels that a string will occupy on the screen
|
|---|
| | | * if drawn using LCDD_DrawString.
|
|---|
| | | *
|
|---|
| | | * \param pString String.
|
|---|
| | | * \param pWidth Pointer for storing the string width (optional).
|
|---|
| | | * \param pHeight Pointer for storing the string height (optional).
|
|---|
| | | *
|
|---|
| | | * \return String width in pixels.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight )
|
|---|
| | | {
|
|---|
| | | uint32_t width = 0;
|
|---|
| | | uint32_t height = gFont.height;
|
|---|
| | |
|
|---|
| | | while ( *pString != 0 )
|
|---|
| | | {
|
|---|
| | | if ( *pString == '\n' )
|
|---|
| | | {
|
|---|
| | | height += gFont.height + 2 ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | width += gFont.width + 2 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | pString++ ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if ( width > 0 )
|
|---|
| | | {
|
|---|
| | | width -= 2;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if ( pWidth != NULL )
|
|---|
| | | {
|
|---|
| | | *pWidth = width;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if ( pHeight != NULL )
|
|---|
| | | {
|
|---|
| | | *pHeight = height ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draw a raw image at given position on LCD.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of image start.
|
|---|
| | | * \param y Y-coordinate of image start.
|
|---|
| | | * \param pImage Image buffer.
|
|---|
| | | * \param width Image width.
|
|---|
| | | * \param height Image height.
|
|---|
| | | */
|
|---|
| | | void LCDD_DrawImage( uint32_t dwX, uint32_t dwY, const uint8_t *pImage, uint32_t dwWidth, uint32_t dwHeight )
|
|---|
| | | {
|
|---|
| | | uint32_t dwCursor ;
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( dwX, dwY, dwWidth, dwHeight ) ;
|
|---|
| | | LCD_SetCursor( dwX, dwY ) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | for ( dwCursor=dwWidth*dwHeight; dwCursor != 0; dwCursor-- )
|
|---|
| | | {
|
|---|
| | | LCD_D() = *pImage++ ;
|
|---|
| | | LCD_D() = *pImage++ ;
|
|---|
| | | LCD_D() = *pImage++ ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draw a raw image at given position on LCD.
|
|---|
| | | *
|
|---|
| | | * \param dwX X-coordinate of image start.
|
|---|
| | | * \param dwY Y-coordinate of image start.
|
|---|
| | | * \param pGIMPImage Image data.
|
|---|
| | | */
|
|---|
| | | void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage )
|
|---|
| | | {
|
|---|
| | | uint32_t dw ;
|
|---|
| | | register uint32_t dwLength ;
|
|---|
| | | uint8_t* pucData ;
|
|---|
| | |
|
|---|
| | | // Draw raw RGB bitmap
|
|---|
| | | LCD_SetWindow( dwX, dwY, pGIMPImage->dwWidth, pGIMPImage->dwHeight ) ;
|
|---|
| | | LCD_SetCursor( dwX, dwY ) ;
|
|---|
| | |
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | dwLength = pGIMPImage->dwWidth*pGIMPImage->dwHeight ;
|
|---|
| | | pucData = pGIMPImage->pucPixel_data ;
|
|---|
| | | for ( dw=0; dw < dwLength; dw++ )
|
|---|
| | | {
|
|---|
| | | LCD_D() = (*pucData++) ;
|
|---|
| | | LCD_D() = (*pucData++) ;
|
|---|
| | | LCD_D() = (*pucData++) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Clear a window with an color.
|
|---|
| | | *
|
|---|
| | | * \param dwX X-coordinate of the window.
|
|---|
| | | * \param dwY Y-coordinate of the window.
|
|---|
| | | * \param dwWidth window width.
|
|---|
| | | * \param dwHeight window height.
|
|---|
| | | * \param dwColor background color
|
|---|
| | | */
|
|---|
| | | extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor )
|
|---|
| | | {
|
|---|
| | | uint32_t dw ;
|
|---|
| | |
|
|---|
| | | LCD_SetCursor( dwX, dwY) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | for ( dw = dwWidth * dwHeight; dw > 0; dw-- )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM( dwColor ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Interface for draw function on LCD.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef DRAW_H
|
|---|
| | | #define DRAW_H
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | | #include "lcd_gimp_image.h"
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Definitions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /** Horizontal direction line definition */
|
|---|
| | | #define DIRECTION_HLINE 0
|
|---|
| | | /** Vertical direction line definition */
|
|---|
| | | #define DIRECTION_VLINE 1
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Exported functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | | extern void LCDD_Fill( uint32_t color ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t c ) ;
|
|---|
| | |
|
|---|
| | | extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawLine( uint32_t x, uint32_t y, uint32_t length, uint32_t direction, uint32_t color ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawRectangle( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawImage( uint32_t x, uint32_t y, const uint8_t *pImage, uint32_t width, uint32_t height ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage );
|
|---|
| | |
|
|---|
| | | extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* #ifndef DRAW_H */
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | | #include "lcd_font.h"
|
|---|
| | | #include "lcd_font10x14.h"
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Implementation of draw font on LCD.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | | #include "lcd_draw.h"
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Local variables
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /** Global variable describing the font being instancied. */
|
|---|
| | | const Font gFont = {10, 14};
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Exported functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws an ASCII character on LCD.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of character upper-left corner.
|
|---|
| | | * \param y Y-coordinate of character upper-left corner.
|
|---|
| | | * \param c Character to output.
|
|---|
| | | * \param color Character color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color )
|
|---|
| | | {
|
|---|
| | | uint32_t row, col ;
|
|---|
| | |
|
|---|
| | | if( (c<0x20) || (c>0x7F) ) |
|---|
| | | return ;
|
|---|
| | |
|
|---|
| | | for ( col = 0 ; col < 10 ; col++ )
|
|---|
| | | {
|
|---|
| | | for ( row = 0 ; row < 8 ; row++ )
|
|---|
| | | {
|
|---|
| | | if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 )
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row, color ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | for (row = 0; row < 6; row++ )
|
|---|
| | | {
|
|---|
| | | if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1)
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row+8, color ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws an ASCII character on LCD with given background color.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of character upper-left corner.
|
|---|
| | | * \param y Y-coordinate of character upper-left corner.
|
|---|
| | | * \param c Character to output.
|
|---|
| | | * \param fontColor Character color.
|
|---|
| | | * \param bgColor Background color.
|
|---|
| | | */
|
|---|
| | | extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor )
|
|---|
| | | {
|
|---|
| | | uint32_t row, col ;
|
|---|
| | |
|
|---|
| | | if( (c<0x20) || (c>0x7F) ) |
|---|
| | | return ;
|
|---|
| | |
|
|---|
| | | for (col = 0; col < 10; col++)
|
|---|
| | | {
|
|---|
| | | for (row = 0 ; row < 8 ; row++)
|
|---|
| | | {
|
|---|
| | | if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 )
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row, fontColor ) ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row, bgColor ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | for ( row = 0 ; row < 6 ; row++ )
|
|---|
| | | {
|
|---|
| | | if ( (pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1 )
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row+8, fontColor ) ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | LCDD_DrawPixel( x+col, y+row+8, bgColor ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Interface for draw font on LCD.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | *
|
|---|
| | | * \section Purpose
|
|---|
| | | *
|
|---|
| | | * The font.h files declares a font structure and a LCDD_DrawChar function
|
|---|
| | | * that must be implemented by a font definition file to be used with the
|
|---|
| | | * LCDD_DrawString method of draw.h.
|
|---|
| | | *
|
|---|
| | | * The font10x14.c implements the necessary variable and function for a 10x14
|
|---|
| | | * font.
|
|---|
| | | *
|
|---|
| | | * \section Usage
|
|---|
| | | *
|
|---|
| | | * -# Declare a gFont global variable with the necessary Font information.
|
|---|
| | | * -# Implement an LCDD_DrawChar function which displays the specified
|
|---|
| | | * character on the LCD.
|
|---|
| | | * -# Use the LCDD_DrawString method defined in draw.h to display a complete
|
|---|
| | | * string.
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef _LCD_FONT_
|
|---|
| | | #define _LCD_FONT_
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Types
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** \brief Describes the font (width, height, supported characters, etc.) used by
|
|---|
| | | * the LCD driver draw API.
|
|---|
| | | */
|
|---|
| | | typedef struct _Font {
|
|---|
| | | /* Font width in pixels. */
|
|---|
| | | uint8_t width;
|
|---|
| | | /* Font height in pixels. */
|
|---|
| | | uint8_t height;
|
|---|
| | | } Font;
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Variables
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /** Global variable describing the font being instancied. */
|
|---|
| | | extern const Font gFont;
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Exported functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color ) ;
|
|---|
| | |
|
|---|
| | | extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor ) ;
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | | #endif /* #ifndef LCD_FONT_ */
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | | #include <stdint.h>
|
|---|
| | | |
|---|
| | | const unsigned char pCharset8x8[97][8] = {
|
|---|
| | | {0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
|
|---|
| | | {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
|
|---|
| | | {0x30,0x78,0x78,0x30,0x30,0x00,0x30,0x00}, // !
|
|---|
| | | {0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00}, // "
|
|---|
| | | {0x6C,0x6C,0xFE,0x6C,0xFE,0x6C,0x6C,0x00}, // #
|
|---|
| | | {0x18,0x3E,0x60,0x3C,0x06,0x7C,0x18,0x00}, // $
|
|---|
| | | {0x00,0x63,0x66,0x0C,0x18,0x33,0x63,0x00}, // %
|
|---|
| | | {0x1C,0x36,0x1C,0x3B,0x6E,0x66,0x3B,0x00}, // &
|
|---|
| | | {0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00}, // '
|
|---|
| | | {0x0C,0x18,0x30,0x30,0x30,0x18,0x0C,0x00}, // (
|
|---|
| | | {0x30,0x18,0x0C,0x0C,0x0C,0x18,0x30,0x00}, // )
|
|---|
| | | {0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00}, // *
|
|---|
| | | {0x00,0x30,0x30,0xFC,0x30,0x30,0x00,0x00}, // +
|
|---|
| | | {0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x30}, // ,
|
|---|
| | | {0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00}, // -
|
|---|
| | | {0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00}, // .
|
|---|
| | | {0x03,0x06,0x0C,0x18,0x30,0x60,0x40,0x00}, // / (forward slash)
|
|---|
| | | {0x3E,0x63,0x63,0x6B,0x63,0x63,0x3E,0x00}, // 0 0x30
|
|---|
| | | {0x18,0x38,0x58,0x18,0x18,0x18,0x7E,0x00}, // 1
|
|---|
| | | {0x3C,0x66,0x06,0x1C,0x30,0x66,0x7E,0x00}, // 2
|
|---|
| | | {0x3C,0x66,0x06,0x1C,0x06,0x66,0x3C,0x00}, // 3
|
|---|
| | | {0x0E,0x1E,0x36,0x66,0x7F,0x06,0x0F,0x00}, // 4
|
|---|
| | | {0x7E,0x60,0x7C,0x06,0x06,0x66,0x3C,0x00}, // 5
|
|---|
| | | {0x1C,0x30,0x60,0x7C,0x66,0x66,0x3C,0x00}, // 6
|
|---|
| | | {0x7E,0x66,0x06,0x0C,0x18,0x18,0x18,0x00}, // 7
|
|---|
| | | {0x3C,0x66,0x66,0x3C,0x66,0x66,0x3C,0x00}, // 8
|
|---|
| | | {0x3C,0x66,0x66,0x3E,0x06,0x0C,0x38,0x00}, // 9
|
|---|
| | | {0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x00}, // :
|
|---|
| | | {0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x30}, // ;
|
|---|
| | | {0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00}, // <
|
|---|
| | | {0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00}, // =
|
|---|
| | | {0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00}, // >
|
|---|
| | | {0x3C,0x66,0x06,0x0C,0x18,0x00,0x18,0x00}, // ?
|
|---|
| | | {0x3E,0x63,0x6F,0x69,0x6F,0x60,0x3E,0x00}, // @ 0x40
|
|---|
| | | {0x18,0x3C,0x66,0x66,0x7E,0x66,0x66,0x00}, // A
|
|---|
| | | {0x7E,0x33,0x33,0x3E,0x33,0x33,0x7E,0x00}, // B
|
|---|
| | | {0x1E,0x33,0x60,0x60,0x60,0x33,0x1E,0x00}, // C
|
|---|
| | | {0x7C,0x36,0x33,0x33,0x33,0x36,0x7C,0x00}, // D
|
|---|
| | | {0x7F,0x31,0x34,0x3C,0x34,0x31,0x7F,0x00}, // E
|
|---|
| | | {0x7F,0x31,0x34,0x3C,0x34,0x30,0x78,0x00}, // F
|
|---|
| | | {0x1E,0x33,0x60,0x60,0x67,0x33,0x1F,0x00}, // G
|
|---|
| | | {0x66,0x66,0x66,0x7E,0x66,0x66,0x66,0x00}, // H
|
|---|
| | | {0x3C,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // I
|
|---|
| | | {0x0F,0x06,0x06,0x06,0x66,0x66,0x3C,0x00}, // J
|
|---|
| | | {0x73,0x33,0x36,0x3C,0x36,0x33,0x73,0x00}, // K
|
|---|
| | | {0x78,0x30,0x30,0x30,0x31,0x33,0x7F,0x00}, // L
|
|---|
| | | {0x63,0x77,0x7F,0x7F,0x6B,0x63,0x63,0x00}, // M
|
|---|
| | | {0x63,0x73,0x7B,0x6F,0x67,0x63,0x63,0x00}, // N
|
|---|
| | | {0x3E,0x63,0x63,0x63,0x63,0x63,0x3E,0x00}, // O
|
|---|
| | | {0x7E,0x33,0x33,0x3E,0x30,0x30,0x78,0x00}, // P 0x50
|
|---|
| | | {0x3C,0x66,0x66,0x66,0x6E,0x3C,0x0E,0x00}, // Q
|
|---|
| | | {0x7E,0x33,0x33,0x3E,0x36,0x33,0x73,0x00}, // R
|
|---|
| | | {0x3C,0x66,0x30,0x18,0x0C,0x66,0x3C,0x00}, // S
|
|---|
| | | {0x7E,0x5A,0x18,0x18,0x18,0x18,0x3C,0x00}, // T
|
|---|
| | | {0x66,0x66,0x66,0x66,0x66,0x66,0x7E,0x00}, // U
|
|---|
| | | {0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00}, // V
|
|---|
| | | {0x63,0x63,0x63,0x6B,0x7F,0x77,0x63,0x00}, // W
|
|---|
| | | {0x63,0x63,0x36,0x1C,0x1C,0x36,0x63,0x00}, // X
|
|---|
| | | {0x66,0x66,0x66,0x3C,0x18,0x18,0x3C,0x00}, // Y
|
|---|
| | | {0x7F,0x63,0x46,0x0C,0x19,0x33,0x7F,0x00}, // Z
|
|---|
| | | {0x3C,0x30,0x30,0x30,0x30,0x30,0x3C,0x00}, // [
|
|---|
| | | {0x60,0x30,0x18,0x0C,0x06,0x03,0x01,0x00}, // \ (back slash)
|
|---|
| | | {0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00}, // ]
|
|---|
| | | {0x08,0x1C,0x36,0x63,0x00,0x00,0x00,0x00}, // ^
|
|---|
| | | {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF}, // _
|
|---|
| | | {0x18,0x18,0x0C,0x00,0x00,0x00,0x00,0x00}, // ` 0x60
|
|---|
| | | {0x00,0x00,0x3C,0x06,0x3E,0x66,0x3B,0x00}, // a
|
|---|
| | | {0x70,0x30,0x3E,0x33,0x33,0x33,0x6E,0x00}, // b
|
|---|
| | | {0x00,0x00,0x3C,0x66,0x60,0x66,0x3C,0x00}, // c
|
|---|
| | | {0x0E,0x06,0x3E,0x66,0x66,0x66,0x3B,0x00}, // d
|
|---|
| | | {0x00,0x00,0x3C,0x66,0x7E,0x60,0x3C,0x00}, // e
|
|---|
| | | {0x1C,0x36,0x30,0x78,0x30,0x30,0x78,0x00}, // f
|
|---|
| | | {0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x7C}, // g
|
|---|
| | | {0x70,0x30,0x36,0x3B,0x33,0x33,0x73,0x00}, // h
|
|---|
| | | {0x18,0x00,0x38,0x18,0x18,0x18,0x3C,0x00}, // i
|
|---|
| | | {0x06,0x00,0x06,0x06,0x06,0x66,0x66,0x3C}, // j
|
|---|
| | | {0x70,0x30,0x33,0x36,0x3C,0x36,0x73,0x00}, // k
|
|---|
| | | {0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // l
|
|---|
| | | {0x00,0x00,0x66,0x7F,0x7F,0x6B,0x63,0x00}, // m
|
|---|
| | | {0x00,0x00,0x7C,0x66,0x66,0x66,0x66,0x00}, // n
|
|---|
| | | {0x00,0x00,0x3C,0x66,0x66,0x66,0x3C,0x00}, // o
|
|---|
| | | {0x00,0x00,0x6E,0x33,0x33,0x3E,0x30,0x78}, // p 0x70
|
|---|
| | | {0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x0F}, // q
|
|---|
| | | {0x00,0x00,0x6E,0x3B,0x33,0x30,0x78,0x00}, // r
|
|---|
| | | {0x00,0x00,0x3E,0x60,0x3C,0x06,0x7C,0x00}, // s
|
|---|
| | | {0x08,0x18,0x3E,0x18,0x18,0x1A,0x0C,0x00}, // t
|
|---|
| | | {0x00,0x00,0x66,0x66,0x66,0x66,0x3B,0x00}, // u
|
|---|
| | | {0x00,0x00,0x66,0x66,0x66,0x3C,0x18,0x00}, // v
|
|---|
| | | {0x00,0x00,0x63,0x6B,0x7F,0x7F,0x36,0x00}, // w
|
|---|
| | | {0x00,0x00,0x63,0x36,0x1C,0x36,0x63,0x00}, // x
|
|---|
| | | {0x00,0x00,0x66,0x66,0x66,0x3E,0x06,0x7C}, // y
|
|---|
| | | {0x00,0x00,0x7E,0x4C,0x18,0x32,0x7E,0x00}, // z
|
|---|
| | | {0x0E,0x18,0x18,0x70,0x18,0x18,0x0E,0x00}, // {
|
|---|
| | | {0x0C,0x0C,0x0C,0x00,0x0C,0x0C,0x0C,0x00}, // |
|
|---|
| | | {0x70,0x18,0x18,0x0E,0x18,0x18,0x70,0x00}, // }
|
|---|
| | | {0x3B,0x6E,0x00,0x00,0x00,0x00,0x00,0x00}, // ~
|
|---|
| | | {0x1C,0x36,0x36,0x1C,0x00,0x00,0x00,0x00}// DEL
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Font 10x14 table definition.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** Char set of font 10x14 */
|
|---|
| | | const uint8_t pCharset10x14[] = {
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
|
|---|
| | | 0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
|
|---|
| | | 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
|
|---|
| | | 0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
|
|---|
| | | 0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
|
|---|
| | | 0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
|
|---|
| | | 0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
|
|---|
| | | 0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
|
|---|
| | | 0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
|
|---|
| | | 0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
|
|---|
| | | 0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
|
|---|
| | | 0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
|
|---|
| | | 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
|
|---|
| | | 0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
|
|---|
| | | 0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
|
|---|
| | | 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
|
|---|
| | | 0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
|
|---|
| | | 0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
|
|---|
| | | 0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
|
|---|
| | | 0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
|
|---|
| | | 0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
|
|---|
| | | 0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
|
|---|
| | | 0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
|
|---|
| | | 0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
|
|---|
| | | 0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
|
|---|
| | | 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
|
|---|
| | | 0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
|
|---|
| | | 0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
|
|---|
| | | 0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
|
|---|
| | | 0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
|
|---|
| | | 0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
|
|---|
| | | 0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
|
|---|
| | | 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
|
|---|
| | | 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
|
|---|
| | | 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
|
|---|
| | | 0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
|
|---|
| | | 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
|
|---|
| | | 0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
|
|---|
| | | 0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
|
|---|
| | | 0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
|
|---|
| | | 0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
|
|---|
| | | 0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
|
|---|
| | | 0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
|
|---|
| | | 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
|
|---|
| | | 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
|
|---|
| | | 0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
|
|---|
| | | 0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
|
|---|
| | | 0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
|
|---|
| | | 0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
|
|---|
| | | 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
|
|---|
| | | 0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
|
|---|
| | | 0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
|
|---|
| | | 0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
|
|---|
| | | 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
|
|---|
| | | 0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
|
|---|
| | | 0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
|
|---|
| | | 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
|
|---|
| | | 0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
|
|---|
| | | 0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
|
|---|
| | | 0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
|
|---|
| | | 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
|
|---|
| | | 0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
|
|---|
| | | 0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
|
|---|
| | | 0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
|
|---|
| | | 0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
|
|---|
| | | 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
|
|---|
| | | 0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
|
|---|
| | | 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
|
|---|
| | | 0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
|
|---|
| | | 0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
|
|---|
| | | 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
|
|---|
| | | 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
|
|---|
| | | 0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
|
|---|
| | | 0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
|
|---|
| | | 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
|
|---|
| | | 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
|
|---|
| | | 0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
|
|---|
| | | 0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
|
|---|
| | | 0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
|
|---|
| | | 0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
|
|---|
| | | 0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
|
|---|
| | | 0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
|
|---|
| | | 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
|
|---|
| | | 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
|
|---|
| | | 0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
|
|---|
| | | 0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
|
|---|
| | | 0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
|
|---|
| | | 0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
|
|---|
| | | 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
|
|---|
| | | 0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
|
|---|
| | | 0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
|
|---|
| | | 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
|
|---|
| | | 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
|
|---|
| | | 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
|
|---|
| | | 0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
|
|---|
| | | 0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
|
|---|
| | | 0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
|
|---|
| | | 0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
|
|---|
| | | 0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
|
|---|
| | | 0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
|
|---|
| | | 0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
|
|---|
| | | 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
|
|---|
| | | 0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
|
|---|
| | | 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
|
|---|
| | | 0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
|
|---|
| | | 0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
|
|---|
| | | 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
|
|---|
| | | 0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
|
|---|
| | | 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
|
|---|
| | | 0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
|
|---|
| | | 0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
|
|---|
| | | 0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
|
|---|
| | | 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
|
|---|
| | | 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
|
|---|
| | | 0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
|
|---|
| | | 0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
|
|---|
| | | 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
|
|---|
| | | 0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
|
|---|
| | | 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
|
|---|
| | | 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
|
|---|
| | | 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
|
|---|
| | | } ;
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Font 10x14 table definition.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef _LCD_FONT_10x14_
|
|---|
| | | #define _LCD_FONT_10x14_
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | | /** Char set of font 10x14 */
|
|---|
| | | extern const uint8_t pCharset10x14[] ;
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | | #endif /* #ifdef _LCD_FONT_10x14_ */
|
|---|
| New file |
| | |
|---|
| | | #ifndef _GIMP_IMAGE_
|
|---|
| | | #define _GIMP_IMAGE_
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | |
|
|---|
| | | typedef struct _SGIMPImage
|
|---|
| | | {
|
|---|
| | | uint32_t dwWidth;
|
|---|
| | | uint32_t dwHeight;
|
|---|
| | | uint32_t dwBytes_per_pixel; /* 3:RGB, 4:RGBA */ |
|---|
| | | uint8_t* pucPixel_data ;
|
|---|
| | | } SGIMPImage ;
|
|---|
| | |
|
|---|
| | | #endif // _GIMP_IMAGE_
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Implementation of ILI9325 driver.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | #include <string.h>
|
|---|
| | | #include <stdio.h>
|
|---|
| | | #include <stdint.h>
|
|---|
| | | #include "lcd_r61509v.h"
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | | #include "stm32f10x_fsmc.h"
|
|---|
| | | #include "stm32v5_systick.h"
|
|---|
| | | #include "lcd_r61509v.h"
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Local variables
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /* Pixel cache used to speed up communication */
|
|---|
| | | #define LCD_DATA_CACHE_SIZE BOARD_LCD_WIDTH
|
|---|
| | | static LcdColor_t gLcdPixelCache[LCD_DATA_CACHE_SIZE];
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* ³õʼ»¯LCDËùʹÓõĹܽÅΪGPIOģʽ»òFSMCģʽ */
|
|---|
| | | static void lcd_gpio_init(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure;
|
|---|
| | | |
|---|
| | | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); /* ʹÄÜFSMCÍâÉèʱÖÓ */
|
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD|RCC_APB2Periph_GPIOE, ENABLE); /* ʹÄÜLCD±³¹âºÍ¸´Î»¹Ü½ÅʱÖÓ */
|
|---|
| | |
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|---|
| | |
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; /* LCD±³¹â¿ØÖ¹¹Ü½Å PD13 */ |
|---|
| | | GPIO_Init(GPIOD, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 ; /* LCD¸´Î»¿ØÖƹܽŠPE1 */ |
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | /* ¸´ÓÃGPIODµÄGPIO¶Ë¿ÚΪFSMCģʽ,²Î¿¼datasheet <Table 5. High-density STM32F103xx pin definitions> */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14 /* PD14 - D0 */
|
|---|
| | | | GPIO_Pin_15 /* PD15 - D1 */ |
|---|
| | | | GPIO_Pin_0 /* PD0 - D2 */ |
|---|
| | | | GPIO_Pin_1 /* PD1 - D3 */
|
|---|
| | | | GPIO_Pin_8 /* PD8 - D13 */
|
|---|
| | | | GPIO_Pin_9 /* PD9 - D14 */
|
|---|
| | | | GPIO_Pin_10 /* PD10 - D15 */ |
|---|
| | | | GPIO_Pin_4 /* PD4 - nOE Êä³öʹÄÜ */
|
|---|
| | | | GPIO_Pin_5 /* PD5 - nEW дʹÄÜ */ |
|---|
| | | | GPIO_Pin_7 /* PD7 - FSMC_NE1 LCDƬѡ */
|
|---|
| | | | GPIO_Pin_11; /* PD11 - A16(LCD RS) LCDÖ¸Áî/Êý¾ÝÇл» */ |
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|---|
| | | GPIO_Init(GPIOD, &GPIO_InitStructure); |
|---|
| | |
|
|---|
| | | /* ¸´ÓÃGPIOEµÄGPIO¶Ë¿ÚΪFSMCģʽ,²Î¿¼datasheet <Table 5. High-density STM32F103xx pin definitions> */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 /* PE7 - D4 */
|
|---|
| | | | GPIO_Pin_8 /* PE8 - D5 */
|
|---|
| | | | GPIO_Pin_9 /* PE9 - D6 */
|
|---|
| | | | GPIO_Pin_10 /* PE10 - D7 */ |
|---|
| | | | GPIO_Pin_11 /* PE11 - D8 */
|
|---|
| | | | GPIO_Pin_12 /* PE12 - D9 */
|
|---|
| | | | GPIO_Pin_13 /* PE13 - D10 */
|
|---|
| | | | GPIO_Pin_14 /* PE14 - D11 */
|
|---|
| | | | GPIO_Pin_15; /* PE15 - D12 */ |
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure); |
|---|
| | | |
|---|
| | | /* ´ò¿ªLCD±³¹â */
|
|---|
| | | GPIO_SetBits(GPIOD, GPIO_Pin_13);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* ³õʼ»¯FSMC¹¤×÷ģʽ¼°ÆäÅäÖà */
|
|---|
| | | static void lcd_fsmc_init(void)
|
|---|
| | | {
|
|---|
| | | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
|---|
| | | FSMC_NORSRAMTimingInitTypeDef p;
|
|---|
| | | |
|---|
| | | /* FSMC½Ó¿ÚÌØÐÔÅäÖòÎÊý,¶ÔÏÂÃæ¸÷³ÉÔ±¸³µÄÖµX±íʾX¸öʱÖÓÖÜÆÚ£¬ËüµÄʱÖÓÊÇÓÉHCLK¾¹ý
|
|---|
| | | FSMC_CLKDivisionÉèÖõķÖƵ²ÎÊý·ÖƵºóµÃµ½¡£*/
|
|---|
| | | p.FSMC_AddressSetupTime = 0x02; /* µØÖ·½¨Á¢Ê±¼ä */
|
|---|
| | | p.FSMC_AddressHoldTime = 0x00; /* µØÖ·±£³Öʱ¼ä */
|
|---|
| | | p.FSMC_DataSetupTime = 0x05; /* Êý¾Ý½¨Á¢Ê±¼ä */
|
|---|
| | | p.FSMC_DataLatency = 0x00; /* Êý¾Ý±£³Öʱ¼ä */ |
|---|
| | | p.FSMC_BusTurnAroundDuration = 0x00;/* ×ÜÏ߻ָ´Ê±¼ä */
|
|---|
| | | p.FSMC_CLKDivision = 0x00; /* ʱÖÓ·ÖƵ */
|
|---|
| | | /*FSMC_AccessMode: ÔÚµØÖ·Ïß²»¸´ÓõÄÇé¿öÏ£¬ABCDģʽµÄÇø±ð²»´ó¡£¸ÃÅäÖÃÖ»ÔÚÀ©Õ¹Ä£Ê½ÓÐЧ */ |
|---|
| | | p.FSMC_AccessMode = FSMC_AccessMode_B; |
|---|
| | | |
|---|
| | | /* LCDµÄCSÁ¬µÄPD7(NE1),ËùÒÔÎÒÃÇʹÓõÄÊÇNorflashµÄBank1 */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
|
|---|
| | | /* PD11Á¬µØÖ·ÏßA16, ʵ¼ÊÉÏֻʹÓÃÁËÒ»ÌõµØÖ·Ïߣ¬ÒòΪI/O×ÊÔ´²»½ôÕÅ£¬ËùÒÔÅäÖõØÖ·ÏߺÍÊý¾ÝÏß²»¸´Óà */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
|
|---|
| | | /* ´æ´¢Æ÷ÀàÐÍΪNorflashÀàÐÍ,ËüµÄʱÐòÓë8080×ÜÏ߸ü½Ó½ü,¸ÃÅäÖû¹¿ÉÒÔΪPSRAMºÎSRAMģʽ.*/
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
|
|---|
| | | /* Êý¾Ýλ¿íΪ16λ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
|
|---|
| | | /* ʹÓÃÒ첽дģʽ£¬½ûֹͻ·¢Ä£Ê½£»8080×ÜÏ߸üÊʺÏÒ첽ģʽ¡£ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
|
|---|
| | | /* ±¾³ÉÔ±Ö»ÔÚÍ»·¢Ä£Ê½ÏÂÓÐЧ£¬µÈ´ýÐźż«ÐÔΪµÍ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
|
|---|
| | | /* ±¾³ÉÔ±Ö»ÔÚÍ»·¢Ä£Ê½ÏÂÓÐЧ£¬½ûÖ¹·Ç¶ÔÆëÍ»·¢Ä£Ê½ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
|
|---|
| | | /* ±¾³ÉÔ±Ö»ÔÚÍ»·¢Ä£Ê½ÏÂÓÐЧ£¬NWAITÐźÅÔÚʲôʱÆÚ²úÉú */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
|
|---|
| | | /* ±¾³ÉÔ±Ö»ÔÚÍ»·¢Ä£Ê½ÏÂÓÐЧ£¬½ûÓÃNWAITÐźŠ*/
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|---|
| | | /* ±¾³ÉÔ±Ö»ÔÚÍ»·¢Ä£Ê½ÏÂÓÐЧ£¬½ûֹͻ·¢Ð´²Ù×÷ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|---|
| | | |
|---|
| | | /* дʹÄÜ£¬Èç¹û½ûÖ¹ÁËд²Ù×÷£¬FSMC²»»á²úÉúдʱÐò£¬µ«¿ÉÒÔ¶Á³öÊý¾Ý */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
|
|---|
| | | /* ½ûÖ¹À©Õ¹Ä£Ê½£¬À©Õ¹Ä£Ê½¿ÉÒÔʹÓöÀÁ¢µÄ¶Á¡¢Ð´Ä£Ê½ */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
|
|---|
| | |
|
|---|
| | | /* ÅäÖöÁдʱÐò£¡Èç¹ûʹÓÃÁËÀ©Õ¹Ä£Ê½£¬ÔòÇ°ÕßÅäÖõÄÊǶÁʱÐò£¬ºóÕßÅäÖõÄÊÇдʱÐò¡£
|
|---|
| | | * Èç¹û½ûÖ¹ÁËÀ©Õ¹Ä£Ê½£¬Ôò¶ÁдʱÐò¶¼Ê¹ÓÃFSMC_ReadWriteTimingStruct½á¹¹ÌåÖеIJÎÊý¡£
|
|---|
| | | */
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
|
|---|
| | | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
|
|---|
| | |
|
|---|
| | | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|---|
| | | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); /* ʹÄÜFSMC Bank1_SRAM Bank */
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void lcd_reset(void)
|
|---|
| | | {
|
|---|
| | | GPIO_ResetBits(GPIOE, GPIO_Pin_1); /* PE1 ΪLCD ¸´Î»ÐźŠ*/
|
|---|
| | | msleep(500); |
|---|
| | | GPIO_SetBits(GPIOE, GPIO_Pin_1); |
|---|
| | | msleep(500);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Export functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write data to LCD Register.
|
|---|
| | | *
|
|---|
| | | * \param reg Register address.
|
|---|
| | | * \param data Data to be written.
|
|---|
| | | */
|
|---|
| | | void LCD_WriteReg( uint16_t reg, uint16_t data )
|
|---|
| | | {
|
|---|
| | | LCD_IR() = 0;
|
|---|
| | | LCD_IR() = reg;
|
|---|
| | | LCD_D() = data;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Read data from LCD Register.
|
|---|
| | | *
|
|---|
| | | * \param reg Register address.
|
|---|
| | | *
|
|---|
| | | * \return Readed data.
|
|---|
| | | */
|
|---|
| | | uint16_t LCD_ReadReg( uint16_t reg )
|
|---|
| | | {
|
|---|
| | | uint16_t value;
|
|---|
| | | |
|---|
| | | LCD_IR() = 0;
|
|---|
| | | LCD_IR() = reg;
|
|---|
| | | value = LCD_D();
|
|---|
| | |
|
|---|
| | | return value;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write two byte to LCD GRAM.
|
|---|
| | | *
|
|---|
| | | * \param color 16-bits RGB color.
|
|---|
| | | */
|
|---|
| | | extern void LCD_WriteRAMWord( uint16_t wColor )
|
|---|
| | | {
|
|---|
| | | LCD_D() = wColor ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Prepare to write GRAM data.
|
|---|
| | | */
|
|---|
| | | extern void LCD_WriteRAM_Prepare( void )
|
|---|
| | | {
|
|---|
| | | LCD_IR() = 0 ;
|
|---|
| | | LCD_IR() = R61509V_R202H ; /* Write Data to GRAM (R202h) */
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write data to LCD GRAM.
|
|---|
| | | *
|
|---|
| | | * \param color 16-bits RGB color.
|
|---|
| | | */
|
|---|
| | | extern void LCD_WriteRAM( LcdColor_t wColor )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAMWord(wColor);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write mutiple data in buffer to LCD controller.
|
|---|
| | | *
|
|---|
| | | * \param pBuf data buffer.
|
|---|
| | | * \param size size in pixels.
|
|---|
| | | */
|
|---|
| | | static void LCD_WriteRAMBuffer(const LcdColor_t *pBuf, uint32_t size)
|
|---|
| | | {
|
|---|
| | | uint32_t addr ;
|
|---|
| | |
|
|---|
| | | for ( addr = 0 ; addr < size ; addr++ )
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAM(pBuf[addr]);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Prepare to read GRAM data.
|
|---|
| | | */
|
|---|
| | | extern void LCD_ReadRAM_Prepare( void )
|
|---|
| | | {
|
|---|
| | | LCD_IR() = 0 ;
|
|---|
| | | LCD_IR() = R61509V_R202H ; /* Read Data from GRAM (R202h) */
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Read data to LCD GRAM.
|
|---|
| | | *
|
|---|
| | | * \note Because pixel data LCD GRAM is 18-bits, so convertion to RGB 24-bits
|
|---|
| | | * will cause low color bit lose.
|
|---|
| | | *
|
|---|
| | | * \return color 24-bits RGB color.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_ReadRAM( void )
|
|---|
| | | {
|
|---|
| | | uint16_t color;
|
|---|
| | |
|
|---|
| | | color = LCD_D(); /* dummy read */
|
|---|
| | | color = LCD_D(); /* data */
|
|---|
| | |
|
|---|
| | | return color;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Basic R61509V primitives
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Check Box coordinates. Return upper left and bottom right coordinates.
|
|---|
| | | *
|
|---|
| | | * \param pX1 X-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param pY1 Y-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param pX2 X-coordinate of lower-right corner on LCD.
|
|---|
| | | * \param pY2 Y-coordinate of lower-right corner on LCD.
|
|---|
| | | */
|
|---|
| | | static void CheckBoxCoordinates( uint32_t *pX1, uint32_t *pY1, uint32_t *pX2, uint32_t *pY2 )
|
|---|
| | | {
|
|---|
| | | uint32_t dw;
|
|---|
| | |
|
|---|
| | | if ( *pX1 >= BOARD_LCD_WIDTH )
|
|---|
| | | {
|
|---|
| | | *pX1 = BOARD_LCD_WIDTH-1 ;
|
|---|
| | | }
|
|---|
| | | if ( *pX2 >= BOARD_LCD_WIDTH )
|
|---|
| | | {
|
|---|
| | | *pX2 = BOARD_LCD_WIDTH-1 ;
|
|---|
| | | }
|
|---|
| | | if ( *pY1 >= BOARD_LCD_HEIGHT )
|
|---|
| | | {
|
|---|
| | | *pY1 = BOARD_LCD_HEIGHT-1 ;
|
|---|
| | | }
|
|---|
| | | if ( *pY2 >= BOARD_LCD_HEIGHT )
|
|---|
| | | {
|
|---|
| | | *pY2 = BOARD_LCD_HEIGHT-1 ;
|
|---|
| | | }
|
|---|
| | | if (*pX1 > *pX2)
|
|---|
| | | {
|
|---|
| | | dw = *pX1;
|
|---|
| | | *pX1 = *pX2;
|
|---|
| | | *pX2 = dw;
|
|---|
| | | }
|
|---|
| | | if (*pY1 > *pY2)
|
|---|
| | | {
|
|---|
| | | dw = *pY1;
|
|---|
| | | *pY1 = *pY2;
|
|---|
| | | *pY2 = dw;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Initialize the LCD controller.
|
|---|
| | | */
|
|---|
| | | uint32_t LCD_Initialize( void )
|
|---|
| | | {
|
|---|
| | | uint16_t chipid ;
|
|---|
| | | |
|---|
| | | lcd_gpio_init(); /* ³õʼ»¯LCDʹÓõ½µÄ¹Ü½Å */
|
|---|
| | | lcd_fsmc_init(); /* ³õʼ»¯FSMCÅäÖà */
|
|---|
| | | lcd_reset();
|
|---|
| | |
|
|---|
| | | /* Check R61509V chipid */
|
|---|
| | | chipid = LCD_ReadReg( R61509V_R000H ) ; /* Driver Code Read (R000h) */
|
|---|
| | | if ( chipid != R61509V_DEVICE_CODE )
|
|---|
| | | {
|
|---|
| | | //printf( "Read R61509V chip ID (0x%04x) error, skip initialization.\r\n", chipid ) ;
|
|---|
| | | return 1 ;
|
|---|
| | | } |
|---|
| | |
|
|---|
| | | /* Register settins reference to R61509 LCD drvier datasheet <CPT 3.0¡±(C030JB) Initial Code> */
|
|---|
| | | |
|---|
| | | /* Device Code Read */
|
|---|
| | | LCD_WriteReg(R61509V_R000H, 0x0000);
|
|---|
| | | LCD_WriteReg(R61509V_R000H, 0x0000);
|
|---|
| | | LCD_WriteReg(R61509V_R000H, 0x0000);
|
|---|
| | | LCD_WriteReg(R61509V_R000H, 0x0000);
|
|---|
| | | |
|---|
| | | msleep(10);
|
|---|
| | | |
|---|
| | | /* Base Image Number of Line */
|
|---|
| | | LCD_WriteReg(R61509V_R400H, 0x6200); |
|---|
| | | /* Display Control 2 */
|
|---|
| | | LCD_WriteReg(R61509V_R008H, 0x0808); |
|---|
| | | |
|---|
| | | /* Gamma Control settings */
|
|---|
| | | LCD_WriteReg(R61509V_R300H, 0x0C00);
|
|---|
| | | LCD_WriteReg(R61509V_R301H, 0x5A0B);
|
|---|
| | | LCD_WriteReg(R61509V_R302H, 0x0906);
|
|---|
| | | LCD_WriteReg(R61509V_R303H, 0x1017);
|
|---|
| | | LCD_WriteReg(R61509V_R304H, 0x2300);
|
|---|
| | | LCD_WriteReg(R61509V_R305H, 0x1700);
|
|---|
| | | LCD_WriteReg(R61509V_R306H, 0x6309);
|
|---|
| | | LCD_WriteReg(R61509V_R307H, 0x0C09);
|
|---|
| | | LCD_WriteReg(R61509V_R308H, 0x100C);
|
|---|
| | | LCD_WriteReg(R61509V_R309H, 0x2232);
|
|---|
| | | |
|---|
| | | /* Panel Interface Control settings */
|
|---|
| | | LCD_WriteReg(R61509V_R010H, 0x0016);//69.5Hz
|
|---|
| | | LCD_WriteReg(R61509V_R011H, 0x0101);//
|
|---|
| | | LCD_WriteReg(R61509V_R012H, 0x0000);//
|
|---|
| | | LCD_WriteReg(R61509V_R013H, 0x0001);//
|
|---|
| | | |
|---|
| | | /* Power Control settings */
|
|---|
| | | LCD_WriteReg(R61509V_R100H, 0x0330);//BT,AP
|
|---|
| | | LCD_WriteReg(R61509V_R101H, 0x0237);//DC0,DC1,VC
|
|---|
| | | LCD_WriteReg(R61509V_R103H, 0x0F00);//VDV
|
|---|
| | | |
|---|
| | | LCD_WriteReg(R61509V_R280H, 0x6100);//VCM
|
|---|
| | | LCD_WriteReg(R61509V_R102H, 0xC1B0);//VRH[11000],VCMR[1],PSON,PON[11]
|
|---|
| | | msleep(10);
|
|---|
| | |
|
|---|
| | | LCD_WriteReg(R61509V_R001H, 0x00100);
|
|---|
| | | LCD_WriteReg(R61509V_R002H, 0x00100);
|
|---|
| | | LCD_WriteReg(R61509V_R003H, 0x01030);
|
|---|
| | | LCD_WriteReg(R61509V_R009H, 0x00001);
|
|---|
| | | LCD_WriteReg(R61509V_R00CH, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R090H, 0x08000);
|
|---|
| | | LCD_WriteReg(R61509V_R00FH, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R210H, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R211H, 0x000EF);
|
|---|
| | | LCD_WriteReg(R61509V_R212H, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R213H, 0x0018F);//432=1AF, 400=18F
|
|---|
| | | LCD_WriteReg(R61509V_R500H, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R501H, 0x00000);
|
|---|
| | | LCD_WriteReg(R61509V_R502H, 0x0005F);
|
|---|
| | | |
|---|
| | | LCD_WriteReg(R61509V_R401H, 0x00001);
|
|---|
| | | LCD_WriteReg(R61509V_R404H, 0x00000);
|
|---|
| | | msleep(100);
|
|---|
| | |
|
|---|
| | | LCD_WriteReg(R61509V_R007H, 0x00100);//BASEE
|
|---|
| | | msleep(100);
|
|---|
| | |
|
|---|
| | | LCD_WriteReg(R61509V_R200H, 0x00000); /* Horizontal GRAM Address Set */
|
|---|
| | | LCD_WriteReg(R61509V_R201H, 0x00000); /* Vertical GRAM Address Set */
|
|---|
| | | |
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
|
|---|
| | | LCD_SetCursor( 0, 0 ) ;
|
|---|
| | | |
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Turn on the LCD.
|
|---|
| | | */
|
|---|
| | | extern void LCD_On( void )
|
|---|
| | | {
|
|---|
| | | uint16_t Reg;
|
|---|
| | |
|
|---|
| | | /* Display Control 1 (R007h) When BASEE = 1 the base image is displayed. */
|
|---|
| | | Reg = LCD_ReadReg( R61509V_R007H );
|
|---|
| | | LCD_WriteReg( R61509V_R007H, Reg|R61509V_R007H_BASEE ) ;
|
|---|
| | |
|
|---|
| | | Reg = LCD_ReadReg( R61509V_R102H );
|
|---|
| | | LCD_WriteReg(R61509V_R102H, Reg|R61509V_R102H_PSON|R61509V_R102H_PON);//PSON[1],PON[1]
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Turn off the LCD.
|
|---|
| | | */
|
|---|
| | | extern void LCD_Off( void )
|
|---|
| | | {
|
|---|
| | | uint16_t Reg;
|
|---|
| | | Reg = LCD_ReadReg( R61509V_R007H );
|
|---|
| | | |
|---|
| | | /* Display Control 1 (R007h) When BASEE = 0 No base image is displayed. */
|
|---|
| | | LCD_WriteReg( R61509V_R007H, (Reg & ~R61509V_R007H_BASEE) ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Power down the LCD.
|
|---|
| | | */
|
|---|
| | | extern void LCD_PowerDown( void )
|
|---|
| | | {
|
|---|
| | | uint16_t Reg;
|
|---|
| | | |
|---|
| | | LCD_Off();
|
|---|
| | |
|
|---|
| | | Reg = LCD_ReadReg( R61509V_R102H );
|
|---|
| | | LCD_WriteReg(R61509V_R102H, Reg&(~(R61509V_R102H_PSON|R61509V_R102H_PON)) );//PSON[0],PON[0] |
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Convert 24 bit RGB color into 5-6-5 rgb color space.
|
|---|
| | | *
|
|---|
| | | * Initialize the LcdColor_t cache with the color pattern.
|
|---|
| | | * \param x 24-bits RGB color.
|
|---|
| | | * \return 0 for successfull operation.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_SetColor( uint32_t dwRgb24Bits )
|
|---|
| | | {
|
|---|
| | | uint32_t i ;
|
|---|
| | |
|
|---|
| | | /* Fill the cache with selected color */
|
|---|
| | | for ( i = 0 ; i < LCD_DATA_CACHE_SIZE ; ++i )
|
|---|
| | | {
|
|---|
| | | gLcdPixelCache[i] = dwRgb24Bits ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Set cursor of LCD srceen.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param y Y-coordinate of upper-left corner on LCD.
|
|---|
| | | */
|
|---|
| | | extern void LCD_SetCursor( uint16_t x, uint16_t y )
|
|---|
| | | {
|
|---|
| | | /* GRAM Horizontal/Vertical Address Set (R20h, R21h) */
|
|---|
| | | LCD_WriteReg( R61509V_R200H, x ) ; /* column */
|
|---|
| | | LCD_WriteReg( R61509V_R201H, y ) ; /* row */
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern void LCD_SetWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight )
|
|---|
| | | {
|
|---|
| | | /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */
|
|---|
| | |
|
|---|
| | | /* Set Horizontal Address Start Position */
|
|---|
| | | LCD_WriteReg( R61509V_R210H, (uint16_t)dwX ) ;
|
|---|
| | |
|
|---|
| | | /* Set Horizontal Address End Position */
|
|---|
| | | LCD_WriteReg( R61509V_R211H, (uint16_t)dwX+dwWidth-1 ) ;
|
|---|
| | |
|
|---|
| | | /* Set Vertical Address Start Position */
|
|---|
| | | LCD_WriteReg( R61509V_R212H, (uint16_t)dwY ) ;
|
|---|
| | |
|
|---|
| | | /* Set Vertical Address End Position */
|
|---|
| | | LCD_WriteReg( R61509V_R213H, (uint16_t)dwY+dwHeight-1 ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern void LCD_SetDisplayLandscape( uint32_t dwRGB )
|
|---|
| | | {
|
|---|
| | | uint16_t dwValue ;
|
|---|
| | |
|
|---|
| | | /* When AM = ?? the address is updated in vertical writing direction. */
|
|---|
| | | /* DFM Set the mode of transferring data to the internal RAM when TRI = ?? */
|
|---|
| | | /* When TRI = ?? data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */
|
|---|
| | | /* Use the high speed write mode (HWM=1) */
|
|---|
| | | /* ORG = ?? The original address ?0000h?moves according to the I/D[1:0] setting. */
|
|---|
| | | /* I/D[1:0] = 00 Horizontal : decrement Vertical : decrement, AM=0:Horizontal */
|
|---|
| | | dwValue = R61509V_R003H_AM | R61509V_R003H_DFM | R61509V_R003H_TRI | R61509V_R003H_ORG ;
|
|---|
| | |
|
|---|
| | | if ( dwRGB == 0 )
|
|---|
| | | {
|
|---|
| | | /* BGR=?? Swap the RGB data to BGR in writing into GRAM. */
|
|---|
| | | dwValue |= R61509V_R003H_BGR ;
|
|---|
| | | }
|
|---|
| | | LCD_WriteReg( R61509V_R003H, dwValue ) ;
|
|---|
| | |
|
|---|
| | | // LCD_WriteReg( ILI9325_R60H, (0x1d<<8)|0x00 ) ; /*Gate Scan Control */
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_HEIGHT, BOARD_LCD_WIDTH ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern void LCD_SetDisplayPortrait( uint16_t wRGB )
|
|---|
| | | {
|
|---|
| | | uint16_t dwValue ;
|
|---|
| | |
|
|---|
| | | /* Use the high speed write mode (HWM=1) */
|
|---|
| | | /* When TRI = 1 data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */
|
|---|
| | | /* DFM=0: 18bpp (R:G:B = 6:6:6), DFM=1: 16bpp (R:G:B = 5:6:5) */
|
|---|
| | | /* I/D[1:0] = 11 Horizontal : increment Vertical : increment, AM=0:Horizontal */
|
|---|
| | | dwValue = R61509V_R003H_DFM | R61509V_R003H_ID1 | R61509V_R003H_ID0 ;
|
|---|
| | |
|
|---|
| | | if ( wRGB == MODE_BGR )
|
|---|
| | | {
|
|---|
| | | /* BGR=?? Swap the RGB data to BGR in writing into GRAM. */
|
|---|
| | | dwValue |= R61509V_R003H_BGR ;
|
|---|
| | | }
|
|---|
| | | LCD_WriteReg( R61509V_R003H, dwValue ) ;
|
|---|
| | | |
|---|
| | | /* Gate Scan Control (R400h, R401h, R404h) */
|
|---|
| | | /* SCN[5:0]->bit[6:1] = 00 */
|
|---|
| | | /* NL[5:0]->bit[14:9] = 0x27: Sets the number of lines to drive the LCD at an interval of 8 lines. */
|
|---|
| | | //LCD_WriteReg( R61509V_R400H, R61509V_R400H_GS|(0x27<<9)|0x00 ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | extern void LCD_VerticalScroll( uint16_t wY )
|
|---|
| | | {
|
|---|
| | | /* Gate Scan Control (R400h, R401h, R404h) */
|
|---|
| | | /* Enables the grayscale inversion of the image by setting REV=1. */
|
|---|
| | | /* VLE[1]: Vertical scroll display enable bit */
|
|---|
| | | LCD_WriteReg( R61509V_R401H, 3 ) ;
|
|---|
| | | LCD_WriteReg( R61509V_R404H, wY ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | extern void LCD_SetPartialImage1( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd )
|
|---|
| | | {
|
|---|
| | | if( dwStart <= dwEnd ) |
|---|
| | | return;
|
|---|
| | |
|
|---|
| | | /* Partial Image 1 Display Position (R500h) */
|
|---|
| | | LCD_WriteReg( R61509V_R500H, dwDisplayPos&0x1ff ) ;
|
|---|
| | | /* Partial Image 1 RAM Start/End Address (R501h, R502h) */
|
|---|
| | | LCD_WriteReg( R61509V_R501H, dwStart&0x1ff ) ;
|
|---|
| | | LCD_WriteReg( R61509V_R502H, dwEnd&0x1ff ) ;
|
|---|
| | |
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern void LCD_EnablePartialImage1( uint32_t OnOff )
|
|---|
| | | {
|
|---|
| | | uint16_t Reg;
|
|---|
| | |
|
|---|
| | | Reg = LCD_ReadReg( R61509V_R007H );
|
|---|
| | | LCD_WriteReg( R61509V_R007H, (Reg & ~R61509V_R007H_BASEE) | R61509V_R007H_PTDE ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draw a LcdColor_t on LCD of given color.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of pixel.
|
|---|
| | | * \param y Y-coordinate of pixel.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_DrawPixel( uint32_t x, uint32_t y )
|
|---|
| | | {
|
|---|
| | | if( (x >= BOARD_LCD_WIDTH) || (y >= BOARD_LCD_HEIGHT) )
|
|---|
| | | {
|
|---|
| | | return 1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set cursor */
|
|---|
| | | LCD_SetCursor( x, y );
|
|---|
| | |
|
|---|
| | | /* Prepare to write in GRAM */
|
|---|
| | | LCD_WriteRAM_Prepare();
|
|---|
| | | LCD_WriteRAM( *gLcdPixelCache );
|
|---|
| | |
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | extern void LCD_TestPattern( uint32_t dwRGB )
|
|---|
| | | {
|
|---|
| | | uint32_t dwLine ;
|
|---|
| | | uint32_t dw ;
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( 10, 10, 100, 20 ) ;
|
|---|
| | | LCD_SetCursor( 10, 10 ) ;
|
|---|
| | | LCD_WriteRAM_Prepare() ;
|
|---|
| | |
|
|---|
| | | for ( dwLine=0 ; dwLine < 20 ; dwLine++ )
|
|---|
| | | {
|
|---|
| | | /* Draw White bar */
|
|---|
| | | for ( dw=0 ; dw < 20 ; dw++ )
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | }
|
|---|
| | | /* Draw Red bar */
|
|---|
| | | for ( dw=0 ; dw < 20 ; dw++ )
|
|---|
| | | {
|
|---|
| | | if ( dwRGB == 0 )
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | /* Draw Green bar */
|
|---|
| | | for ( dw=0 ; dw < 20 ; dw++ )
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | }
|
|---|
| | | /* Draw Blue bar */
|
|---|
| | | for ( dw=0 ; dw < 20 ; dw++ )
|
|---|
| | | {
|
|---|
| | | if ( dwRGB == 0 )
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0xff ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | /* Draw Black bar */
|
|---|
| | | for ( dw=0 ; dw < 20 ; dw++ )
|
|---|
| | | {
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | LCD_D() = 0x00 ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write several pixels with the same color to LCD GRAM.
|
|---|
| | | *
|
|---|
| | | * LcdColor_t color is set by the LCD_SetColor() function.
|
|---|
| | | * This function is optimized using an sram buffer to transfer block instead of
|
|---|
| | | * individual pixels in order to limit the number of SPI interrupts.
|
|---|
| | | * \param dwX1 X-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param dwY1 Y-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param dwX2 X-coordinate of lower-right corner on LCD.
|
|---|
| | | * \param dwY2 Y-coordinate of lower-right corner on LCD.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 )
|
|---|
| | | {
|
|---|
| | | uint32_t size, blocks;
|
|---|
| | |
|
|---|
| | | /* Swap coordinates if necessary */
|
|---|
| | | CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2);
|
|---|
| | |
|
|---|
| | | /* Determine the refresh window area */
|
|---|
| | | /* Horizontal and Vertical RAM Address Position (R210h, R211h, R212h, R213h) */
|
|---|
| | | LCD_WriteReg(R61509V_R210H, (uint16_t)dwX1);
|
|---|
| | | LCD_WriteReg(R61509V_R211H, (uint16_t)dwX2);
|
|---|
| | | LCD_WriteReg(R61509V_R212H, (uint16_t)dwY1);
|
|---|
| | | LCD_WriteReg(R61509V_R213H, (uint16_t)dwY2);
|
|---|
| | |
|
|---|
| | | /* Set cursor */
|
|---|
| | | LCD_SetCursor( dwX1, dwY1 );
|
|---|
| | |
|
|---|
| | | /* Prepare to write in GRAM */
|
|---|
| | | LCD_WriteRAM_Prepare();
|
|---|
| | |
|
|---|
| | | size = (dwX2 - dwX1 + 1) * (dwY2 - dwY1 + 1);
|
|---|
| | | /* Send pixels blocks => one SPI IT / block */
|
|---|
| | | blocks = size / LCD_DATA_CACHE_SIZE;
|
|---|
| | | while (blocks--)
|
|---|
| | | {
|
|---|
| | | LCD_WriteRAMBuffer(gLcdPixelCache, LCD_DATA_CACHE_SIZE);
|
|---|
| | | }
|
|---|
| | | /* Send remaining pixels */
|
|---|
| | | LCD_WriteRAMBuffer(gLcdPixelCache, size % LCD_DATA_CACHE_SIZE);
|
|---|
| | |
|
|---|
| | | /* Reset the refresh window area */
|
|---|
| | | /* Horizontal and Vertical RAM Address Position (R210h, R211h, R212h, R213h) */
|
|---|
| | | LCD_WriteReg(R61509V_R210H, (uint16_t)0 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R211H, (uint16_t)BOARD_LCD_WIDTH - 1 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R212H, (uint16_t)0) ;
|
|---|
| | | LCD_WriteReg(R61509V_R213H, (uint16_t)BOARD_LCD_HEIGHT - 1 ) ;
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Write several pixels pre-formatted in a bufer to LCD GRAM.
|
|---|
| | | *
|
|---|
| | | * \param dwX1 X-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param dwY1 Y-coordinate of upper-left corner on LCD.
|
|---|
| | | * \param dwX2 X-coordinate of lower-right corner on LCD.
|
|---|
| | | * \param dwY2 Y-coordinate of lower-right corner on LCD.
|
|---|
| | | * \param pBuffer LcdColor_t buffer area.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const LcdColor_t *pBuffer )
|
|---|
| | | {
|
|---|
| | | uint32_t size;
|
|---|
| | |
|
|---|
| | | /* Swap coordinates if necessary */
|
|---|
| | | CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2);
|
|---|
| | |
|
|---|
| | | /* Determine the refresh window area */
|
|---|
| | | /* Horizontal and Vertical RAM Address Position (R210h, R211h, R212h, R213h) */
|
|---|
| | | LCD_WriteReg(R61509V_R210H, (uint16_t)dwX1 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R211H, (uint16_t)dwX2 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R212H, (uint16_t)dwY1 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R213H, (uint16_t)dwY2 ) ;
|
|---|
| | |
|
|---|
| | | /* Set cursor */
|
|---|
| | | LCD_SetCursor( dwX1, dwY1 );
|
|---|
| | |
|
|---|
| | | /* Prepare to write in GRAM */
|
|---|
| | | LCD_WriteRAM_Prepare();
|
|---|
| | |
|
|---|
| | | size = (dwX2 - dwX1 + 1) * (dwY2 - dwY1 + 1);
|
|---|
| | |
|
|---|
| | | LCD_WriteRAMBuffer(pBuffer, size);
|
|---|
| | |
|
|---|
| | | /* Reset the refresh window area */
|
|---|
| | | /* Horizontal and Vertical RAM Address Position (R210h, R211h, R212h, R213h) */
|
|---|
| | | LCD_WriteReg(R61509V_R210H, (uint16_t)0 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R211H, (uint16_t)BOARD_LCD_WIDTH - 1 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R212H, (uint16_t)0 ) ;
|
|---|
| | | LCD_WriteReg(R61509V_R213H, (uint16_t)BOARD_LCD_HEIGHT - 1 ) ;
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draw a line on LCD, which is not horizontal or vertical.
|
|---|
| | | *
|
|---|
| | | * \param x X-coordinate of line start.
|
|---|
| | | * \param y Y-coordinate of line start.
|
|---|
| | | * \param length line length.
|
|---|
| | | * \param direction line direction: 0 - horizontal, 1 - vertical.
|
|---|
| | | * \param color LcdColor_t color.
|
|---|
| | | */
|
|---|
| | | static uint32_t DrawLineBresenham( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 )
|
|---|
| | | {
|
|---|
| | | int dx, dy ;
|
|---|
| | | int i ;
|
|---|
| | | int xinc, yinc, cumul ;
|
|---|
| | | int x, y ;
|
|---|
| | |
|
|---|
| | | x = dwX1 ;
|
|---|
| | | y = dwY1 ;
|
|---|
| | | dx = dwX2 - dwX1 ;
|
|---|
| | | dy = dwY2 - dwY1 ;
|
|---|
| | |
|
|---|
| | | xinc = ( dx > 0 ) ? 1 : -1 ;
|
|---|
| | | yinc = ( dy > 0 ) ? 1 : -1 ;
|
|---|
| | | dx = ( dx > 0 ) ? dx : -dx ;
|
|---|
| | | dy = ( dy > 0 ) ? dy : -dy ;
|
|---|
| | |
|
|---|
| | | LCD_DrawPixel( x, y ) ;
|
|---|
| | |
|
|---|
| | | if ( dx > dy )
|
|---|
| | | {
|
|---|
| | | cumul = dx / 2 ;
|
|---|
| | | for ( i = 1 ; i <= dx ; i++ )
|
|---|
| | | {
|
|---|
| | | x += xinc ;
|
|---|
| | | cumul += dy ;
|
|---|
| | |
|
|---|
| | | if ( cumul >= dx )
|
|---|
| | | {
|
|---|
| | | cumul -= dx ;
|
|---|
| | | y += yinc ;
|
|---|
| | | }
|
|---|
| | | LCD_DrawPixel( x, y ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | cumul = dy / 2 ;
|
|---|
| | | for ( i = 1 ; i <= dy ; i++ )
|
|---|
| | | {
|
|---|
| | | y += yinc ;
|
|---|
| | | cumul += dx ;
|
|---|
| | |
|
|---|
| | | if ( cumul >= dy )
|
|---|
| | | {
|
|---|
| | | cumul -= dy ;
|
|---|
| | | x += xinc ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | LCD_DrawPixel( x, y ) ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | * \brief Draw a line on LCD, horizontal and vertical line are supported.
|
|---|
| | | *
|
|---|
| | | * \param dwX1 X-coordinate of line start.
|
|---|
| | | * \param dwY1 Y-coordinate of line start.
|
|---|
| | | * \param dwX2 X-coordinate of line end.
|
|---|
| | | * \param dwY2 Y-coordinate of line end.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 )
|
|---|
| | | {
|
|---|
| | | /* Optimize horizontal or vertical line drawing */
|
|---|
| | | if (( dwY1 == dwY2 ) || (dwX1 == dwX2))
|
|---|
| | | {
|
|---|
| | | LCD_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY2 );
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | DrawLineBresenham( dwX1, dwY1, dwX2, dwY2 ) ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \brief Draws a circle on LCD, at the given coordinates.
|
|---|
| | | *
|
|---|
| | | * \param dwX X-coordinate of circle center.
|
|---|
| | | * \param dwY Y-coordinate of circle center.
|
|---|
| | | * \param dwR circle radius.
|
|---|
| | | */
|
|---|
| | | extern uint32_t LCD_DrawCircle( uint32_t dwX, uint32_t dwY, uint32_t dwR )
|
|---|
| | | {
|
|---|
| | | int32_t d; /* Decision Variable */
|
|---|
| | | uint32_t curX; /* Current X Value */
|
|---|
| | | uint32_t curY; /* Current Y Value */
|
|---|
| | |
|
|---|
| | | if (dwR == 0)
|
|---|
| | | {
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | | d = 3 - (dwR << 1);
|
|---|
| | | curX = 0;
|
|---|
| | | curY = dwR;
|
|---|
| | |
|
|---|
| | | while (curX <= curY)
|
|---|
| | | {
|
|---|
| | | LCD_DrawPixel(dwX + curX, dwY + curY);
|
|---|
| | | LCD_DrawPixel(dwX + curX, dwY - curY);
|
|---|
| | | LCD_DrawPixel(dwX - curX, dwY + curY);
|
|---|
| | | LCD_DrawPixel(dwX - curX, dwY - curY);
|
|---|
| | | LCD_DrawPixel(dwX + curY, dwY + curX);
|
|---|
| | | LCD_DrawPixel(dwX + curY, dwY - curX);
|
|---|
| | | LCD_DrawPixel(dwX - curY, dwY + curX);
|
|---|
| | | LCD_DrawPixel(dwX - curY, dwY - curX);
|
|---|
| | |
|
|---|
| | | if (d < 0)
|
|---|
| | | {
|
|---|
| | | d += (curX << 2) + 6;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | d += ((curX - curY) << 2) + 10;
|
|---|
| | | curY--;
|
|---|
| | | }
|
|---|
| | | curX++;
|
|---|
| | | }
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius)
|
|---|
| | | {
|
|---|
| | | signed int d ; /* Decision Variable */
|
|---|
| | | uint32_t dwCurX ; /* Current X Value */
|
|---|
| | | uint32_t dwCurY ; /* Current Y Value */
|
|---|
| | | uint32_t dwXmin, dwYmin;
|
|---|
| | |
|
|---|
| | | if (dwRadius == 0)
|
|---|
| | | {
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | | d = 3 - (dwRadius << 1) ;
|
|---|
| | | dwCurX = 0 ;
|
|---|
| | | dwCurY = dwRadius ;
|
|---|
| | |
|
|---|
| | | while ( dwCurX <= dwCurY )
|
|---|
| | | {
|
|---|
| | | dwXmin = (dwCurX > dwX) ? 0 : dwX-dwCurX;
|
|---|
| | | dwYmin = (dwCurY > dwY) ? 0 : dwY-dwCurY;
|
|---|
| | | LCD_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurX, dwYmin ) ;
|
|---|
| | | LCD_DrawFilledRectangle( dwXmin, dwY+dwCurY, dwX+dwCurX, dwY+dwCurY ) ;
|
|---|
| | | dwXmin = (dwCurY > dwX) ? 0 : dwX-dwCurY;
|
|---|
| | | dwYmin = (dwCurX > dwY) ? 0 : dwY-dwCurX;
|
|---|
| | | LCD_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurY, dwYmin ) ;
|
|---|
| | | LCD_DrawFilledRectangle( dwXmin, dwY+dwCurX, dwX+dwCurY, dwY+dwCurX ) ;
|
|---|
| | |
|
|---|
| | | if ( d < 0 )
|
|---|
| | | {
|
|---|
| | | d += (dwCurX << 2) + 6 ;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | d += ((dwCurX - dwCurY) << 2) + 10;
|
|---|
| | | dwCurY-- ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | dwCurX++ ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | extern uint32_t LCD_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 )
|
|---|
| | | {
|
|---|
| | | CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2);
|
|---|
| | |
|
|---|
| | | LCD_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY1 ) ;
|
|---|
| | | LCD_DrawFilledRectangle( dwX1, dwY2, dwX2, dwY2 ) ;
|
|---|
| | |
|
|---|
| | | LCD_DrawFilledRectangle( dwX1, dwY1, dwX1, dwY2 ) ;
|
|---|
| | | LCD_DrawFilledRectangle( dwX2, dwY1, dwX2, dwY2 ) ;
|
|---|
| | |
|
|---|
| | | return 0 ;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /* ----------------------------------------------------------------------------
|
|---|
| | | * SAM Software Package License
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | * Copyright (c) 2011, Atmel Corporation
|
|---|
| | | *
|
|---|
| | | * All rights reserved.
|
|---|
| | | *
|
|---|
| | | * Redistribution and use in source and binary forms, with or without
|
|---|
| | | * modification, are permitted provided that the following conditions are met:
|
|---|
| | | *
|
|---|
| | | * - Redistributions of source code must retain the above copyright notice,
|
|---|
| | | * this list of conditions and the disclaimer below.
|
|---|
| | | *
|
|---|
| | | * Atmel's name may not be used to endorse or promote products derived from
|
|---|
| | | * this software without specific prior written permission.
|
|---|
| | | *
|
|---|
| | | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
|---|
| | | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|---|
| | | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
|---|
| | | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| | | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|---|
| | | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
|---|
| | | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
|---|
| | | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
|---|
| | | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
|---|
| | | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| | | * ----------------------------------------------------------------------------
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * \file
|
|---|
| | | *
|
|---|
| | | * Interface of R61509V driver.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef __LCD_R61509V_H
|
|---|
| | | #define __LCD_R61509V_H
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Headers
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | #include <stdint.h>
|
|---|
| | | typedef uint16_t LcdColor_t ;
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Definitions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | | |
|---|
| | | /* LCDµÄCSÁ¬µÄPD7(NE1),ËùÒÔÎÒÃÇʹÓõÄÊÇNorflashµÄBank1,µØÖ··¶Î§Îª0X60000000~0X63FFFFFF
|
|---|
| | | * LCDµÄRS(¼Ä´æÆ÷/Êý¾ÝÑ¡Ôñ½Å)Á¬PD11(FSMC_A16),ÕâÑùµ±A16Ϊ¸ßµçƽʱ¾ÍÊÇÊý¾Ý¼Ä´æÆ÷£¬µÍµçƽÔòΪÃüÁî¼Ä´æÆ÷
|
|---|
| | | * ËùÒÔÊý¾Ý¼Ä´æÆ÷µÄµØַΪ: 0x6000 0000 |= 1<<16 ==> 0x6001 0000(¸ÃֵΪ8λģʽϵÄ×Ö½ÚµØÖ·)
|
|---|
| | | * ÓÉÓÚÎÒÃDzÉÓõÄÊÇ16λÊý¾ÝÏߣ¬FSMC[24:0]ÓëHADDR[25:1](AHBµØÖ·)¶ÔÆ룬ÕâÑùHADDRÒª×óÒÆһλ²ÅÊÇFSMCµÄ·ÃÎʵØÖ·; |
|---|
| | | * Òò´ËΪÁË°ÑFSMCÖеÄFSMC_A16ÖÃ1£¬Êµ¼ÊÉÏÒª¶ÔÓ¦µ½HADDRµØÖ·µÄHADDR_A17£¬¼´0x6002 0000
|
|---|
| | | */
|
|---|
| | | #define Bank1_LCD_DAT ((uint32_t)0x60020000) //ÏÔʾÇøÊý¾ÝµØÖ· |
|---|
| | | #define Bank1_LCD_CMD ((uint32_t)0x60000000) //ÏÔʾÇøÖ¸ÁîµØÖ·
|
|---|
| | |
|
|---|
| | | #define LCD_RST (1<<0) // PE1-LCD-RST |
|---|
| | | #define LCD_RST_SET(x) GPIOE->ODR=(GPIOE->ODR&~LCD_RST)|(x ? LCD_RST : 0)
|
|---|
| | |
|
|---|
| | | #define BOARD_LCD_WIDTH 240
|
|---|
| | | #define BOARD_LCD_HEIGHT 400
|
|---|
| | |
|
|---|
| | | #define MODE_BGR 0
|
|---|
| | | #define MODE_RGB 1
|
|---|
| | |
|
|---|
| | | /* color definition */
|
|---|
| | | #define COLOR_RED 0XF800
|
|---|
| | | #define COLOR_GREEN 0X07E0
|
|---|
| | | #define COLOR_BLUE 0X001F |
|---|
| | | #define COLOR_BRED 0XF81F
|
|---|
| | | #define COLOR_GRED 0XFFE0
|
|---|
| | | #define COLOR_GBLUE 0X07FF
|
|---|
| | | #define COLOR_BLACK 0X0000
|
|---|
| | | #define COLOR_WHITE 0XFFFF
|
|---|
| | | #define COLOR_PURPUE 0XA294
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* R61509V ID code */
|
|---|
| | | #define R61509V_DEVICE_CODE 0xB509 /* The device code ¡°B509¡±H is read out when this register is read forcibly. */
|
|---|
| | |
|
|---|
| | | /* R61509V LCD Registers */
|
|---|
| | | #define R61509V_R000H 0x000 /* Device Code Read */
|
|---|
| | | #define R61509V_R001H 0x001 /* Driver Output Control 1 */
|
|---|
| | | #define R61509V_R001H_SS ((uint16_t)0x0100)
|
|---|
| | | #define R61509V_R001H_SM ((uint16_t)0x0400)
|
|---|
| | | #define R61509V_R002H 0x002 /* LCD Drive Waveform Contro */
|
|---|
| | | #define R61509V_R003H 0x003 /* Entry Mode */
|
|---|
| | | #define R61509V_R003H_AM ((uint16_t)0x0008) /* AM Control the GRAM update direction */
|
|---|
| | | #define R61509V_R003H_ID0 ((uint16_t)0x0010) /* I/D[1:0] Control the address counter */
|
|---|
| | | #define R61509V_R003H_ID1 ((uint16_t)0x0020)
|
|---|
| | | #define R61509V_R003H_ORG ((uint16_t)0x0080)
|
|---|
| | | #define R61509V_R003H_BGR ((uint16_t)0x1000)
|
|---|
| | | #define R61509V_R003H_DFM ((uint16_t)0x4000)
|
|---|
| | | #define R61509V_R003H_TRI ((uint16_t)0x8000)
|
|---|
| | | #define R61509V_R007H 0x007 /* Display Control 1 */
|
|---|
| | | #define R61509V_R007H_BASEE ((uint16_t)0x0100)
|
|---|
| | | #define R61509V_R007H_PTDE ((uint16_t)0x1000)
|
|---|
| | |
|
|---|
| | | #define R61509V_R008H 0x008 /* Display Control 2 */
|
|---|
| | | #define R61509V_R009H 0x009 /* Display Control 3 */
|
|---|
| | |
|
|---|
| | | #define R61509V_R010H 0x010 /* Panel Interface Control 1 */
|
|---|
| | | #define R61509V_R011H 0x011 /* Panel Interface Control 2 */
|
|---|
| | | #define R61509V_R012H 0x012 /* Panel Interface Control 3 */
|
|---|
| | | #define R61509V_R013H 0x013 /* Panel Interface Control 4 */
|
|---|
| | | #define R61509V_R014H 0x014 /* Panel Interface Control 5 */
|
|---|
| | |
|
|---|
| | | #define R61509V_R00CH 0x00C /* External Display Interface Control 1 */
|
|---|
| | | #define R61509V_R00FH 0x00F /* External Display Interface Control 2 */
|
|---|
| | | #define R61509V_R090H 0x090 /* Frame Marker Control */
|
|---|
| | |
|
|---|
| | | #define R61509V_R100H 0x100 /* Power Control Control 1 */
|
|---|
| | | #define R61509V_R101H 0x101 /* Power Control Control 2 */
|
|---|
| | | #define R61509V_R102H 0x102 /* Power Control Control 3 */
|
|---|
| | | #define R61509V_R102H_PON ((uint16_t)0x0010)
|
|---|
| | | #define R61509V_R102H_PSON ((uint16_t)0x0020)
|
|---|
| | | #define R61509V_R103H 0x103 /* Power Control Control 4 */
|
|---|
| | |
|
|---|
| | | #define R61509V_R200H 0x200 /* Horizontal GRAM Address Set */
|
|---|
| | | #define R61509V_R201H 0x201 /* Vertical GRAM Address Set */
|
|---|
| | | #define R61509V_R202H 0x202 /* GRAM Data Write/Read */
|
|---|
| | |
|
|---|
| | | #define R61509V_R210H 0x210 /* Window Horizontal Address Start Position */
|
|---|
| | | #define R61509V_R211H 0x211 /* Window Horizontal Address End Position */
|
|---|
| | | #define R61509V_R212H 0x212 /* Window Vertical Address Start Position */
|
|---|
| | | #define R61509V_R213H 0x213 /* Window Vertical Address End Position */
|
|---|
| | |
|
|---|
| | | #define R61509V_R300H 0x300 /* Gamma Control 1 */
|
|---|
| | | #define R61509V_R301H 0x301 /* Gamma Control 2 */
|
|---|
| | | #define R61509V_R302H 0x302 /* Gamma Control 3 */
|
|---|
| | | #define R61509V_R303H 0x303 /* Gamma Control 4 */
|
|---|
| | | #define R61509V_R304H 0x304 /* Gamma Control 5 */
|
|---|
| | | #define R61509V_R305H 0x305 /* Gamma Control 6 */
|
|---|
| | | #define R61509V_R306H 0x306 /* Gamma Control 7 */
|
|---|
| | | #define R61509V_R307H 0x307 /* Gamma Control 8 */
|
|---|
| | | #define R61509V_R308H 0x308 /* Gamma Control 9 */
|
|---|
| | | #define R61509V_R309H 0x309 /* Gamma Control 10 */
|
|---|
| | |
|
|---|
| | | #define R61509V_R280H 0x280 /* NVM Data Read / write */
|
|---|
| | |
|
|---|
| | | #define R61509V_R400H 0x400 /* Base Image Number of Line */
|
|---|
| | | #define R61509V_R400H_GS ((uint16_t)0x8000)
|
|---|
| | | #define R61509V_R401H 0x401 /* Base Image Display Control */
|
|---|
| | | #define R61509V_R404H 0x404 /* Base Image Vertical Scroll Control */
|
|---|
| | |
|
|---|
| | | #define R61509V_R500H 0x500 /* Partial Image 1 Display Position */
|
|---|
| | | #define R61509V_R501H 0x501 /* RAM Address 1(Start Line Address) */
|
|---|
| | | #define R61509V_R502H 0x502 /* RAM Address 2(End Line Address) */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Types
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | typedef volatile uint16_t REG16;
|
|---|
| | |
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Marcos
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | |
|
|---|
| | | /** LCD index register address */
|
|---|
| | | #define LCD_IR() (*((REG16 *)(Bank1_LCD_CMD)))
|
|---|
| | |
|
|---|
| | | /** LCD data address */
|
|---|
| | | #define LCD_D() (*((REG16 *)(Bank1_LCD_DAT)))
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | | /*----------------------------------------------------------------------------
|
|---|
| | | * Exported functions
|
|---|
| | | *----------------------------------------------------------------------------*/
|
|---|
| | | extern void LCD_WriteReg( uint16_t reg, uint16_t data );
|
|---|
| | | extern uint16_t LCD_ReadReg( uint16_t reg );
|
|---|
| | | extern void LCD_WriteRAM_Prepare( void );
|
|---|
| | | extern void LCD_WriteRAM( LcdColor_t dwColor );
|
|---|
| | | extern void LCD_ReadRAM_Prepare( void );
|
|---|
| | | extern void LCD_WriteRAMWord( uint16_t wColor );
|
|---|
| | | extern uint32_t LCD_ReadRAM( void );
|
|---|
| | | extern uint32_t LCD_Initialize( void );
|
|---|
| | | extern void LCD_On( void );
|
|---|
| | | extern void LCD_Off( void );
|
|---|
| | | extern void LCD_PowerDown( void );
|
|---|
| | | extern uint32_t LCD_SetColor(uint32_t dwRgb24Bits);
|
|---|
| | | extern void LCD_SetCursor( uint16_t x, uint16_t y );
|
|---|
| | | extern void LCD_SetWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight );
|
|---|
| | | extern void LCD_SetDisplayLandscape( uint32_t dwRGB );
|
|---|
| | | extern void LCD_SetDisplayPortrait( uint16_t wRGB );
|
|---|
| | | extern void LCD_VerticalScroll( uint16_t wY );
|
|---|
| | | extern void LCD_SetPartialImage1( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd );
|
|---|
| | | extern uint32_t LCD_DrawPixel( uint32_t x, uint32_t y );
|
|---|
| | | extern void LCD_TestPattern( uint32_t dwRGB );
|
|---|
| | | extern uint32_t LCD_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
|
|---|
| | | extern uint32_t LCD_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const LcdColor_t *pBuffer );
|
|---|
| | | extern uint32_t LCD_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
|
|---|
| | | extern uint32_t LCD_DrawCircle( uint32_t dwX, uint32_t dwY, uint32_t dwR );
|
|---|
| | | extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius);
|
|---|
| | | extern uint32_t LCD_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
|
|---|
| | | extern void LCD_SetBacklight (uint32_t level);
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | | #endif /* #ifndef R61509V */
|
|---|
| New file |
| | |
|---|
| | | #ifndef __OV7670_REG_H |
|---|
| | | #define __OV7670_REG_H
|
|---|
| | |
|
|---|
| | | #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
|
|---|
| | | #define REG_BLUE 0x01 /* blue gain */
|
|---|
| | | #define REG_RED 0x02 /* red gain */
|
|---|
| | | #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
|
|---|
| | | #define REG_COM1 0x04 /* Control 1 */
|
|---|
| | | #define COM1_CCIR656 0x40 /* CCIR656 enable */
|
|---|
| | |
|
|---|
| | | #define REG_BAVE 0x05 /* U/B Average level */
|
|---|
| | | #define REG_GbAVE 0x06 /* Y/Gb Average level */
|
|---|
| | | #define REG_AECHH 0x07 /* AEC MS 5 bits */
|
|---|
| | | #define REG_RAVE 0x08 /* V/R Average level */
|
|---|
| | | #define REG_COM2 0x09 /* Control 2 */
|
|---|
| | | #define COM2_SSLEEP 0x10 /* Soft sleep mode */
|
|---|
| | |
|
|---|
| | | #define REG_PID 0x0a /* Product ID MSB */
|
|---|
| | | #define REG_VER 0x0b /* Product ID LSB */
|
|---|
| | | #define REG_COM3 0x0c /* Control 3 */
|
|---|
| | | #define COM3_SWAP 0x40 /* Byte swap */
|
|---|
| | | #define COM3_SCALEEN 0x08 /* Enable scaling */
|
|---|
| | | #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
|
|---|
| | |
|
|---|
| | | #define REG_COM4 0x0d /* Control 4 */
|
|---|
| | | #define REG_COM5 0x0e /* All "reserved" */
|
|---|
| | | #define REG_COM6 0x0f /* Control 6 */
|
|---|
| | | #define REG_AECH 0x10 /* More bits of AEC value */
|
|---|
| | | #define REG_CLKRC 0x11 /* Clocl control */
|
|---|
| | | #define CLK_EXT 0x40 /* Use external clock directly */
|
|---|
| | | #define CLK_SCALE 0x3f /* Mask for internal clock scale */
|
|---|
| | |
|
|---|
| | | #define REG_COM7 0x12 /* Control 7 */
|
|---|
| | | #define COM7_RESET 0x80 /* Register reset */
|
|---|
| | | #define COM7_FMT_MASK 0x38
|
|---|
| | | #define COM7_FMT_VGA 0x00
|
|---|
| | | #define COM7_FMT_CIF 0x20 /* CIF format */
|
|---|
| | | #define COM7_FMT_QVGA 0x10 /* QVGA format */
|
|---|
| | | #define COM7_FMT_QCIF 0x08 /* QCIF format */
|
|---|
| | | #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
|
|---|
| | | #define COM7_YUV 0x00 /* YUV */
|
|---|
| | | #define COM7_BAYER 0x01 /* Bayer format */
|
|---|
| | | #define COM7_PBAYER 0x05 /* "Processed bayer" */
|
|---|
| | |
|
|---|
| | | #define REG_COM8 0x13 /* Control 8 */
|
|---|
| | | #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
|
|---|
| | | #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
|
|---|
| | | #define COM8_BFILT 0x20 /* Band filter enable */
|
|---|
| | | #define COM8_AGC 0x04 /* Auto gain enable */
|
|---|
| | | #define COM8_AWB 0x02 /* White balance enable */
|
|---|
| | | #define COM8_AEC 0x01 /* Auto exposure enable */
|
|---|
| | |
|
|---|
| | | #define REG_COM9 0x14 /* Control 9 - gain ceiling */
|
|---|
| | | #define REG_COM10 0x15 /* Control 10 */
|
|---|
| | | #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
|
|---|
| | | #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
|
|---|
| | | #define COM10_HREF_REV 0x08 /* Reverse HREF */
|
|---|
| | | #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
|
|---|
| | | #define COM10_VS_NEG 0x02 /* VSYNC negative */
|
|---|
| | | #define COM10_HS_NEG 0x01 /* HSYNC negative */
|
|---|
| | |
|
|---|
| | | #define REG_HSTART 0x17 /* Horiz start high bits */
|
|---|
| | | #define REG_HSTOP 0x18 /* Horiz stop high bits */
|
|---|
| | | #define REG_VSTART 0x19 /* Vert start high bits */
|
|---|
| | | #define REG_VSTOP 0x1a /* Vert stop high bits */
|
|---|
| | | #define REG_PSHFT 0x1b /* Pixel delay after HREF */
|
|---|
| | | #define REG_MIDH 0x1c /* Manuf. ID high */
|
|---|
| | | #define REG_MIDL 0x1d /* Manuf. ID low */
|
|---|
| | | #define REG_MVFP 0x1e /* Mirror / vflip */
|
|---|
| | | #define MVFP_MIRROR 0x20 /* Mirror image */
|
|---|
| | | #define MVFP_FLIP 0x10 /* Vertical flip */
|
|---|
| | | #define REG_ADCCTR0 0x20
|
|---|
| | | #define REG_ADCCTR1 0x21
|
|---|
| | | #define REG_ADCCTR2 0x22
|
|---|
| | | #define REG_AEW 0x24 /* AGC upper limit */
|
|---|
| | | #define REG_AEB 0x25 /* AGC lower limit */
|
|---|
| | | #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
|
|---|
| | | #define REG_HSYST 0x30 /* HSYNC rising edge delay */
|
|---|
| | | #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
|
|---|
| | | #define REG_HREF 0x32 /* HREF pieces */
|
|---|
| | | #define REG_CHLF 0x33
|
|---|
| | | #define REG_ARBLM 0x34
|
|---|
| | | /* 0x35~0x36 reserved */
|
|---|
| | | #define REG_ADC 0x37
|
|---|
| | | #define REG_ACOM 0x38
|
|---|
| | | #define REG_OFON 0x39
|
|---|
| | | #define REG_TSLB 0x3a /* lots of stuff */
|
|---|
| | | #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
|
|---|
| | |
|
|---|
| | | #define REG_COM11 0x3b /* Control 11 */
|
|---|
| | | #define COM11_NIGHT 0x80 /* NIght mode enable */
|
|---|
| | | #define COM11_NMFR 0x60 /* Two bit NM frame rate */
|
|---|
| | | #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
|
|---|
| | | #define COM11_50HZ 0x08 /* Manual 50Hz select */
|
|---|
| | | #define COM11_EXP 0x02
|
|---|
| | |
|
|---|
| | | #define REG_COM12 0x3c /* Control 12 */
|
|---|
| | | #define COM12_HREF 0x80 /* HREF always */
|
|---|
| | |
|
|---|
| | | #define REG_COM13 0x3d /* Control 13 */
|
|---|
| | | #define REG_COM14 0x3e /* Control 14 */
|
|---|
| | | #define COM13_GAMMA 0x80 /* Gamma enable */
|
|---|
| | | #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
|
|---|
| | | #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
|
|---|
| | | #define REG_COM14 0x3e /* Control 14 */
|
|---|
| | | #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
|
|---|
| | | #define REG_EDGE 0x3f /* Edge enhancement factor */
|
|---|
| | |
|
|---|
| | | #define REG_COM15 0x40 /* Control 15 */
|
|---|
| | | #define COM15_R10F0 0x00 /* Data range 10 to F0 */
|
|---|
| | | #define COM15_R01FE 0x80 /* 01 to FE */
|
|---|
| | | #define COM15_R00FF 0xc0 /* 00 to FF */
|
|---|
| | | #define COM15_RGB565 0x10 /* RGB565 output */
|
|---|
| | | #define COM15_RGB555 0x30 /* RGB555 output */
|
|---|
| | |
|
|---|
| | | #define REG_COM16 0x41 /* Control 16 */
|
|---|
| | | #define COM16_AWBGAIN 0x08 /* AWB gain enable */
|
|---|
| | | #define REG_COM17 0x42 /* Control 17 */
|
|---|
| | | #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
|
|---|
| | | #define COM17_CBAR 0x08 /* DSP Color bar */
|
|---|
| | |
|
|---|
| | | #define REG_AWBC1 0x43
|
|---|
| | | #define REG_AWBC2 0x44
|
|---|
| | | #define REG_AWBC3 0x45
|
|---|
| | | #define REG_AWBC4 0x46
|
|---|
| | | #define REG_AWBC5 0x47
|
|---|
| | | #define REG_AWBC6 0x48
|
|---|
| | |
|
|---|
| | | /* 0x49~0x4A reserved */
|
|---|
| | |
|
|---|
| | | #define REG_CMATRIX_BASE 0x4f
|
|---|
| | | #define CMATRIX_LEN 6
|
|---|
| | | #define REG_MTX1 0x4f
|
|---|
| | | #define REG_MTX2 0x50
|
|---|
| | | #define REG_MTX3 0x51
|
|---|
| | | #define REG_MTX4 0x52
|
|---|
| | | #define REG_MTX5 0x53
|
|---|
| | | #define REG_MTX6 0x54
|
|---|
| | | #define REG_BRIGHT 0x55
|
|---|
| | | #define REG_CONTRAS 0X56
|
|---|
| | | #define REG_CONTRAS_CENTER 0x57
|
|---|
| | | #define REG_CMATRIX_SIGN 0x58
|
|---|
| | |
|
|---|
| | | #define REG_GFIX 0x69 /* Fix gain control */
|
|---|
| | | #define REG_LLC1 0x62
|
|---|
| | | #define REG_LLC2 0x63
|
|---|
| | | #define REG_LLC3 0x64
|
|---|
| | | #define REG_LLC4 0x65
|
|---|
| | | #define REG_LLC5 0x66
|
|---|
| | | #define REG_LLC6 0x94
|
|---|
| | | #define REG_LLC7 0x95
|
|---|
| | | #define REG_GGAIN 0x6a
|
|---|
| | | #define REG_DBLV 0x6b
|
|---|
| | | #define REG_AWBCTR3 0x6c
|
|---|
| | | #define REG_AWBCTR2 0x6d
|
|---|
| | | #define REG_AWBCTR1 0x6e
|
|---|
| | | #define REG_AWBCTR0 0x6f
|
|---|
| | | #define REG_SCALING_XSC 0x70
|
|---|
| | | #define REG_SCALING_YSC 0x71
|
|---|
| | | #define REG_SCALING_DCWCTR 0x72
|
|---|
| | | #define REG_SCALING_PC 0x73
|
|---|
| | |
|
|---|
| | | #define REG_REG74 0x74
|
|---|
| | | #define REG_REG75 0x75
|
|---|
| | | #define REG_REG76 0x76 /* OV's name */
|
|---|
| | | #define R76_WHTPCOR 0x40 /* White pixel correction enable */
|
|---|
| | | #define R76_BLKPCOR 0x80 /* Black pixel correction enable */
|
|---|
| | | #define REG_REG77 0x77
|
|---|
| | | /* 0x78~0x79 reserved */
|
|---|
| | | #define REG_SLOP 0x7a
|
|---|
| | | #define REG_GAM1 0x7b
|
|---|
| | | #define REG_GAM2 0x7c
|
|---|
| | | #define REG_GAM3 0x7d
|
|---|
| | | #define REG_GAM4 0x7e
|
|---|
| | | #define REG_GAM5 0x7f
|
|---|
| | | #define REG_GAM6 0x80
|
|---|
| | | #define REG_GAM7 0x81
|
|---|
| | | #define REG_GAM8 0x82
|
|---|
| | | #define REG_GAM9 0x83
|
|---|
| | | #define REG_GAM10 0x84
|
|---|
| | | #define REG_GAM11 0x85
|
|---|
| | | #define REG_GAM12 0x86
|
|---|
| | | #define REG_GAM13 0x87
|
|---|
| | | #define REG_GAM14 0x88
|
|---|
| | | #define REG_GAM15 0x89
|
|---|
| | |
|
|---|
| | | #define REG_RGB444 0x8c /* RGB 444 control */
|
|---|
| | | #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
|
|---|
| | | #define R444_RGBX 0x01 /* Empty nibble at end */
|
|---|
| | | #define REG_DM_LNL 0x92
|
|---|
| | | #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
|
|---|
| | | #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
|
|---|
| | | #define REG_SCALING_PCLK_DELAY 0xa2
|
|---|
| | | #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
|
|---|
| | | #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
|
|---|
| | | #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
|
|---|
| | | #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
|
|---|
| | | #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
|
|---|
| | | #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
|
|---|
| | | #define REG_BD60MAX 0xab /* 60hz banding step limit */
|
|---|
| | |
|
|---|
| | | #define REG_ABLC1 0xb1
|
|---|
| | | #define REG_THL_DLT 0xb3
|
|---|
| | |
|
|---|
| | | /** terminating list entry for register in configuration file */
|
|---|
| | | #define OV_REG_TERM 0xff
|
|---|
| | | /** terminating list entry for value in configuration file */
|
|---|
| | | #define OV_VAL_TERM 0xff
|
|---|
| | |
|
|---|
| | | /** define a structure for omnivision register initialization values */
|
|---|
| | | typedef struct ov_regval_s
|
|---|
| | | {
|
|---|
| | | /** Register to be written */
|
|---|
| | | uint8_t reg ;
|
|---|
| | | /** Value to be written in the register */
|
|---|
| | | uint8_t val ;
|
|---|
| | | } ov_regval_t ;
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | const ov_regval_t ov7670_default_regs[] =
|
|---|
| | | {
|
|---|
| | | {REG_TSLB, 0x04},
|
|---|
| | | {REG_HREF, 0x80},
|
|---|
| | | {REG_HSTART, 0x16},
|
|---|
| | | |
|---|
| | | {REG_HSTOP, 0x04},//5
|
|---|
| | | {REG_VSTART, 0x02},
|
|---|
| | | {REG_VSTOP, 0x7b},//0x7a,
|
|---|
| | | {REG_VREF, 0x06},//0x0a,
|
|---|
| | | {REG_COM3, 0x0c},
|
|---|
| | | {REG_COM10, 0x02},
|
|---|
| | | {REG_COM14, 0x00},//10
|
|---|
| | | {REG_SCALING_XSC, 0x00},
|
|---|
| | | {REG_SCALING_YSC, 0x01}, |
|---|
| | | {REG_SCALING_DCWCTR, 0x11},
|
|---|
| | | {REG_SCALING_PC, 0x09},//
|
|---|
| | | |
|---|
| | | {REG_SCALING_PCLK_DELAY, 0x02},//Ëõ·ÅÊä³öÑÓʱ
|
|---|
| | | {REG_CLKRC, 0x00},
|
|---|
| | |
|
|---|
| | | {REG_SLOP, 0x20},
|
|---|
| | | {REG_GAM1, 0x1c},
|
|---|
| | | {REG_GAM2, 0x28}, |
|---|
| | | {REG_GAM3, 0x3c},//20
|
|---|
| | | {REG_GAM4, 0x55},
|
|---|
| | | {REG_GAM5, 0x68},
|
|---|
| | | {REG_GAM6, 0x76},
|
|---|
| | | {REG_GAM7, 0x80}, |
|---|
| | | {REG_GAM8, 0x88},
|
|---|
| | | {REG_GAM9, 0x8f},
|
|---|
| | | {REG_GAM10, 0x96},
|
|---|
| | | {REG_GAM11, 0xa3},
|
|---|
| | | {REG_GAM12, 0xaf}, |
|---|
| | | {REG_GAM13, 0xc4},//30
|
|---|
| | | {REG_GAM14, 0xd7},
|
|---|
| | | {REG_GAM15, 0xe8},
|
|---|
| | | |
|---|
| | | {REG_COM8, 0xe0},
|
|---|
| | | {REG_GAIN, 0x00},//AGC
|
|---|
| | | |
|---|
| | | {REG_AECH, 0x00},
|
|---|
| | | {REG_COM4, 0x00},
|
|---|
| | | {REG_BD50MAX, 0x05},
|
|---|
| | | {REG_BD60MAX, 0x07},
|
|---|
| | | |
|---|
| | | {REG_AEW, 0x75},//40
|
|---|
| | | {REG_AEB, 0x63},
|
|---|
| | | {REG_VPT, 0xA5},
|
|---|
| | | |
|---|
| | | {REG_HAECC1, 0x78},
|
|---|
| | | {REG_HAECC2, 0x68},
|
|---|
| | | {REG_HAECC3, 0xdf},//0xd8,
|
|---|
| | | {REG_HAECC4, 0xdf},//0xd8,
|
|---|
| | | {REG_HAECC5, 0xf0},
|
|---|
| | | {REG_HAECC6, 0x90}, |
|---|
| | | {REG_HAECC7, 0x94},//50
|
|---|
| | | |
|---|
| | | {REG_COM8, 0xe5},
|
|---|
| | | {REG_COM5, 0x61},
|
|---|
| | | {REG_COM6, 0x4b},
|
|---|
| | | |
|---|
| | | {REG_MVFP, 0x37},//0x07,
|
|---|
| | | {REG_ADCCTR1, 0x02},
|
|---|
| | | {REG_ADCCTR2, 0x91},
|
|---|
| | | {REG_CHLF, 0x0b},
|
|---|
| | | |
|---|
| | | {REG_ADC, 0x1d},
|
|---|
| | | {REG_ACOM, 0x71},
|
|---|
| | | {REG_OFON, 0x2a},
|
|---|
| | | {REG_COM12, 0x78},
|
|---|
| | | |
|---|
| | | {REG_GFIX, 0x5d},
|
|---|
| | | {REG_DBLV, 0x40},//PLL
|
|---|
| | | {REG_REG74, 0x19},
|
|---|
| | | |
|---|
| | | {REG_DM_LNL, 0x00},//0x19,//0x66
|
|---|
| | | |
|---|
| | | {REG_ABLC1, 0x0c}, |
|---|
| | | {REG_THL_DLT, 0x82},//80
|
|---|
| | | |
|---|
| | | /* AWBC1~AWBC6 */
|
|---|
| | | {REG_AWBC1, 0x14},
|
|---|
| | | {REG_AWBC2, 0xf0},
|
|---|
| | | {REG_AWBC3, 0x34}, |
|---|
| | | {REG_AWBC4, 0x58},
|
|---|
| | | {REG_AWBC5, 0x28},
|
|---|
| | | {REG_AWBC6, 0x3a},
|
|---|
| | |
|
|---|
| | | /* LCCx */
|
|---|
| | | {REG_LLC3, 0x04},
|
|---|
| | | {REG_LLC4, 0x20}, |
|---|
| | | {REG_LLC5, 0x05},
|
|---|
| | | {REG_LLC6, 0x04},
|
|---|
| | | {REG_LLC7, 0x08},
|
|---|
| | | |
|---|
| | | {REG_AWBCTR3, 0x0a},
|
|---|
| | | {REG_AWBCTR2, 0x55}, |
|---|
| | | {REG_AWBCTR1, 0x11},//100
|
|---|
| | | {REG_AWBCTR0, 0x9f},//0x9e for advance AWB
|
|---|
| | | |
|---|
| | | {REG_BRIGHT, 0x00},//ÁÁ¶È
|
|---|
| | | {REG_CONTRAS, 0x45},//¶Ô±È¶È
|
|---|
| | | {REG_CONTRAS_CENTER, 0x80}, |
|---|
| | | {OV_REG_TERM,OV_VAL_TERM},
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | const ov_regval_t ov7670_fmt_qvga_yuv422[] = |
|---|
| | | {
|
|---|
| | | { REG_COM7, COM7_FMT_QVGA }, /* Selects YUV mode */
|
|---|
| | | { REG_RGB444, 0 }, /* No RGB444 please */
|
|---|
| | | { REG_COM1, 0 }, /* CCIR601 */
|
|---|
| | | { REG_COM15, COM15_R00FF },
|
|---|
| | | { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
|
|---|
| | | { REG_MTX1, 0x80 }, /* "matrix coefficient 1" */
|
|---|
| | | { REG_MTX2, 0x80 }, /* "matrix coefficient 2" */
|
|---|
| | | { REG_MTX3, 0 }, /* vb */
|
|---|
| | | { REG_MTX4, 0x22 }, /* "matrix coefficient 4" */
|
|---|
| | | { REG_MTX5, 0x5e }, /* "matrix coefficient 5" */
|
|---|
| | | { REG_MTX6, 0x80 }, /* "matrix coefficient 6" */
|
|---|
| | | { REG_COM13, COM13_GAMMA|COM13_UVSAT },
|
|---|
| | | {OV_REG_TERM,OV_VAL_TERM},
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | const ov_regval_t ov7670_fmt_qvga_rgb565[] = |
|---|
| | | {
|
|---|
| | | { REG_COM7, COM7_FMT_QVGA|COM7_RGB }, /* Selects RGB mode */
|
|---|
| | | { REG_RGB444, 0 }, /* No RGB444 please */
|
|---|
| | | { REG_COM1, 0x0 }, /* CCIR601 */
|
|---|
| | | { REG_COM15, COM15_RGB565 },
|
|---|
| | | { REG_COM9, 0x0 }, /* ×Ô¶¯ÔöÒæÏÞ¶È-×î´óAGCÖµ 2X */
|
|---|
| | | { REG_MTX1, 0xb3 }, /* "matrix coefficient 1" */
|
|---|
| | | { REG_MTX2, 0xb3 }, /* "matrix coefficient 2" */
|
|---|
| | | { REG_MTX3, 0 }, /* vb */
|
|---|
| | | { REG_MTX4, 0x3d }, /* "matrix coefficient 4" */
|
|---|
| | | { REG_MTX5, 0xa7 }, /* "matrix coefficient 5" */
|
|---|
| | | { REG_MTX6, 0xe4 }, /* "matrix coefficient 6" */
|
|---|
| | | { REG_COM13, COM13_GAMMA|COM13_UVSAT },
|
|---|
| | | {OV_REG_TERM,OV_VAL_TERM},
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | const ov_regval_t ov7670_fmt_qvga_rgb444[] = |
|---|
| | | {
|
|---|
| | | { REG_COM7, COM7_FMT_QVGA|COM7_RGB }, /* Selects RGB mode */
|
|---|
| | | { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
|
|---|
| | | { REG_COM1, 0x0 }, /* CCIR601 */
|
|---|
| | | { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
|
|---|
| | | { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
|
|---|
| | | { REG_MTX1, 0xb3 }, /* "matrix coefficient 1" */
|
|---|
| | | { REG_MTX2, 0xb3 }, /* "matrix coefficient 2" */
|
|---|
| | | { REG_MTX3, 0 }, /* vb */
|
|---|
| | | { REG_MTX4, 0x3d }, /* "matrix coefficient 4" */
|
|---|
| | | { REG_MTX5, 0xa7 }, /* "matrix coefficient 5" */
|
|---|
| | | { REG_MTX6, 0xe4 }, /* "matrix coefficient 6" */
|
|---|
| | | { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
|
|---|
| | | {OV_REG_TERM,OV_VAL_TERM},
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | const ov_regval_t ov7670_fmt_qvga_raw[] = |
|---|
| | | {
|
|---|
| | | { REG_COM7, COM7_FMT_QVGA|COM7_BAYER },
|
|---|
| | | { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */
|
|---|
| | | { REG_COM16, 0x3d }, /* Edge enhancement, denoise */
|
|---|
| | | { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */
|
|---|
| | | {OV_REG_TERM,OV_VAL_TERM},
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | #endif /* End of __OV7670_REG_H */ |
|---|
| New file |
| | |
|---|
| | | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
|---|
| | | ;* File Name : startup_stm32f10x_hd.s
|
|---|
| | | ;* Author : MCD Application Team
|
|---|
| | | ;* Version : V3.5.0
|
|---|
| | | ;* Date : 11-March-2011
|
|---|
| | | ;* Description : STM32F10x High Density Devices vector table for EWARM |
|---|
| | | ;* toolchain.
|
|---|
| | | ;* This module performs:
|
|---|
| | | ;* - Set the initial SP
|
|---|
| | | ;* - Configure the clock system and the external SRAM |
|---|
| | | ;* mounted on STM3210E-EVAL board to be used as data |
|---|
| | | ;* memory (optional, to be enabled by user)
|
|---|
| | | ;* - Set the initial PC == __iar_program_start,
|
|---|
| | | ;* - Set the vector table entries with the exceptions ISR address,
|
|---|
| | | ;* After Reset the Cortex-M3 processor is in Thread mode,
|
|---|
| | | ;* priority is Privileged, and the Stack is set to Main.
|
|---|
| | | ;********************************************************************************
|
|---|
| | | ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
|---|
| | | ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
|---|
| | | ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
|---|
| | | ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
|---|
| | | ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | ;*******************************************************************************
|
|---|
| | | ;
|
|---|
| | | ;
|
|---|
| | | ; The modules in this file are included in the libraries, and may be replaced
|
|---|
| | | ; by any user-defined modules that define the PUBLIC symbol _program_start or
|
|---|
| | | ; a user defined start symbol.
|
|---|
| | | ; To override the cstartup defined in the library, simply add your modified
|
|---|
| | | ; version to the workbench project.
|
|---|
| | | ;
|
|---|
| | | ; The vector table is normally located at address 0.
|
|---|
| | | ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
|---|
| | | ; The name "__vector_table" has special meaning for C-SPY:
|
|---|
| | | ; it is where the SP start value is found, and the NVIC vector
|
|---|
| | | ; table register (VTOR) is initialized to this address if != 0.
|
|---|
| | | ;
|
|---|
| | | ; Cortex-M version
|
|---|
| | | ; |
|---|
| | | |
|---|
| | | MODULE ?cstartup
|
|---|
| | | |
|---|
| | | ;; Forward declaration of sections.
|
|---|
| | | SECTION CSTACK:DATA:NOROOT(3)
|
|---|
| | |
|
|---|
| | | SECTION .intvec:CODE:NOROOT(2)
|
|---|
| | |
|
|---|
| | | EXTERN __iar_program_start
|
|---|
| | | EXTERN SystemInit |
|---|
| | | PUBLIC __vector_table
|
|---|
| | |
|
|---|
| | | DATA
|
|---|
| | | |
|---|
| | | __vector_table
|
|---|
| | | DCD sfe(CSTACK)
|
|---|
| | | DCD Reset_Handler ; Reset Handler
|
|---|
| | | DCD NMI_Handler ; NMI Handler
|
|---|
| | | DCD HardFault_Handler ; Hard Fault Handler
|
|---|
| | | DCD MemManage_Handler ; MPU Fault Handler
|
|---|
| | | DCD BusFault_Handler ; Bus Fault Handler
|
|---|
| | | DCD UsageFault_Handler ; Usage Fault Handler
|
|---|
| | | DCD 0 ; Reserved
|
|---|
| | | DCD 0 ; Reserved
|
|---|
| | | DCD 0 ; Reserved
|
|---|
| | | DCD 0 ; Reserved
|
|---|
| | | DCD SVC_Handler ; SVCall Handler
|
|---|
| | | DCD DebugMon_Handler ; Debug Monitor Handler
|
|---|
| | | DCD 0 ; Reserved
|
|---|
| | | DCD PendSV_Handler ; PendSV Handler
|
|---|
| | | DCD SysTick_Handler ; SysTick Handler
|
|---|
| | |
|
|---|
| | | ; External Interrupts
|
|---|
| | | DCD WWDG_IRQHandler ; Window Watchdog
|
|---|
| | | DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|---|
| | | DCD TAMPER_IRQHandler ; Tamper
|
|---|
| | | DCD RTC_IRQHandler ; RTC
|
|---|
| | | DCD FLASH_IRQHandler ; Flash
|
|---|
| | | DCD RCC_IRQHandler ; RCC
|
|---|
| | | DCD EXTI0_IRQHandler ; EXTI Line 0
|
|---|
| | | DCD EXTI1_IRQHandler ; EXTI Line 1
|
|---|
| | | DCD EXTI2_IRQHandler ; EXTI Line 2
|
|---|
| | | DCD EXTI3_IRQHandler ; EXTI Line 3
|
|---|
| | | DCD EXTI4_IRQHandler ; EXTI Line 4
|
|---|
| | | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|---|
| | | DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|---|
| | | DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|---|
| | | DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|---|
| | | DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|---|
| | | DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|---|
| | | DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|---|
| | | DCD ADC1_2_IRQHandler ; ADC1 & ADC2
|
|---|
| | | DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
|---|
| | | DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
|---|
| | | DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
|---|
| | | DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
|---|
| | | DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|---|
| | | DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
|---|
| | | DCD TIM1_UP_IRQHandler ; TIM1 Update
|
|---|
| | | DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
|---|
| | | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
|---|
| | | DCD TIM2_IRQHandler ; TIM2
|
|---|
| | | DCD TIM3_IRQHandler ; TIM3
|
|---|
| | | DCD TIM4_IRQHandler ; TIM4
|
|---|
| | | DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|---|
| | | DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|---|
| | | DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|---|
| | | DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|---|
| | | DCD SPI1_IRQHandler ; SPI1
|
|---|
| | | DCD SPI2_IRQHandler ; SPI2
|
|---|
| | | DCD USART1_IRQHandler ; USART1
|
|---|
| | | DCD USART2_IRQHandler ; USART2
|
|---|
| | | DCD USART3_IRQHandler ; USART3
|
|---|
| | | DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|---|
| | | DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
|---|
| | | DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
|---|
| | | DCD TIM8_BRK_IRQHandler ; TIM8 Break
|
|---|
| | | DCD TIM8_UP_IRQHandler ; TIM8 Update
|
|---|
| | | DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
|
|---|
| | | DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
|
|---|
| | | DCD ADC3_IRQHandler ; ADC3
|
|---|
| | | DCD FSMC_IRQHandler ; FSMC
|
|---|
| | | DCD SDIO_IRQHandler ; SDIO
|
|---|
| | | DCD TIM5_IRQHandler ; TIM5
|
|---|
| | | DCD SPI3_IRQHandler ; SPI3
|
|---|
| | | DCD UART4_IRQHandler ; UART4
|
|---|
| | | DCD UART5_IRQHandler ; UART5
|
|---|
| | | DCD TIM6_IRQHandler ; TIM6
|
|---|
| | | DCD TIM7_IRQHandler ; TIM7
|
|---|
| | | DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
|---|
| | | DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
|---|
| | | DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
|---|
| | | DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
|---|
| | | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|---|
| | | ;;
|
|---|
| | | ;; Default interrupt handlers.
|
|---|
| | | ;;
|
|---|
| | | THUMB
|
|---|
| | |
|
|---|
| | | PUBWEAK Reset_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(2)
|
|---|
| | | Reset_Handler
|
|---|
| | | LDR R0, =SystemInit
|
|---|
| | | BLX R0
|
|---|
| | | LDR R0, =__iar_program_start
|
|---|
| | | BX R0
|
|---|
| | | |
|---|
| | | PUBWEAK NMI_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | NMI_Handler
|
|---|
| | | B NMI_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK HardFault_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | HardFault_Handler
|
|---|
| | | B HardFault_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK MemManage_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | MemManage_Handler
|
|---|
| | | B MemManage_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK BusFault_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | BusFault_Handler
|
|---|
| | | B BusFault_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK UsageFault_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | UsageFault_Handler
|
|---|
| | | B UsageFault_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK SVC_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SVC_Handler
|
|---|
| | | B SVC_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK DebugMon_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DebugMon_Handler
|
|---|
| | | B DebugMon_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK PendSV_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | PendSV_Handler
|
|---|
| | | B PendSV_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK SysTick_Handler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SysTick_Handler
|
|---|
| | | B SysTick_Handler
|
|---|
| | |
|
|---|
| | | PUBWEAK WWDG_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | WWDG_IRQHandler
|
|---|
| | | B WWDG_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK PVD_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | PVD_IRQHandler
|
|---|
| | | B PVD_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TAMPER_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TAMPER_IRQHandler
|
|---|
| | | B TAMPER_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK RTC_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | RTC_IRQHandler
|
|---|
| | | B RTC_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK FLASH_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | FLASH_IRQHandler
|
|---|
| | | B FLASH_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK RCC_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | RCC_IRQHandler
|
|---|
| | | B RCC_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI0_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI0_IRQHandler
|
|---|
| | | B EXTI0_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI1_IRQHandler
|
|---|
| | | B EXTI1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI2_IRQHandler
|
|---|
| | | B EXTI2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI3_IRQHandler
|
|---|
| | | B EXTI3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI4_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI4_IRQHandler
|
|---|
| | | B EXTI4_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel1_IRQHandler
|
|---|
| | | B DMA1_Channel1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel2_IRQHandler
|
|---|
| | | B DMA1_Channel2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel3_IRQHandler
|
|---|
| | | B DMA1_Channel3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel4_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel4_IRQHandler
|
|---|
| | | B DMA1_Channel4_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel5_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel5_IRQHandler
|
|---|
| | | B DMA1_Channel5_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel6_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel6_IRQHandler
|
|---|
| | | B DMA1_Channel6_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA1_Channel7_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA1_Channel7_IRQHandler
|
|---|
| | | B DMA1_Channel7_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK ADC1_2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | ADC1_2_IRQHandler
|
|---|
| | | B ADC1_2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USB_HP_CAN1_TX_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USB_HP_CAN1_TX_IRQHandler
|
|---|
| | | B USB_HP_CAN1_TX_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USB_LP_CAN1_RX0_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USB_LP_CAN1_RX0_IRQHandler
|
|---|
| | | B USB_LP_CAN1_RX0_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK CAN1_RX1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | CAN1_RX1_IRQHandler
|
|---|
| | | B CAN1_RX1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK CAN1_SCE_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | CAN1_SCE_IRQHandler
|
|---|
| | | B CAN1_SCE_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI9_5_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI9_5_IRQHandler
|
|---|
| | | B EXTI9_5_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM1_BRK_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM1_BRK_IRQHandler
|
|---|
| | | B TIM1_BRK_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM1_UP_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM1_UP_IRQHandler
|
|---|
| | | B TIM1_UP_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM1_TRG_COM_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM1_TRG_COM_IRQHandler
|
|---|
| | | B TIM1_TRG_COM_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM1_CC_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM1_CC_IRQHandler
|
|---|
| | | B TIM1_CC_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM2_IRQHandler
|
|---|
| | | B TIM2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM3_IRQHandler
|
|---|
| | | B TIM3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM4_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM4_IRQHandler
|
|---|
| | | B TIM4_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK I2C1_EV_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | I2C1_EV_IRQHandler
|
|---|
| | | B I2C1_EV_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK I2C1_ER_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | I2C1_ER_IRQHandler
|
|---|
| | | B I2C1_ER_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK I2C2_EV_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | I2C2_EV_IRQHandler
|
|---|
| | | B I2C2_EV_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK I2C2_ER_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | I2C2_ER_IRQHandler
|
|---|
| | | B I2C2_ER_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK SPI1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SPI1_IRQHandler
|
|---|
| | | B SPI1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK SPI2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SPI2_IRQHandler
|
|---|
| | | B SPI2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USART1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USART1_IRQHandler
|
|---|
| | | B USART1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USART2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USART2_IRQHandler
|
|---|
| | | B USART2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USART3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USART3_IRQHandler
|
|---|
| | | B USART3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK EXTI15_10_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | EXTI15_10_IRQHandler
|
|---|
| | | B EXTI15_10_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK RTCAlarm_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | RTCAlarm_IRQHandler
|
|---|
| | | B RTCAlarm_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK USBWakeUp_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | USBWakeUp_IRQHandler
|
|---|
| | | B USBWakeUp_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM8_BRK_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM8_BRK_IRQHandler
|
|---|
| | | B TIM8_BRK_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM8_UP_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM8_UP_IRQHandler
|
|---|
| | | B TIM8_UP_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM8_TRG_COM_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM8_TRG_COM_IRQHandler
|
|---|
| | | B TIM8_TRG_COM_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM8_CC_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM8_CC_IRQHandler
|
|---|
| | | B TIM8_CC_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK ADC3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | ADC3_IRQHandler
|
|---|
| | | B ADC3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK FSMC_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | FSMC_IRQHandler
|
|---|
| | | B FSMC_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK SDIO_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SDIO_IRQHandler
|
|---|
| | | B SDIO_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM5_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM5_IRQHandler
|
|---|
| | | B TIM5_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK SPI3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | SPI3_IRQHandler
|
|---|
| | | B SPI3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK UART4_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | UART4_IRQHandler
|
|---|
| | | B UART4_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK UART5_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | UART5_IRQHandler
|
|---|
| | | B UART5_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM6_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM6_IRQHandler
|
|---|
| | | B TIM6_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK TIM7_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | TIM7_IRQHandler
|
|---|
| | | B TIM7_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA2_Channel1_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA2_Channel1_IRQHandler
|
|---|
| | | B DMA2_Channel1_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA2_Channel2_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA2_Channel2_IRQHandler
|
|---|
| | | B DMA2_Channel2_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA2_Channel3_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA2_Channel3_IRQHandler
|
|---|
| | | B DMA2_Channel3_IRQHandler
|
|---|
| | |
|
|---|
| | | PUBWEAK DMA2_Channel4_5_IRQHandler
|
|---|
| | | SECTION .text:CODE:REORDER(1)
|
|---|
| | | DMA2_Channel4_5_IRQHandler
|
|---|
| | | B DMA2_Channel4_5_IRQHandler
|
|---|
| | | |
|---|
| | | |
|---|
| | | END
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åcontiki²Ù×÷ϵͳLEDÉ豸²Ù×÷º¯Êý½Ó¿Ú
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | |
|
|---|
| | | #include "stm32v5_led.h"
|
|---|
| | |
|
|---|
| | | static led_gpio_t leds_gpio[MAX_LED] =
|
|---|
| | | {
|
|---|
| | | {LED1, GPIOB, GPIO_Pin_5}, /* LED1 ÓõÄGPB5 */
|
|---|
| | | {LED2, GPIOD, GPIO_Pin_6}, /* LED2 ÓõÄGPD6 */
|
|---|
| | | {LED3, GPIOD, GPIO_Pin_3}, /* LED3 ÓõÄGPD3 */ |
|---|
| | | };
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | void init_led_gpio(void)
|
|---|
| | | {
|
|---|
| | | int i;
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure;
|
|---|
| | |
|
|---|
| | | /* ʹÄÜPBºÍPD×é GPIOµÄʱÖÓ */
|
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOD , ENABLE); |
|---|
| | | |
|---|
| | | /*ÉèÖà PB5(LED1), PD6(LED2), PD3(LED3)Ϊ GPIO Êä³öÍÆÃâģʽ£¬¿ÚÏ߷תËÙ¶ÈΪ50MHz */
|
|---|
| | | for(i=0; i<MAX_LED; i++)
|
|---|
| | | {
|
|---|
| | | /*ÉèÖà PB5(LED1)Ϊ GPIO Êä³öÍÆÃâģʽ£¬¿ÚÏ߷תËÙ¶ÈΪ50MHz */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = leds_gpio[i].pin; |
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(leds_gpio[i].group, &GPIO_InitStructure); |
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void turn_led(int which, int cmd)
|
|---|
| | | {
|
|---|
| | | if(which<0 || which> MAX_LED )
|
|---|
| | | return;
|
|---|
| | | |
|---|
| | | if(OFF == cmd)
|
|---|
| | | GPIO_ResetBits(leds_gpio[which].group, leds_gpio[which].pin);
|
|---|
| | | else
|
|---|
| | | GPIO_SetBits(leds_gpio[which].group, leds_gpio[which].pin);
|
|---|
| | | }
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åLEDÉ豸²Ù×÷º¯Êý
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | |
|
|---|
| | | #ifndef __STM32V5_LED_H
|
|---|
| | | #define __STM32V5_LED_H
|
|---|
| | |
|
|---|
| | | #include"stm32f10x.h"
|
|---|
| | |
|
|---|
| | | #define ON 1
|
|---|
| | | #define OFF 0
|
|---|
| | |
|
|---|
| | | enum |
|---|
| | | {
|
|---|
| | | LED1 = 0,
|
|---|
| | | LED2,
|
|---|
| | | LED3,
|
|---|
| | | MAX_LED,
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | typedef struct led_gpio_s
|
|---|
| | | {
|
|---|
| | | int num; /* LED񅧏 */
|
|---|
| | | GPIO_TypeDef *group; /* LEDʹÓõÄGPIOÔÚÄÄÒ»×é: GPIOB or GPIOD */ |
|---|
| | | uint16_t pin; /* LEDʹÓõÄGPIO×éÖеÄÄÇÒ»¸öpin: GPIO_Pin_x */
|
|---|
| | | } led_gpio_t;
|
|---|
| | |
|
|---|
| | | extern void init_led_gpio(void);
|
|---|
| | | extern void turn_led(int which, int cmd);
|
|---|
| | |
|
|---|
| | | #endif
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åOV7670µÄ¼Ä´æÆ÷±í£¬Ö¡Í¬²½ÖжÏÅäÖã¬
|
|---|
| | | * ÒÔ¼°ÉãÏñÍ·OV7670+FIFOµÄÒý½Å³õʼ»¯£º
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | |
|
|---|
| | | /* CF7670C-V3ÉãÏñÍ·Ä£¿éPin¹Ü½ÅºÍSTM32v5 Á¬½Ó±í:
|
|---|
| | | *| ²Î¿¼<CF7670C-V3 ¼òҪ˵Ã÷.pdf>ºÍ<·Ü¶·STM32¿ª·¢°åV5ÔÀíͼ.pdf>
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| CF7670C-V3ÉãÏñÍ·Ä£¿éÒý½Å¼°ËµÃ÷ | STM32¶ËÒý½ÅÁ¬½Ó¼°ËµÃ÷ |
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| Pin1-VCC(3.3V,·½º¸Å̱ê¼ÇµÄΪµÚÒ»½Å) | 3.3V |
|
|---|
| | | *| Pin2-GND | GND |
|
|---|
| | | *| Pin3-SCL(SCCB_SCL²»´øÉÏÀµç×è) | PE2 |
|
|---|
| | | *| Pin4-SDA(SCCB_SDA ´ø4.7KÉÏÀµç×è) | PE3 |
|
|---|
| | | *| Pin5-VSYNC(OV7670 ֡ͬ²½ÐźÅ) | PE4 |
|
|---|
| | | *| Pin6-HREF(OV7670 ÐÐͬ²½ÐźÅ) | NC |
|
|---|
| | | *| Pin7-WEN(FIFO(AL422)дÔÊÐí,¸ßµçƽÓÐЧ | PE5 |
|
|---|
| | | *| Pin8-XCLK(NC/RE# ¿Õ½Å) | NC |
|
|---|
| | | *| Pin9-RRST(FIFO¶ÁµØÖ·¸´Î» | PE6 |
|
|---|
| | | *| Pin10-OE#(FIFOÊý¾ÝÊä³öʹÄÜ,µÍµçƽÓÐЧ | GND |
|
|---|
| | | *| Pin11-RCK#(FIFO¶ÁÊý¾ÝʱÖÓ | PD12 |
|
|---|
| | | *| Pin12-GND | GND |
|
|---|
| | | *| | |
|
|---|
| | | *| Pin13-D0 FIFOÊý¾Ý¿ÚÊä³öBIT0 | PC0 |
|
|---|
| | | *| Pin14-D1 FIFOÊý¾Ý¿ÚÊä³öBIT1 | PC1 |
|
|---|
| | | *| Pin15-D2 FIFOÊý¾Ý¿ÚÊä³öBIT2 | PC2 |
|
|---|
| | | *| Pin16-D3 FIFOÊý¾Ý¿ÚÊä³öBIT3 | PC3 |
|
|---|
| | | *| Pin17-D4 FIFOÊý¾Ý¿ÚÊä³öBIT4 | PC4 |
|
|---|
| | | *| Pin18-D5 FIFOÊý¾Ý¿ÚÊä³öBIT5 | PC5 |
|
|---|
| | | *| Pin19-D6 FIFOÊý¾Ý¿ÚÊä³öBIT6 | PC6 |
|
|---|
| | | *| Pin20-D7 FIFOÊý¾Ý¿ÚÊä³öBIT7 | PC7 |
|
|---|
| | | *+------------------+-----------------+---------------------------------+
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | | #include "stm32f10x_exti.h"
|
|---|
| | | #include "misc.h"
|
|---|
| | | #include "ov7670_reg.h"
|
|---|
| | | #include "stm32v5_ov7670.h"
|
|---|
| | | #include "stm32v5_sccb.h"
|
|---|
| | | #include "stm32v5_systick.h"
|
|---|
| | | #include "lcd_r61509v.h"
|
|---|
| | |
|
|---|
| | | /* g_OV7670_VSYNCÓÃÀ´±êʾһ֡µÄ¿ªÊ¼ºÍ½áÊø:
|
|---|
| | | * OV7670µÄÊý¾ÝÒÔVGAʱÐòÊä³ö,ÔÚ¸ÃʱÐòÖÐVSYNCµÄϽµÑرíʾһ֡µÄÊý¾Ý¿ªÊ¼,¶øÉÏÉýÑرíʾһ֡µÄÊý¾Ý½áÊø.
|
|---|
| | | * ËùÒÔÎÒÃǽ«VSYNC¹Ü½ÅPE4ÅäÖóÉEXTI4ÉÏÉýÑØ´¥·¢Ä£Ê½.ÔÚEXTI4µÄÖжϴ¦Àí³ÌÐòEXTI4_IRQHandler()ÖÐ,µÚÒ»´Î
|
|---|
| | | * ½øÈëÖжϵÄʱºò,˵Ã÷ÉÏÒ»Ö¡Êý¾ÝÒѾ½áÊø(ÕâÒ²Òâζ×ÅÕâÒ»Ö¡Êý¾ÝµÄ¿ªÊ¼),ÎÒÃÇ¿ªÊ¼Ê¹ÄÜÉãÏñÍ·Êý¾ÝдÈëFIFO
|
|---|
| | | * ²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ1;µ±µÚ¶þ´Î½øÈëÖжϵÄʱºò,˵Ã÷ÕâÒ»Ö¡Êý¾ÝµÄ´«ÊäÒѾ½áÊø,ÎÒÃǾͽûÖ¹
|
|---|
| | | * ÉãÏñÍ·Êý¾ÝдÈëFIFO²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ2; |
|---|
| | | * ÔÚÓ¦ÓóÌÐòÖÐ,ÒªÅжÏg_OV7670_VSYNCµÄÖµÊÇ·ñΪ2,Èç¹ûΪ2Ôò¿ÉÒÔ´ÓFIFOÖжÁÈ¡Êý¾Ý,¶ÁÍêºó¸üÐÂÆä״ֵ̬Ϊ0.
|
|---|
| | | */
|
|---|
| | | uint8_t g_OV7670_VSYNC = 0;
|
|---|
| | |
|
|---|
| | | static cam_fifo_pin_t cam_fifo_pins[CAM_FIFO_PIN_MAX] =
|
|---|
| | | {
|
|---|
| | | {CAM_FIFO_PIN_RRST, GPIOE, GPIO_Pin_6}, /* OV7670 FIFO¶ÁµØÖ·¸´Î», PE6*/ |
|---|
| | | {CAM_FIFO_PIN_RCLK, GPIOD, GPIO_Pin_12}, /* OV7670 FIFO¶ÁʱÖÓ, PD12 */ |
|---|
| | | {CAM_FIFO_PIN_WE, GPIOE, GPIO_Pin_5}, /* OV7670 FIFOдÔÊÐí, PE5 */ |
|---|
| | | };
|
|---|
| | |
|
|---|
| | | void set_ov7670_fifo_pin(int which, int level)
|
|---|
| | | {
|
|---|
| | | if(which<0 || which> CAM_FIFO_PIN_MAX )
|
|---|
| | | return;
|
|---|
| | | |
|---|
| | | if(LEVEL_LOW == level)
|
|---|
| | | GPIO_ResetBits(cam_fifo_pins[which].group, cam_fifo_pins[which].pin);
|
|---|
| | | else
|
|---|
| | | GPIO_SetBits(cam_fifo_pins[which].group, cam_fifo_pins[which].pin);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void ov7670_fifo_read_prepare(void)
|
|---|
| | | {
|
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RRST, LEVEL_LOW);
|
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RCLK, LEVEL_LOW);
|
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RCLK, LEVEL_HIGH);
|
|---|
| | | |
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RRST, LEVEL_HIGH);
|
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RCLK, LEVEL_LOW);
|
|---|
| | | set_ov7670_fifo_pin(CAM_FIFO_PIN_RCLK, LEVEL_HIGH);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*³õʼ»¯ÉãÏñÍ·Ä£¿éʹÓõÄFIFO(AL422)Ïà¹ØÒý½Å */
|
|---|
| | | void init_ov7670_fifo_pin(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | |
|
|---|
| | | /* FIFO_RCLK : PD12 */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOD, &GPIO_InitStructure);
|
|---|
| | |
|
|---|
| | | /* FIFO_VSYNC : PE4 */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | /* FIFO_WEN:PE5 FIFO_RRST:PE6 */ |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 ;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | /* FIFO D[0-7] */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
|---|
| | | | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOC, &GPIO_InitStructure);
|
|---|
| | |
|
|---|
| | | /* PE0-VS-XRST, must set to GPIO output mode here */
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* ½«VSYNCÁ¬½ÓµÄPE4¹Ü½Å³õʼ»¯ÎªÍⲿÖжÏEXTI4ģʽ£¬²¢ÉèÖÃΪϽµÑØ´¥·¢:
|
|---|
| | | * STM32ÉÏËùÓеÄGPIO¶¼ÒýÈëµ½EXTIÍⲿÖжÏÏßÉÏ£¬Ê¹µÃËùÓеÄGPIO¶¼ÄÜ×÷ΪÍⲿÖжϵÄ
|
|---|
| | | * ÊäÈëÔ´.ÆäÖÐPA0~PG0Á¬µ½EXTI0ÉÏ... PA4~PG4Á¬µ½EXT4ÉÏ...PA15~PG15Á¬µ½EXTI15ÉÏ
|
|---|
| | | * ͨһʱ¿ÌEXTIxÖ»ÄÜÏìÓ¦Ò»¸ö¶Ë¿ÚµÄʼþ´¥·¢,µ«¿ÉÒÔ·Öʱ¸´Óá£Ëü¿ÉÒÔÅäÖÃΪÉÏÉýÑØ,
|
|---|
| | | * ϽµÑØ»òË«±ßÑØ´¥·¢¡£
|
|---|
| | | */
|
|---|
| | | void init_ov7670_vsync(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | | EXTI_InitTypeDef EXTI_InitStructure; |
|---|
| | | NVIC_InitTypeDef NVIC_InitStructure;
|
|---|
| | |
|
|---|
| | | /* ³õʼ»¯PE4¿ÚΪGPIOÊäÈëģʽ */
|
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE|RCC_APB2Periph_AFIO, ENABLE);
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | /* ½«PE4(VSYNC)¹Òµ½³õʼ»¯ÎªEXTI4ģʽ,²¢Ê¹ÓÃÉÏÉýÑØ´¥·¢:
|
|---|
| | | * OV7670ʹÓÃVGAʱÐò´«ÊäÊý¾Ý,VSYNCµÄϽµÑرíʾһ֡Êý¾Ý
|
|---|
| | | * (¼´Ò»¸±Í¼Ïñ)µÄ´«Ê俪ʼ,VSYNNµÄÉÏÉýÑرíʾһ֡Êý¾ÝµÄ´«Êä½áÊø */
|
|---|
| | | GPIO_EXTILineConfig(GPIO_PortSourceGPIOE, GPIO_PinSource4); |
|---|
| | | EXTI_InitStructure.EXTI_Line = EXTI_Line4; |
|---|
| | | EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; //ÖжÏģʽ
|
|---|
| | | EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; //ÉÏÉýÑØ´¥·¢
|
|---|
| | | EXTI_InitStructure.EXTI_LineCmd = ENABLE;
|
|---|
| | | EXTI_Init(&EXTI_InitStructure); |
|---|
| | | |
|---|
| | | /* ·ÖÅäVSYNCÖжÏÓÅÏȼ¶ */
|
|---|
| | | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); |
|---|
| | | NVIC_InitStructure.NVIC_IRQChannel = EXTI4_IRQn ; //ÍⲿÖжÏ4
|
|---|
| | | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //ÇÀÕ¼ÓÅÏȼ¶ 0
|
|---|
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //×ÓÓÅÏȼ¶0 |
|---|
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //ʹÄÜ
|
|---|
| | | NVIC_Init(&NVIC_InitStructure);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void EXTI4_IRQHandler(void)
|
|---|
| | | {
|
|---|
| | | if( RESET != EXTI_GetITStatus(EXTI_Line4) )
|
|---|
| | | {
|
|---|
| | | /*µÚÒ»´ÎVSYNCµÄϽµÑص½À´,˵Ã÷ÕâʱºòÉÏÒ»Ö¡Êý¾ÝÒѾ½áÊø,
|
|---|
| | | Ò²¾ÍÊÇÕâÒ»Ö¡Êý¾Ý¿ªÊ¼.Õâʱ¿ªÊ¼ÈÃÉãÏñÍ·µÄÊý¾Ýдµ½FIFOÖÐÈ¥*/
|
|---|
| | | if( 0==g_OV7670_VSYNC )
|
|---|
| | | { |
|---|
| | | FIFO_WE_H(); /* À¸ßʹFIFOдʹÄÜ */
|
|---|
| | | g_OV7670_VSYNC = 1;
|
|---|
| | | FIFO_WE_H(); /* À¸ßʹFIFOдʹÄÜ */ |
|---|
| | | } |
|---|
| | | |
|---|
| | | /*µÚ¶þ´ÎVSYNCµÄϽµÑص½À´,˵Ã÷ÕâÒ»Ö¡µÄÊý¾Ý´«ÊäÒѾ½áÊø,´ËʱFIFO
|
|---|
| | | ÀïÃæ¾ÍÒѾ»º³åºÃOV7670д½øÀ´µÄÍêÕûµÄRGB565 320*240µÄͼÏóÊý¾Ý,
|
|---|
| | | ÏÖÔھͽûÖ¹ÉãÏñÍ·µÄÊý¾ÝдÈëµ½FIFOÖÐÈ¥,²¢¸üÐÂg_OV7670_VSYNC*/
|
|---|
| | | else if( 1==g_OV7670_VSYNC )
|
|---|
| | | {
|
|---|
| | | FIFO_WE_L(); /* ÀµÍʹFIFOдֹͣ */
|
|---|
| | | g_OV7670_VSYNC = 2; |
|---|
| | | }
|
|---|
| | | |
|---|
| | | /*ÔÚÓ¦ÓóÌÐòÖÐÑ»·¼ì²â±êÖ¾±äÁ¿,g_OV7670_VSYNC=2ʱ¾Í¿ÉÒÔ¶ÁFIFOÖеÄÊý¾Ý,
|
|---|
| | | ¶ÁÈ¡ÍêFIFOÖеÄÊý¾Ýºó,Ó¦¸ÃÁ¢¿Ì½«g_OV7670_VSYNCÉèÖÃΪ0 */
|
|---|
| | | |
|---|
| | | EXTI_ClearITPendingBit(EXTI_Line4);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | int ov_write_regs(const ov_regval_t *pReglist )
|
|---|
| | | {
|
|---|
| | | const ov_regval_t *pNext = pReglist ;
|
|---|
| | |
|
|---|
| | | while ( !((pNext->reg == OV_REG_TERM) && (pNext->val == OV_VAL_TERM)) )
|
|---|
| | | {
|
|---|
| | | if(pNext->reg == 0xFE)
|
|---|
| | | {
|
|---|
| | | msleep(5);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | if( !I2C_WriteByte(pNext->reg, pNext->val, OV7670_ADDR) )
|
|---|
| | | {
|
|---|
| | | return 1;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | pNext++ ;
|
|---|
| | | }
|
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* ³õʼ»¯OV7670ÄÚ²¿¸÷¸ö¼Ä´æÆ÷ */
|
|---|
| | | int init_ov7670_reg(int output_fmt)
|
|---|
| | | {
|
|---|
| | | uint8_t ID_code = 0;
|
|---|
| | | |
|---|
| | | /*³õʼ»¯PE2/PE3Á½¸ö¹Ü½Å,ËûÃÇÓÃÀ´GPIOÄ£ÄâI2C×ÜÏß*/
|
|---|
| | | init_sccb_gpio();
|
|---|
| | | |
|---|
| | | /* ͨ¹ýдOV7670µÄCOM7¼Ä´æÆ÷µÄbit[7]À´ÖØÆôËü */
|
|---|
| | | if( !I2C_WriteByte(OV7670_REG_COM7, 1<<7, OV7670_ADDR) ) |
|---|
| | | {
|
|---|
| | | return 1 ;
|
|---|
| | | }
|
|---|
| | | msleep(15);
|
|---|
| | |
|
|---|
| | | /* ´Ó¼Ä´æÆ÷ÖжÁ³ö²úÆ·ID²¢ÅжÏÊÇ·ñÊÇOV7670µÄID */
|
|---|
| | | if( !I2C_ReadByte(&ID_code, 1, OV7670_REG_VERID, OV7670_ADDR) ) |
|---|
| | | {
|
|---|
| | | return 2;
|
|---|
| | | }
|
|---|
| | | if(ID_code != OV7670_VERID) |
|---|
| | | {
|
|---|
| | | return 3;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | /* ³õʼ»¯OV7670µÄÆäËû¼Ä´æÆ÷ */
|
|---|
| | | ov_write_regs(ov7670_default_regs);
|
|---|
| | | switch(output_fmt)
|
|---|
| | | {
|
|---|
| | | case FMT_QVGA_YUV422:
|
|---|
| | | ov_write_regs(ov7670_fmt_qvga_yuv422);
|
|---|
| | | break;
|
|---|
| | | |
|---|
| | | case FMT_QVGA_RGB565:
|
|---|
| | | ov_write_regs(ov7670_fmt_qvga_rgb565);
|
|---|
| | | break;
|
|---|
| | | |
|---|
| | | case FMT_QVGA_RGB444:
|
|---|
| | | ov_write_regs(ov7670_fmt_qvga_rgb444);
|
|---|
| | | break;
|
|---|
| | | |
|---|
| | | case FMT_QVGA_RAWRGB:
|
|---|
| | | ov_write_regs(ov7670_fmt_qvga_raw);
|
|---|
| | | break; |
|---|
| | | }
|
|---|
| | | |
|---|
| | |
|
|---|
| | | return 0; |
|---|
| | | } |
|---|
| | |
|
|---|
| | | int OV7670_Initialize(int output_fmt)
|
|---|
| | | {
|
|---|
| | | init_ov7670_fifo_pin(); |
|---|
| | |
|
|---|
| | | /* ±ØÐëÔÚÕ⸴λһÏÂLCD */
|
|---|
| | | LCD_RST_SET(0); |
|---|
| | | msleep(200);
|
|---|
| | | LCD_RST_SET(1); |
|---|
| | |
|
|---|
| | | while( 0!=init_ov7670_reg(output_fmt) ) ; /* Èç¹û¼Ä´æÆ÷³õʼ»¯Ê§°ÜÔò»áËÀÔÚÕâÀï */
|
|---|
| | | |
|---|
| | | init_ov7670_vsync();
|
|---|
| | | |
|---|
| | | msleep(50); |
|---|
| | | |
|---|
| | | return 0;
|
|---|
| | | }
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åOV7670µÄ¼Ä´æÆ÷±í£¬Ö¡Í¬²½ÖжÏÅäÖã¬
|
|---|
| | | * ÒÔ¼°ÉãÏñÍ·OV7670+FIFO(AL422B)µÄÒý½Å³õʼ»¯£º
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | | /* CF7670C-V3ÉãÏñÍ·Ä£¿éPin¹Ü½ÅºÍSTM32v5 Á¬½Ó±í:
|
|---|
| | | *| ²Î¿¼<CF7670C-V3 ¼òҪ˵Ã÷.pdf>ºÍ<·Ü¶·STM32¿ª·¢°åV5ÔÀíͼ.pdf>
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| CF7670C-V3ÉãÏñÍ·Ä£¿éÒý½Å¼°ËµÃ÷ | STM32¶ËÒý½ÅÁ¬½Ó¼°ËµÃ÷ |
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| Pin1-VCC(3.3V,·½º¸Å̱ê¼ÇµÄΪµÚÒ»½Å) | 3.3V |
|
|---|
| | | *| Pin2-GND | GND |
|
|---|
| | | *| Pin3-SCL(SCCB_SCL²»´øÉÏÀµç×è) | PE2 |
|
|---|
| | | *| Pin4-SDA(SCCB_SDA ´ø4.7KÉÏÀµç×è) | PE3 |
|
|---|
| | | *| Pin5-VSYNC(OV7670 ֡ͬ²½ÐźÅ) | PE4 |
|
|---|
| | | *| Pin6-HREF(OV7670 ÐÐͬ²½ÐźÅ) | NC |
|
|---|
| | | *| Pin7-WEN(FIFO(AL422)дÔÊÐí,¸ßµçƽÓÐЧ | PE5 |
|
|---|
| | | *| Pin8-XCLK(NC/RE# ¿Õ½Å) | NC |
|
|---|
| | | *| Pin9-RRST(FIFO¶ÁµØÖ·¸´Î» | PE6 |
|
|---|
| | | *| Pin10-OE#(FIFOÊý¾ÝÊä³öʹÄÜ,µÍµçƽÓÐЧ | GND |
|
|---|
| | | *| Pin11-RCK#(FIFO¶ÁÊý¾ÝʱÖÓ | PD12 |
|
|---|
| | | *| Pin12-GND | GND |
|
|---|
| | | *| | |
|
|---|
| | | *| Pin13-D0 FIFOÊý¾Ý¿ÚÊä³öBIT0 | PC0 |
|
|---|
| | | *| Pin14-D1 FIFOÊý¾Ý¿ÚÊä³öBIT1 | PC1 |
|
|---|
| | | *| Pin15-D2 FIFOÊý¾Ý¿ÚÊä³öBIT2 | PC2 |
|
|---|
| | | *| Pin16-D3 FIFOÊý¾Ý¿ÚÊä³öBIT3 | PC3 |
|
|---|
| | | *| Pin17-D4 FIFOÊý¾Ý¿ÚÊä³öBIT4 | PC4 |
|
|---|
| | | *| Pin18-D5 FIFOÊý¾Ý¿ÚÊä³öBIT5 | PC5 |
|
|---|
| | | *| Pin19-D6 FIFOÊý¾Ý¿ÚÊä³öBIT6 | PC6 |
|
|---|
| | | *| Pin20-D7 FIFOÊý¾Ý¿ÚÊä³öBIT7 | PC7 |
|
|---|
| | | *+------------------+-----------------+---------------------------------+
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef __STM32V5_OV7670_H
|
|---|
| | | #define __STM32V5_OV7670_H
|
|---|
| | |
|
|---|
| | | #define LEVEL_HIGH 1
|
|---|
| | | #define LEVEL_LOW 0
|
|---|
| | |
|
|---|
| | | #define QVGA_XPIX 320
|
|---|
| | | #define QVGA_YPIX 240
|
|---|
| | | #define OV7670_OUT_XPIX QVGA_XPIX
|
|---|
| | | #define OV7670_OUT_YPIX QVGA_YPIX
|
|---|
| | | #define OV7670_OUT_MAX_PIXS (OV7670_OUT_XPIX*OV7670_OUT_YPIX)
|
|---|
| | |
|
|---|
| | | #define OV7670_ADDR 0x42 /* I2C¶ÁµØÖ· */
|
|---|
| | | #define OV7670_VERID 0x73
|
|---|
| | |
|
|---|
| | | #define OV7670_REG_NUM 114
|
|---|
| | | #define OV7670_REG_VERID 0x0B |
|---|
| | | #define OV7670_REG_COM7 0x12
|
|---|
| | |
|
|---|
| | | #define PORT_VSYNC_CMOS GPIOE
|
|---|
| | | #define RCC_APB2Periph_PORT_VSYNC_CMOS RCC_APB2Periph_GPIOE
|
|---|
| | | #define PIN_VSYNC_CMOS GPIO_Pin_4
|
|---|
| | | #define EXTI_LINE_VSYNC_CMOS EXTI_Line4
|
|---|
| | | #define PORT_SOURCE_VSYNC_CMOS GPIO_PortSourceGPIOE
|
|---|
| | | #define PIN_SOURCE_VSYNC_CMOS GPIO_PinSource4
|
|---|
| | |
|
|---|
| | | //#define FIFO_CS_PIN GPIO_Pin_0 /* FIFOƬѡ */ |
|---|
| | | #define FIFO_RRST_PIN GPIO_Pin_6 /* FIFO¶ÁµØÖ·¸´Î», PE6*/ |
|---|
| | | #define FIFO_RCLK_PIN GPIO_Pin_12 /* FIFO¶ÁʱÖÓ, PD12 */ |
|---|
| | | #define FIFO_WE_PIN GPIO_Pin_5 /* FIFOдÔÊÐí, PE5 */
|
|---|
| | |
|
|---|
| | | /* FIFO Pin operation macro function */
|
|---|
| | | #define FIFO_RRST_H() GPIOE->BSRR =FIFO_RRST_PIN |
|---|
| | | #define FIFO_RRST_L() GPIOE->BRR =FIFO_RRST_PIN
|
|---|
| | |
|
|---|
| | | #define FIFO_RCLK_H() GPIOD->BSRR =FIFO_RCLK_PIN
|
|---|
| | | #define FIFO_RCLK_L() GPIOD->BRR =FIFO_RCLK_PIN
|
|---|
| | |
|
|---|
| | | #define FIFO_WE_H() GPIOE->BSRR =FIFO_WE_PIN /*À¸ßʹFIFOдʹÄÜ*/
|
|---|
| | | #define FIFO_WE_L() GPIOE->BRR =FIFO_WE_PIN /*À¸ßʹFIFOд½ûÖ¹*/
|
|---|
| | |
|
|---|
| | | #define OV7670_FIFO_READ_PREPARE() \
|
|---|
| | | do{ \
|
|---|
| | | FIFO_RRST_L(); \
|
|---|
| | | FIFO_RCLK_L(); \
|
|---|
| | | FIFO_RCLK_H(); \
|
|---|
| | | FIFO_RRST_H(); \
|
|---|
| | | FIFO_RCLK_L(); \
|
|---|
| | | FIFO_RCLK_H(); \
|
|---|
| | | }while(0)
|
|---|
| | | |
|---|
| | | enum
|
|---|
| | | {
|
|---|
| | | CAM_FIFO_PIN_RRST = 0,
|
|---|
| | | CAM_FIFO_PIN_RCLK,
|
|---|
| | | CAM_FIFO_PIN_WE,
|
|---|
| | | CAM_FIFO_PIN_MAX,
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | enum
|
|---|
| | | {
|
|---|
| | | FMT_QVGA_YUV422,
|
|---|
| | | FMT_QVGA_RGB565,
|
|---|
| | | FMT_QVGA_RGB444,
|
|---|
| | | FMT_QVGA_RAWRGB,
|
|---|
| | | };
|
|---|
| | |
|
|---|
| | | typedef struct cam_fifo_pin_s
|
|---|
| | | {
|
|---|
| | | int num; /* LED񅧏 */
|
|---|
| | | GPIO_TypeDef *group; /* LEDʹÓõÄGPIOÔÚÄÄÒ»×é: GPIOB or GPIOD */ |
|---|
| | | uint16_t pin; /* LEDʹÓõÄGPIO×éÖеÄÄÇÒ»¸öpin: GPIO_Pin_x */
|
|---|
| | | } cam_fifo_pin_t;
|
|---|
| | |
|
|---|
| | | /* g_OV7670_VSYNCÓÃÀ´±êʾһ֡µÄ¿ªÊ¼ºÍ½áÊø:
|
|---|
| | | * OV7670µÄÊý¾ÝÒÔVGAʱÐòÊä³ö,ÔÚ¸ÃʱÐòÖÐVSYNCµÄϽµÑرíʾһ֡µÄÊý¾Ý¿ªÊ¼,¶øÉÏÉýÑرíʾһ֡µÄÊý¾Ý½áÊø.
|
|---|
| | | * ËùÒÔÎÒÃǽ«VSYNC¹Ü½ÅPE4ÅäÖóÉEXTI4ÉÏÉýÑØ´¥·¢Ä£Ê½.ÔÚEXTI4µÄÖжϴ¦Àí³ÌÐòEXTI4_IRQHandler()ÖÐ,µÚÒ»´Î
|
|---|
| | | * ½øÈëÖжϵÄʱºò,˵Ã÷ÉÏÒ»Ö¡Êý¾ÝÒѾ½áÊø(ÕâÒ²Òâζ×ÅÕâÒ»Ö¡Êý¾ÝµÄ¿ªÊ¼),ÎÒÃÇ¿ªÊ¼Ê¹ÄÜÉãÏñÍ·Êý¾ÝдÈëFIFO
|
|---|
| | | * ²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ1;µ±µÚ¶þ´Î½øÈëÖжϵÄʱºò,˵Ã÷ÕâÒ»Ö¡Êý¾ÝµÄ´«ÊäÒѾ½áÊø,ÎÒÃǾͽûÖ¹
|
|---|
| | | * ÉãÏñÍ·Êý¾ÝдÈëFIFO²¢¸üÐÂg_OV7670_VSYNCµÄ״ֵ̬Ϊ2; |
|---|
| | | * ÔÚÓ¦ÓóÌÐòÖÐ,ÒªÅжÏg_OV7670_VSYNCµÄÖµÊÇ·ñΪ2,Èç¹ûΪ2Ôò¿ÉÒÔ´ÓFIFOÖжÁÈ¡Êý¾Ý,¶ÁÍêºó¸üÐÂÆä״ֵ̬Ϊ0.
|
|---|
| | | */
|
|---|
| | | extern uint8_t g_OV7670_VSYNC;
|
|---|
| | |
|
|---|
| | | extern void set_ov7670_fifo_pin(int which, int level);
|
|---|
| | | extern void ov7670_fifo_read_prepare(void);
|
|---|
| | | extern int OV7670_Initialize(int output_fmt);
|
|---|
| | |
|
|---|
| | | #endif
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åGPIOÄ£ÄâÉãÏñÍ·SCCB(Serial Camera Control Bus)µÄʵÏÖ,
|
|---|
| | | * SCCBµÄ¹¤×÷·½Ê½ÓëI2CÊ®·ÖÀàËÆ£¬ËûʹÓÃOV¹«Ë¾¶¨ÒåµÄ3Ïß´®ÐÐÉãÏñÍ·¿ØÖÆ×ÜÏߣ¬
|
|---|
| | | * ¿ÉÒÔ¿ØÖƴ󲿷ÖOVϵÁÐͼÐδ«¸ÐÆ÷¡£SCCBÒ²¿ÉÒÔ¹¤×÷ÔÚ2Ïß´®ÐÐģʽ(SIOCÓëSIOD).
|
|---|
| | | * STM32ÉÏʹÓÃPE2ºÍPE3·Ö±ðÁ¬½ÓOV7670µÄSCCBʱÖÓ¿ÚºÍÊý¾Ý¿Ú,¸Ã´úÂëÖ÷ҪʹÓÃ
|
|---|
| | | * PE2ºÍPE3µÄGPIO¿ÚÄ£ÄâSCCB(Ò²¼´I2C)×ÜÏßÐÒé
|
|---|
| | | *
|
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | | /* CF7670C-V3ÉãÏñÍ·Ä£¿éPin¹Ü½ÅºÍSTM32v5 Á¬½Ó±í:
|
|---|
| | | *| ²Î¿¼<CF7670C-V3 ¼òҪ˵Ã÷.pdf>ºÍ<·Ü¶·STM32¿ª·¢°åV5ÔÀíͼ.pdf>
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| CF7670C-V3ÉãÏñÍ·Ä£¿éÒý½Å¼°ËµÃ÷ | STM32¶ËÒý½ÅÁ¬½Ó¼°ËµÃ÷ |
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| Pin1-VCC(3.3V,·½º¸Å̱ê¼ÇµÄΪµÚÒ»½Å) | 3.3V |
|
|---|
| | | *| Pin2-GND | GND |
|
|---|
| | | *| Pin3-SCL(SCCB_SCL²»´øÉÏÀµç×è) | PE2 |
|
|---|
| | | *| Pin4-SDA(SCCB_SDA ´ø4.7KÉÏÀµç×è) | PE3 |
|
|---|
| | | *| Pin5-VSYNC(OV7670 ֡ͬ²½ÐźÅ) | PE4 |
|
|---|
| | | *| Pin6-HREF(OV7670 ÐÐͬ²½ÐźÅ) | NC |
|
|---|
| | | *| Pin7-WEN(FIFO(AL422)дÔÊÐí,¸ßµçƽÓÐЧ | PE5 |
|
|---|
| | | *| Pin8-XCLK(NC/RE# ¿Õ½Å) | NC |
|
|---|
| | | *| Pin9-RRST(FIFO¶ÁµØÖ·¸´Î» | PE6 |
|
|---|
| | | *| Pin10-OE#(FIFOÊý¾ÝÊä³öʹÄÜ,µÍµçƽÓÐЧ | GND |
|
|---|
| | | *| Pin11-RCK#(FIFO¶ÁÊý¾ÝʱÖÓ | PD12 |
|
|---|
| | | *| Pin12-GND | GND |
|
|---|
| | | *| | |
|
|---|
| | | *| Pin13-D0 FIFOÊý¾Ý¿ÚÊä³öBIT0 | PC0 |
|
|---|
| | | *| Pin14-D1 FIFOÊý¾Ý¿ÚÊä³öBIT1 | PC1 |
|
|---|
| | | *| Pin15-D2 FIFOÊý¾Ý¿ÚÊä³öBIT2 | PC2 |
|
|---|
| | | *| Pin16-D3 FIFOÊý¾Ý¿ÚÊä³öBIT3 | PC3 |
|
|---|
| | | *| Pin17-D4 FIFOÊý¾Ý¿ÚÊä³öBIT4 | PC4 |
|
|---|
| | | *| Pin18-D5 FIFOÊý¾Ý¿ÚÊä³öBIT5 | PC5 |
|
|---|
| | | *| Pin19-D6 FIFOÊý¾Ý¿ÚÊä³öBIT6 | PC6 |
|
|---|
| | | *| Pin20-D7 FIFOÊý¾Ý¿ÚÊä³öBIT7 | PC7 |
|
|---|
| | | *+------------------+-----------------+---------------------------------+
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #include "stm32v5_sccb.h"
|
|---|
| | |
|
|---|
| | | /* ÅäÖÃÁ¬½ÓOV7670µÄSCCB_SCL(PE2)ºÍSCCB_SDA(PE3)ΪGPIOģʽģÄâ*/
|
|---|
| | | void init_sccb_gpio(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | | |
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
|
|---|
| | |
|
|---|
| | | /* Configure I2C pins: PE2->SCL and PE3->SDA */ |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 ;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode =GPIO_Mode_Out_PP ;// |
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP ;
|
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* I2C ×ÜÏßʱÖÓÑÓʱº¯Êý */
|
|---|
| | | static void I2C_delay(void)
|
|---|
| | | { |
|---|
| | | unsigned short i = 200; /* ÕâÀï¿ÉÒÔÓÅ»¯ËÙ¶È */
|
|---|
| | | while(i) |
|---|
| | | { |
|---|
| | | i--; |
|---|
| | | } |
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏß¿ªÊ¼ÐźŠ*/
|
|---|
| | | static int I2C_Start(void)
|
|---|
| | | {
|
|---|
| | | SDA_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H; |
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SDA_L;
|
|---|
| | | I2C_delay(); |
|---|
| | | |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay(); |
|---|
| | | |
|---|
| | | return ENABLE;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏßÍ£Ö¹ÐźŠ*/
|
|---|
| | | static void I2C_Stop(void)
|
|---|
| | | {
|
|---|
| | | SDA_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SDA_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏßSDAÊäÈë */
|
|---|
| | | void I2C_IN(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | | |
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
|
|---|
| | | |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; |
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; //GPIO_Mode_Out_OD;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏßSDAÊä³ö */
|
|---|
| | | void I2C_OUT(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | | |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
|
|---|
| | | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|---|
| | | GPIO_InitStructure.GPIO_Mode =GPIO_Mode_Out_PP ;// |
|---|
| | | GPIO_Init(GPIOE, &GPIO_InitStructure);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏßACKÐźŠ*/
|
|---|
| | | static void I2C_Ack(void)
|
|---|
| | | { |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SDA_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏßNAKÐźŠ*/
|
|---|
| | | static void I2C_NoAck(void)
|
|---|
| | | { |
|---|
| | | SDA_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SDA_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏߵȴýACKÐźŠ*/
|
|---|
| | | static int I2C_WaitAck(void) |
|---|
| | | {
|
|---|
| | | I2C_IN();
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | if(SDA_read)
|
|---|
| | | {
|
|---|
| | | SCL_L;
|
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | I2C_OUT();
|
|---|
| | | I2C_delay();
|
|---|
| | | return ENABLE;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏß·¢ËÍÒ»¸ö×Ö½ÚÊý¾Ý, Êý¾Ý´Ó¸ßλµ½µÍλ */
|
|---|
| | | static void I2C_SendByte(uint8_t SendByte) |
|---|
| | | {
|
|---|
| | | uint8_t i=8;
|
|---|
| | | |
|---|
| | | while(i--)
|
|---|
| | | {
|
|---|
| | | //SCL_L;
|
|---|
| | | //I2C_delay();
|
|---|
| | | if(SendByte&0x80) |
|---|
| | | SDA_H; |
|---|
| | | else
|
|---|
| | | SDA_L; |
|---|
| | | SendByte<<=1;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* I2C×ÜÏß½ÓÊÕÒ»¸ö×Ö½ÚÊý¾Ý, Êý¾Ý´Ó¸ßλµ½µÍλ */
|
|---|
| | | static int I2C_ReceiveByte(void) |
|---|
| | | { |
|---|
| | | uint8_t i=8;
|
|---|
| | | uint8_t ReceiveByte=0;
|
|---|
| | |
|
|---|
| | | SDA_H; |
|---|
| | | while(i--)
|
|---|
| | | {
|
|---|
| | | ReceiveByte<<=1; |
|---|
| | | SCL_L;
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | SCL_H;
|
|---|
| | | I2C_IN();
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | if(SDA_read)
|
|---|
| | | {
|
|---|
| | | ReceiveByte|=0x01;
|
|---|
| | | } |
|---|
| | | }
|
|---|
| | | |
|---|
| | | SCL_L;
|
|---|
| | | I2C_OUT();
|
|---|
| | | return ReceiveByte;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /*******************************************************************************
|
|---|
| | | * Function Name : I2C_WriteByte
|
|---|
| | | * Description : дһ×Ö½ÚÊý¾Ý
|
|---|
| | | * Input : - WriteAddress: ´ýдÈëµØÖ·
|
|---|
| | | * - SendByte: ´ýдÈëÊý¾Ý
|
|---|
| | | * - DeviceAddress: Æ÷¼þÀàÐÍ
|
|---|
| | | * Output : None
|
|---|
| | | * Return : ·µ»ØΪ:=1³É¹¦Ð´Èë,=0ʧ°Ü
|
|---|
| | | * Attention : None
|
|---|
| | | *******************************************************************************/ |
|---|
| | | int I2C_WriteByte( uint16_t WriteAddress , uint8_t SendByte , uint8_t DeviceAddress)
|
|---|
| | | { |
|---|
| | | if(!I2C_Start())
|
|---|
| | | {
|
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | I2C_SendByte( DeviceAddress ); /* Æ÷¼þµØÖ· */
|
|---|
| | | if( !I2C_WaitAck() )
|
|---|
| | | {
|
|---|
| | | I2C_Stop(); |
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | I2C_delay();
|
|---|
| | | |
|---|
| | | I2C_SendByte((uint8_t)(WriteAddress & 0x00FF)); /* ÉèÖõÍÆðʼµØÖ· */ |
|---|
| | | I2C_WaitAck();
|
|---|
| | | I2C_delay(); |
|---|
| | | |
|---|
| | | I2C_SendByte(SendByte);
|
|---|
| | | I2C_WaitAck();
|
|---|
| | | I2C_delay(); |
|---|
| | | |
|---|
| | | I2C_Stop(); |
|---|
| | | I2C_delay();
|
|---|
| | | return ENABLE;
|
|---|
| | | } |
|---|
| | |
|
|---|
| | | /*******************************************************************************
|
|---|
| | | * Function Name : I2C_ReadByte
|
|---|
| | | * Description : ¶ÁÈ¡Ò»´®Êý¾Ý
|
|---|
| | | * Input : - pBuffer: ´æ·Å¶Á³öÊý¾Ý
|
|---|
| | | * - length: ´ý¶Á³ö³¤¶È
|
|---|
| | | * - ReadAddress: ´ý¶Á³öµØÖ·
|
|---|
| | | * - DeviceAddress: Æ÷¼þÀàÐÍ
|
|---|
| | | * Output : None
|
|---|
| | | * Return : ·µ»ØΪ:=1³É¹¦¶ÁÈë,=0ʧ°Ü
|
|---|
| | | * Attention : None
|
|---|
| | | *******************************************************************************/ |
|---|
| | | int I2C_ReadByte(uint8_t* pBuffer, uint16_t length, uint8_t ReadAddress, uint8_t DeviceAddress)
|
|---|
| | | { |
|---|
| | | if(!I2C_Start())
|
|---|
| | | {
|
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | I2C_SendByte( DeviceAddress ); /* Æ÷¼þµØÖ· */
|
|---|
| | | if( !I2C_WaitAck() )
|
|---|
| | | {
|
|---|
| | | I2C_Stop(); |
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | I2C_SendByte( ReadAddress ); /* ÉèÖõÍÆðʼµØÖ· */ |
|---|
| | | I2C_WaitAck(); |
|---|
| | | I2C_Stop(); |
|---|
| | | |
|---|
| | | if(!I2C_Start())
|
|---|
| | | {
|
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | I2C_SendByte( DeviceAddress + 1 ); /* Æ÷¼þµØÖ· */ |
|---|
| | |
|
|---|
| | | if(!I2C_WaitAck())
|
|---|
| | | {
|
|---|
| | | I2C_Stop(); |
|---|
| | | return DISABLE;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | while(length)
|
|---|
| | | {
|
|---|
| | | *pBuffer = I2C_ReceiveByte();
|
|---|
| | | if(length == 1)
|
|---|
| | | {
|
|---|
| | | I2C_NoAck();
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | I2C_Ack(); |
|---|
| | | }
|
|---|
| | | |
|---|
| | | pBuffer++;
|
|---|
| | | length--;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | I2C_Stop();
|
|---|
| | | return ENABLE;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åGPIOÄ£ÄâÉãÏñÍ·SCCB(Serial Camera Control Bus)µÄʵÏÖ,
|
|---|
| | | * SCCBµÄ¹¤×÷·½Ê½ÓëI2CÊ®·ÖÀàËÆ£¬ËûʹÓÃOV¹«Ë¾¶¨ÒåµÄ3Ïß´®ÐÐÉãÏñÍ·¿ØÖÆ×ÜÏߣ¬
|
|---|
| | | * ¿ÉÒÔ¿ØÖƴ󲿷ÖOVϵÁÐͼÐδ«¸ÐÆ÷¡£SCCBÒ²¿ÉÒÔ¹¤×÷ÔÚ2Ïß´®ÐÐģʽ(SIOCÓëSIOD).
|
|---|
| | | * STM32ÉÏʹÓÃPE2ºÍPE3·Ö±ðÁ¬½ÓOV7670µÄSCCBʱÖÓ¿ÚºÍÊý¾Ý¿Ú,¸Ã´úÂëÖ÷ҪʹÓÃ
|
|---|
| | | * PE2ºÍPE3µÄGPIO¿ÚÄ£ÄâSCCB(Ò²¼´I2C)×ÜÏßÐÒé
|
|---|
| | | *
|
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | |
|
|---|
| | | /* CF7670C-V3ÉãÏñÍ·Ä£¿éPin¹Ü½ÅºÍSTM32v5 Á¬½Ó±í:
|
|---|
| | | *| ²Î¿¼<CF7670C-V3 ¼òҪ˵Ã÷.pdf>ºÍ<·Ü¶·STM32¿ª·¢°åV5ÔÀíͼ.pdf>
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| CF7670C-V3ÉãÏñÍ·Ä£¿éÒý½Å¼°ËµÃ÷ | STM32¶ËÒý½ÅÁ¬½Ó¼°ËµÃ÷ |
|
|---|
| | | *+---------------------------------------+------------------------------+
|
|---|
| | | *| Pin1-VCC(3.3V,·½º¸Å̱ê¼ÇµÄΪµÚÒ»½Å) | 3.3V |
|
|---|
| | | *| Pin2-GND | GND |
|
|---|
| | | *| Pin3-SCL(SCCB_SCL²»´øÉÏÀµç×è) | PE2 |
|
|---|
| | | *| Pin4-SDA(SCCB_SDA ´ø4.7KÉÏÀµç×è) | PE3 |
|
|---|
| | | *| Pin5-VSYNC(OV7670 ֡ͬ²½ÐźÅ) | PE4 |
|
|---|
| | | *| Pin6-HREF(OV7670 ÐÐͬ²½ÐźÅ) | NC |
|
|---|
| | | *| Pin7-WEN(FIFO(AL422)дÔÊÐí,¸ßµçƽÓÐЧ | PE5 |
|
|---|
| | | *| Pin8-XCLK(NC/RE# ¿Õ½Å) | NC |
|
|---|
| | | *| Pin9-RRST(FIFO¶ÁµØÖ·¸´Î» | PE6 |
|
|---|
| | | *| Pin10-OE#(FIFOÊý¾ÝÊä³öʹÄÜ,µÍµçƽÓÐЧ | GND |
|
|---|
| | | *| Pin11-RCK#(FIFO¶ÁÊý¾ÝʱÖÓ | PD12 |
|
|---|
| | | *| Pin12-GND | GND |
|
|---|
| | | *| | |
|
|---|
| | | *| Pin13-D0 FIFOÊý¾Ý¿ÚÊä³öBIT0 | PC0 |
|
|---|
| | | *| Pin14-D1 FIFOÊý¾Ý¿ÚÊä³öBIT1 | PC1 |
|
|---|
| | | *| Pin15-D2 FIFOÊý¾Ý¿ÚÊä³öBIT2 | PC2 |
|
|---|
| | | *| Pin16-D3 FIFOÊý¾Ý¿ÚÊä³öBIT3 | PC3 |
|
|---|
| | | *| Pin17-D4 FIFOÊý¾Ý¿ÚÊä³öBIT4 | PC4 |
|
|---|
| | | *| Pin18-D5 FIFOÊý¾Ý¿ÚÊä³öBIT5 | PC5 |
|
|---|
| | | *| Pin19-D6 FIFOÊý¾Ý¿ÚÊä³öBIT6 | PC6 |
|
|---|
| | | *| Pin20-D7 FIFOÊý¾Ý¿ÚÊä³öBIT7 | PC7 |
|
|---|
| | | *+------------------+-----------------+---------------------------------+
|
|---|
| | | */
|
|---|
| | | #ifndef __STM32V5_SCCB_H
|
|---|
| | | #define __STM32V5_SCCB_H
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /* I2C SCL/SDA Pin operation macro */
|
|---|
| | | #define SCL_H GPIOE->BSRR = GPIO_Pin_2 |
|---|
| | | #define SCL_L GPIOE->BRR = GPIO_Pin_2 |
|---|
| | | |
|---|
| | | #define SDA_H GPIOE->BSRR = GPIO_Pin_3 |
|---|
| | | #define SDA_L GPIOE->BRR = GPIO_Pin_3 |
|---|
| | |
|
|---|
| | | #define SCL_read GPIOE->IDR & GPIO_Pin_2 |
|---|
| | | #define SDA_read GPIOE->IDR & GPIO_Pin_3 |
|---|
| | |
|
|---|
| | | void init_sccb_gpio(void);
|
|---|
| | | int I2C_WriteByte(uint16_t WriteAddress , uint8_t SendByte , uint8_t DeviceAddress);
|
|---|
| | | int I2C_ReadByte (uint8_t* pBuffer, uint16_t length, uint8_t ReadAddress, uint8_t DeviceAddress);
|
|---|
| | |
|
|---|
| | | #endif
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åsystickºÍÑÓʱÏà¹Øº¯Êý£»
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | | #include "stm32v5_systick.h"
|
|---|
| | |
|
|---|
| | | static __IO uint32_t s_delay_clocks;
|
|---|
| | |
|
|---|
| | | /*
|
|---|
| | | SysTick_Config½«»á´ÓAHB×ÜÏß»ñȡʱÖÓ£¬¶øAHB×ÜÏßÓëϵͳºËÐÄʱÖÓÒ»ÖÂΪ72MHz.Ëü
|
|---|
| | | µÄÊäÈë²ÎÊýΪSystick½«Òª¼ÆʱµÄÂö³åÊý£¬¾¹ýticks¸öÂö³åºó½«´¥·¢Öжϣ¬Öжϴ¦Àí
|
|---|
| | | ³ÌÐòÖн«ÖØм¼Êõ¡£ÓÉ´ËÎÒÃÇ¿ÉÒÔ¼ÆËã³ö¶¨Ê±µÄʱ¼ä£¬ÏÂÃæΪ¼ÆË㹫ʽ£º
|
|---|
| | | T=ticks*(1/f) TΪҪ¶¨Ê±µÄ×Üʱ¼ä; ticksΪSysTick_Config()µÄÊäÈë²ÎÊý;1/f¼´Îª
|
|---|
| | | SysTickʹÓõÄʱÖÓÔ´µÄʱÖÓÖÜÆÚ£¬fΪ¸ÃʱÖÓÔ´µÄʱÖÓƵÂÊ£¬Îª72MHz.
|
|---|
| | | ÔÚÏÂÃæµÄ³ÌÐòÖÐ, SystemCoreClock¼´ÎªÏµÍ³Ê±ÖÓ(f),ÕâÑù£º |
|---|
| | | T= (f/CLOCK_SECOND) * (1*f) = 1/CLOCK_SECOND
|
|---|
| | | ËùÒÔ£¬Èç¹ûÎÒÃÇÐèÒª1ms¶¨Ê±£¬Ö»ÐèÒª½«CLOCK_SECOND¶¨ÒåΪ1000;
|
|---|
| | | Èç¹ûÎÒÃÇÐèÒª1us¶¨Ê±£¬Ö»ÐèÒª½«CLOCK_SECOND¶¨ÒåΪ1000000;
|
|---|
| | | */
|
|---|
| | | void sysclock_init(void)
|
|---|
| | | {
|
|---|
| | | if (SysTick_Config(SystemCoreClock / CLOCK_CONF_SECOND)) |
|---|
| | | {
|
|---|
| | | while(1);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void SysTick_Handler(void)
|
|---|
| | | {
|
|---|
| | | if (s_delay_clocks != 0x00)
|
|---|
| | | { |
|---|
| | | s_delay_clocks--;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void msleep(__IO uint32_t ms)
|
|---|
| | | {
|
|---|
| | | s_delay_clocks = ms;
|
|---|
| | | |
|---|
| | | while(s_delay_clocks != 0);
|
|---|
| | | } |
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°åsystickºÍÑÓʱÏà¹Øº¯Êý£»
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | |
|
|---|
| | | #ifndef __STM32V5_SYSTICK_H
|
|---|
| | | #define __STM32V5_SYSTICK_H
|
|---|
| | |
|
|---|
| | | #define MSECOND_OF_CLOCKS 1000 /* ʱÖÓ½ÚÅÄÖжÏΪ1msÒ»´Î */
|
|---|
| | | #define USECOND_OF_CLOCKS 1000000 /* ʱÖÓ½ÚÅÄÖжÏΪ1usÒ»´Î */
|
|---|
| | | #define CLOCK_CONF_SECOND MSECOND_OF_CLOCKS
|
|---|
| | | #define SECOND 1000 /* 1second = 1000ms */
|
|---|
| | |
|
|---|
| | | extern void sysclock_init(void);
|
|---|
| | | extern void sysclock_decrement(void);
|
|---|
| | | extern void msleep(__IO uint32_t ms);
|
|---|
| | |
|
|---|
| | | #endif
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°å´®¿Ú²Ù×÷º¯Êý½Ó¿Ú,printf¹³×Óº¯Êýfputc
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | | #include "stm32f10x_usart.h"
|
|---|
| | | #include "stm32v5_uart.h"
|
|---|
| | | #include <stdio.h>
|
|---|
| | |
|
|---|
| | | /* USARTx configured as follow:
|
|---|
| | | - BaudRate = 115200 baud |
|---|
| | | - Word Length = 8 Bits
|
|---|
| | | - One Stop Bit
|
|---|
| | | - No parity
|
|---|
| | | - Hardware flow control disabled (RTS and CTS signals)
|
|---|
| | | - Receive and transmit enabled
|
|---|
| | | */
|
|---|
| | | void USART_Config(USART_TypeDef* USARTx)
|
|---|
| | | {
|
|---|
| | | USART_InitTypeDef USART_InitStructure;
|
|---|
| | | |
|---|
| | | /* Configure USART1 */ |
|---|
| | | USART_InitStructure.USART_BaudRate = 115200; //ËÙÂÊ115200bps
|
|---|
| | | USART_InitStructure.USART_WordLength = USART_WordLength_8b; //Êý¾Ýλ8λ
|
|---|
| | | USART_InitStructure.USART_StopBits = USART_StopBits_1; //ֹͣλ1λ
|
|---|
| | | USART_InitStructure.USART_Parity = USART_Parity_No; //ÎÞУÑéλ
|
|---|
| | | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; //ÎÞÓ²¼þÁ÷¿Ø
|
|---|
| | | USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; //ÊÕ·¢Ä£Ê½
|
|---|
| | | USART_Init(USARTx, &USART_InitStructure); //ÅäÖô®¿Ú²ÎÊýº¯Êý
|
|---|
| | | |
|---|
| | | #if 0 |
|---|
| | | /* Enable USARTx Receive and Transmit interrupts */
|
|---|
| | | USART_ITConfig(USARTx, USART_IT_RXNE, ENABLE); //ʹÄܽÓÊÕÖжÏ
|
|---|
| | | USART_ITConfig(USARTx, USART_IT_TXE, ENABLE); //ʹÄÜ·¢ËÍ»º³å¿ÕÖÐ¶Ï |
|---|
| | | #endif
|
|---|
| | | |
|---|
| | | /* Enable the USARTx */
|
|---|
| | | USART_Cmd(USARTx, ENABLE); |
|---|
| | | }
|
|---|
| | |
|
|---|
| | | void dbg_setup_uart(void)
|
|---|
| | | {
|
|---|
| | | GPIO_InitTypeDef GPIO_InitStructure; |
|---|
| | | |
|---|
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_USART1, ENABLE); |
|---|
| | |
|
|---|
| | | /* ĬÈϸ´Óù¦ÄÜ */ |
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; //USART1 TX
|
|---|
| | | GPIO_InitStructure.GPIO_Speed= GPIO_Speed_50MHz; |
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //¸´ÓÃÍÆÍìÊä³ö
|
|---|
| | | GPIO_Init(GPIOA, &GPIO_InitStructure); |
|---|
| | | |
|---|
| | | /* ¸´Óù¦ÄܵÄÊäÈëÒý½Å±ØÐëÅäÖÃΪÊäÈëģʽ£¨¸¡¿Õ/ÉÏÀ/ÏÂÀµÄÒ»ÖÖ£©*/
|
|---|
| | | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; //USART1 RX
|
|---|
| | | GPIO_InitStructure.GPIO_Speed= GPIO_Speed_50MHz; |
|---|
| | | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //¸´Óø¡¿ÕÊäÈë
|
|---|
| | | GPIO_Init(GPIOA, &GPIO_InitStructure); |
|---|
| | | |
|---|
| | | USART_Config(DBG_UART);
|
|---|
| | |
|
|---|
| | | USART_SendData(DBG_UART, '\n'); |
|---|
| | | while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET); |
|---|
| | | }
|
|---|
| | |
|
|---|
| | | int fputc(int ch, FILE *f) |
|---|
| | | { |
|---|
| | | if('\n' == ch)
|
|---|
| | | {
|
|---|
| | | USART_SendData(DBG_UART, (uint8_t) '\r'); |
|---|
| | | while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET) ; |
|---|
| | | }
|
|---|
| | | |
|---|
| | | USART_SendData(DBG_UART, (uint8_t) ch); |
|---|
| | | while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET); |
|---|
| | | |
|---|
| | | return ch; |
|---|
| | | }
|
|---|
| | |
|
|---|
| New file |
| | |
|---|
| | | /****************************************************************************
|
|---|
| | | * Copyright: (C)2014 Î人ÁèÔÆǶÈëʽʵÑéÊÒ www.emblinux.com
|
|---|
| | | * Author: GuoWenxue<guowenxue@gmail.com> QQ: 281143292
|
|---|
| | | * Description: ·Ü¶·STM32v5¿ª·¢°å´®¿Ú²Ù×÷º¯Êý½Ó¿Ú,printf¹³×Óº¯Êýfputc
|
|---|
| | | * |
|---|
| | | * ChangeLog:
|
|---|
| | | * °æ±¾ºÅ ÈÕÆÚ ×÷Õß ËµÃ÷
|
|---|
| | | * V1.0.0 2014.08.25 GuoWenxue ·¢²¼¸Ã°æ±¾
|
|---|
| | | ****************************************************************************/
|
|---|
| | | #ifndef __STM32V5_UART_
|
|---|
| | | #define __STM32V5_UART_
|
|---|
| | |
|
|---|
| | | #ifndef DBG_UART
|
|---|
| | | #define DBG_UART USART1
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | void dbg_setup_uart(void);
|
|---|
| | |
|
|---|
| | | #endif
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file misc.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the miscellaneous
|
|---|
| | | * firmware library functions (add-on to CMSIS functions).
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __MISC_H
|
|---|
| | | #define __MISC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup MISC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief NVIC Init Structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
|
|---|
| | | This parameter can be a value of @ref IRQn_Type |
|---|
| | | (For the complete STM32 Devices IRQ Channels list, please
|
|---|
| | | refer to stm32f10x.h file) */
|
|---|
| | |
|
|---|
| | | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
|
|---|
| | | specified in NVIC_IRQChannel. This parameter can be a value
|
|---|
| | | between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
|---|
| | |
|
|---|
| | | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
|
|---|
| | | in NVIC_IRQChannel. This parameter can be a value
|
|---|
| | | between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
|---|
| | |
|
|---|
| | | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
|
|---|
| | | will be enabled or disabled. |
|---|
| | | This parameter can be set either to ENABLE or DISABLE */ |
|---|
| | | } NVIC_InitTypeDef;
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup NVIC_Priority_Table |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | @code |
|---|
| | | The table below gives the allowed values of the pre-emption priority and subpriority according
|
|---|
| | | to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
|
|---|
| | | ============================================================================================================================
|
|---|
| | | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
|
|---|
| | | ============================================================================================================================
|
|---|
| | | NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
|
|---|
| | | | | | 4 bits for subpriority
|
|---|
| | | ----------------------------------------------------------------------------------------------------------------------------
|
|---|
| | | NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
|
|---|
| | | | | | 3 bits for subpriority
|
|---|
| | | ---------------------------------------------------------------------------------------------------------------------------- |
|---|
| | | NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
|
|---|
| | | | | | 2 bits for subpriority
|
|---|
| | | ---------------------------------------------------------------------------------------------------------------------------- |
|---|
| | | NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
|
|---|
| | | | | | 1 bits for subpriority
|
|---|
| | | ---------------------------------------------------------------------------------------------------------------------------- |
|---|
| | | NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
|
|---|
| | | | | | 0 bits for subpriority |
|---|
| | | ============================================================================================================================
|
|---|
| | | @endcode
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Vector_Table_Base |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
|
|---|
| | | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
|
|---|
| | | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
|
|---|
| | | ((VECTTAB) == NVIC_VectTab_FLASH))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup System_Low_Power |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
|
|---|
| | | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
|
|---|
| | | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
|
|---|
| | | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
|
|---|
| | | ((LP) == NVIC_LP_SLEEPDEEP) || \
|
|---|
| | | ((LP) == NVIC_LP_SLEEPONEXIT))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Preemption_Priority_Group |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
|
|---|
| | | 4 bits for subpriority */
|
|---|
| | | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
|
|---|
| | | 3 bits for subpriority */
|
|---|
| | | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
|
|---|
| | | 2 bits for subpriority */
|
|---|
| | | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
|
|---|
| | | 1 bits for subpriority */
|
|---|
| | | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
|
|---|
| | | 0 bits for subpriority */
|
|---|
| | |
|
|---|
| | | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
|
|---|
| | | ((GROUP) == NVIC_PriorityGroup_1) || \
|
|---|
| | | ((GROUP) == NVIC_PriorityGroup_2) || \
|
|---|
| | | ((GROUP) == NVIC_PriorityGroup_3) || \
|
|---|
| | | ((GROUP) == NVIC_PriorityGroup_4))
|
|---|
| | |
|
|---|
| | | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
|---|
| | |
|
|---|
| | | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
|---|
| | |
|
|---|
| | | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SysTick_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
|
|---|
| | | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
|
|---|
| | | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
|
|---|
| | | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
|
|---|
| | | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
|
|---|
| | | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
|
|---|
| | | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
|
|---|
| | | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __MISC_H */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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| New file |
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| | | /**
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| | | ******************************************************************************
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| | | * @file stm32f10x_adc.h
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| | | * @author MCD Application Team
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| | | * @version V3.5.0
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| | | * @date 11-March-2011
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| | | * @brief This file contains all the functions prototypes for the ADC firmware |
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| | | * library.
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| | | ******************************************************************************
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| | | * @attention
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| | | *
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| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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| | | *
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| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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| | | ******************************************************************************
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| | | */
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| | |
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| | | /* Define to prevent recursive inclusion -------------------------------------*/
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| | | #ifndef __STM32F10x_ADC_H
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| | | #define __STM32F10x_ADC_H
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| | |
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| | | #ifdef __cplusplus
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| | | extern "C" {
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| | | #endif
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| | |
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| | | /* Includes ------------------------------------------------------------------*/
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| | | #include "stm32f10x.h"
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| | |
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| | | /** @addtogroup STM32F10x_StdPeriph_Driver
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| | | * @{
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| | | */
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| | |
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| | | /** @addtogroup ADC
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| | | * @{
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| | | */
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| | |
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| | | /** @defgroup ADC_Exported_Types
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| | | * @{
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| | | */
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| | |
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| | | /** |
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| | | * @brief ADC Init structure definition |
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| | | */
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| | |
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| | | typedef struct
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| | | {
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| | | uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or
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| | | dual mode. |
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| | | This parameter can be a value of @ref ADC_mode */
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| | |
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| | | FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
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| | | Scan (multichannels) or Single (one channel) mode.
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| | | This parameter can be set to ENABLE or DISABLE */
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| | |
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| | | FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
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| | | Continuous or Single mode.
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| | | This parameter can be set to ENABLE or DISABLE. */
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| | |
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| | | uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
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| | | to digital conversion of regular channels. This parameter
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| | | can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
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| | |
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| | | uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
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| | | This parameter can be a value of @ref ADC_data_align */
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| | |
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| | | uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted
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| | | using the sequencer for regular channel group.
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| | | This parameter must range from 1 to 16. */
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| | | }ADC_InitTypeDef;
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_Exported_Constants
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| | | * @{
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| | | */
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| | |
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| | | #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
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| | | ((PERIPH) == ADC2) || \
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| | | ((PERIPH) == ADC3))
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| | |
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| | | #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
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| | | ((PERIPH) == ADC3))
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| | |
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| | | /** @defgroup ADC_mode |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_Mode_Independent ((uint32_t)0x00000000)
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| | | #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
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| | | #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
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| | | #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
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| | | #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
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| | | #define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
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| | | #define ADC_Mode_RegSimult ((uint32_t)0x00060000)
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| | | #define ADC_Mode_FastInterl ((uint32_t)0x00070000)
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| | | #define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
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| | | #define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
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| | |
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| | | #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
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| | | ((MODE) == ADC_Mode_RegInjecSimult) || \
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| | | ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
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| | | ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
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| | | ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
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| | | ((MODE) == ADC_Mode_InjecSimult) || \
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| | | ((MODE) == ADC_Mode_RegSimult) || \
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| | | ((MODE) == ADC_Mode_FastInterl) || \
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| | | ((MODE) == ADC_Mode_SlowInterl) || \
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| | | ((MODE) == ADC_Mode_AlterTrig))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
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| | |
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| | | #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
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| | | #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
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| | |
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| | | #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */
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| | |
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| | | #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_None) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
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| | | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_data_align |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_DataAlign_Right ((uint32_t)0x00000000)
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| | | #define ADC_DataAlign_Left ((uint32_t)0x00000800)
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| | | #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
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| | | ((ALIGN) == ADC_DataAlign_Left))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_channels |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_Channel_0 ((uint8_t)0x00)
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| | | #define ADC_Channel_1 ((uint8_t)0x01)
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| | | #define ADC_Channel_2 ((uint8_t)0x02)
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| | | #define ADC_Channel_3 ((uint8_t)0x03)
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| | | #define ADC_Channel_4 ((uint8_t)0x04)
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| | | #define ADC_Channel_5 ((uint8_t)0x05)
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| | | #define ADC_Channel_6 ((uint8_t)0x06)
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| | | #define ADC_Channel_7 ((uint8_t)0x07)
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| | | #define ADC_Channel_8 ((uint8_t)0x08)
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| | | #define ADC_Channel_9 ((uint8_t)0x09)
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| | | #define ADC_Channel_10 ((uint8_t)0x0A)
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| | | #define ADC_Channel_11 ((uint8_t)0x0B)
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| | | #define ADC_Channel_12 ((uint8_t)0x0C)
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| | | #define ADC_Channel_13 ((uint8_t)0x0D)
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| | | #define ADC_Channel_14 ((uint8_t)0x0E)
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| | | #define ADC_Channel_15 ((uint8_t)0x0F)
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| | | #define ADC_Channel_16 ((uint8_t)0x10)
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| | | #define ADC_Channel_17 ((uint8_t)0x11)
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| | |
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| | | #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
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| | | #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
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| | |
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| | | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
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| | | ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
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| | | ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
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| | | ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
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| | | ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
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| | | ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
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| | | ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
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| | | ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
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| | | ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_sampling_time |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
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| | | #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01)
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| | | #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02)
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| | | #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
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| | | #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04)
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| | | #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
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| | | #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
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| | | #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
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| | | #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_7Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_13Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_28Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_41Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_55Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_71Cycles5) || \
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| | | ((TIME) == ADC_SampleTime_239Cycles5))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
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| | | #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
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| | |
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| | | #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
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| | | #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
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| | | #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
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| | | #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */
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| | | #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */
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| | |
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| | | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
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| | | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_injected_channel_selection |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_InjectedChannel_1 ((uint8_t)0x14)
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| | | #define ADC_InjectedChannel_2 ((uint8_t)0x18)
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| | | #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
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| | | #define ADC_InjectedChannel_4 ((uint8_t)0x20)
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| | | #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
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| | | ((CHANNEL) == ADC_InjectedChannel_2) || \
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| | | ((CHANNEL) == ADC_InjectedChannel_3) || \
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| | | ((CHANNEL) == ADC_InjectedChannel_4))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_analog_watchdog_selection |
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| | | * @{
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| | | */
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| | |
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| | | #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
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| | | #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
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| | | #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
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| | | #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
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| | | #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
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| | | #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
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| | | #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
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| | |
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| | | #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
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| | | ((WATCHDOG) == ADC_AnalogWatchdog_None))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup ADC_interrupts_definition |
|---|
| | | * @{
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|---|
| | | */
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| | |
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| | | #define ADC_IT_EOC ((uint16_t)0x0220)
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|---|
| | | #define ADC_IT_AWD ((uint16_t)0x0140)
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| | | #define ADC_IT_JEOC ((uint16_t)0x0480)
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| | |
|
|---|
| | | #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
|
|---|
| | |
|
|---|
| | | #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
|
|---|
| | | ((IT) == ADC_IT_JEOC))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_flags_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define ADC_FLAG_AWD ((uint8_t)0x01)
|
|---|
| | | #define ADC_FLAG_EOC ((uint8_t)0x02)
|
|---|
| | | #define ADC_FLAG_JEOC ((uint8_t)0x04)
|
|---|
| | | #define ADC_FLAG_JSTRT ((uint8_t)0x08)
|
|---|
| | | #define ADC_FLAG_STRT ((uint8_t)0x10)
|
|---|
| | | #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
|
|---|
| | | #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
|
|---|
| | | ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
|
|---|
| | | ((FLAG) == ADC_FLAG_STRT))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_thresholds |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_injected_offset |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_injected_length |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_injected_rank |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_regular_length |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_regular_rank |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_regular_discontinuous_mode_number |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void ADC_DeInit(ADC_TypeDef* ADCx);
|
|---|
| | | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
|
|---|
| | | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
|
|---|
| | | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
|
|---|
| | | void ADC_ResetCalibration(ADC_TypeDef* ADCx);
|
|---|
| | | FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
|
|---|
| | | void ADC_StartCalibration(ADC_TypeDef* ADCx);
|
|---|
| | | FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
|
|---|
| | | void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
|
|---|
| | | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
|
|---|
| | | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
|
|---|
| | | void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
|
|---|
| | | uint32_t ADC_GetDualModeConversionValue(void);
|
|---|
| | | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
|
|---|
| | | void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
|---|
| | | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
|
|---|
| | | void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
|
|---|
| | | void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
|
|---|
| | | void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
|
|---|
| | | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
|
|---|
| | | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
|
|---|
| | | void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
|
|---|
| | | void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
|
|---|
| | | void ADC_TempSensorVrefintCmd(FunctionalState NewState);
|
|---|
| | | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
|
|---|
| | | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
|
|---|
| | | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
|
|---|
| | | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_ADC_H */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_bkp.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the BKP firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_BKP_H
|
|---|
| | | #define __STM32F10x_BKP_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup BKP
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Tamper_Pin_active_level |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define BKP_TamperPinLevel_High ((uint16_t)0x0000)
|
|---|
| | | #define BKP_TamperPinLevel_Low ((uint16_t)0x0001)
|
|---|
| | | #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
|
|---|
| | | ((LEVEL) == BKP_TamperPinLevel_Low))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RTC_output_source_to_output_on_the_Tamper_pin |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define BKP_RTCOutputSource_None ((uint16_t)0x0000)
|
|---|
| | | #define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)
|
|---|
| | | #define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100)
|
|---|
| | | #define BKP_RTCOutputSource_Second ((uint16_t)0x0300)
|
|---|
| | | #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
|
|---|
| | | ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
|
|---|
| | | ((SOURCE) == BKP_RTCOutputSource_Alarm) || \
|
|---|
| | | ((SOURCE) == BKP_RTCOutputSource_Second))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Data_Backup_Register |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define BKP_DR1 ((uint16_t)0x0004)
|
|---|
| | | #define BKP_DR2 ((uint16_t)0x0008)
|
|---|
| | | #define BKP_DR3 ((uint16_t)0x000C)
|
|---|
| | | #define BKP_DR4 ((uint16_t)0x0010)
|
|---|
| | | #define BKP_DR5 ((uint16_t)0x0014)
|
|---|
| | | #define BKP_DR6 ((uint16_t)0x0018)
|
|---|
| | | #define BKP_DR7 ((uint16_t)0x001C)
|
|---|
| | | #define BKP_DR8 ((uint16_t)0x0020)
|
|---|
| | | #define BKP_DR9 ((uint16_t)0x0024)
|
|---|
| | | #define BKP_DR10 ((uint16_t)0x0028)
|
|---|
| | | #define BKP_DR11 ((uint16_t)0x0040)
|
|---|
| | | #define BKP_DR12 ((uint16_t)0x0044)
|
|---|
| | | #define BKP_DR13 ((uint16_t)0x0048)
|
|---|
| | | #define BKP_DR14 ((uint16_t)0x004C)
|
|---|
| | | #define BKP_DR15 ((uint16_t)0x0050)
|
|---|
| | | #define BKP_DR16 ((uint16_t)0x0054)
|
|---|
| | | #define BKP_DR17 ((uint16_t)0x0058)
|
|---|
| | | #define BKP_DR18 ((uint16_t)0x005C)
|
|---|
| | | #define BKP_DR19 ((uint16_t)0x0060)
|
|---|
| | | #define BKP_DR20 ((uint16_t)0x0064)
|
|---|
| | | #define BKP_DR21 ((uint16_t)0x0068)
|
|---|
| | | #define BKP_DR22 ((uint16_t)0x006C)
|
|---|
| | | #define BKP_DR23 ((uint16_t)0x0070)
|
|---|
| | | #define BKP_DR24 ((uint16_t)0x0074)
|
|---|
| | | #define BKP_DR25 ((uint16_t)0x0078)
|
|---|
| | | #define BKP_DR26 ((uint16_t)0x007C)
|
|---|
| | | #define BKP_DR27 ((uint16_t)0x0080)
|
|---|
| | | #define BKP_DR28 ((uint16_t)0x0084)
|
|---|
| | | #define BKP_DR29 ((uint16_t)0x0088)
|
|---|
| | | #define BKP_DR30 ((uint16_t)0x008C)
|
|---|
| | | #define BKP_DR31 ((uint16_t)0x0090)
|
|---|
| | | #define BKP_DR32 ((uint16_t)0x0094)
|
|---|
| | | #define BKP_DR33 ((uint16_t)0x0098)
|
|---|
| | | #define BKP_DR34 ((uint16_t)0x009C)
|
|---|
| | | #define BKP_DR35 ((uint16_t)0x00A0)
|
|---|
| | | #define BKP_DR36 ((uint16_t)0x00A4)
|
|---|
| | | #define BKP_DR37 ((uint16_t)0x00A8)
|
|---|
| | | #define BKP_DR38 ((uint16_t)0x00AC)
|
|---|
| | | #define BKP_DR39 ((uint16_t)0x00B0)
|
|---|
| | | #define BKP_DR40 ((uint16_t)0x00B4)
|
|---|
| | | #define BKP_DR41 ((uint16_t)0x00B8)
|
|---|
| | | #define BKP_DR42 ((uint16_t)0x00BC)
|
|---|
| | |
|
|---|
| | | #define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \
|
|---|
| | | ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \
|
|---|
| | | ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \
|
|---|
| | | ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
|
|---|
| | | ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
|
|---|
| | | ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
|
|---|
| | | ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
|
|---|
| | | ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
|
|---|
| | | ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
|
|---|
| | | ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
|
|---|
| | | ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
|
|---|
| | | ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
|
|---|
| | | ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
|
|---|
| | | ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
|
|---|
| | |
|
|---|
| | | #define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void BKP_DeInit(void);
|
|---|
| | | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel);
|
|---|
| | | void BKP_TamperPinCmd(FunctionalState NewState);
|
|---|
| | | void BKP_ITConfig(FunctionalState NewState);
|
|---|
| | | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource);
|
|---|
| | | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue);
|
|---|
| | | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
|
|---|
| | | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
|
|---|
| | | FlagStatus BKP_GetFlagStatus(void);
|
|---|
| | | void BKP_ClearFlag(void);
|
|---|
| | | ITStatus BKP_GetITStatus(void);
|
|---|
| | | void BKP_ClearITPendingBit(void);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_BKP_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_can.h
|
|---|
| | | * @author MCD Application Team
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| | | * @version V3.5.0
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| | | * @date 11-March-2011
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| | | * @brief This file contains all the functions prototypes for the CAN firmware |
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| | | * library.
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| | | ******************************************************************************
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| | | * @attention
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| | | *
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| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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| | | *
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| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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| | | ******************************************************************************
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| | | */
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| | |
|
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| | | /* Define to prevent recursive inclusion -------------------------------------*/
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| | | #ifndef __STM32F10x_CAN_H
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| | | #define __STM32F10x_CAN_H
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| | |
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| | | #ifdef __cplusplus
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| | | extern "C" {
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| | | #endif
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| | |
|
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| | | /* Includes ------------------------------------------------------------------*/
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| | | #include "stm32f10x.h"
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| | |
|
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| | | /** @addtogroup STM32F10x_StdPeriph_Driver
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| | | * @{
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| | | */
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| | |
|
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| | | /** @addtogroup CAN
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| | | * @{
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| | | */
|
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| | |
|
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| | | /** @defgroup CAN_Exported_Types
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| | | * @{
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| | | */
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| | |
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| | | #define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \
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| | | ((PERIPH) == CAN2))
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| | |
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| | | /** |
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| | | * @brief CAN init structure definition
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| | | */
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| | |
|
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| | | typedef struct
|
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| | | {
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| | | uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. |
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| | | It ranges from 1 to 1024. */
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| | | |
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| | | uint8_t CAN_Mode; /*!< Specifies the CAN operating mode.
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| | | This parameter can be a value of |
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| | | @ref CAN_operating_mode */
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| | |
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| | | uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta |
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| | | the CAN hardware is allowed to lengthen or |
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| | | shorten a bit to perform resynchronization.
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| | | This parameter can be a value of |
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| | | @ref CAN_synchronisation_jump_width */
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| | |
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| | | uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit |
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| | | Segment 1. This parameter can be a value of |
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| | | @ref CAN_time_quantum_in_bit_segment_1 */
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| | |
|
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| | | uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit |
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| | | Segment 2.
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| | | This parameter can be a value of |
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| | | @ref CAN_time_quantum_in_bit_segment_2 */
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| | | |
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| | | FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered |
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| | | communication mode. This parameter can be set |
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| | | either to ENABLE or DISABLE. */
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| | | |
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| | | FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off |
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| | | management. This parameter can be set either |
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| | | to ENABLE or DISABLE. */
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| | |
|
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| | | FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode. |
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| | | This parameter can be set either to ENABLE or |
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| | | DISABLE. */
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| | |
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| | | FunctionalState CAN_NART; /*!< Enable or disable the no-automatic |
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| | | retransmission mode. This parameter can be |
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| | | set either to ENABLE or DISABLE. */
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| | |
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| | | FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode.
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| | | This parameter can be set either to ENABLE |
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| | | or DISABLE. */
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| | |
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| | | FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority.
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| | | This parameter can be set either to ENABLE |
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| | | or DISABLE. */
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| | | } CAN_InitTypeDef;
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| | |
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| | | /** |
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| | | * @brief CAN filter init structure definition
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| | | */
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| | |
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| | | typedef struct
|
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| | | {
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| | | uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
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| | | configuration, first one for a 16-bit configuration).
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| | | This parameter can be a value between 0x0000 and 0xFFFF */
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| | |
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| | | uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
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| | | configuration, second one for a 16-bit configuration).
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| | | This parameter can be a value between 0x0000 and 0xFFFF */
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| | |
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| | | uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
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| | | according to the mode (MSBs for a 32-bit configuration,
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| | | first one for a 16-bit configuration).
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| | | This parameter can be a value between 0x0000 and 0xFFFF */
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| | |
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| | | uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
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| | | according to the mode (LSBs for a 32-bit configuration,
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| | | second one for a 16-bit configuration).
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| | | This parameter can be a value between 0x0000 and 0xFFFF */
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| | |
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| | | uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
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| | | This parameter can be a value of @ref CAN_filter_FIFO */
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| | | |
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| | | uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */
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| | |
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| | | uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized.
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| | | This parameter can be a value of @ref CAN_filter_mode */
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| | |
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| | | uint8_t CAN_FilterScale; /*!< Specifies the filter scale.
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| | | This parameter can be a value of @ref CAN_filter_scale */
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| | |
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| | | FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter.
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| | | This parameter can be set either to ENABLE or DISABLE. */
|
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| | | } CAN_FilterInitTypeDef;
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| | |
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| | | /** |
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| | | * @brief CAN Tx message structure definition |
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| | | */
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| | |
|
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| | | typedef struct
|
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| | | {
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| | | uint32_t StdId; /*!< Specifies the standard identifier.
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| | | This parameter can be a value between 0 to 0x7FF. */
|
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| | |
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| | | uint32_t ExtId; /*!< Specifies the extended identifier.
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| | | This parameter can be a value between 0 to 0x1FFFFFFF. */
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| | |
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| | | uint8_t IDE; /*!< Specifies the type of identifier for the message that |
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| | | will be transmitted. This parameter can be a value |
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| | | of @ref CAN_identifier_type */
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| | |
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| | | uint8_t RTR; /*!< Specifies the type of frame for the message that will |
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| | | be transmitted. This parameter can be a value of |
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| | | @ref CAN_remote_transmission_request */
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| | |
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| | | uint8_t DLC; /*!< Specifies the length of the frame that will be |
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| | | transmitted. This parameter can be a value between |
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| | | 0 to 8 */
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| | |
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| | | uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 |
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| | | to 0xFF. */
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| | | } CanTxMsg;
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| | |
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| | | /** |
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| | | * @brief CAN Rx message structure definition |
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| | | */
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| | |
|
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| | | typedef struct
|
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| | | {
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| | | uint32_t StdId; /*!< Specifies the standard identifier.
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| | | This parameter can be a value between 0 to 0x7FF. */
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| | |
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| | | uint32_t ExtId; /*!< Specifies the extended identifier.
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| | | This parameter can be a value between 0 to 0x1FFFFFFF. */
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| | |
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| | | uint8_t IDE; /*!< Specifies the type of identifier for the message that |
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| | | will be received. This parameter can be a value of |
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| | | @ref CAN_identifier_type */
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| | |
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| | | uint8_t RTR; /*!< Specifies the type of frame for the received message.
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| | | This parameter can be a value of |
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| | | @ref CAN_remote_transmission_request */
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| | |
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| | | uint8_t DLC; /*!< Specifies the length of the frame that will be received.
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| | | This parameter can be a value between 0 to 8 */
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| | |
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| | | uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to |
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| | | 0xFF. */
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| | |
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| | | uint8_t FMI; /*!< Specifies the index of the filter the message stored in |
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| | | the mailbox passes through. This parameter can be a |
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| | | value between 0 to 0xFF */
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| | | } CanRxMsg;
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| | |
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup CAN_Exported_Constants
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| | | * @{
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| | | */
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| | |
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| | | /** @defgroup CAN_sleep_constants |
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| | | * @{
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| | | */
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| | |
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| | | #define CAN_InitStatus_Failed ((uint8_t)0x00) /*!< CAN initialization failed */
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| | | #define CAN_InitStatus_Success ((uint8_t)0x01) /*!< CAN initialization OK */
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| | |
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup CAN_Mode |
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| | | * @{
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| | | */
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| | |
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| | | #define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */
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| | | #define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */
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| | | #define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */
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| | | #define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */
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| | |
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| | | #define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || \
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| | | ((MODE) == CAN_Mode_LoopBack)|| \
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| | | ((MODE) == CAN_Mode_Silent) || \
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| | | ((MODE) == CAN_Mode_Silent_LoopBack))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | |
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| | | /**
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| | | * @defgroup CAN_Operating_Mode |
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| | | * @{
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| | | */ |
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| | | #define CAN_OperatingMode_Initialization ((uint8_t)0x00) /*!< Initialization mode */
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| | | #define CAN_OperatingMode_Normal ((uint8_t)0x01) /*!< Normal mode */
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| | | #define CAN_OperatingMode_Sleep ((uint8_t)0x02) /*!< sleep mode */
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| | |
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| | |
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| | | #define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\
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| | | ((MODE) == CAN_OperatingMode_Normal)|| \
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| | | ((MODE) == CAN_OperatingMode_Sleep))
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| | | /**
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| | | * @}
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| | | */
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| | | |
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| | | /**
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| | | * @defgroup CAN_Mode_Status
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| | | * @{
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| | | */ |
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| | |
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| | | #define CAN_ModeStatus_Failed ((uint8_t)0x00) /*!< CAN entering the specific mode failed */
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| | | #define CAN_ModeStatus_Success ((uint8_t)!CAN_ModeStatus_Failed) /*!< CAN entering the specific mode Succeed */
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| | |
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| | |
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup CAN_synchronisation_jump_width |
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| | | * @{
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| | | */
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| | |
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| | | #define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */
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| | | #define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */
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| | | #define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */
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| | | #define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */
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| | |
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| | | #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \
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| | | ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup CAN_time_quantum_in_bit_segment_1 |
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| | | * @{
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| | | */
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| | |
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| | | #define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */
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| | | #define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */
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| | | #define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */
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| | | #define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */
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| | | #define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */
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| | | #define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */
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| | | #define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */
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| | | #define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */
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| | | #define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */
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| | | #define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */
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| | | #define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */
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| | | #define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */
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| | | #define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */
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| | | #define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */
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| | | #define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */
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| | | #define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */
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| | |
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| | | #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq)
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| | | /**
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| | | * @}
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| | | */
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| | |
|
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| | | /** @defgroup CAN_time_quantum_in_bit_segment_2 |
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| | | * @{
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| | | */
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| | |
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| | | #define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */
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| | | #define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */
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| | | #define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */
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| | | #define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */
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| | | #define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */
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| | | #define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */
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| | | #define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */
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| | | #define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */
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| | |
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| | | #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq)
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| | |
|
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| | | /**
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| | | * @}
|
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| | | */
|
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| | |
|
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| | | /** @defgroup CAN_clock_prescaler |
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| | | * @{
|
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| | | */
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| | |
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| | | #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
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| | |
|
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| | | /**
|
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| | | * @}
|
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| | | */
|
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| | |
|
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| | | /** @defgroup CAN_filter_number |
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| | | * @{
|
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| | | */
|
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| | | #ifndef STM32F10X_CL
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| | | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13)
|
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| | | #else
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| | | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
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| | | #endif /* STM32F10X_CL */ |
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| | | /**
|
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| | | * @}
|
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| | | */
|
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| | |
|
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| | | /** @defgroup CAN_filter_mode |
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| | | * @{
|
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| | | */
|
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| | |
|
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| | | #define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< identifier/mask mode */
|
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| | | #define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */
|
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| | |
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| | | #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \
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| | | ((MODE) == CAN_FilterMode_IdList))
|
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| | | /**
|
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| | | * @}
|
|---|
| | | */
|
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| | |
|
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| | | /** @defgroup CAN_filter_scale |
|---|
| | | * @{
|
|---|
| | | */
|
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| | |
|
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| | | #define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */
|
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| | | #define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */
|
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| | |
|
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| | | #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \
|
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| | | ((SCALE) == CAN_FilterScale_32bit))
|
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| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
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| | |
|
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| | | /** @defgroup CAN_filter_FIFO
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
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| | | #define CAN_Filter_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
|
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| | | #define CAN_Filter_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
|
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| | | #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \
|
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| | | ((FIFO) == CAN_FilterFIFO1))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
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| | |
|
|---|
| | | /** @defgroup Start_bank_filter_for_slave_CAN |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Tx |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
|
|---|
| | | #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
|
|---|
| | | #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
|
|---|
| | | #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_identifier_type |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */
|
|---|
| | | #define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */
|
|---|
| | | #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \
|
|---|
| | | ((IDTYPE) == CAN_Id_Extended))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_remote_transmission_request |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */
|
|---|
| | | #define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */
|
|---|
| | | #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_transmit_constants |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_TxStatus_Failed ((uint8_t)0x00)/*!< CAN transmission failed */
|
|---|
| | | #define CAN_TxStatus_Ok ((uint8_t)0x01) /*!< CAN transmission succeeded */
|
|---|
| | | #define CAN_TxStatus_Pending ((uint8_t)0x02) /*!< CAN transmission pending */
|
|---|
| | | #define CAN_TxStatus_NoMailBox ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_receive_FIFO_number_constants |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
|
|---|
| | | #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
|
|---|
| | |
|
|---|
| | | #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_sleep_constants |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_Sleep_Failed ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */
|
|---|
| | | #define CAN_Sleep_Ok ((uint8_t)0x01) /*!< CAN entered the sleep mode */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_wake_up_constants |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define CAN_WakeUp_Failed ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */
|
|---|
| | | #define CAN_WakeUp_Ok ((uint8_t)0x01) /*!< CAN leaved the sleep mode */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @defgroup CAN_Error_Code_constants
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define CAN_ErrorCode_NoErr ((uint8_t)0x00) /*!< No Error */ |
|---|
| | | #define CAN_ErrorCode_StuffErr ((uint8_t)0x10) /*!< Stuff Error */ |
|---|
| | | #define CAN_ErrorCode_FormErr ((uint8_t)0x20) /*!< Form Error */ |
|---|
| | | #define CAN_ErrorCode_ACKErr ((uint8_t)0x30) /*!< Acknowledgment Error */ |
|---|
| | | #define CAN_ErrorCode_BitRecessiveErr ((uint8_t)0x40) /*!< Bit Recessive Error */ |
|---|
| | | #define CAN_ErrorCode_BitDominantErr ((uint8_t)0x50) /*!< Bit Dominant Error */ |
|---|
| | | #define CAN_ErrorCode_CRCErr ((uint8_t)0x60) /*!< CRC Error */ |
|---|
| | | #define CAN_ErrorCode_SoftwareSetErr ((uint8_t)0x70) /*!< Software Set Error */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
|
|---|
| | | and CAN_ClearFlag() functions. */
|
|---|
| | | /* If the flag is 0x1XXXXXXX, it means that it can only be used with CAN_GetFlagStatus() function. */
|
|---|
| | |
|
|---|
| | | /* Transmit Flags */
|
|---|
| | | #define CAN_FLAG_RQCP0 ((uint32_t)0x38000001) /*!< Request MailBox0 Flag */
|
|---|
| | | #define CAN_FLAG_RQCP1 ((uint32_t)0x38000100) /*!< Request MailBox1 Flag */
|
|---|
| | | #define CAN_FLAG_RQCP2 ((uint32_t)0x38010000) /*!< Request MailBox2 Flag */
|
|---|
| | |
|
|---|
| | | /* Receive Flags */
|
|---|
| | | #define CAN_FLAG_FMP0 ((uint32_t)0x12000003) /*!< FIFO 0 Message Pending Flag */
|
|---|
| | | #define CAN_FLAG_FF0 ((uint32_t)0x32000008) /*!< FIFO 0 Full Flag */
|
|---|
| | | #define CAN_FLAG_FOV0 ((uint32_t)0x32000010) /*!< FIFO 0 Overrun Flag */
|
|---|
| | | #define CAN_FLAG_FMP1 ((uint32_t)0x14000003) /*!< FIFO 1 Message Pending Flag */
|
|---|
| | | #define CAN_FLAG_FF1 ((uint32_t)0x34000008) /*!< FIFO 1 Full Flag */
|
|---|
| | | #define CAN_FLAG_FOV1 ((uint32_t)0x34000010) /*!< FIFO 1 Overrun Flag */
|
|---|
| | |
|
|---|
| | | /* Operating Mode Flags */
|
|---|
| | | #define CAN_FLAG_WKU ((uint32_t)0x31000008) /*!< Wake up Flag */
|
|---|
| | | #define CAN_FLAG_SLAK ((uint32_t)0x31000012) /*!< Sleep acknowledge Flag */
|
|---|
| | | /* Note: When SLAK intterupt is disabled (SLKIE=0), no polling on SLAKI is possible. |
|---|
| | | In this case the SLAK bit can be polled.*/
|
|---|
| | |
|
|---|
| | | /* Error Flags */
|
|---|
| | | #define CAN_FLAG_EWG ((uint32_t)0x10F00001) /*!< Error Warning Flag */
|
|---|
| | | #define CAN_FLAG_EPV ((uint32_t)0x10F00002) /*!< Error Passive Flag */
|
|---|
| | | #define CAN_FLAG_BOF ((uint32_t)0x10F00004) /*!< Bus-Off Flag */
|
|---|
| | | #define CAN_FLAG_LEC ((uint32_t)0x30F00070) /*!< Last error code Flag */
|
|---|
| | |
|
|---|
| | | #define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_BOF) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FMP0) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_FMP1) || ((FLAG) == CAN_FLAG_RQCP2) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_RQCP1)|| ((FLAG) == CAN_FLAG_RQCP0) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_SLAK ))
|
|---|
| | |
|
|---|
| | | #define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_RQCP2) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) ||\
|
|---|
| | | ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \
|
|---|
| | | ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_SLAK))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | |
|---|
| | | /** @defgroup CAN_interrupts |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | |
|---|
| | | #define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty Interrupt*/
|
|---|
| | |
|
|---|
| | | /* Receive Interrupts */
|
|---|
| | | #define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending Interrupt*/
|
|---|
| | | #define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full Interrupt*/
|
|---|
| | | #define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun Interrupt*/
|
|---|
| | | #define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending Interrupt*/
|
|---|
| | | #define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full Interrupt*/
|
|---|
| | | #define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun Interrupt*/
|
|---|
| | |
|
|---|
| | | /* Operating Mode Interrupts */
|
|---|
| | | #define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up Interrupt*/
|
|---|
| | | #define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep acknowledge Interrupt*/
|
|---|
| | |
|
|---|
| | | /* Error Interrupts */
|
|---|
| | | #define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning Interrupt*/
|
|---|
| | | #define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive Interrupt*/
|
|---|
| | | #define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off Interrupt*/
|
|---|
| | | #define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code Interrupt*/
|
|---|
| | | #define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error Interrupt*/
|
|---|
| | |
|
|---|
| | | /* Flags named as Interrupts : kept only for FW compatibility */
|
|---|
| | | #define CAN_IT_RQCP0 CAN_IT_TME
|
|---|
| | | #define CAN_IT_RQCP1 CAN_IT_TME
|
|---|
| | | #define CAN_IT_RQCP2 CAN_IT_TME
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | #define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
|
|---|
| | | ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
|
|---|
| | | ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
|
|---|
| | | ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
|
|---|
| | | ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
|
|---|
| | | ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
|
|---|
| | | ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
|
|---|
| | |
|
|---|
| | | #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\
|
|---|
| | | ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\
|
|---|
| | | ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\
|
|---|
| | | ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
|
|---|
| | | ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
|
|---|
| | | ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Legacy |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define CANINITFAILED CAN_InitStatus_Failed
|
|---|
| | | #define CANINITOK CAN_InitStatus_Success
|
|---|
| | | #define CAN_FilterFIFO0 CAN_Filter_FIFO0
|
|---|
| | | #define CAN_FilterFIFO1 CAN_Filter_FIFO1
|
|---|
| | | #define CAN_ID_STD CAN_Id_Standard |
|---|
| | | #define CAN_ID_EXT CAN_Id_Extended
|
|---|
| | | #define CAN_RTR_DATA CAN_RTR_Data |
|---|
| | | #define CAN_RTR_REMOTE CAN_RTR_Remote
|
|---|
| | | #define CANTXFAILE CAN_TxStatus_Failed
|
|---|
| | | #define CANTXOK CAN_TxStatus_Ok
|
|---|
| | | #define CANTXPENDING CAN_TxStatus_Pending
|
|---|
| | | #define CAN_NO_MB CAN_TxStatus_NoMailBox
|
|---|
| | | #define CANSLEEPFAILED CAN_Sleep_Failed
|
|---|
| | | #define CANSLEEPOK CAN_Sleep_Ok
|
|---|
| | | #define CANWAKEUPFAILED CAN_WakeUp_Failed |
|---|
| | | #define CANWAKEUPOK CAN_WakeUp_Ok |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | /* Function used to set the CAN configuration to the default reset state *****/ |
|---|
| | | void CAN_DeInit(CAN_TypeDef* CANx);
|
|---|
| | |
|
|---|
| | | /* Initialization and Configuration functions *********************************/ |
|---|
| | | uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct);
|
|---|
| | | void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct);
|
|---|
| | | void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct);
|
|---|
| | | void CAN_SlaveStartBank(uint8_t CAN_BankNumber); |
|---|
| | | void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState);
|
|---|
| | | void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState);
|
|---|
| | |
|
|---|
| | | /* Transmit functions *********************************************************/
|
|---|
| | | uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage);
|
|---|
| | | uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox);
|
|---|
| | | void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox);
|
|---|
| | |
|
|---|
| | | /* Receive functions **********************************************************/
|
|---|
| | | void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage);
|
|---|
| | | void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber);
|
|---|
| | | uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber);
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* Operation modes functions **************************************************/
|
|---|
| | | uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode);
|
|---|
| | | uint8_t CAN_Sleep(CAN_TypeDef* CANx);
|
|---|
| | | uint8_t CAN_WakeUp(CAN_TypeDef* CANx);
|
|---|
| | |
|
|---|
| | | /* Error management functions *************************************************/
|
|---|
| | | uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx);
|
|---|
| | | uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx);
|
|---|
| | | uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx);
|
|---|
| | |
|
|---|
| | | /* Interrupts and flags management functions **********************************/
|
|---|
| | | void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState);
|
|---|
| | | FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
|
|---|
| | | void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
|
|---|
| | | ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT);
|
|---|
| | | void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_CAN_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_cec.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the CEC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_CEC_H
|
|---|
| | | #define __STM32F10x_CEC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup CEC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /** |
|---|
| | | * @brief CEC Init structure definition |
|---|
| | | */ |
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. |
|---|
| | | This parameter can be a value of @ref CEC_BitTiming_Mode */
|
|---|
| | | uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. |
|---|
| | | This parameter can be a value of @ref CEC_BitPeriod_Mode */
|
|---|
| | | }CEC_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | /** @defgroup CEC_BitTiming_Mode |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */
|
|---|
| | | #define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */
|
|---|
| | |
|
|---|
| | | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \
|
|---|
| | | ((MODE) == CEC_BitTimingErrFreeMode))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_BitPeriod_Mode |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */
|
|---|
| | | #define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */
|
|---|
| | |
|
|---|
| | | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \
|
|---|
| | | ((MODE) == CEC_BitPeriodFlexibleMode))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define CEC_IT_TERR CEC_CSR_TERR
|
|---|
| | | #define CEC_IT_TBTRF CEC_CSR_TBTRF
|
|---|
| | | #define CEC_IT_RERR CEC_CSR_RERR
|
|---|
| | | #define CEC_IT_RBTF CEC_CSR_RBTF
|
|---|
| | | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \
|
|---|
| | | ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Own_Address |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Prescaler |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_flags_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /** |
|---|
| | | * @brief ESR register flags |
|---|
| | | */ |
|---|
| | | #define CEC_FLAG_BTE ((uint32_t)0x10010000)
|
|---|
| | | #define CEC_FLAG_BPE ((uint32_t)0x10020000)
|
|---|
| | | #define CEC_FLAG_RBTFE ((uint32_t)0x10040000)
|
|---|
| | | #define CEC_FLAG_SBE ((uint32_t)0x10080000)
|
|---|
| | | #define CEC_FLAG_ACKE ((uint32_t)0x10100000)
|
|---|
| | | #define CEC_FLAG_LINE ((uint32_t)0x10200000)
|
|---|
| | | #define CEC_FLAG_TBTFE ((uint32_t)0x10400000)
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief CSR register flags |
|---|
| | | */ |
|---|
| | | #define CEC_FLAG_TEOM ((uint32_t)0x00000002) |
|---|
| | | #define CEC_FLAG_TERR ((uint32_t)0x00000004)
|
|---|
| | | #define CEC_FLAG_TBTRF ((uint32_t)0x00000008)
|
|---|
| | | #define CEC_FLAG_RSOM ((uint32_t)0x00000010)
|
|---|
| | | #define CEC_FLAG_REOM ((uint32_t)0x00000020)
|
|---|
| | | #define CEC_FLAG_RERR ((uint32_t)0x00000040)
|
|---|
| | | #define CEC_FLAG_RBTF ((uint32_t)0x00000080)
|
|---|
| | |
|
|---|
| | | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00))
|
|---|
| | | |
|---|
| | | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \
|
|---|
| | | ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CEC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | void CEC_DeInit(void);
|
|---|
| | | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct);
|
|---|
| | | void CEC_Cmd(FunctionalState NewState);
|
|---|
| | | void CEC_ITConfig(FunctionalState NewState);
|
|---|
| | | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress);
|
|---|
| | | void CEC_SetPrescaler(uint16_t CEC_Prescaler);
|
|---|
| | | void CEC_SendDataByte(uint8_t Data);
|
|---|
| | | uint8_t CEC_ReceiveDataByte(void);
|
|---|
| | | void CEC_StartOfMessage(void);
|
|---|
| | | void CEC_EndOfMessageCmd(FunctionalState NewState);
|
|---|
| | | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG);
|
|---|
| | | void CEC_ClearFlag(uint32_t CEC_FLAG);
|
|---|
| | | ITStatus CEC_GetITStatus(uint8_t CEC_IT);
|
|---|
| | | void CEC_ClearITPendingBit(uint16_t CEC_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_CEC_H */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h |
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 08-April-2011
|
|---|
| | | * @brief Library configuration file.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_CONF_H
|
|---|
| | | #define __STM32F10x_CONF_H
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
|
|---|
| | | #include "stm32f10x_adc.h"
|
|---|
| | | #include "stm32f10x_bkp.h"
|
|---|
| | | #include "stm32f10x_can.h"
|
|---|
| | | #include "stm32f10x_cec.h"
|
|---|
| | | #include "stm32f10x_crc.h"
|
|---|
| | | #include "stm32f10x_dac.h"
|
|---|
| | | #include "stm32f10x_dbgmcu.h"
|
|---|
| | | #include "stm32f10x_dma.h"
|
|---|
| | | #include "stm32f10x_exti.h"
|
|---|
| | | #include "stm32f10x_flash.h"
|
|---|
| | | #include "stm32f10x_fsmc.h"
|
|---|
| | | #include "stm32f10x_gpio.h"
|
|---|
| | | #include "stm32f10x_i2c.h"
|
|---|
| | | #include "stm32f10x_iwdg.h"
|
|---|
| | | #include "stm32f10x_pwr.h"
|
|---|
| | | #include "stm32f10x_rcc.h"
|
|---|
| | | #include "stm32f10x_rtc.h"
|
|---|
| | | #include "stm32f10x_sdio.h"
|
|---|
| | | #include "stm32f10x_spi.h"
|
|---|
| | | #include "stm32f10x_tim.h"
|
|---|
| | | #include "stm32f10x_usart.h"
|
|---|
| | | #include "stm32f10x_wwdg.h"
|
|---|
| | | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
|---|
| | |
|
|---|
| | | /* Exported types ------------------------------------------------------------*/
|
|---|
| | | /* Exported constants --------------------------------------------------------*/
|
|---|
| | | /* Uncomment the line below to expanse the "assert_param" macro in the |
|---|
| | | Standard Peripheral Library drivers code */
|
|---|
| | | /* #define USE_FULL_ASSERT 1 */
|
|---|
| | |
|
|---|
| | | /* Exported macro ------------------------------------------------------------*/
|
|---|
| | | #ifdef USE_FULL_ASSERT
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief The assert_param macro is used for function's parameters check.
|
|---|
| | | * @param expr: If expr is false, it calls assert_failed function which reports |
|---|
| | | * the name of the source file and the source line number of the call |
|---|
| | | * that failed. If expr is true, it returns no value.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
|---|
| | | /* Exported functions ------------------------------------------------------- */
|
|---|
| | | void assert_failed(uint8_t* file, uint32_t line);
|
|---|
| | | #else
|
|---|
| | | #define assert_param(expr) ((void)0)
|
|---|
| | | #endif /* USE_FULL_ASSERT */
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_CONF_H */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_crc.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the CRC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_CRC_H
|
|---|
| | | #define __STM32F10x_CRC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup CRC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CRC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CRC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CRC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CRC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void CRC_ResetDR(void);
|
|---|
| | | uint32_t CRC_CalcCRC(uint32_t Data);
|
|---|
| | | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
|
|---|
| | | uint32_t CRC_GetCRC(void);
|
|---|
| | | void CRC_SetIDRegister(uint8_t IDValue);
|
|---|
| | | uint8_t CRC_GetIDRegister(void);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_CRC_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_dac.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the DAC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_DAC_H
|
|---|
| | | #define __STM32F10x_DAC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup DAC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief DAC Init structure definition
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
|
|---|
| | | This parameter can be a value of @ref DAC_trigger_selection */
|
|---|
| | |
|
|---|
| | | uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves
|
|---|
| | | are generated, or whether no wave is generated.
|
|---|
| | | This parameter can be a value of @ref DAC_wave_generation */
|
|---|
| | |
|
|---|
| | | uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or
|
|---|
| | | the maximum amplitude triangle generation for the DAC channel. |
|---|
| | | This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */
|
|---|
| | |
|
|---|
| | | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
|
|---|
| | | This parameter can be a value of @ref DAC_output_buffer */
|
|---|
| | | }DAC_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_trigger_selection |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register |
|---|
| | | has been loaded, and not by external trigger */
|
|---|
| | | #define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
|
|---|
| | | only in High-density devices*/
|
|---|
| | | #define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
|
|---|
| | | only in Connectivity line, Medium-density and Low-density Value Line devices */
|
|---|
| | | #define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel |
|---|
| | | only in Medium-density and Low-density Value Line devices*/
|
|---|
| | | #define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
|
|---|
| | | #define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */
|
|---|
| | |
|
|---|
| | | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T6_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T8_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T7_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T5_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T2_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_T4_TRGO) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_Ext_IT9) || \
|
|---|
| | | ((TRIGGER) == DAC_Trigger_Software))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_wave_generation |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_WaveGeneration_None ((uint32_t)0x00000000)
|
|---|
| | | #define DAC_WaveGeneration_Noise ((uint32_t)0x00000040)
|
|---|
| | | #define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080)
|
|---|
| | | #define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \
|
|---|
| | | ((WAVE) == DAC_WaveGeneration_Noise) || \
|
|---|
| | | ((WAVE) == DAC_WaveGeneration_Triangle))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_lfsrunmask_triangleamplitude
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
|
|---|
| | | #define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
|
|---|
| | | #define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */
|
|---|
| | | #define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */
|
|---|
| | | #define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */
|
|---|
| | | #define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */
|
|---|
| | | #define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */
|
|---|
| | | #define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */
|
|---|
| | | #define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */
|
|---|
| | | #define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */
|
|---|
| | | #define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */
|
|---|
| | | #define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */
|
|---|
| | | #define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */
|
|---|
| | | #define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */
|
|---|
| | |
|
|---|
| | | #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \
|
|---|
| | | ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_1) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_3) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_7) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_15) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_31) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_63) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_127) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_255) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_511) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_1023) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_2047) || \
|
|---|
| | | ((VALUE) == DAC_TriangleAmplitude_4095))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_output_buffer |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_OutputBuffer_Enable ((uint32_t)0x00000000)
|
|---|
| | | #define DAC_OutputBuffer_Disable ((uint32_t)0x00000002)
|
|---|
| | | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \
|
|---|
| | | ((STATE) == DAC_OutputBuffer_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_Channel_selection |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_Channel_1 ((uint32_t)0x00000000)
|
|---|
| | | #define DAC_Channel_2 ((uint32_t)0x00000010)
|
|---|
| | | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \
|
|---|
| | | ((CHANNEL) == DAC_Channel_2))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_data_alignment |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_Align_12b_R ((uint32_t)0x00000000)
|
|---|
| | | #define DAC_Align_12b_L ((uint32_t)0x00000004)
|
|---|
| | | #define DAC_Align_8b_R ((uint32_t)0x00000008)
|
|---|
| | | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \
|
|---|
| | | ((ALIGN) == DAC_Align_12b_L) || \
|
|---|
| | | ((ALIGN) == DAC_Align_8b_R))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_wave_generation |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DAC_Wave_Noise ((uint32_t)0x00000040)
|
|---|
| | | #define DAC_Wave_Triangle ((uint32_t)0x00000080)
|
|---|
| | | #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \
|
|---|
| | | ((WAVE) == DAC_Wave_Triangle))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_data |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
|---|
| | | /** @defgroup DAC_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define DAC_IT_DMAUDR ((uint32_t)0x00002000) |
|---|
| | | #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR)) |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup DAC_flags_definition |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) |
|---|
| | | #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR)) |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DAC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void DAC_DeInit(void);
|
|---|
| | | void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct);
|
|---|
| | | void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct);
|
|---|
| | | void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState);
|
|---|
| | | #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
|---|
| | | void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState);
|
|---|
| | | #endif
|
|---|
| | | void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState);
|
|---|
| | | void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState);
|
|---|
| | | void DAC_DualSoftwareTriggerCmd(FunctionalState NewState);
|
|---|
| | | void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState);
|
|---|
| | | void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data);
|
|---|
| | | void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data);
|
|---|
| | | void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1);
|
|---|
| | | uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel);
|
|---|
| | | #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) |
|---|
| | | FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG);
|
|---|
| | | void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG);
|
|---|
| | | ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT);
|
|---|
| | | void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT);
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_DAC_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_dbgmcu.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the DBGMCU |
|---|
| | | * firmware library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_DBGMCU_H
|
|---|
| | | #define __STM32F10x_DBGMCU_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup DBGMCU
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DBGMCU_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DBGMCU_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
|
|---|
| | | #define DBGMCU_STOP ((uint32_t)0x00000002)
|
|---|
| | | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
|
|---|
| | | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
|
|---|
| | | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
|
|---|
| | | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
|
|---|
| | | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
|
|---|
| | | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
|
|---|
| | | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
|
|---|
| | | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
|
|---|
| | | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
|
|---|
| | | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
|
|---|
| | | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
|
|---|
| | | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
|
|---|
| | | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
|
|---|
| | | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
|
|---|
| | | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
|
|---|
| | | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000)
|
|---|
| | | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000)
|
|---|
| | | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000)
|
|---|
| | | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000)
|
|---|
| | | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000)
|
|---|
| | | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000)
|
|---|
| | | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000)
|
|---|
| | | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000)
|
|---|
| | | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000)
|
|---|
| | | |
|---|
| | | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup DBGMCU_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DBGMCU_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | uint32_t DBGMCU_GetREVID(void);
|
|---|
| | | uint32_t DBGMCU_GetDEVID(void);
|
|---|
| | | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_DBGMCU_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_dma.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the DMA firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_DMA_H
|
|---|
| | | #define __STM32F10x_DMA_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup DMA
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief DMA Init structure definition
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
|
|---|
| | | This parameter can be a value of @ref DMA_data_transfer_direction */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. |
|---|
| | | The data unit is equal to the configuration set in DMA_PeripheralDataSize
|
|---|
| | | or DMA_MemoryDataSize members depending in the transfer direction. */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
|
|---|
| | | This parameter can be a value of @ref DMA_peripheral_incremented_mode */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
|
|---|
| | | This parameter can be a value of @ref DMA_memory_incremented_mode */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width.
|
|---|
| | | This parameter can be a value of @ref DMA_peripheral_data_size */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width.
|
|---|
| | | This parameter can be a value of @ref DMA_memory_data_size */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx.
|
|---|
| | | This parameter can be a value of @ref DMA_circular_normal_mode.
|
|---|
| | | @note: The circular buffer mode cannot be used if the memory-to-memory
|
|---|
| | | data transfer is configured on the selected Channel */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
|
|---|
| | | This parameter can be a value of @ref DMA_priority_level */
|
|---|
| | |
|
|---|
| | | uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
|
|---|
| | | This parameter can be a value of @ref DMA_memory_to_memory */
|
|---|
| | | }DMA_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel2) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel3) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel4) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel5) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel6) || \
|
|---|
| | | ((PERIPH) == DMA1_Channel7) || \
|
|---|
| | | ((PERIPH) == DMA2_Channel1) || \
|
|---|
| | | ((PERIPH) == DMA2_Channel2) || \
|
|---|
| | | ((PERIPH) == DMA2_Channel3) || \
|
|---|
| | | ((PERIPH) == DMA2_Channel4) || \
|
|---|
| | | ((PERIPH) == DMA2_Channel5))
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_data_transfer_direction |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)
|
|---|
| | | #define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
|
|---|
| | | ((DIR) == DMA_DIR_PeripheralSRC))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_peripheral_incremented_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)
|
|---|
| | | #define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
|
|---|
| | | ((STATE) == DMA_PeripheralInc_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_memory_incremented_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_MemoryInc_Enable ((uint32_t)0x00000080)
|
|---|
| | | #define DMA_MemoryInc_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
|
|---|
| | | ((STATE) == DMA_MemoryInc_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_peripheral_data_size |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)
|
|---|
| | | #define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)
|
|---|
| | | #define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)
|
|---|
| | | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
|
|---|
| | | ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
|
|---|
| | | ((SIZE) == DMA_PeripheralDataSize_Word))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_memory_data_size |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)
|
|---|
| | | #define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)
|
|---|
| | | #define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)
|
|---|
| | | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
|
|---|
| | | ((SIZE) == DMA_MemoryDataSize_HalfWord) || \
|
|---|
| | | ((SIZE) == DMA_MemoryDataSize_Word))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_circular_normal_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_Mode_Circular ((uint32_t)0x00000020)
|
|---|
| | | #define DMA_Mode_Normal ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_priority_level |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_Priority_VeryHigh ((uint32_t)0x00003000)
|
|---|
| | | #define DMA_Priority_High ((uint32_t)0x00002000)
|
|---|
| | | #define DMA_Priority_Medium ((uint32_t)0x00001000)
|
|---|
| | | #define DMA_Priority_Low ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
|
|---|
| | | ((PRIORITY) == DMA_Priority_High) || \
|
|---|
| | | ((PRIORITY) == DMA_Priority_Medium) || \
|
|---|
| | | ((PRIORITY) == DMA_Priority_Low))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_memory_to_memory |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_M2M_Enable ((uint32_t)0x00004000)
|
|---|
| | | #define DMA_M2M_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define DMA_IT_TC ((uint32_t)0x00000002)
|
|---|
| | | #define DMA_IT_HT ((uint32_t)0x00000004)
|
|---|
| | | #define DMA_IT_TE ((uint32_t)0x00000008)
|
|---|
| | | #define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
|
|---|
| | |
|
|---|
| | | #define DMA1_IT_GL1 ((uint32_t)0x00000001)
|
|---|
| | | #define DMA1_IT_TC1 ((uint32_t)0x00000002)
|
|---|
| | | #define DMA1_IT_HT1 ((uint32_t)0x00000004)
|
|---|
| | | #define DMA1_IT_TE1 ((uint32_t)0x00000008)
|
|---|
| | | #define DMA1_IT_GL2 ((uint32_t)0x00000010)
|
|---|
| | | #define DMA1_IT_TC2 ((uint32_t)0x00000020)
|
|---|
| | | #define DMA1_IT_HT2 ((uint32_t)0x00000040)
|
|---|
| | | #define DMA1_IT_TE2 ((uint32_t)0x00000080)
|
|---|
| | | #define DMA1_IT_GL3 ((uint32_t)0x00000100)
|
|---|
| | | #define DMA1_IT_TC3 ((uint32_t)0x00000200)
|
|---|
| | | #define DMA1_IT_HT3 ((uint32_t)0x00000400)
|
|---|
| | | #define DMA1_IT_TE3 ((uint32_t)0x00000800)
|
|---|
| | | #define DMA1_IT_GL4 ((uint32_t)0x00001000)
|
|---|
| | | #define DMA1_IT_TC4 ((uint32_t)0x00002000)
|
|---|
| | | #define DMA1_IT_HT4 ((uint32_t)0x00004000)
|
|---|
| | | #define DMA1_IT_TE4 ((uint32_t)0x00008000)
|
|---|
| | | #define DMA1_IT_GL5 ((uint32_t)0x00010000)
|
|---|
| | | #define DMA1_IT_TC5 ((uint32_t)0x00020000)
|
|---|
| | | #define DMA1_IT_HT5 ((uint32_t)0x00040000)
|
|---|
| | | #define DMA1_IT_TE5 ((uint32_t)0x00080000)
|
|---|
| | | #define DMA1_IT_GL6 ((uint32_t)0x00100000)
|
|---|
| | | #define DMA1_IT_TC6 ((uint32_t)0x00200000)
|
|---|
| | | #define DMA1_IT_HT6 ((uint32_t)0x00400000)
|
|---|
| | | #define DMA1_IT_TE6 ((uint32_t)0x00800000)
|
|---|
| | | #define DMA1_IT_GL7 ((uint32_t)0x01000000)
|
|---|
| | | #define DMA1_IT_TC7 ((uint32_t)0x02000000)
|
|---|
| | | #define DMA1_IT_HT7 ((uint32_t)0x04000000)
|
|---|
| | | #define DMA1_IT_TE7 ((uint32_t)0x08000000)
|
|---|
| | |
|
|---|
| | | #define DMA2_IT_GL1 ((uint32_t)0x10000001)
|
|---|
| | | #define DMA2_IT_TC1 ((uint32_t)0x10000002)
|
|---|
| | | #define DMA2_IT_HT1 ((uint32_t)0x10000004)
|
|---|
| | | #define DMA2_IT_TE1 ((uint32_t)0x10000008)
|
|---|
| | | #define DMA2_IT_GL2 ((uint32_t)0x10000010)
|
|---|
| | | #define DMA2_IT_TC2 ((uint32_t)0x10000020)
|
|---|
| | | #define DMA2_IT_HT2 ((uint32_t)0x10000040)
|
|---|
| | | #define DMA2_IT_TE2 ((uint32_t)0x10000080)
|
|---|
| | | #define DMA2_IT_GL3 ((uint32_t)0x10000100)
|
|---|
| | | #define DMA2_IT_TC3 ((uint32_t)0x10000200)
|
|---|
| | | #define DMA2_IT_HT3 ((uint32_t)0x10000400)
|
|---|
| | | #define DMA2_IT_TE3 ((uint32_t)0x10000800)
|
|---|
| | | #define DMA2_IT_GL4 ((uint32_t)0x10001000)
|
|---|
| | | #define DMA2_IT_TC4 ((uint32_t)0x10002000)
|
|---|
| | | #define DMA2_IT_HT4 ((uint32_t)0x10004000)
|
|---|
| | | #define DMA2_IT_TE4 ((uint32_t)0x10008000)
|
|---|
| | | #define DMA2_IT_GL5 ((uint32_t)0x10010000)
|
|---|
| | | #define DMA2_IT_TC5 ((uint32_t)0x10020000)
|
|---|
| | | #define DMA2_IT_HT5 ((uint32_t)0x10040000)
|
|---|
| | | #define DMA2_IT_TE5 ((uint32_t)0x10080000)
|
|---|
| | |
|
|---|
| | | #define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
|
|---|
| | |
|
|---|
| | | #define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
|
|---|
| | | ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
|
|---|
| | | ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
|
|---|
| | | ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
|
|---|
| | | ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
|
|---|
| | | ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
|
|---|
| | | ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
|
|---|
| | | ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
|
|---|
| | | ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
|
|---|
| | | ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \
|
|---|
| | | ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \
|
|---|
| | | ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \
|
|---|
| | | ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \
|
|---|
| | | ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \
|
|---|
| | | ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \
|
|---|
| | | ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \
|
|---|
| | | ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \
|
|---|
| | | ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \
|
|---|
| | | ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \
|
|---|
| | | ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \
|
|---|
| | | ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \
|
|---|
| | | ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \
|
|---|
| | | ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \
|
|---|
| | | ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_flags_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define DMA1_FLAG_GL1 ((uint32_t)0x00000001)
|
|---|
| | | #define DMA1_FLAG_TC1 ((uint32_t)0x00000002)
|
|---|
| | | #define DMA1_FLAG_HT1 ((uint32_t)0x00000004)
|
|---|
| | | #define DMA1_FLAG_TE1 ((uint32_t)0x00000008)
|
|---|
| | | #define DMA1_FLAG_GL2 ((uint32_t)0x00000010)
|
|---|
| | | #define DMA1_FLAG_TC2 ((uint32_t)0x00000020)
|
|---|
| | | #define DMA1_FLAG_HT2 ((uint32_t)0x00000040)
|
|---|
| | | #define DMA1_FLAG_TE2 ((uint32_t)0x00000080)
|
|---|
| | | #define DMA1_FLAG_GL3 ((uint32_t)0x00000100)
|
|---|
| | | #define DMA1_FLAG_TC3 ((uint32_t)0x00000200)
|
|---|
| | | #define DMA1_FLAG_HT3 ((uint32_t)0x00000400)
|
|---|
| | | #define DMA1_FLAG_TE3 ((uint32_t)0x00000800)
|
|---|
| | | #define DMA1_FLAG_GL4 ((uint32_t)0x00001000)
|
|---|
| | | #define DMA1_FLAG_TC4 ((uint32_t)0x00002000)
|
|---|
| | | #define DMA1_FLAG_HT4 ((uint32_t)0x00004000)
|
|---|
| | | #define DMA1_FLAG_TE4 ((uint32_t)0x00008000)
|
|---|
| | | #define DMA1_FLAG_GL5 ((uint32_t)0x00010000)
|
|---|
| | | #define DMA1_FLAG_TC5 ((uint32_t)0x00020000)
|
|---|
| | | #define DMA1_FLAG_HT5 ((uint32_t)0x00040000)
|
|---|
| | | #define DMA1_FLAG_TE5 ((uint32_t)0x00080000)
|
|---|
| | | #define DMA1_FLAG_GL6 ((uint32_t)0x00100000)
|
|---|
| | | #define DMA1_FLAG_TC6 ((uint32_t)0x00200000)
|
|---|
| | | #define DMA1_FLAG_HT6 ((uint32_t)0x00400000)
|
|---|
| | | #define DMA1_FLAG_TE6 ((uint32_t)0x00800000)
|
|---|
| | | #define DMA1_FLAG_GL7 ((uint32_t)0x01000000)
|
|---|
| | | #define DMA1_FLAG_TC7 ((uint32_t)0x02000000)
|
|---|
| | | #define DMA1_FLAG_HT7 ((uint32_t)0x04000000)
|
|---|
| | | #define DMA1_FLAG_TE7 ((uint32_t)0x08000000)
|
|---|
| | |
|
|---|
| | | #define DMA2_FLAG_GL1 ((uint32_t)0x10000001)
|
|---|
| | | #define DMA2_FLAG_TC1 ((uint32_t)0x10000002)
|
|---|
| | | #define DMA2_FLAG_HT1 ((uint32_t)0x10000004)
|
|---|
| | | #define DMA2_FLAG_TE1 ((uint32_t)0x10000008)
|
|---|
| | | #define DMA2_FLAG_GL2 ((uint32_t)0x10000010)
|
|---|
| | | #define DMA2_FLAG_TC2 ((uint32_t)0x10000020)
|
|---|
| | | #define DMA2_FLAG_HT2 ((uint32_t)0x10000040)
|
|---|
| | | #define DMA2_FLAG_TE2 ((uint32_t)0x10000080)
|
|---|
| | | #define DMA2_FLAG_GL3 ((uint32_t)0x10000100)
|
|---|
| | | #define DMA2_FLAG_TC3 ((uint32_t)0x10000200)
|
|---|
| | | #define DMA2_FLAG_HT3 ((uint32_t)0x10000400)
|
|---|
| | | #define DMA2_FLAG_TE3 ((uint32_t)0x10000800)
|
|---|
| | | #define DMA2_FLAG_GL4 ((uint32_t)0x10001000)
|
|---|
| | | #define DMA2_FLAG_TC4 ((uint32_t)0x10002000)
|
|---|
| | | #define DMA2_FLAG_HT4 ((uint32_t)0x10004000)
|
|---|
| | | #define DMA2_FLAG_TE4 ((uint32_t)0x10008000)
|
|---|
| | | #define DMA2_FLAG_GL5 ((uint32_t)0x10010000)
|
|---|
| | | #define DMA2_FLAG_TC5 ((uint32_t)0x10020000)
|
|---|
| | | #define DMA2_FLAG_HT5 ((uint32_t)0x10040000)
|
|---|
| | | #define DMA2_FLAG_TE5 ((uint32_t)0x10080000)
|
|---|
| | |
|
|---|
| | | #define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
|
|---|
| | |
|
|---|
| | | #define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \
|
|---|
| | | ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \
|
|---|
| | | ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_Buffer_Size |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup DMA_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
|
|---|
| | | void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
|
|---|
| | | void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
|
|---|
| | | void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
|
|---|
| | | void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
|
|---|
| | | void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); |
|---|
| | | uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
|
|---|
| | | FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG);
|
|---|
| | | void DMA_ClearFlag(uint32_t DMAy_FLAG);
|
|---|
| | | ITStatus DMA_GetITStatus(uint32_t DMAy_IT);
|
|---|
| | | void DMA_ClearITPendingBit(uint32_t DMAy_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_DMA_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_exti.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the EXTI firmware
|
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_EXTI_H
|
|---|
| | | #define __STM32F10x_EXTI_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup EXTI
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup EXTI_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief EXTI mode enumeration |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | {
|
|---|
| | | EXTI_Mode_Interrupt = 0x00,
|
|---|
| | | EXTI_Mode_Event = 0x04
|
|---|
| | | }EXTIMode_TypeDef;
|
|---|
| | |
|
|---|
| | | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief EXTI Trigger enumeration |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | {
|
|---|
| | | EXTI_Trigger_Rising = 0x08,
|
|---|
| | | EXTI_Trigger_Falling = 0x0C, |
|---|
| | | EXTI_Trigger_Rising_Falling = 0x10
|
|---|
| | | }EXTITrigger_TypeDef;
|
|---|
| | |
|
|---|
| | | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
|
|---|
| | | ((TRIGGER) == EXTI_Trigger_Falling) || \
|
|---|
| | | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
|
|---|
| | | /** |
|---|
| | | * @brief EXTI Init Structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
|
|---|
| | | This parameter can be any combination of @ref EXTI_Lines */
|
|---|
| | | |
|---|
| | | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
|
|---|
| | | This parameter can be a value of @ref EXTIMode_TypeDef */
|
|---|
| | |
|
|---|
| | | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
|
|---|
| | | This parameter can be a value of @ref EXTIMode_TypeDef */
|
|---|
| | |
|
|---|
| | | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
|
|---|
| | | This parameter can be set either to ENABLE or DISABLE */ |
|---|
| | | }EXTI_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup EXTI_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup EXTI_Lines |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
|
|---|
| | | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
|
|---|
| | | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
|
|---|
| | | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
|
|---|
| | | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
|
|---|
| | | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
|
|---|
| | | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
|
|---|
| | | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
|
|---|
| | | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
|
|---|
| | | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
|
|---|
| | | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
|
|---|
| | | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
|
|---|
| | | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
|
|---|
| | | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
|
|---|
| | | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
|
|---|
| | | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
|
|---|
| | | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
|
|---|
| | | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
|
|---|
| | | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
|
|---|
| | | Wakeup from suspend event */ |
|---|
| | | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
|
|---|
| | | |
|---|
| | | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
|
|---|
| | | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
|
|---|
| | | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
|
|---|
| | | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
|
|---|
| | | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
|
|---|
| | | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
|
|---|
| | | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
|
|---|
| | | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
|
|---|
| | | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
|
|---|
| | | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
|
|---|
| | | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
|
|---|
| | |
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup EXTI_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup EXTI_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void EXTI_DeInit(void);
|
|---|
| | | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
|
|---|
| | | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
|
|---|
| | | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
|
|---|
| | | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
|
|---|
| | | void EXTI_ClearFlag(uint32_t EXTI_Line);
|
|---|
| | | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
|
|---|
| | | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_EXTI_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_flash.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the FLASH |
|---|
| | | * firmware library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_FLASH_H
|
|---|
| | | #define __STM32F10x_FLASH_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup FLASH
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FLASH_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief FLASH Status |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | { |
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| | | FLASH_BUSY = 1,
|
|---|
| | | FLASH_ERROR_PG,
|
|---|
| | | FLASH_ERROR_WRP,
|
|---|
| | | FLASH_COMPLETE,
|
|---|
| | | FLASH_TIMEOUT
|
|---|
| | | }FLASH_Status;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FLASH_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Flash_Latency |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */
|
|---|
| | | #define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */
|
|---|
| | | #define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */
|
|---|
| | | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
|
|---|
| | | ((LATENCY) == FLASH_Latency_1) || \
|
|---|
| | | ((LATENCY) == FLASH_Latency_2))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Half_Cycle_Enable_Disable |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */
|
|---|
| | | #define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */
|
|---|
| | | #define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \
|
|---|
| | | ((STATE) == FLASH_HalfCycleAccess_Disable)) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Prefetch_Buffer_Enable_Disable |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */
|
|---|
| | | #define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */
|
|---|
| | | #define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \
|
|---|
| | | ((STATE) == FLASH_PrefetchBuffer_Disable)) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Option_Bytes_Write_Protection |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Values to be used with STM32 Low and Medium density devices */
|
|---|
| | | #define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */
|
|---|
| | | #define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */
|
|---|
| | | #define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */
|
|---|
| | | #define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */
|
|---|
| | | #define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */
|
|---|
| | | #define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */
|
|---|
| | | #define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */
|
|---|
| | | #define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */
|
|---|
| | |
|
|---|
| | | /* Values to be used with STM32 Medium-density devices */
|
|---|
| | | #define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */
|
|---|
| | | #define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */
|
|---|
| | | #define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */
|
|---|
| | | #define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */
|
|---|
| | | #define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */
|
|---|
| | | #define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */
|
|---|
| | | #define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */
|
|---|
| | | #define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */
|
|---|
| | | #define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */
|
|---|
| | | #define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */
|
|---|
| | | #define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */
|
|---|
| | | #define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */
|
|---|
| | | #define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */
|
|---|
| | | #define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */
|
|---|
| | | #define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */
|
|---|
| | | #define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */
|
|---|
| | | #define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */
|
|---|
| | | #define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */
|
|---|
| | | #define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */
|
|---|
| | | #define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */
|
|---|
| | | #define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */
|
|---|
| | | #define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */
|
|---|
| | | #define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */
|
|---|
| | | #define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */
|
|---|
| | |
|
|---|
| | | /* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */
|
|---|
| | | #define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 0 to 1 */
|
|---|
| | | #define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 2 to 3 */
|
|---|
| | | #define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 4 to 5 */
|
|---|
| | | #define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 6 to 7 */
|
|---|
| | | #define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 8 to 9 */
|
|---|
| | | #define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 10 to 11 */
|
|---|
| | | #define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 12 to 13 */
|
|---|
| | | #define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 14 to 15 */
|
|---|
| | | #define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 16 to 17 */
|
|---|
| | | #define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 18 to 19 */
|
|---|
| | | #define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 20 to 21 */
|
|---|
| | | #define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 22 to 23 */
|
|---|
| | | #define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 24 to 25 */
|
|---|
| | | #define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 26 to 27 */
|
|---|
| | | #define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 28 to 29 */
|
|---|
| | | #define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 30 to 31 */
|
|---|
| | | #define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 32 to 33 */
|
|---|
| | | #define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 34 to 35 */
|
|---|
| | | #define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 36 to 37 */
|
|---|
| | | #define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 38 to 39 */
|
|---|
| | | #define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 40 to 41 */
|
|---|
| | | #define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 42 to 43 */
|
|---|
| | | #define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 44 to 45 */
|
|---|
| | | #define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 46 to 47 */
|
|---|
| | | #define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 48 to 49 */
|
|---|
| | | #define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 50 to 51 */
|
|---|
| | | #define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 52 to 53 */
|
|---|
| | | #define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 54 to 55 */
|
|---|
| | | #define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 56 to 57 */
|
|---|
| | | #define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 58 to 59 */
|
|---|
| | | #define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
|---|
| | | Write protection of page 60 to 61 */
|
|---|
| | | #define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */
|
|---|
| | | #define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */
|
|---|
| | | #define FLASH_WRProt_Pages62to511 ((uint32_t)0x80000000) /*!< STM32 XL-density devices: Write protection of page 62 to 511 */
|
|---|
| | |
|
|---|
| | | #define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
|
|---|
| | |
|
|---|
| | | #define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000))
|
|---|
| | |
|
|---|
| | | #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF))
|
|---|
| | |
|
|---|
| | | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Option_Bytes_IWatchdog |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
|
|---|
| | | #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
|
|---|
| | | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Option_Bytes_nRST_STOP |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
|
|---|
| | | #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
|
|---|
| | | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Option_Bytes_nRST_STDBY |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
|
|---|
| | | #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
|
|---|
| | | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_XL
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | /** @defgroup FLASH_Boot
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define FLASH_BOOT_Bank1 ((uint16_t)0x0000) /*!< At startup, if boot pins are set in boot from user Flash position
|
|---|
| | | and this parameter is selected the device will boot from Bank1(Default) */
|
|---|
| | | #define FLASH_BOOT_Bank2 ((uint16_t)0x0001) /*!< At startup, if boot pins are set in boot from user Flash position
|
|---|
| | | and this parameter is selected the device will boot from Bank 2 or Bank 1,
|
|---|
| | | depending on the activation of the bank */
|
|---|
| | | #define IS_FLASH_BOOT(BOOT) (((BOOT) == FLASH_BOOT_Bank1) || ((BOOT) == FLASH_BOOT_Bank2))
|
|---|
| | | #endif
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | /** @defgroup FLASH_Interrupts |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #ifdef STM32F10X_XL
|
|---|
| | | #define FLASH_IT_BANK2_ERROR ((uint32_t)0x80000400) /*!< FPEC BANK2 error interrupt source */
|
|---|
| | | #define FLASH_IT_BANK2_EOP ((uint32_t)0x80001000) /*!< End of FLASH BANK2 Operation Interrupt source */
|
|---|
| | |
|
|---|
| | | #define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */
|
|---|
| | | #define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */
|
|---|
| | |
|
|---|
| | | #define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC BANK1 error interrupt source */
|
|---|
| | | #define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH BANK1 Operation Interrupt source */
|
|---|
| | | #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0x7FFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
|
|---|
| | | #else
|
|---|
| | | #define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */
|
|---|
| | | #define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */
|
|---|
| | | #define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */
|
|---|
| | | #define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */
|
|---|
| | |
|
|---|
| | | #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FLASH_Flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #ifdef STM32F10X_XL
|
|---|
| | | #define FLASH_FLAG_BANK2_BSY ((uint32_t)0x80000001) /*!< FLASH BANK2 Busy flag */
|
|---|
| | | #define FLASH_FLAG_BANK2_EOP ((uint32_t)0x80000020) /*!< FLASH BANK2 End of Operation flag */
|
|---|
| | | #define FLASH_FLAG_BANK2_PGERR ((uint32_t)0x80000004) /*!< FLASH BANK2 Program error flag */
|
|---|
| | | #define FLASH_FLAG_BANK2_WRPRTERR ((uint32_t)0x80000010) /*!< FLASH BANK2 Write protected error flag */
|
|---|
| | |
|
|---|
| | | #define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/
|
|---|
| | | #define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */
|
|---|
| | | #define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */
|
|---|
| | | #define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */
|
|---|
| | |
|
|---|
| | | #define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */
|
|---|
| | | #define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */
|
|---|
| | | #define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */
|
|---|
| | | #define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
|
|---|
| | | #define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */
|
|---|
| | | |
|---|
| | | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0x7FFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
|
|---|
| | | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_OPTERR)|| \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK2_BSY) || ((FLAG) == FLASH_FLAG_BANK2_EOP) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK2_PGERR) || ((FLAG) == FLASH_FLAG_BANK2_WRPRTERR))
|
|---|
| | | #else
|
|---|
| | | #define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */
|
|---|
| | | #define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */
|
|---|
| | | #define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */
|
|---|
| | | #define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
|
|---|
| | | #define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */
|
|---|
| | |
|
|---|
| | | #define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/
|
|---|
| | | #define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */
|
|---|
| | | #define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */
|
|---|
| | | #define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */
|
|---|
| | | |
|---|
| | | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
|
|---|
| | | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \
|
|---|
| | | ((FLAG) == FLASH_FLAG_OPTERR))
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FLASH_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FLASH_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /*------------ Functions used for all STM32F10x devices -----*/
|
|---|
| | | void FLASH_SetLatency(uint32_t FLASH_Latency);
|
|---|
| | | void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess);
|
|---|
| | | void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer);
|
|---|
| | | void FLASH_Unlock(void);
|
|---|
| | | void FLASH_Lock(void);
|
|---|
| | | FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
|
|---|
| | | FLASH_Status FLASH_EraseAllPages(void);
|
|---|
| | | FLASH_Status FLASH_EraseOptionBytes(void);
|
|---|
| | | FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
|
|---|
| | | FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
|
|---|
| | | FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
|
|---|
| | | FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages);
|
|---|
| | | FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
|
|---|
| | | FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY);
|
|---|
| | | uint32_t FLASH_GetUserOptionByte(void);
|
|---|
| | | uint32_t FLASH_GetWriteProtectionOptionByte(void);
|
|---|
| | | FlagStatus FLASH_GetReadOutProtectionStatus(void);
|
|---|
| | | FlagStatus FLASH_GetPrefetchBufferStatus(void);
|
|---|
| | | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
|
|---|
| | | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
|
|---|
| | | void FLASH_ClearFlag(uint32_t FLASH_FLAG);
|
|---|
| | | FLASH_Status FLASH_GetStatus(void);
|
|---|
| | | FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
|
|---|
| | |
|
|---|
| | | /*------------ New function used for all STM32F10x devices -----*/
|
|---|
| | | void FLASH_UnlockBank1(void);
|
|---|
| | | void FLASH_LockBank1(void);
|
|---|
| | | FLASH_Status FLASH_EraseAllBank1Pages(void);
|
|---|
| | | FLASH_Status FLASH_GetBank1Status(void);
|
|---|
| | | FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout);
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_XL
|
|---|
| | | /*---- New Functions used only with STM32F10x_XL density devices -----*/
|
|---|
| | | void FLASH_UnlockBank2(void);
|
|---|
| | | void FLASH_LockBank2(void);
|
|---|
| | | FLASH_Status FLASH_EraseAllBank2Pages(void);
|
|---|
| | | FLASH_Status FLASH_GetBank2Status(void);
|
|---|
| | | FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout);
|
|---|
| | | FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT);
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_FLASH_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_fsmc.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the FSMC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_FSMC_H
|
|---|
| | | #define __STM32F10x_FSMC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup FSMC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Timing parameters For NOR/SRAM Banks |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
|
|---|
| | | the duration of the address setup time. |
|---|
| | | This parameter can be a value between 0 and 0xF.
|
|---|
| | | @note: It is not used with synchronous NOR Flash memories. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
|
|---|
| | | the duration of the address hold time.
|
|---|
| | | This parameter can be a value between 0 and 0xF. |
|---|
| | | @note: It is not used with synchronous NOR Flash memories.*/
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure
|
|---|
| | | the duration of the data setup time.
|
|---|
| | | This parameter can be a value between 0 and 0xFF.
|
|---|
| | | @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
|
|---|
| | | the duration of the bus turnaround.
|
|---|
| | | This parameter can be a value between 0 and 0xF.
|
|---|
| | | @note: It is only used for multiplexed NOR Flash memories. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
|
|---|
| | | This parameter can be a value between 1 and 0xF.
|
|---|
| | | @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue
|
|---|
| | | to the memory before getting the first data.
|
|---|
| | | The value of this parameter depends on the memory type as shown below:
|
|---|
| | | - It must be set to 0 in case of a CRAM
|
|---|
| | | - It is don't care in asynchronous NOR, SRAM or ROM accesses
|
|---|
| | | - It may assume a value between 0 and 0xF in NOR Flash memories
|
|---|
| | | with synchronous burst mode enable */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode. |
|---|
| | | This parameter can be a value of @ref FSMC_Access_Mode */
|
|---|
| | | }FSMC_NORSRAMTimingInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief FSMC NOR/SRAM Init structure definition
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used.
|
|---|
| | | This parameter can be a value of @ref FSMC_NORSRAM_Bank */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are
|
|---|
| | | multiplexed on the databus or not. |
|---|
| | | This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to
|
|---|
| | | the corresponding memory bank.
|
|---|
| | | This parameter can be a value of @ref FSMC_Memory_Type */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
|
|---|
| | | This parameter can be a value of @ref FSMC_Data_Width */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
|
|---|
| | | valid only with synchronous burst Flash memories.
|
|---|
| | | This parameter can be a value of @ref FSMC_Burst_Access_Mode */
|
|---|
| | | |
|---|
| | | uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
|
|---|
| | | valid only with asynchronous Flash memories.
|
|---|
| | | This parameter can be a value of @ref FSMC_AsynchronousWait */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
|
|---|
| | | the Flash memory in burst mode.
|
|---|
| | | This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
|
|---|
| | | memory, valid only when accessing Flash memories in burst mode.
|
|---|
| | | This parameter can be a value of @ref FSMC_Wrap_Mode */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
|
|---|
| | | clock cycle before the wait state or during the wait state,
|
|---|
| | | valid only when accessing memories in burst mode. |
|---|
| | | This parameter can be a value of @ref FSMC_Wait_Timing */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. |
|---|
| | | This parameter can be a value of @ref FSMC_Write_Operation */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait
|
|---|
| | | signal, valid for Flash memory access in burst mode. |
|---|
| | | This parameter can be a value of @ref FSMC_Wait_Signal */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode.
|
|---|
| | | This parameter can be a value of @ref FSMC_Extended_Mode */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation.
|
|---|
| | | This parameter can be a value of @ref FSMC_Write_Burst */ |
|---|
| | |
|
|---|
| | | FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ |
|---|
| | |
|
|---|
| | | FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ |
|---|
| | | }FSMC_NORSRAMInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Timing parameters For FSMC NAND and PCCARD Banks
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before
|
|---|
| | | the command assertion for NAND-Flash read or write access
|
|---|
| | | to common/Attribute or I/O memory space (depending on
|
|---|
| | | the memory space timing to be configured).
|
|---|
| | | This parameter can be a value between 0 and 0xFF.*/
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
|
|---|
| | | command for NAND-Flash read or write access to
|
|---|
| | | common/Attribute or I/O memory space (depending on the
|
|---|
| | | memory space timing to be configured). |
|---|
| | | This parameter can be a number between 0x00 and 0xFF */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
|
|---|
| | | (and data for write access) after the command deassertion
|
|---|
| | | for NAND-Flash read or write access to common/Attribute
|
|---|
| | | or I/O memory space (depending on the memory space timing
|
|---|
| | | to be configured).
|
|---|
| | | This parameter can be a number between 0x00 and 0xFF */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
|
|---|
| | | databus is kept in HiZ after the start of a NAND-Flash
|
|---|
| | | write access to common/Attribute or I/O memory space (depending
|
|---|
| | | on the memory space timing to be configured).
|
|---|
| | | This parameter can be a number between 0x00 and 0xFF */
|
|---|
| | | }FSMC_NAND_PCCARDTimingInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief FSMC NAND Init structure definition
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used.
|
|---|
| | | This parameter can be a value of @ref FSMC_NAND_Bank */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank.
|
|---|
| | | This parameter can be any value of @ref FSMC_Wait_feature */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
|
|---|
| | | This parameter can be any value of @ref FSMC_Data_Width */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation.
|
|---|
| | | This parameter can be any value of @ref FSMC_ECC */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC.
|
|---|
| | | This parameter can be any value of @ref FSMC_ECC_Page_Size */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
|---|
| | | delay between CLE low and RE low.
|
|---|
| | | This parameter can be a value between 0 and 0xFF. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
|---|
| | | delay between ALE low and RE low.
|
|---|
| | | This parameter can be a number between 0x0 and 0xFF */ |
|---|
| | |
|
|---|
| | | FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ |
|---|
| | |
|
|---|
| | | FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */
|
|---|
| | | }FSMC_NANDInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief FSMC PCCARD Init structure definition
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank.
|
|---|
| | | This parameter can be any value of @ref FSMC_Wait_feature */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
|---|
| | | delay between CLE low and RE low.
|
|---|
| | | This parameter can be a value between 0 and 0xFF. */
|
|---|
| | |
|
|---|
| | | uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
|---|
| | | delay between ALE low and RE low.
|
|---|
| | | This parameter can be a number between 0x0 and 0xFF */ |
|---|
| | |
|
|---|
| | | |
|---|
| | | FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */
|
|---|
| | |
|
|---|
| | | FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ |
|---|
| | | |
|---|
| | | FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */ |
|---|
| | | }FSMC_PCCARDInitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_NORSRAM_Bank |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
|
|---|
| | | #define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
|
|---|
| | | #define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_NAND_Bank |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define FSMC_Bank2_NAND ((uint32_t)0x00000010)
|
|---|
| | | #define FSMC_Bank3_NAND ((uint32_t)0x00000100)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_PCCARD_Bank |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define FSMC_Bank4_PCCARD ((uint32_t)0x00001000)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
|
|---|
| | | ((BANK) == FSMC_Bank1_NORSRAM2) || \
|
|---|
| | | ((BANK) == FSMC_Bank1_NORSRAM3) || \
|
|---|
| | | ((BANK) == FSMC_Bank1_NORSRAM4))
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
|---|
| | | ((BANK) == FSMC_Bank3_NAND))
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
|---|
| | | ((BANK) == FSMC_Bank3_NAND) || \
|
|---|
| | | ((BANK) == FSMC_Bank4_PCCARD))
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
|---|
| | | ((BANK) == FSMC_Bank3_NAND) || \
|
|---|
| | | ((BANK) == FSMC_Bank4_PCCARD))
|
|---|
| | |
|
|---|
| | | /** @defgroup NOR_SRAM_Controller |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Data_Address_Bus_Multiplexing |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
|
|---|
| | | #define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
|
|---|
| | | ((MUX) == FSMC_DataAddressMux_Enable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Memory_Type |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
|
|---|
| | | #define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
|
|---|
| | | #define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
|
|---|
| | | ((MEMORY) == FSMC_MemoryType_PSRAM)|| \
|
|---|
| | | ((MEMORY) == FSMC_MemoryType_NOR))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Data_Width |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
|
|---|
| | | #define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
|
|---|
| | | ((WIDTH) == FSMC_MemoryDataWidth_16b))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Burst_Access_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000) |
|---|
| | | #define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
|
|---|
| | | #define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
|
|---|
| | | ((STATE) == FSMC_BurstAccessMode_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /** @defgroup FSMC_AsynchronousWait |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)
|
|---|
| | | #define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \
|
|---|
| | | ((STATE) == FSMC_AsynchronousWait_Enable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /** @defgroup FSMC_Wait_Signal_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
|
|---|
| | | #define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
|
|---|
| | | ((POLARITY) == FSMC_WaitSignalPolarity_High)) |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Wrap_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WrapMode_Enable ((uint32_t)0x00000400) |
|---|
| | | #define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
|
|---|
| | | ((MODE) == FSMC_WrapMode_Enable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Wait_Timing |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800) |
|---|
| | | #define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
|
|---|
| | | ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Write_Operation |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
|
|---|
| | | #define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
|
|---|
| | | ((OPERATION) == FSMC_WriteOperation_Enable))
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Wait_Signal |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WaitSignal_Enable ((uint32_t)0x00002000) |
|---|
| | | #define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
|
|---|
| | | ((SIGNAL) == FSMC_WaitSignal_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Extended_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
|
|---|
| | | ((MODE) == FSMC_ExtendedMode_Enable)) |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Write_Burst |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_WriteBurst_Enable ((uint32_t)0x00080000) |
|---|
| | | #define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
|
|---|
| | | ((BURST) == FSMC_WriteBurst_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Address_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Address_Hold_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Data_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Bus_Turn_around_Duration |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_CLK_Division |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Data_Latency |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Access_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_AccessMode_A ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_AccessMode_B ((uint32_t)0x10000000) |
|---|
| | | #define FSMC_AccessMode_C ((uint32_t)0x20000000)
|
|---|
| | | #define FSMC_AccessMode_D ((uint32_t)0x30000000)
|
|---|
| | | #define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
|
|---|
| | | ((MODE) == FSMC_AccessMode_B) || \
|
|---|
| | | ((MODE) == FSMC_AccessMode_C) || \
|
|---|
| | | ((MODE) == FSMC_AccessMode_D)) |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /** @defgroup NAND_PCCARD_Controller |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Wait_feature |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_Waitfeature_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_Waitfeature_Enable ((uint32_t)0x00000002)
|
|---|
| | | #define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \
|
|---|
| | | ((FEATURE) == FSMC_Waitfeature_Enable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_ECC |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_ECC_Disable ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_ECC_Enable ((uint32_t)0x00000040)
|
|---|
| | | #define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \
|
|---|
| | | ((STATE) == FSMC_ECC_Enable))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_ECC_Page_Size |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000)
|
|---|
| | | #define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000)
|
|---|
| | | #define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000)
|
|---|
| | | #define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000)
|
|---|
| | | #define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000)
|
|---|
| | | #define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000)
|
|---|
| | | #define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \
|
|---|
| | | ((SIZE) == FSMC_ECCPageSize_512Bytes) || \
|
|---|
| | | ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \
|
|---|
| | | ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \
|
|---|
| | | ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \
|
|---|
| | | ((SIZE) == FSMC_ECCPageSize_8192Bytes))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_TCLR_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_TAR_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Wait_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Hold_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_HiZ_Setup_Time |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Interrupt_sources |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_IT_RisingEdge ((uint32_t)0x00000008)
|
|---|
| | | #define FSMC_IT_Level ((uint32_t)0x00000010)
|
|---|
| | | #define FSMC_IT_FallingEdge ((uint32_t)0x00000020)
|
|---|
| | | #define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))
|
|---|
| | | #define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \
|
|---|
| | | ((IT) == FSMC_IT_Level) || \
|
|---|
| | | ((IT) == FSMC_IT_FallingEdge)) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001)
|
|---|
| | | #define FSMC_FLAG_Level ((uint32_t)0x00000002)
|
|---|
| | | #define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004)
|
|---|
| | | #define FSMC_FLAG_FEMPT ((uint32_t)0x00000040)
|
|---|
| | | #define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \
|
|---|
| | | ((FLAG) == FSMC_FLAG_Level) || \
|
|---|
| | | ((FLAG) == FSMC_FLAG_FallingEdge) || \
|
|---|
| | | ((FLAG) == FSMC_FLAG_FEMPT))
|
|---|
| | |
|
|---|
| | | #define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup FSMC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
|
|---|
| | | void FSMC_NANDDeInit(uint32_t FSMC_Bank);
|
|---|
| | | void FSMC_PCCARDDeInit(void);
|
|---|
| | | void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
|
|---|
| | | void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
|
|---|
| | | void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
|
|---|
| | | void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
|
|---|
| | | void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
|
|---|
| | | void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
|
|---|
| | | void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
|---|
| | | void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
|---|
| | | void FSMC_PCCARDCmd(FunctionalState NewState);
|
|---|
| | | void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
|---|
| | | uint32_t FSMC_GetECC(uint32_t FSMC_Bank);
|
|---|
| | | void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState);
|
|---|
| | | FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
|
|---|
| | | void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
|
|---|
| | | ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT);
|
|---|
| | | void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_FSMC_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_gpio.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the GPIO |
|---|
| | | * firmware library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_GPIO_H
|
|---|
| | | #define __STM32F10x_GPIO_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup GPIO
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
|---|
| | | ((PERIPH) == GPIOB) || \
|
|---|
| | | ((PERIPH) == GPIOC) || \
|
|---|
| | | ((PERIPH) == GPIOD) || \
|
|---|
| | | ((PERIPH) == GPIOE) || \
|
|---|
| | | ((PERIPH) == GPIOF) || \
|
|---|
| | | ((PERIPH) == GPIOG))
|
|---|
| | | |
|---|
| | | /** |
|---|
| | | * @brief Output Maximum frequency selection |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | { |
|---|
| | | GPIO_Speed_10MHz = 1,
|
|---|
| | | GPIO_Speed_2MHz, |
|---|
| | | GPIO_Speed_50MHz
|
|---|
| | | }GPIOSpeed_TypeDef;
|
|---|
| | | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
|---|
| | | ((SPEED) == GPIO_Speed_50MHz))
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Configuration Mode enumeration |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | { GPIO_Mode_AIN = 0x0,
|
|---|
| | | GPIO_Mode_IN_FLOATING = 0x04,
|
|---|
| | | GPIO_Mode_IPD = 0x28,
|
|---|
| | | GPIO_Mode_IPU = 0x48,
|
|---|
| | | GPIO_Mode_Out_OD = 0x14,
|
|---|
| | | GPIO_Mode_Out_PP = 0x10,
|
|---|
| | | GPIO_Mode_AF_OD = 0x1C,
|
|---|
| | | GPIO_Mode_AF_PP = 0x18
|
|---|
| | | }GPIOMode_TypeDef;
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
|---|
| | | ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
|
|---|
| | | ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
|---|
| | | ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief GPIO Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
|---|
| | | This parameter can be any value of @ref GPIO_pins_define */
|
|---|
| | |
|
|---|
| | | GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
|---|
| | | This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
|---|
| | |
|
|---|
| | | GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
|---|
| | | This parameter can be a value of @ref GPIOMode_TypeDef */
|
|---|
| | | }GPIO_InitTypeDef;
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Bit_SET and Bit_RESET enumeration |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef enum
|
|---|
| | | { Bit_RESET = 0,
|
|---|
| | | Bit_SET
|
|---|
| | | }BitAction;
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_pins_define |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
|---|
| | | #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
|---|
| | | #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
|---|
| | | #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
|---|
| | | #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
|---|
| | | #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
|---|
| | | #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
|---|
| | | #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
|---|
| | | #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
|---|
| | | #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
|---|
| | | #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
|---|
| | | #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
|---|
| | | #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
|---|
| | | #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
|---|
| | | #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
|---|
| | | #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
|---|
| | | #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
|
|---|
| | |
|
|---|
| | | #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
|---|
| | | ((PIN) == GPIO_Pin_1) || \
|
|---|
| | | ((PIN) == GPIO_Pin_2) || \
|
|---|
| | | ((PIN) == GPIO_Pin_3) || \
|
|---|
| | | ((PIN) == GPIO_Pin_4) || \
|
|---|
| | | ((PIN) == GPIO_Pin_5) || \
|
|---|
| | | ((PIN) == GPIO_Pin_6) || \
|
|---|
| | | ((PIN) == GPIO_Pin_7) || \
|
|---|
| | | ((PIN) == GPIO_Pin_8) || \
|
|---|
| | | ((PIN) == GPIO_Pin_9) || \
|
|---|
| | | ((PIN) == GPIO_Pin_10) || \
|
|---|
| | | ((PIN) == GPIO_Pin_11) || \
|
|---|
| | | ((PIN) == GPIO_Pin_12) || \
|
|---|
| | | ((PIN) == GPIO_Pin_13) || \
|
|---|
| | | ((PIN) == GPIO_Pin_14) || \
|
|---|
| | | ((PIN) == GPIO_Pin_15))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Remap_define |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
|
|---|
| | | #define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
|
|---|
| | | #define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
|
|---|
| | | #define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
|
|---|
| | | #define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
|
|---|
| | | #define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
|
|---|
| | | #define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
|
|---|
| | | #define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
|
|---|
| | | #define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
|
|---|
| | | #define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
|
|---|
| | | #define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
|
|---|
| | | #define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
|
|---|
| | | #define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
|
|---|
| | | #define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
|
|---|
| | | #define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
|
|---|
| | | #define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
|
|---|
| | | #define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
|
|---|
| | | #define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
|
|---|
| | | #define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
|
|---|
| | | #define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
|
|---|
| | | #define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
|
|---|
| | | #define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
|---|
| | | to TIM2 Internal Trigger 1 for calibration
|
|---|
| | | (only for Connectivity line devices) */
|
|---|
| | | #define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
|
|---|
| | |
|
|---|
| | | #define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
|
|---|
| | | #define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
|
|---|
| | | #define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
|
|---|
| | | #define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
|
|---|
| | | #define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
|
|---|
| | |
|
|---|
| | | #define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
|
|---|
| | | #define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
|
|---|
| | | #define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
|
|---|
| | | #define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
|---|
| | | #define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
|---|
| | | #define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
|
|---|
| | |
|
|---|
| | | #define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
|
|---|
| | | #define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
|
|---|
| | | #define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, |
|---|
| | | only for High density Value line devices) */ |
|---|
| | |
|
|---|
| | | #define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
|
|---|
| | | ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
|
|---|
| | | ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
|
|---|
| | | ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
|
|---|
| | | ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
|
|---|
| | | ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
|
|---|
| | | ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
|
|---|
| | | ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Port_Sources |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define GPIO_PortSourceGPIOA ((uint8_t)0x00)
|
|---|
| | | #define GPIO_PortSourceGPIOB ((uint8_t)0x01)
|
|---|
| | | #define GPIO_PortSourceGPIOC ((uint8_t)0x02)
|
|---|
| | | #define GPIO_PortSourceGPIOD ((uint8_t)0x03)
|
|---|
| | | #define GPIO_PortSourceGPIOE ((uint8_t)0x04)
|
|---|
| | | #define GPIO_PortSourceGPIOF ((uint8_t)0x05)
|
|---|
| | | #define GPIO_PortSourceGPIOG ((uint8_t)0x06)
|
|---|
| | | #define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOE))
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
|
|---|
| | | ((PORTSOURCE) == GPIO_PortSourceGPIOG))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Pin_sources |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define GPIO_PinSource0 ((uint8_t)0x00)
|
|---|
| | | #define GPIO_PinSource1 ((uint8_t)0x01)
|
|---|
| | | #define GPIO_PinSource2 ((uint8_t)0x02)
|
|---|
| | | #define GPIO_PinSource3 ((uint8_t)0x03)
|
|---|
| | | #define GPIO_PinSource4 ((uint8_t)0x04)
|
|---|
| | | #define GPIO_PinSource5 ((uint8_t)0x05)
|
|---|
| | | #define GPIO_PinSource6 ((uint8_t)0x06)
|
|---|
| | | #define GPIO_PinSource7 ((uint8_t)0x07)
|
|---|
| | | #define GPIO_PinSource8 ((uint8_t)0x08)
|
|---|
| | | #define GPIO_PinSource9 ((uint8_t)0x09)
|
|---|
| | | #define GPIO_PinSource10 ((uint8_t)0x0A)
|
|---|
| | | #define GPIO_PinSource11 ((uint8_t)0x0B)
|
|---|
| | | #define GPIO_PinSource12 ((uint8_t)0x0C)
|
|---|
| | | #define GPIO_PinSource13 ((uint8_t)0x0D)
|
|---|
| | | #define GPIO_PinSource14 ((uint8_t)0x0E)
|
|---|
| | | #define GPIO_PinSource15 ((uint8_t)0x0F)
|
|---|
| | |
|
|---|
| | | #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource1) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource2) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource3) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource4) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource5) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource6) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource7) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource8) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource9) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource10) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource11) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource12) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource13) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource14) || \
|
|---|
| | | ((PINSOURCE) == GPIO_PinSource15))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Ethernet_Media_Interface |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) |
|---|
| | | #define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001) |
|---|
| | |
|
|---|
| | | #define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
|
|---|
| | | ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup GPIO_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
|---|
| | | void GPIO_AFIODeInit(void);
|
|---|
| | | void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
|---|
| | | void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
|---|
| | | uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
|---|
| | | uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
|---|
| | | uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
|---|
| | | uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
|---|
| | | void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
|---|
| | | void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
|---|
| | | void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
|---|
| | | void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
|---|
| | | void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
|---|
| | | void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
|---|
| | | void GPIO_EventOutputCmd(FunctionalState NewState);
|
|---|
| | | void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
|
|---|
| | | void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
|---|
| | | void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_GPIO_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_i2c.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the I2C firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_I2C_H
|
|---|
| | | #define __STM32F10x_I2C_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup I2C
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief I2C Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
|
|---|
| | | This parameter must be set to a value lower than 400kHz */
|
|---|
| | |
|
|---|
| | | uint16_t I2C_Mode; /*!< Specifies the I2C mode.
|
|---|
| | | This parameter can be a value of @ref I2C_mode */
|
|---|
| | |
|
|---|
| | | uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
|---|
| | | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
|---|
| | |
|
|---|
| | | uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
|
|---|
| | | This parameter can be a 7-bit or 10-bit address. */
|
|---|
| | |
|
|---|
| | | uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
|
|---|
| | | This parameter can be a value of @ref I2C_acknowledgement */
|
|---|
| | |
|
|---|
| | | uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
|
|---|
| | | This parameter can be a value of @ref I2C_acknowledged_address */
|
|---|
| | | }I2C_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
|
|---|
| | | ((PERIPH) == I2C2))
|
|---|
| | | /** @defgroup I2C_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_Mode_I2C ((uint16_t)0x0000)
|
|---|
| | | #define I2C_Mode_SMBusDevice ((uint16_t)0x0002) |
|---|
| | | #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
|
|---|
| | | #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
|
|---|
| | | ((MODE) == I2C_Mode_SMBusDevice) || \
|
|---|
| | | ((MODE) == I2C_Mode_SMBusHost))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_duty_cycle_in_fast_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
|
|---|
| | | #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
|
|---|
| | | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
|
|---|
| | | ((CYCLE) == I2C_DutyCycle_2))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2C_acknowledgement
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_Ack_Enable ((uint16_t)0x0400)
|
|---|
| | | #define I2C_Ack_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
|
|---|
| | | ((STATE) == I2C_Ack_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_transfer_direction |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_Direction_Transmitter ((uint8_t)0x00)
|
|---|
| | | #define I2C_Direction_Receiver ((uint8_t)0x01)
|
|---|
| | | #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
|
|---|
| | | ((DIRECTION) == I2C_Direction_Receiver))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_acknowledged_address |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
|
|---|
| | | #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
|
|---|
| | | #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
|
|---|
| | | ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2C_registers |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_Register_CR1 ((uint8_t)0x00)
|
|---|
| | | #define I2C_Register_CR2 ((uint8_t)0x04)
|
|---|
| | | #define I2C_Register_OAR1 ((uint8_t)0x08)
|
|---|
| | | #define I2C_Register_OAR2 ((uint8_t)0x0C)
|
|---|
| | | #define I2C_Register_DR ((uint8_t)0x10)
|
|---|
| | | #define I2C_Register_SR1 ((uint8_t)0x14)
|
|---|
| | | #define I2C_Register_SR2 ((uint8_t)0x18)
|
|---|
| | | #define I2C_Register_CCR ((uint8_t)0x1C)
|
|---|
| | | #define I2C_Register_TRISE ((uint8_t)0x20)
|
|---|
| | | #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
|
|---|
| | | ((REGISTER) == I2C_Register_CR2) || \
|
|---|
| | | ((REGISTER) == I2C_Register_OAR1) || \
|
|---|
| | | ((REGISTER) == I2C_Register_OAR2) || \
|
|---|
| | | ((REGISTER) == I2C_Register_DR) || \
|
|---|
| | | ((REGISTER) == I2C_Register_SR1) || \
|
|---|
| | | ((REGISTER) == I2C_Register_SR2) || \
|
|---|
| | | ((REGISTER) == I2C_Register_CCR) || \
|
|---|
| | | ((REGISTER) == I2C_Register_TRISE))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_SMBus_alert_pin_level |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
|
|---|
| | | #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
|
|---|
| | | #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
|
|---|
| | | ((ALERT) == I2C_SMBusAlert_High))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_PEC_position |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_PECPosition_Next ((uint16_t)0x0800)
|
|---|
| | | #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
|
|---|
| | | #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
|
|---|
| | | ((POSITION) == I2C_PECPosition_Current))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2C_NCAK_position |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_NACKPosition_Next ((uint16_t)0x0800)
|
|---|
| | | #define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
|
|---|
| | | #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \
|
|---|
| | | ((POSITION) == I2C_NACKPosition_Current))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2C_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_IT_BUF ((uint16_t)0x0400)
|
|---|
| | | #define I2C_IT_EVT ((uint16_t)0x0200)
|
|---|
| | | #define I2C_IT_ERR ((uint16_t)0x0100)
|
|---|
| | | #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2C_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
|
|---|
| | | #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
|
|---|
| | | #define I2C_IT_PECERR ((uint32_t)0x01001000)
|
|---|
| | | #define I2C_IT_OVR ((uint32_t)0x01000800)
|
|---|
| | | #define I2C_IT_AF ((uint32_t)0x01000400)
|
|---|
| | | #define I2C_IT_ARLO ((uint32_t)0x01000200)
|
|---|
| | | #define I2C_IT_BERR ((uint32_t)0x01000100)
|
|---|
| | | #define I2C_IT_TXE ((uint32_t)0x06000080)
|
|---|
| | | #define I2C_IT_RXNE ((uint32_t)0x06000040)
|
|---|
| | | #define I2C_IT_STOPF ((uint32_t)0x02000010)
|
|---|
| | | #define I2C_IT_ADD10 ((uint32_t)0x02000008)
|
|---|
| | | #define I2C_IT_BTF ((uint32_t)0x02000004)
|
|---|
| | | #define I2C_IT_ADDR ((uint32_t)0x02000002)
|
|---|
| | | #define I2C_IT_SB ((uint32_t)0x02000001)
|
|---|
| | |
|
|---|
| | | #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
|
|---|
| | |
|
|---|
| | | #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
|
|---|
| | | ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
|
|---|
| | | ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
|
|---|
| | | ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
|
|---|
| | | ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
|
|---|
| | | ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
|
|---|
| | | ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_flags_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief SR2 register flags |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
|
|---|
| | | #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
|
|---|
| | | #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
|
|---|
| | | #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
|
|---|
| | | #define I2C_FLAG_TRA ((uint32_t)0x00040000)
|
|---|
| | | #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
|
|---|
| | | #define I2C_FLAG_MSL ((uint32_t)0x00010000)
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief SR1 register flags |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
|
|---|
| | | #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
|
|---|
| | | #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
|
|---|
| | | #define I2C_FLAG_OVR ((uint32_t)0x10000800)
|
|---|
| | | #define I2C_FLAG_AF ((uint32_t)0x10000400)
|
|---|
| | | #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
|
|---|
| | | #define I2C_FLAG_BERR ((uint32_t)0x10000100)
|
|---|
| | | #define I2C_FLAG_TXE ((uint32_t)0x10000080)
|
|---|
| | | #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
|
|---|
| | | #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
|
|---|
| | | #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
|
|---|
| | | #define I2C_FLAG_BTF ((uint32_t)0x10000004)
|
|---|
| | | #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
|
|---|
| | | #define I2C_FLAG_SB ((uint32_t)0x10000001)
|
|---|
| | |
|
|---|
| | | #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
|---|
| | |
|
|---|
| | | #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
|
|---|
| | | ((FLAG) == I2C_FLAG_SB))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_Events |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /*========================================
|
|---|
| | | |
|---|
| | | I2C Master Events (Events grouped in order of communication)
|
|---|
| | | ==========================================*/
|
|---|
| | | /** |
|---|
| | | * @brief Communication start
|
|---|
| | | * |
|---|
| | | * After sending the START condition (I2C_GenerateSTART() function) the master |
|---|
| | | * has to wait for this event. It means that the Start condition has been correctly |
|---|
| | | * released on the I2C bus (the bus is free, no other devices is communicating).
|
|---|
| | | * |
|---|
| | | */
|
|---|
| | | /* --EV5 */
|
|---|
| | | #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Address Acknowledge
|
|---|
| | | * |
|---|
| | | * After checking on EV5 (start condition correctly released on the bus), the |
|---|
| | | * master sends the address of the slave(s) with which it will communicate |
|---|
| | | * (I2C_Send7bitAddress() function, it also determines the direction of the communication: |
|---|
| | | * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges |
|---|
| | | * his address. If an acknowledge is sent on the bus, one of the following events will |
|---|
| | | * be set:
|
|---|
| | | * |
|---|
| | | * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED |
|---|
| | | * event is set.
|
|---|
| | | * |
|---|
| | | * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED |
|---|
| | | * is set
|
|---|
| | | * |
|---|
| | | * 3) In case of 10-Bit addressing mode, the master (just after generating the START |
|---|
| | | * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() |
|---|
| | | * function). Then master should wait on EV9. It means that the 10-bit addressing |
|---|
| | | * header has been correctly sent on the bus. Then master should send the second part of |
|---|
| | | * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master |
|---|
| | | * should wait for event EV6. |
|---|
| | | * |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* --EV6 */
|
|---|
| | | #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
|
|---|
| | | #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
|
|---|
| | | /* --EV9 */
|
|---|
| | | #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Communication events
|
|---|
| | | * |
|---|
| | | * If a communication is established (START condition generated and slave address |
|---|
| | | * acknowledged) then the master has to check on one of the following events for |
|---|
| | | * communication procedures:
|
|---|
| | | * |
|---|
| | | * 1) Master Receiver mode: The master has to wait on the event EV7 then to read |
|---|
| | | * the data received from the slave (I2C_ReceiveData() function).
|
|---|
| | | * |
|---|
| | | * 2) Master Transmitter mode: The master has to send data (I2C_SendData() |
|---|
| | | * function) then to wait on event EV8 or EV8_2.
|
|---|
| | | * These two events are similar: |
|---|
| | | * - EV8 means that the data has been written in the data register and is |
|---|
| | | * being shifted out.
|
|---|
| | | * - EV8_2 means that the data has been physically shifted out and output |
|---|
| | | * on the bus.
|
|---|
| | | * In most cases, using EV8 is sufficient for the application.
|
|---|
| | | * Using EV8_2 leads to a slower communication but ensure more reliable test.
|
|---|
| | | * EV8_2 is also more suitable than EV8 for testing on the last data transmission |
|---|
| | | * (before Stop condition generation).
|
|---|
| | | * |
|---|
| | | * @note In case the user software does not guarantee that this event EV7 is |
|---|
| | | * managed before the current byte end of transfer, then user may check on EV7 |
|---|
| | | * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
|---|
| | | * In this case the communication may be slower.
|
|---|
| | | * |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Master RECEIVER mode -----------------------------*/ |
|---|
| | | /* --EV7 */
|
|---|
| | | #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
|
|---|
| | |
|
|---|
| | | /* Master TRANSMITTER mode --------------------------*/
|
|---|
| | | /* --EV8 */
|
|---|
| | | #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
|
|---|
| | | /* --EV8_2 */
|
|---|
| | | #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /*========================================
|
|---|
| | | |
|---|
| | | I2C Slave Events (Events grouped in order of communication)
|
|---|
| | | ==========================================*/
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Communication start events
|
|---|
| | | * |
|---|
| | | * Wait on one of these events at the start of the communication. It means that |
|---|
| | | * the I2C peripheral detected a Start condition on the bus (generated by master |
|---|
| | | * device) followed by the peripheral address. The peripheral generates an ACK |
|---|
| | | * condition on the bus (if the acknowledge feature is enabled through function |
|---|
| | | * I2C_AcknowledgeConfig()) and the events listed above are set :
|
|---|
| | | * |
|---|
| | | * 1) In normal case (only one address managed by the slave), when the address |
|---|
| | | * sent by the master matches the own address of the peripheral (configured by |
|---|
| | | * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set |
|---|
| | | * (where XXX could be TRANSMITTER or RECEIVER).
|
|---|
| | | * |
|---|
| | | * 2) In case the address sent by the master matches the second address of the |
|---|
| | | * peripheral (configured by the function I2C_OwnAddress2Config() and enabled |
|---|
| | | * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED |
|---|
| | | * (where XXX could be TRANSMITTER or RECEIVER) are set.
|
|---|
| | | * |
|---|
| | | * 3) In case the address sent by the master is General Call (address 0x00) and |
|---|
| | | * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) |
|---|
| | | * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. |
|---|
| | | * |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* --EV1 (all the events below are variants of EV1) */ |
|---|
| | | /* 1) Case of One Single Address managed by the slave */
|
|---|
| | | #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
|
|---|
| | | #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
|
|---|
| | |
|
|---|
| | | /* 2) Case of Dual address managed by the slave */
|
|---|
| | | #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
|
|---|
| | | #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
|
|---|
| | |
|
|---|
| | | /* 3) Case of General Call enabled for the slave */
|
|---|
| | | #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief Communication events
|
|---|
| | | * |
|---|
| | | * Wait on one of these events when EV1 has already been checked and: |
|---|
| | | * |
|---|
| | | * - Slave RECEIVER mode:
|
|---|
| | | * - EV2: When the application is expecting a data byte to be received. |
|---|
| | | * - EV4: When the application is expecting the end of the communication: master |
|---|
| | | * sends a stop condition and data transmission is stopped.
|
|---|
| | | * |
|---|
| | | * - Slave Transmitter mode:
|
|---|
| | | * - EV3: When a byte has been transmitted by the slave and the application is expecting |
|---|
| | | * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
|
|---|
| | | * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be |
|---|
| | | * used when the user software doesn't guarantee the EV3 is managed before the
|
|---|
| | | * current byte end of transfer.
|
|---|
| | | * - EV3_2: When the master sends a NACK in order to tell slave that data transmission |
|---|
| | | * shall end (before sending the STOP condition). In this case slave has to stop sending |
|---|
| | | * data bytes and expect a Stop condition on the bus.
|
|---|
| | | * |
|---|
| | | * @note In case the user software does not guarantee that the event EV2 is |
|---|
| | | * managed before the current byte end of transfer, then user may check on EV2 |
|---|
| | | * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
|---|
| | | * In this case the communication may be slower.
|
|---|
| | | *
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Slave RECEIVER mode --------------------------*/ |
|---|
| | | /* --EV2 */
|
|---|
| | | #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
|
|---|
| | | /* --EV4 */
|
|---|
| | | #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
|
|---|
| | |
|
|---|
| | | /* Slave TRANSMITTER mode -----------------------*/
|
|---|
| | | /* --EV3 */
|
|---|
| | | #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
|
|---|
| | | #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
|
|---|
| | | /* --EV3_2 */
|
|---|
| | | #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
|
|---|
| | |
|
|---|
| | | /*=========================== End of Events Description ==========================================*/
|
|---|
| | |
|
|---|
| | | #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
|
|---|
| | | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
|
|---|
| | | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
|
|---|
| | | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
|
|---|
| | | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
|
|---|
| | | ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_own_address1 |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_clock_speed |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2C_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void I2C_DeInit(I2C_TypeDef* I2Cx);
|
|---|
| | | void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
|
|---|
| | | void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
|
|---|
| | | void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
|
|---|
| | | void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
|
|---|
| | | void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
|
|---|
| | | uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
|
|---|
| | | void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
|
|---|
| | | uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
|
|---|
| | | void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
|
|---|
| | | void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
|
|---|
| | | void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
|
|---|
| | | void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
|
|---|
| | | void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
|---|
| | | void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief
|
|---|
| | | ****************************************************************************************
|
|---|
| | | *
|
|---|
| | | * I2C State Monitoring Functions
|
|---|
| | | * |
|---|
| | | **************************************************************************************** |
|---|
| | | * This I2C driver provides three different ways for I2C state monitoring
|
|---|
| | | * depending on the application requirements and constraints:
|
|---|
| | | * |
|---|
| | | * |
|---|
| | | * 1) Basic state monitoring:
|
|---|
| | | * Using I2C_CheckEvent() function:
|
|---|
| | | * It compares the status registers (SR1 and SR2) content to a given event
|
|---|
| | | * (can be the combination of one or more flags).
|
|---|
| | | * It returns SUCCESS if the current status includes the given flags |
|---|
| | | * and returns ERROR if one or more flags are missing in the current status.
|
|---|
| | | * - When to use:
|
|---|
| | | * - This function is suitable for most applications as well as for startup |
|---|
| | | * activity since the events are fully described in the product reference manual |
|---|
| | | * (RM0008).
|
|---|
| | | * - It is also suitable for users who need to define their own events.
|
|---|
| | | * - Limitations:
|
|---|
| | | * - If an error occurs (ie. error flags are set besides to the monitored flags),
|
|---|
| | | * the I2C_CheckEvent() function may return SUCCESS despite the communication
|
|---|
| | | * hold or corrupted real state. |
|---|
| | | * In this case, it is advised to use error interrupts to monitor the error
|
|---|
| | | * events and handle them in the interrupt IRQ handler.
|
|---|
| | | * |
|---|
| | | * @note |
|---|
| | | * For error management, it is advised to use the following functions:
|
|---|
| | | * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
|
|---|
| | | * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
|
|---|
| | | * Where x is the peripheral instance (I2C1, I2C2 ...)
|
|---|
| | | * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler()
|
|---|
| | | * in order to determine which error occurred.
|
|---|
| | | * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
|
|---|
| | | * and/or I2C_GenerateStop() in order to clear the error flag and source,
|
|---|
| | | * and return to correct communication status.
|
|---|
| | | * |
|---|
| | | *
|
|---|
| | | * 2) Advanced state monitoring:
|
|---|
| | | * Using the function I2C_GetLastEvent() which returns the image of both status |
|---|
| | | * registers in a single word (uint32_t) (Status Register 2 value is shifted left |
|---|
| | | * by 16 bits and concatenated to Status Register 1).
|
|---|
| | | * - When to use:
|
|---|
| | | * - This function is suitable for the same applications above but it allows to
|
|---|
| | | * overcome the limitations of I2C_GetFlagStatus() function (see below).
|
|---|
| | | * The returned value could be compared to events already defined in the |
|---|
| | | * library (stm32f10x_i2c.h) or to custom values defined by user.
|
|---|
| | | * - This function is suitable when multiple flags are monitored at the same time.
|
|---|
| | | * - At the opposite of I2C_CheckEvent() function, this function allows user to
|
|---|
| | | * choose when an event is accepted (when all events flags are set and no |
|---|
| | | * other flags are set or just when the needed flags are set like |
|---|
| | | * I2C_CheckEvent() function).
|
|---|
| | | * - Limitations:
|
|---|
| | | * - User may need to define his own events.
|
|---|
| | | * - Same remark concerning the error management is applicable for this |
|---|
| | | * function if user decides to check only regular communication flags (and |
|---|
| | | * ignores error flags).
|
|---|
| | | * |
|---|
| | | *
|
|---|
| | | * 3) Flag-based state monitoring:
|
|---|
| | | * Using the function I2C_GetFlagStatus() which simply returns the status of |
|---|
| | | * one single flag (ie. I2C_FLAG_RXNE ...). |
|---|
| | | * - When to use:
|
|---|
| | | * - This function could be used for specific applications or in debug phase.
|
|---|
| | | * - It is suitable when only one flag checking is needed (most I2C events |
|---|
| | | * are monitored through multiple flags).
|
|---|
| | | * - Limitations: |
|---|
| | | * - When calling this function, the Status register is accessed. Some flags are
|
|---|
| | | * cleared when the status register is accessed. So checking the status
|
|---|
| | | * of one Flag, may clear other ones.
|
|---|
| | | * - Function may need to be called twice or more in order to monitor one |
|---|
| | | * single event.
|
|---|
| | | * |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * |
|---|
| | | * 1) Basic state monitoring
|
|---|
| | | *******************************************************************************
|
|---|
| | | */
|
|---|
| | | ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
|
|---|
| | | /**
|
|---|
| | | * |
|---|
| | | * 2) Advanced state monitoring
|
|---|
| | | *******************************************************************************
|
|---|
| | | */
|
|---|
| | | uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
|
|---|
| | | /**
|
|---|
| | | * |
|---|
| | | * 3) Flag-based state monitoring
|
|---|
| | | *******************************************************************************
|
|---|
| | | */
|
|---|
| | | FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
|---|
| | | /**
|
|---|
| | | *
|
|---|
| | | *******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
|---|
| | | ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
|---|
| | | void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_I2C_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h |
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 08-April-2011
|
|---|
| | | * @brief This file contains the headers of the interrupt handlers.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_IT_H
|
|---|
| | | #define __STM32F10x_IT_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif |
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /* Exported types ------------------------------------------------------------*/
|
|---|
| | | /* Exported constants --------------------------------------------------------*/
|
|---|
| | | /* Exported macro ------------------------------------------------------------*/
|
|---|
| | | /* Exported functions ------------------------------------------------------- */
|
|---|
| | |
|
|---|
| | | void NMI_Handler(void);
|
|---|
| | | void HardFault_Handler(void);
|
|---|
| | | void MemManage_Handler(void);
|
|---|
| | | void BusFault_Handler(void);
|
|---|
| | | void UsageFault_Handler(void);
|
|---|
| | | void SVC_Handler(void);
|
|---|
| | | void DebugMon_Handler(void);
|
|---|
| | | void PendSV_Handler(void);
|
|---|
| | | void SysTick_Handler(void);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_IT_H */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_iwdg.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the IWDG |
|---|
| | | * firmware library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_IWDG_H
|
|---|
| | | #define __STM32F10x_IWDG_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup IWDG
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_WriteAccess
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
|
|---|
| | | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
|
|---|
| | | ((ACCESS) == IWDG_WriteAccess_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_prescaler |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IWDG_Prescaler_4 ((uint8_t)0x00)
|
|---|
| | | #define IWDG_Prescaler_8 ((uint8_t)0x01)
|
|---|
| | | #define IWDG_Prescaler_16 ((uint8_t)0x02)
|
|---|
| | | #define IWDG_Prescaler_32 ((uint8_t)0x03)
|
|---|
| | | #define IWDG_Prescaler_64 ((uint8_t)0x04)
|
|---|
| | | #define IWDG_Prescaler_128 ((uint8_t)0x05)
|
|---|
| | | #define IWDG_Prescaler_256 ((uint8_t)0x06)
|
|---|
| | | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_8) || \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_16) || \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_32) || \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_64) || \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_128)|| \
|
|---|
| | | ((PRESCALER) == IWDG_Prescaler_256))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_Flag |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
|
|---|
| | | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
|
|---|
| | | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
|
|---|
| | | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup IWDG_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
|
|---|
| | | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
|
|---|
| | | void IWDG_SetReload(uint16_t Reload);
|
|---|
| | | void IWDG_ReloadCounter(void);
|
|---|
| | | void IWDG_Enable(void);
|
|---|
| | | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_IWDG_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_pwr.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the PWR firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_PWR_H
|
|---|
| | | #define __STM32F10x_PWR_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup PWR
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup PWR_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup PWR_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup PVD_detection_level |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
|
|---|
| | | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
|
|---|
| | | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
|
|---|
| | | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
|
|---|
| | | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
|
|---|
| | | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
|
|---|
| | | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
|
|---|
| | | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
|
|---|
| | | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
|
|---|
| | | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
|
|---|
| | | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
|
|---|
| | | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Regulator_state_is_STOP_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define PWR_Regulator_ON ((uint32_t)0x00000000)
|
|---|
| | | #define PWR_Regulator_LowPower ((uint32_t)0x00000001)
|
|---|
| | | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
|
|---|
| | | ((REGULATOR) == PWR_Regulator_LowPower))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup STOP_mode_entry |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
|
|---|
| | | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
|
|---|
| | | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup PWR_Flag |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define PWR_FLAG_WU ((uint32_t)0x00000001)
|
|---|
| | | #define PWR_FLAG_SB ((uint32_t)0x00000002)
|
|---|
| | | #define PWR_FLAG_PVDO ((uint32_t)0x00000004)
|
|---|
| | | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
|
|---|
| | | ((FLAG) == PWR_FLAG_PVDO))
|
|---|
| | |
|
|---|
| | | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup PWR_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup PWR_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void PWR_DeInit(void);
|
|---|
| | | void PWR_BackupAccessCmd(FunctionalState NewState);
|
|---|
| | | void PWR_PVDCmd(FunctionalState NewState);
|
|---|
| | | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
|
|---|
| | | void PWR_WakeUpPinCmd(FunctionalState NewState);
|
|---|
| | | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
|
|---|
| | | void PWR_EnterSTANDBYMode(void);
|
|---|
| | | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
|
|---|
| | | void PWR_ClearFlag(uint32_t PWR_FLAG);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_PWR_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_rcc.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the RCC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_RCC_H
|
|---|
| | | #define __STM32F10x_RCC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup RCC
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
|
|---|
| | | uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
|
|---|
| | | uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
|
|---|
| | | uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
|
|---|
| | | uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
|
|---|
| | | }RCC_ClocksTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup HSE_configuration |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_HSE_OFF ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_HSE_ON ((uint32_t)0x00010000)
|
|---|
| | | #define RCC_HSE_Bypass ((uint32_t)0x00040000)
|
|---|
| | | #define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
|---|
| | | ((HSE) == RCC_HSE_Bypass))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup PLL_entry_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
|
|---|
| | |
|
|---|
| | | #if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL)
|
|---|
| | | #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
|
|---|
| | | #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
|
|---|
| | | #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
|---|
| | | ((SOURCE) == RCC_PLLSource_HSE_Div1) || \
|
|---|
| | | ((SOURCE) == RCC_PLLSource_HSE_Div2))
|
|---|
| | | #else
|
|---|
| | | #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
|
|---|
| | | #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
|---|
| | | ((SOURCE) == RCC_PLLSource_PREDIV1))
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup PLL_multiplication_factor |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | #define RCC_PLLMul_2 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_PLLMul_3 ((uint32_t)0x00040000)
|
|---|
| | | #define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
|---|
| | | #define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
|---|
| | | #define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
|---|
| | | #define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
|---|
| | | #define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
|---|
| | | #define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
|---|
| | | #define RCC_PLLMul_10 ((uint32_t)0x00200000)
|
|---|
| | | #define RCC_PLLMul_11 ((uint32_t)0x00240000)
|
|---|
| | | #define RCC_PLLMul_12 ((uint32_t)0x00280000)
|
|---|
| | | #define RCC_PLLMul_13 ((uint32_t)0x002C0000)
|
|---|
| | | #define RCC_PLLMul_14 ((uint32_t)0x00300000)
|
|---|
| | | #define RCC_PLLMul_15 ((uint32_t)0x00340000)
|
|---|
| | | #define RCC_PLLMul_16 ((uint32_t)0x00380000)
|
|---|
| | | #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_16))
|
|---|
| | |
|
|---|
| | | #else
|
|---|
| | | #define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
|---|
| | | #define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
|---|
| | | #define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
|---|
| | | #define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
|---|
| | | #define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
|---|
| | | #define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
|---|
| | | #define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
|---|
| | | ((MUL) == RCC_PLLMul_6_5))
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup PREDIV1_division_factor
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
|---|
| | | #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
|
|---|
| | | #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
|
|---|
| | | #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
|
|---|
| | | #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
|
|---|
| | | #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
|
|---|
| | | #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
|
|---|
| | | #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
|
|---|
| | | #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
|
|---|
| | | #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
|
|---|
| | | #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
|
|---|
| | | #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
|
|---|
| | | #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
|
|---|
| | | #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
|
|---|
| | | #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
|
|---|
| | | #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
|
|---|
| | | ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
|
|---|
| | | #endif
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup PREDIV1_clock_source
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | /* PREDIV1 clock source (for STM32 connectivity line devices) */
|
|---|
| | | #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) |
|---|
| | | #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000) |
|---|
| | |
|
|---|
| | | #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
|
|---|
| | | ((SOURCE) == RCC_PREDIV1_Source_PLL2)) |
|---|
| | | #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
|---|
| | | /* PREDIV1 clock source (for STM32 Value line devices) */
|
|---|
| | | #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) |
|---|
| | |
|
|---|
| | | #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) |
|---|
| | | #endif
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | /** @defgroup PREDIV2_division_factor
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
|
|---|
| | | #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
|
|---|
| | | #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
|
|---|
| | | #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
|
|---|
| | | #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
|
|---|
| | | #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
|
|---|
| | | #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
|
|---|
| | | #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
|
|---|
| | | #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
|
|---|
| | | #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
|
|---|
| | | #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
|
|---|
| | | #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
|
|---|
| | | #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
|
|---|
| | | #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
|
|---|
| | | #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
|
|---|
| | | ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup PLL2_multiplication_factor
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
|
|---|
| | | #define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
|
|---|
| | | #define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
|
|---|
| | | #define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
|
|---|
| | | #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
|
|---|
| | | #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
|
|---|
| | | #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
|
|---|
| | | #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
|
|---|
| | | #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
|
|---|
| | | ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
|
|---|
| | | ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
|
|---|
| | | ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
|
|---|
| | | ((MUL) == RCC_PLL2Mul_20))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup PLL3_multiplication_factor
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
|
|---|
| | | #define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
|
|---|
| | | #define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
|
|---|
| | | #define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
|
|---|
| | | #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
|
|---|
| | | #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
|
|---|
| | | #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
|
|---|
| | | #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
|
|---|
| | | #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
|
|---|
| | | ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
|
|---|
| | | ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
|
|---|
| | | ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
|
|---|
| | | ((MUL) == RCC_PLL3Mul_20))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #endif /* STM32F10X_CL */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup System_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
|
|---|
| | | #define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
|
|---|
| | | #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
|---|
| | | ((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
|---|
| | | ((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup AHB_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
|
|---|
| | | #define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
|
|---|
| | | #define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
|
|---|
| | | #define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
|
|---|
| | | #define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
|
|---|
| | | #define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
|
|---|
| | | #define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
|
|---|
| | | #define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
|
|---|
| | | #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
|---|
| | | ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
|---|
| | | ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
|---|
| | | ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
|---|
| | | ((HCLK) == RCC_SYSCLK_Div512))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup APB1_APB2_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_HCLK_Div1 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_HCLK_Div2 ((uint32_t)0x00000400)
|
|---|
| | | #define RCC_HCLK_Div4 ((uint32_t)0x00000500)
|
|---|
| | | #define RCC_HCLK_Div8 ((uint32_t)0x00000600)
|
|---|
| | | #define RCC_HCLK_Div16 ((uint32_t)0x00000700)
|
|---|
| | | #define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
|---|
| | | ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
|---|
| | | ((PCLK) == RCC_HCLK_Div16))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Interrupt_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_IT_LSIRDY ((uint8_t)0x01)
|
|---|
| | | #define RCC_IT_LSERDY ((uint8_t)0x02)
|
|---|
| | | #define RCC_IT_HSIRDY ((uint8_t)0x04)
|
|---|
| | | #define RCC_IT_HSERDY ((uint8_t)0x08)
|
|---|
| | | #define RCC_IT_PLLRDY ((uint8_t)0x10)
|
|---|
| | | #define RCC_IT_CSS ((uint8_t)0x80)
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
|
|---|
| | | #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
|---|
| | | ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
|---|
| | | ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
|
|---|
| | | #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
|
|---|
| | | #else
|
|---|
| | | #define RCC_IT_PLL2RDY ((uint8_t)0x20)
|
|---|
| | | #define RCC_IT_PLL3RDY ((uint8_t)0x40)
|
|---|
| | | #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
|
|---|
| | | #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
|---|
| | | ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
|---|
| | | ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
|
|---|
| | | ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
|
|---|
| | | #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | /** @defgroup USB_Device_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
|
|---|
| | | #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
|
|---|
| | | ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | #else
|
|---|
| | | /** @defgroup USB_OTG_FS_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
|
|---|
| | | #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
|
|---|
| | | ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | /** @defgroup I2S2_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
|
|---|
| | | #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
|
|---|
| | | ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2S3_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
|
|---|
| | | #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
|
|---|
| | | ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO)) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | | |
|---|
| | |
|
|---|
| | | /** @defgroup ADC_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
|
|---|
| | | #define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
|
|---|
| | | #define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
|
|---|
| | | #define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
|
|---|
| | | #define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
|
|---|
| | | ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup LSE_configuration |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_LSE_OFF ((uint8_t)0x00)
|
|---|
| | | #define RCC_LSE_ON ((uint8_t)0x01)
|
|---|
| | | #define RCC_LSE_Bypass ((uint8_t)0x04)
|
|---|
| | | #define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
|---|
| | | ((LSE) == RCC_LSE_Bypass))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RTC_clock_source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
|
|---|
| | | #define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
|
|---|
| | | #define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
|
|---|
| | | #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
|---|
| | | ((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
|---|
| | | ((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup AHB_peripheral |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
|
|---|
| | | #define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
|
|---|
| | | #define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
|
|---|
| | | #define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
|
|---|
| | | #define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
|
|---|
| | | #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
|
|---|
| | | #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | | #else
|
|---|
| | | #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
|
|---|
| | | #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
|
|---|
| | | #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
|
|---|
| | | #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | | #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | | #endif /* STM32F10X_CL */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup APB2_peripheral |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
|
|---|
| | | #define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
|
|---|
| | | #define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
|
|---|
| | | #define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
|
|---|
| | | #define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
|
|---|
| | | #define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
|
|---|
| | | #define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
|
|---|
| | | #define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
|
|---|
| | | #define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
|
|---|
| | | #define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
|
|---|
| | | #define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
|
|---|
| | | #define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
|---|
| | | #define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
|
|---|
| | | #define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
|
|---|
| | | #define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
|
|---|
| | | #define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)
|
|---|
| | | #define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)
|
|---|
| | | #define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)
|
|---|
| | | #define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
|
|---|
| | | #define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
|
|---|
| | | #define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup APB1_peripheral |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
|---|
| | | #define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
|---|
| | | #define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
|---|
| | | #define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
|---|
| | | #define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
|---|
| | | #define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
|---|
| | | #define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
|---|
| | | #define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
|---|
| | | #define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
|---|
| | | #define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
|---|
| | | #define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
|---|
| | | #define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
|---|
| | | #define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
|---|
| | | #define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
|---|
| | | #define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
|---|
| | | #define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
|---|
| | | #define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
|---|
| | | #define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
|---|
| | | #define RCC_APB1Periph_USB ((uint32_t)0x00800000)
|
|---|
| | | #define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
|---|
| | | #define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
|---|
| | | #define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
|
|---|
| | | #define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
|---|
| | | #define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
|---|
| | | #define RCC_APB1Periph_CEC ((uint32_t)0x40000000)
|
|---|
| | | |
|---|
| | | #define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup Clock_source_to_output_on_MCO_pin |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_MCO_NoClock ((uint8_t)0x00)
|
|---|
| | | #define RCC_MCO_SYSCLK ((uint8_t)0x04)
|
|---|
| | | #define RCC_MCO_HSI ((uint8_t)0x05)
|
|---|
| | | #define RCC_MCO_HSE ((uint8_t)0x06)
|
|---|
| | | #define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
|---|
| | | ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
|---|
| | | ((MCO) == RCC_MCO_PLLCLK_Div2))
|
|---|
| | | #else
|
|---|
| | | #define RCC_MCO_PLL2CLK ((uint8_t)0x08)
|
|---|
| | | #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
|
|---|
| | | #define RCC_MCO_XT1 ((uint8_t)0x0A)
|
|---|
| | | #define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
|
|---|
| | |
|
|---|
| | | #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
|---|
| | | ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
|---|
| | | ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
|
|---|
| | | ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
|
|---|
| | | ((MCO) == RCC_MCO_PLL3CLK))
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Flag |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
|---|
| | | #define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
|---|
| | | #define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
|---|
| | | #define RCC_FLAG_LSERDY ((uint8_t)0x41)
|
|---|
| | | #define RCC_FLAG_LSIRDY ((uint8_t)0x61)
|
|---|
| | | #define RCC_FLAG_PINRST ((uint8_t)0x7A)
|
|---|
| | | #define RCC_FLAG_PORRST ((uint8_t)0x7B)
|
|---|
| | | #define RCC_FLAG_SFTRST ((uint8_t)0x7C)
|
|---|
| | | #define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
|
|---|
| | | #define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
|
|---|
| | | #define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
|---|
| | | ((FLAG) == RCC_FLAG_LPWRRST))
|
|---|
| | | #else
|
|---|
| | | #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B) |
|---|
| | | #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D) |
|---|
| | | #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
|---|
| | | ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
|---|
| | | ((FLAG) == RCC_FLAG_LPWRRST))
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | #define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RCC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void RCC_DeInit(void);
|
|---|
| | | void RCC_HSEConfig(uint32_t RCC_HSE);
|
|---|
| | | ErrorStatus RCC_WaitForHSEStartUp(void);
|
|---|
| | | void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
|---|
| | | void RCC_HSICmd(FunctionalState NewState);
|
|---|
| | | void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
|---|
| | | void RCC_PLLCmd(FunctionalState NewState);
|
|---|
| | |
|
|---|
| | | #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
|---|
| | | void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
|
|---|
| | | void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
|
|---|
| | | void RCC_PLL2Cmd(FunctionalState NewState);
|
|---|
| | | void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
|
|---|
| | | void RCC_PLL3Cmd(FunctionalState NewState);
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
|---|
| | | uint8_t RCC_GetSYSCLKSource(void);
|
|---|
| | | void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
|---|
| | | void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
|---|
| | | void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
|---|
| | | void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
|---|
| | |
|
|---|
| | | #ifndef STM32F10X_CL
|
|---|
| | | void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
|
|---|
| | | #else
|
|---|
| | | void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); |
|---|
| | | void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | void RCC_LSEConfig(uint8_t RCC_LSE);
|
|---|
| | | void RCC_LSICmd(FunctionalState NewState);
|
|---|
| | | void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
|---|
| | | void RCC_RTCCLKCmd(FunctionalState NewState);
|
|---|
| | | void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
|---|
| | | void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
|---|
| | | void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
|---|
| | | void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
|---|
| | |
|
|---|
| | | #ifdef STM32F10X_CL
|
|---|
| | | void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
|---|
| | | #endif /* STM32F10X_CL */ |
|---|
| | |
|
|---|
| | | void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
|---|
| | | void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
|---|
| | | void RCC_BackupResetCmd(FunctionalState NewState);
|
|---|
| | | void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
|---|
| | | void RCC_MCOConfig(uint8_t RCC_MCO);
|
|---|
| | | FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
|---|
| | | void RCC_ClearFlag(void);
|
|---|
| | | ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
|---|
| | | void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_RCC_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_rtc.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the RTC firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_RTC_H
|
|---|
| | | #define __STM32F10x_RTC_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup RTC
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup RTC_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup RTC_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RTC_interrupts_define |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */
|
|---|
| | | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */
|
|---|
| | | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */
|
|---|
| | | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
|
|---|
| | | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
|
|---|
| | | ((IT) == RTC_IT_SEC))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup RTC_interrupts_flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */
|
|---|
| | | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */
|
|---|
| | | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */
|
|---|
| | | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */
|
|---|
| | | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */
|
|---|
| | | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
|
|---|
| | | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
|
|---|
| | | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
|
|---|
| | | ((FLAG) == RTC_FLAG_SEC))
|
|---|
| | | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RTC_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup RTC_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
|
|---|
| | | void RTC_EnterConfigMode(void);
|
|---|
| | | void RTC_ExitConfigMode(void);
|
|---|
| | | uint32_t RTC_GetCounter(void);
|
|---|
| | | void RTC_SetCounter(uint32_t CounterValue);
|
|---|
| | | void RTC_SetPrescaler(uint32_t PrescalerValue);
|
|---|
| | | void RTC_SetAlarm(uint32_t AlarmValue);
|
|---|
| | | uint32_t RTC_GetDivider(void);
|
|---|
| | | void RTC_WaitForLastTask(void);
|
|---|
| | | void RTC_WaitForSynchro(void);
|
|---|
| | | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
|
|---|
| | | void RTC_ClearFlag(uint16_t RTC_FLAG);
|
|---|
| | | ITStatus RTC_GetITStatus(uint16_t RTC_IT);
|
|---|
| | | void RTC_ClearITPendingBit(uint16_t RTC_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_RTC_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_sdio.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the SDIO firmware
|
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_SDIO_H
|
|---|
| | | #define __STM32F10x_SDIO_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
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| | | #include "stm32f10x.h"
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| | |
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| | | /** @addtogroup STM32F10x_StdPeriph_Driver
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| | | * @{
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| | | */
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| | |
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| | | /** @addtogroup SDIO
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| | | * @{
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| | | */
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| | |
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| | | /** @defgroup SDIO_Exported_Types
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| | | * @{
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| | | */
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| | |
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| | | typedef struct
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| | | {
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| | | uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
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| | | This parameter can be a value of @ref SDIO_Clock_Edge */
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| | |
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| | | uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
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| | | enabled or disabled.
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| | | This parameter can be a value of @ref SDIO_Clock_Bypass */
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| | |
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| | | uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
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| | | disabled when the bus is idle.
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| | | This parameter can be a value of @ref SDIO_Clock_Power_Save */
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| | |
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| | | uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
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| | | This parameter can be a value of @ref SDIO_Bus_Wide */
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| | |
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| | | uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
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| | | This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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| | |
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| | | uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
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| | | This parameter can be a value between 0x00 and 0xFF. */
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| | | |
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| | | } SDIO_InitTypeDef;
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| | |
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| | | typedef struct
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| | | {
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| | | uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
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| | | to a card as part of a command message. If a command
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| | | contains an argument, it must be loaded into this register
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| | | before writing the command to the command register */
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| | |
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| | | uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
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| | |
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| | | uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
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| | | This parameter can be a value of @ref SDIO_Response_Type */
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| | |
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| | | uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
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| | | This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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| | |
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| | | uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
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| | | is enabled or disabled.
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| | | This parameter can be a value of @ref SDIO_CPSM_State */
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| | | } SDIO_CmdInitTypeDef;
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| | |
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| | | typedef struct
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| | | {
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| | | uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
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| | |
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| | | uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
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| | | |
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| | | uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
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| | | This parameter can be a value of @ref SDIO_Data_Block_Size */
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| | | |
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| | | uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
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| | | is a read or write.
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| | | This parameter can be a value of @ref SDIO_Transfer_Direction */
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| | | |
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| | | uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
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| | | This parameter can be a value of @ref SDIO_Transfer_Type */
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| | | |
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| | | uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
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| | | is enabled or disabled.
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| | | This parameter can be a value of @ref SDIO_DPSM_State */
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| | | } SDIO_DataInitTypeDef;
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| | |
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| | | /**
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| | | * @}
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| | | */ |
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| | |
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| | | /** @defgroup SDIO_Exported_Constants
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| | | * @{
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| | | */
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| | |
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| | | /** @defgroup SDIO_Clock_Edge |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000)
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| | | #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000)
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| | | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
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| | | ((EDGE) == SDIO_ClockEdge_Falling))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Clock_Bypass |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000)
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| | | #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
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| | | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
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| | | ((BYPASS) == SDIO_ClockBypass_Enable))
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| | | /**
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| | | * @}
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| | | */ |
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| | |
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| | | /** @defgroup SDIO_Clock_Power_Save |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000)
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| | | #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
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| | | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
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| | | ((SAVE) == SDIO_ClockPowerSave_Enable))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Bus_Wide |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_BusWide_1b ((uint32_t)0x00000000)
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| | | #define SDIO_BusWide_4b ((uint32_t)0x00000800)
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| | | #define SDIO_BusWide_8b ((uint32_t)0x00001000)
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| | | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
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| | | ((WIDE) == SDIO_BusWide_8b))
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| | |
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Hardware_Flow_Control |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000)
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| | | #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000)
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| | | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
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| | | ((CONTROL) == SDIO_HardwareFlowControl_Enable))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Power_State |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_PowerState_OFF ((uint32_t)0x00000000)
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| | | #define SDIO_PowerState_ON ((uint32_t)0x00000003)
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| | | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) |
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| | | /**
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| | | * @}
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| | | */ |
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| | |
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| | |
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| | | /** @defgroup SDIO_Interrupt_sources |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001)
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| | | #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002)
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| | | #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004)
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| | | #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008)
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| | | #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010)
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| | | #define SDIO_IT_RXOVERR ((uint32_t)0x00000020)
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| | | #define SDIO_IT_CMDREND ((uint32_t)0x00000040)
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| | | #define SDIO_IT_CMDSENT ((uint32_t)0x00000080)
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| | | #define SDIO_IT_DATAEND ((uint32_t)0x00000100)
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| | | #define SDIO_IT_STBITERR ((uint32_t)0x00000200)
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| | | #define SDIO_IT_DBCKEND ((uint32_t)0x00000400)
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| | | #define SDIO_IT_CMDACT ((uint32_t)0x00000800)
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| | | #define SDIO_IT_TXACT ((uint32_t)0x00001000)
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| | | #define SDIO_IT_RXACT ((uint32_t)0x00002000)
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| | | #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000)
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| | | #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000)
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| | | #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000)
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| | | #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000)
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| | | #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000)
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| | | #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000)
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| | | #define SDIO_IT_TXDAVL ((uint32_t)0x00100000)
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| | | #define SDIO_IT_RXDAVL ((uint32_t)0x00200000)
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| | | #define SDIO_IT_SDIOIT ((uint32_t)0x00400000)
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| | | #define SDIO_IT_CEATAEND ((uint32_t)0x00800000)
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| | | #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
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| | | /**
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| | | * @}
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| | | */ |
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| | | /** @defgroup SDIO_Command_Index
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| | | * @{
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| | | */
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| | |
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| | | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Response_Type |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_Response_No ((uint32_t)0x00000000)
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| | | #define SDIO_Response_Short ((uint32_t)0x00000040)
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| | | #define SDIO_Response_Long ((uint32_t)0x000000C0)
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| | | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
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| | | ((RESPONSE) == SDIO_Response_Short) || \
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| | | ((RESPONSE) == SDIO_Response_Long))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Wait_Interrupt_State |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
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| | | #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */
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| | | #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */
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| | | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
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| | | ((WAIT) == SDIO_Wait_Pend))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_CPSM_State |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_CPSM_Disable ((uint32_t)0x00000000)
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| | | #define SDIO_CPSM_Enable ((uint32_t)0x00000400)
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| | | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
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| | | /**
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| | | * @}
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| | | */ |
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| | |
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| | | /** @defgroup SDIO_Response_Registers |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_RESP1 ((uint32_t)0x00000000)
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| | | #define SDIO_RESP2 ((uint32_t)0x00000004)
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| | | #define SDIO_RESP3 ((uint32_t)0x00000008)
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| | | #define SDIO_RESP4 ((uint32_t)0x0000000C)
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| | | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
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| | | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Data_Length |
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| | | * @{
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| | | */
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| | |
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| | | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Data_Block_Size |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000)
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| | | #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010)
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| | | #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020)
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| | | #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030)
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| | | #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040)
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| | | #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050)
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| | | #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060)
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| | | #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070)
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| | | #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080)
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| | | #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090)
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| | | #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0)
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| | | #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0)
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| | | #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0)
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| | | #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0)
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| | | #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0)
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| | | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_2b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_4b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_8b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_16b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_32b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_64b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_128b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_256b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_512b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_1024b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_2048b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_4096b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_8192b) || \
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| | | ((SIZE) == SDIO_DataBlockSize_16384b)) |
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Transfer_Direction |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000)
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| | | #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002)
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| | | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
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| | | ((DIR) == SDIO_TransferDir_ToSDIO))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Transfer_Type |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_TransferMode_Block ((uint32_t)0x00000000)
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| | | #define SDIO_TransferMode_Stream ((uint32_t)0x00000004)
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| | | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
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| | | ((MODE) == SDIO_TransferMode_Block))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_DPSM_State |
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| | | * @{
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| | | */
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| | |
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| | | #define SDIO_DPSM_Disable ((uint32_t)0x00000000)
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| | | #define SDIO_DPSM_Enable ((uint32_t)0x00000001)
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| | | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
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| | | /**
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| | | * @}
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| | | */
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| | |
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| | | /** @defgroup SDIO_Flags |
|---|
| | | * @{
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| | | */
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| | |
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| | | #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001)
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| | | #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002)
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| | | #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004)
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| | | #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008)
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| | | #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010)
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| | | #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020)
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| | | #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040)
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| | | #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080)
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| | | #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100)
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| | | #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200)
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| | | #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400)
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| | | #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800)
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| | | #define SDIO_FLAG_TXACT ((uint32_t)0x00001000)
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| | | #define SDIO_FLAG_RXACT ((uint32_t)0x00002000)
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| | | #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000)
|
|---|
| | | #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000)
|
|---|
| | | #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000)
|
|---|
| | | #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000)
|
|---|
| | | #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000)
|
|---|
| | | #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000)
|
|---|
| | | #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000)
|
|---|
| | | #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000)
|
|---|
| | | #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000)
|
|---|
| | | #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000)
|
|---|
| | | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXUNDERR) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXOVERR) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_CMDREND) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_CMDSENT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_DATAEND) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_STBITERR) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_DBCKEND) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_CMDACT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXACT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXACT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXFIFOF) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXFIFOF) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXFIFOE) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXFIFOE) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_TXDAVL) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_RXDAVL) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_SDIOIT) || \
|
|---|
| | | ((FLAG) == SDIO_FLAG_CEATAEND))
|
|---|
| | |
|
|---|
| | | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
|
|---|
| | |
|
|---|
| | | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
|
|---|
| | | ((IT) == SDIO_IT_DCRCFAIL) || \
|
|---|
| | | ((IT) == SDIO_IT_CTIMEOUT) || \
|
|---|
| | | ((IT) == SDIO_IT_DTIMEOUT) || \
|
|---|
| | | ((IT) == SDIO_IT_TXUNDERR) || \
|
|---|
| | | ((IT) == SDIO_IT_RXOVERR) || \
|
|---|
| | | ((IT) == SDIO_IT_CMDREND) || \
|
|---|
| | | ((IT) == SDIO_IT_CMDSENT) || \
|
|---|
| | | ((IT) == SDIO_IT_DATAEND) || \
|
|---|
| | | ((IT) == SDIO_IT_STBITERR) || \
|
|---|
| | | ((IT) == SDIO_IT_DBCKEND) || \
|
|---|
| | | ((IT) == SDIO_IT_CMDACT) || \
|
|---|
| | | ((IT) == SDIO_IT_TXACT) || \
|
|---|
| | | ((IT) == SDIO_IT_RXACT) || \
|
|---|
| | | ((IT) == SDIO_IT_TXFIFOHE) || \
|
|---|
| | | ((IT) == SDIO_IT_RXFIFOHF) || \
|
|---|
| | | ((IT) == SDIO_IT_TXFIFOF) || \
|
|---|
| | | ((IT) == SDIO_IT_RXFIFOF) || \
|
|---|
| | | ((IT) == SDIO_IT_TXFIFOE) || \
|
|---|
| | | ((IT) == SDIO_IT_RXFIFOE) || \
|
|---|
| | | ((IT) == SDIO_IT_TXDAVL) || \
|
|---|
| | | ((IT) == SDIO_IT_RXDAVL) || \
|
|---|
| | | ((IT) == SDIO_IT_SDIOIT) || \
|
|---|
| | | ((IT) == SDIO_IT_CEATAEND))
|
|---|
| | |
|
|---|
| | | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SDIO_Read_Wait_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001)
|
|---|
| | | #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000)
|
|---|
| | | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
|
|---|
| | | ((MODE) == SDIO_ReadWaitMode_DATA2))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SDIO_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SDIO_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void SDIO_DeInit(void);
|
|---|
| | | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
|
|---|
| | | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
|
|---|
| | | void SDIO_ClockCmd(FunctionalState NewState);
|
|---|
| | | void SDIO_SetPowerState(uint32_t SDIO_PowerState);
|
|---|
| | | uint32_t SDIO_GetPowerState(void);
|
|---|
| | | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
|
|---|
| | | void SDIO_DMACmd(FunctionalState NewState);
|
|---|
| | | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
|
|---|
| | | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
|
|---|
| | | uint8_t SDIO_GetCommandResponse(void);
|
|---|
| | | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
|
|---|
| | | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
|---|
| | | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
|---|
| | | uint32_t SDIO_GetDataCounter(void);
|
|---|
| | | uint32_t SDIO_ReadData(void);
|
|---|
| | | void SDIO_WriteData(uint32_t Data);
|
|---|
| | | uint32_t SDIO_GetFIFOCount(void);
|
|---|
| | | void SDIO_StartSDIOReadWait(FunctionalState NewState);
|
|---|
| | | void SDIO_StopSDIOReadWait(FunctionalState NewState);
|
|---|
| | | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
|---|
| | | void SDIO_SetSDIOOperation(FunctionalState NewState);
|
|---|
| | | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
|
|---|
| | | void SDIO_CommandCompletionCmd(FunctionalState NewState);
|
|---|
| | | void SDIO_CEATAITCmd(FunctionalState NewState);
|
|---|
| | | void SDIO_SendCEATACmd(FunctionalState NewState);
|
|---|
| | | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG);
|
|---|
| | | void SDIO_ClearFlag(uint32_t SDIO_FLAG);
|
|---|
| | | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT);
|
|---|
| | | void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_SDIO_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_spi.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the SPI firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_SPI_H
|
|---|
| | | #define __STM32F10x_SPI_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup SPI
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief SPI Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
|---|
| | | This parameter can be a value of @ref SPI_data_direction */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
|---|
| | | This parameter can be a value of @ref SPI_mode */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
|---|
| | | This parameter can be a value of @ref SPI_data_size */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
|---|
| | | This parameter can be a value of @ref SPI_Clock_Polarity */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
|---|
| | | This parameter can be a value of @ref SPI_Clock_Phase */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
|---|
| | | hardware (NSS pin) or by software using the SSI bit.
|
|---|
| | | This parameter can be a value of @ref SPI_Slave_Select_management */
|
|---|
| | | |
|---|
| | | uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
|---|
| | | used to configure the transmit and receive SCK clock.
|
|---|
| | | This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
|---|
| | | @note The communication clock is derived from the master
|
|---|
| | | clock. The slave clock does not need to be set. */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
|---|
| | | This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
|---|
| | |
|
|---|
| | | uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
|---|
| | | }SPI_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief I2S Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | |
|
|---|
| | | uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
|
|---|
| | | This parameter can be a value of @ref I2S_Mode */
|
|---|
| | |
|
|---|
| | | uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
|
|---|
| | | This parameter can be a value of @ref I2S_Standard */
|
|---|
| | |
|
|---|
| | | uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
|
|---|
| | | This parameter can be a value of @ref I2S_Data_Format */
|
|---|
| | |
|
|---|
| | | uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
|---|
| | | This parameter can be a value of @ref I2S_MCLK_Output */
|
|---|
| | |
|
|---|
| | | uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
|---|
| | | This parameter can be a value of @ref I2S_Audio_Frequency */
|
|---|
| | |
|
|---|
| | | uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
|
|---|
| | | This parameter can be a value of @ref I2S_Clock_Polarity */
|
|---|
| | | }I2S_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
|---|
| | | ((PERIPH) == SPI2) || \
|
|---|
| | | ((PERIPH) == SPI3))
|
|---|
| | |
|
|---|
| | | #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
|
|---|
| | | ((PERIPH) == SPI3))
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_data_direction |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
|---|
| | | #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
|---|
| | | #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
|---|
| | | #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
|---|
| | | #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
|---|
| | | ((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
|---|
| | | ((MODE) == SPI_Direction_1Line_Rx) || \
|
|---|
| | | ((MODE) == SPI_Direction_1Line_Tx))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_Mode_Master ((uint16_t)0x0104)
|
|---|
| | | #define SPI_Mode_Slave ((uint16_t)0x0000)
|
|---|
| | | #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
|---|
| | | ((MODE) == SPI_Mode_Slave))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_data_size |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_DataSize_16b ((uint16_t)0x0800)
|
|---|
| | | #define SPI_DataSize_8b ((uint16_t)0x0000)
|
|---|
| | | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
|---|
| | | ((DATASIZE) == SPI_DataSize_8b))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Clock_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_CPOL_Low ((uint16_t)0x0000)
|
|---|
| | | #define SPI_CPOL_High ((uint16_t)0x0002)
|
|---|
| | | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
|---|
| | | ((CPOL) == SPI_CPOL_High))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Clock_Phase |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
|---|
| | | #define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
|---|
| | | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
|---|
| | | ((CPHA) == SPI_CPHA_2Edge))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Slave_Select_management |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_NSS_Soft ((uint16_t)0x0200)
|
|---|
| | | #define SPI_NSS_Hard ((uint16_t)0x0000)
|
|---|
| | | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
|---|
| | | ((NSS) == SPI_NSS_Hard))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup SPI_BaudRate_Prescaler |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
|---|
| | | #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
|---|
| | | #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
|---|
| | | #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
|---|
| | | #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
|---|
| | | #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
|---|
| | | #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
|---|
| | | #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
|---|
| | | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
|---|
| | | ((PRESCALER) == SPI_BaudRatePrescaler_256))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup SPI_MSB_LSB_transmission |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
|---|
| | | #define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
|---|
| | | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
|---|
| | | ((BIT) == SPI_FirstBit_LSB))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2S_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
|
|---|
| | | #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
|
|---|
| | | #define I2S_Mode_MasterTx ((uint16_t)0x0200)
|
|---|
| | | #define I2S_Mode_MasterRx ((uint16_t)0x0300)
|
|---|
| | | #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
|---|
| | | ((MODE) == I2S_Mode_SlaveRx) || \
|
|---|
| | | ((MODE) == I2S_Mode_MasterTx) || \
|
|---|
| | | ((MODE) == I2S_Mode_MasterRx) )
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2S_Standard |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_Standard_Phillips ((uint16_t)0x0000)
|
|---|
| | | #define I2S_Standard_MSB ((uint16_t)0x0010)
|
|---|
| | | #define I2S_Standard_LSB ((uint16_t)0x0020)
|
|---|
| | | #define I2S_Standard_PCMShort ((uint16_t)0x0030)
|
|---|
| | | #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
|
|---|
| | | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
|---|
| | | ((STANDARD) == I2S_Standard_MSB) || \
|
|---|
| | | ((STANDARD) == I2S_Standard_LSB) || \
|
|---|
| | | ((STANDARD) == I2S_Standard_PCMShort) || \
|
|---|
| | | ((STANDARD) == I2S_Standard_PCMLong))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2S_Data_Format |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_DataFormat_16b ((uint16_t)0x0000)
|
|---|
| | | #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
|
|---|
| | | #define I2S_DataFormat_24b ((uint16_t)0x0003)
|
|---|
| | | #define I2S_DataFormat_32b ((uint16_t)0x0005)
|
|---|
| | | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
|---|
| | | ((FORMAT) == I2S_DataFormat_16bextended) || \
|
|---|
| | | ((FORMAT) == I2S_DataFormat_24b) || \
|
|---|
| | | ((FORMAT) == I2S_DataFormat_32b))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2S_MCLK_Output |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
|
|---|
| | | #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
|---|
| | | ((OUTPUT) == I2S_MCLKOutput_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup I2S_Audio_Frequency |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_AudioFreq_192k ((uint32_t)192000)
|
|---|
| | | #define I2S_AudioFreq_96k ((uint32_t)96000)
|
|---|
| | | #define I2S_AudioFreq_48k ((uint32_t)48000)
|
|---|
| | | #define I2S_AudioFreq_44k ((uint32_t)44100)
|
|---|
| | | #define I2S_AudioFreq_32k ((uint32_t)32000)
|
|---|
| | | #define I2S_AudioFreq_22k ((uint32_t)22050)
|
|---|
| | | #define I2S_AudioFreq_16k ((uint32_t)16000)
|
|---|
| | | #define I2S_AudioFreq_11k ((uint32_t)11025)
|
|---|
| | | #define I2S_AudioFreq_8k ((uint32_t)8000)
|
|---|
| | | #define I2S_AudioFreq_Default ((uint32_t)2)
|
|---|
| | |
|
|---|
| | | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
|
|---|
| | | ((FREQ) <= I2S_AudioFreq_192k)) || \
|
|---|
| | | ((FREQ) == I2S_AudioFreq_Default))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup I2S_Clock_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define I2S_CPOL_Low ((uint16_t)0x0000)
|
|---|
| | | #define I2S_CPOL_High ((uint16_t)0x0008)
|
|---|
| | | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
|---|
| | | ((CPOL) == I2S_CPOL_High))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_I2S_DMA_transfer_requests |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
|
|---|
| | | #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
|
|---|
| | | #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_NSS_internal_software_management |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
|---|
| | | #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
|---|
| | | #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
|---|
| | | ((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_CRC_Transmit_Receive |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_CRC_Tx ((uint8_t)0x00)
|
|---|
| | | #define SPI_CRC_Rx ((uint8_t)0x01)
|
|---|
| | | #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_direction_transmit_receive |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
|---|
| | | #define SPI_Direction_Tx ((uint16_t)0x4000)
|
|---|
| | | #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
|---|
| | | ((DIRECTION) == SPI_Direction_Tx))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_I2S_interrupts_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_I2S_IT_TXE ((uint8_t)0x71)
|
|---|
| | | #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
|
|---|
| | | #define SPI_I2S_IT_ERR ((uint8_t)0x50)
|
|---|
| | | #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
|---|
| | | ((IT) == SPI_I2S_IT_RXNE) || \
|
|---|
| | | ((IT) == SPI_I2S_IT_ERR))
|
|---|
| | | #define SPI_I2S_IT_OVR ((uint8_t)0x56)
|
|---|
| | | #define SPI_IT_MODF ((uint8_t)0x55)
|
|---|
| | | #define SPI_IT_CRCERR ((uint8_t)0x54)
|
|---|
| | | #define I2S_IT_UDR ((uint8_t)0x53)
|
|---|
| | | #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
|---|
| | | #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
|---|
| | | ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
|---|
| | | ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_I2S_flags_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
|
|---|
| | | #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
|
|---|
| | | #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
|
|---|
| | | #define I2S_FLAG_UDR ((uint16_t)0x0008)
|
|---|
| | | #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
|---|
| | | #define SPI_FLAG_MODF ((uint16_t)0x0020)
|
|---|
| | | #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
|
|---|
| | | #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
|
|---|
| | | #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
|---|
| | | #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
|---|
| | | ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
|---|
| | | ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
|---|
| | | ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_CRC_polynomial |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup SPI_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
|---|
| | | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
|---|
| | | void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
|---|
| | | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
|---|
| | | void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
|---|
| | | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
|---|
| | | void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
|---|
| | | void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
|---|
| | | void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
|---|
| | | void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
|---|
| | | uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
|---|
| | | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
|---|
| | | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
|---|
| | | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
|---|
| | | void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
|---|
| | | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
|---|
| | | uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
|---|
| | | uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
|---|
| | | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
|---|
| | | FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
|---|
| | | void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
|---|
| | | ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
|---|
| | | void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_SPI_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_tim.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the TIM firmware |
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_TIM_H
|
|---|
| | | #define __STM32F10x_TIM_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup TIM
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief TIM Time Base Init structure definition
|
|---|
| | | * @note This structure is used with all TIMx except for TIM6 and TIM7. |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
|
|---|
| | | This parameter can be a number between 0x0000 and 0xFFFF */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
|
|---|
| | | This parameter can be a value of @ref TIM_Counter_Mode */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
|---|
| | | Auto-Reload Register at the next update event.
|
|---|
| | | This parameter must be a number between 0x0000 and 0xFFFF. */ |
|---|
| | |
|
|---|
| | | uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
|
|---|
| | | This parameter can be a value of @ref TIM_Clock_Division_CKD */
|
|---|
| | |
|
|---|
| | | uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
|
|---|
| | | reaches zero, an update event is generated and counting restarts
|
|---|
| | | from the RCR value (N).
|
|---|
| | | This means in PWM mode that (N+1) corresponds to:
|
|---|
| | | - the number of PWM periods in edge-aligned mode
|
|---|
| | | - the number of half PWM period in center-aligned mode
|
|---|
| | | This parameter must be a number between 0x00 and 0xFF. |
|---|
| | | @note This parameter is valid only for TIM1 and TIM8. */
|
|---|
| | | } TIM_TimeBaseInitTypeDef; |
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief TIM Output Compare Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_state */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_N_state
|
|---|
| | | @note This parameter is valid only for TIM1 and TIM8. */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
|---|
| | | This parameter can be a number between 0x0000 and 0xFFFF */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_Polarity */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
|
|---|
| | | @note This parameter is valid only for TIM1 and TIM8. */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_Idle_State
|
|---|
| | | @note This parameter is valid only for TIM1 and TIM8. */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
|---|
| | | This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
|
|---|
| | | @note This parameter is valid only for TIM1 and TIM8. */
|
|---|
| | | } TIM_OCInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief TIM Input Capture Init structure definition |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | |
|
|---|
| | | uint16_t TIM_Channel; /*!< Specifies the TIM channel.
|
|---|
| | | This parameter can be a value of @ref TIM_Channel */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
|
|---|
| | | This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_ICSelection; /*!< Specifies the input.
|
|---|
| | | This parameter can be a value of @ref TIM_Input_Capture_Selection */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
|
|---|
| | | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
|
|---|
| | | This parameter can be a number between 0x0 and 0xF */
|
|---|
| | | } TIM_ICInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief BDTR structure definition |
|---|
| | | * @note This structure is used only with TIM1 and TIM8. |
|---|
| | | */
|
|---|
| | |
|
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
|
|---|
| | | This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
|
|---|
| | | This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
|
|---|
| | | This parameter can be a value of @ref Lock_level */ |
|---|
| | |
|
|---|
| | | uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
|
|---|
| | | switching-on of the outputs.
|
|---|
| | | This parameter can be a number between 0x00 and 0xFF */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. |
|---|
| | | This parameter can be a value of @ref Break_Input_enable_disable */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
|
|---|
| | | This parameter can be a value of @ref Break_Polarity */
|
|---|
| | |
|
|---|
| | | uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
|---|
| | | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
|
|---|
| | | } TIM_BDTRInitTypeDef;
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Exported_constants |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM6) || \
|
|---|
| | | ((PERIPH) == TIM7) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM9) || \
|
|---|
| | | ((PERIPH) == TIM10)|| \
|
|---|
| | | ((PERIPH) == TIM11)|| \
|
|---|
| | | ((PERIPH) == TIM12)|| \
|
|---|
| | | ((PERIPH) == TIM13)|| \
|
|---|
| | | ((PERIPH) == TIM14)|| \
|
|---|
| | | ((PERIPH) == TIM15)|| \
|
|---|
| | | ((PERIPH) == TIM16)|| \
|
|---|
| | | ((PERIPH) == TIM17))
|
|---|
| | |
|
|---|
| | | /* LIST1: TIM 1 and 8 */
|
|---|
| | | #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM8))
|
|---|
| | |
|
|---|
| | | /* LIST2: TIM 1, 8, 15 16 and 17 */
|
|---|
| | | #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM15)|| \
|
|---|
| | | ((PERIPH) == TIM16)|| \
|
|---|
| | | ((PERIPH) == TIM17)) |
|---|
| | |
|
|---|
| | | /* LIST3: TIM 1, 2, 3, 4, 5 and 8 */
|
|---|
| | | #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM8)) |
|---|
| | | |
|---|
| | | /* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */
|
|---|
| | | #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM15)|| \
|
|---|
| | | ((PERIPH) == TIM16)|| \
|
|---|
| | | ((PERIPH) == TIM17))
|
|---|
| | |
|
|---|
| | | /* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ |
|---|
| | | #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM15)) |
|---|
| | |
|
|---|
| | | /* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */
|
|---|
| | | #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM9) || \
|
|---|
| | | ((PERIPH) == TIM12)|| \
|
|---|
| | | ((PERIPH) == TIM15))
|
|---|
| | |
|
|---|
| | | /* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */
|
|---|
| | | #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM6) || \
|
|---|
| | | ((PERIPH) == TIM7) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM9) || \
|
|---|
| | | ((PERIPH) == TIM12)|| \
|
|---|
| | | ((PERIPH) == TIM15)) |
|---|
| | |
|
|---|
| | | /* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ |
|---|
| | | #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM9) || \
|
|---|
| | | ((PERIPH) == TIM10)|| \
|
|---|
| | | ((PERIPH) == TIM11)|| \
|
|---|
| | | ((PERIPH) == TIM12)|| \
|
|---|
| | | ((PERIPH) == TIM13)|| \
|
|---|
| | | ((PERIPH) == TIM14)|| \
|
|---|
| | | ((PERIPH) == TIM15)|| \
|
|---|
| | | ((PERIPH) == TIM16)|| \
|
|---|
| | | ((PERIPH) == TIM17))
|
|---|
| | |
|
|---|
| | | /* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */
|
|---|
| | | #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|---|
| | | ((PERIPH) == TIM2) || \
|
|---|
| | | ((PERIPH) == TIM3) || \
|
|---|
| | | ((PERIPH) == TIM4) || \
|
|---|
| | | ((PERIPH) == TIM5) || \
|
|---|
| | | ((PERIPH) == TIM6) || \
|
|---|
| | | ((PERIPH) == TIM7) || \
|
|---|
| | | ((PERIPH) == TIM8) || \
|
|---|
| | | ((PERIPH) == TIM15)|| \
|
|---|
| | | ((PERIPH) == TIM16)|| \
|
|---|
| | | ((PERIPH) == TIM17)) |
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_and_PWM_modes |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCMode_Timing ((uint16_t)0x0000)
|
|---|
| | | #define TIM_OCMode_Active ((uint16_t)0x0010)
|
|---|
| | | #define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
|---|
| | | #define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
|---|
| | | #define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
|---|
| | | #define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
|---|
| | | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Active) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Inactive) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Toggle)|| \
|
|---|
| | | ((MODE) == TIM_OCMode_PWM1) || \
|
|---|
| | | ((MODE) == TIM_OCMode_PWM2))
|
|---|
| | | #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Active) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Inactive) || \
|
|---|
| | | ((MODE) == TIM_OCMode_Toggle)|| \
|
|---|
| | | ((MODE) == TIM_OCMode_PWM1) || \
|
|---|
| | | ((MODE) == TIM_OCMode_PWM2) || \
|
|---|
| | | ((MODE) == TIM_ForcedAction_Active) || \
|
|---|
| | | ((MODE) == TIM_ForcedAction_InActive))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_One_Pulse_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OPMode_Single ((uint16_t)0x0008)
|
|---|
| | | #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
|---|
| | | ((MODE) == TIM_OPMode_Repetitive))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Channel |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_Channel_1 ((uint16_t)0x0000)
|
|---|
| | | #define TIM_Channel_2 ((uint16_t)0x0004)
|
|---|
| | | #define TIM_Channel_3 ((uint16_t)0x0008)
|
|---|
| | | #define TIM_Channel_4 ((uint16_t)0x000C)
|
|---|
| | | #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_2) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_3) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_4))
|
|---|
| | | #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_2))
|
|---|
| | | #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_2) || \
|
|---|
| | | ((CHANNEL) == TIM_Channel_3))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Clock_Division_CKD |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
|---|
| | | #define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
|---|
| | | #define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
|---|
| | | #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
|---|
| | | ((DIV) == TIM_CKD_DIV2) || \
|
|---|
| | | ((DIV) == TIM_CKD_DIV4))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Counter_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_CounterMode_Up ((uint16_t)0x0000)
|
|---|
| | | #define TIM_CounterMode_Down ((uint16_t)0x0010)
|
|---|
| | | #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
|---|
| | | #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
|---|
| | | #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
|---|
| | | #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
|---|
| | | ((MODE) == TIM_CounterMode_Down) || \
|
|---|
| | | ((MODE) == TIM_CounterMode_CenterAligned1) || \
|
|---|
| | | ((MODE) == TIM_CounterMode_CenterAligned2) || \
|
|---|
| | | ((MODE) == TIM_CounterMode_CenterAligned3))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCPolarity_High ((uint16_t)0x0000)
|
|---|
| | | #define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
|---|
| | | #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
|---|
| | | ((POLARITY) == TIM_OCPolarity_Low))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_N_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define TIM_OCNPolarity_High ((uint16_t)0x0000)
|
|---|
| | | #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
|
|---|
| | | #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
|
|---|
| | | ((POLARITY) == TIM_OCNPolarity_Low))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OutputState_Disable ((uint16_t)0x0000)
|
|---|
| | | #define TIM_OutputState_Enable ((uint16_t)0x0001)
|
|---|
| | | #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
|---|
| | | ((STATE) == TIM_OutputState_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_N_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OutputNState_Disable ((uint16_t)0x0000)
|
|---|
| | | #define TIM_OutputNState_Enable ((uint16_t)0x0004)
|
|---|
| | | #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
|
|---|
| | | ((STATE) == TIM_OutputNState_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Capture_Compare_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_CCx_Enable ((uint16_t)0x0001)
|
|---|
| | | #define TIM_CCx_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
|---|
| | | ((CCX) == TIM_CCx_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Capture_Compare_N_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_CCxN_Enable ((uint16_t)0x0004)
|
|---|
| | | #define TIM_CCxN_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
|
|---|
| | | ((CCXN) == TIM_CCxN_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup Break_Input_enable_disable |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_Break_Enable ((uint16_t)0x1000)
|
|---|
| | | #define TIM_Break_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
|
|---|
| | | ((STATE) == TIM_Break_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup Break_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
|
|---|
| | | #define TIM_BreakPolarity_High ((uint16_t)0x2000)
|
|---|
| | | #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
|
|---|
| | | ((POLARITY) == TIM_BreakPolarity_High))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_AOE_Bit_Set_Reset |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
|
|---|
| | | #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
|
|---|
| | | ((STATE) == TIM_AutomaticOutput_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup Lock_level |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
|
|---|
| | | #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
|
|---|
| | | #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
|
|---|
| | | #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
|
|---|
| | | #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
|
|---|
| | | ((LEVEL) == TIM_LOCKLevel_1) || \
|
|---|
| | | ((LEVEL) == TIM_LOCKLevel_2) || \
|
|---|
| | | ((LEVEL) == TIM_LOCKLevel_3))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OSSIState_Enable ((uint16_t)0x0400)
|
|---|
| | | #define TIM_OSSIState_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
|
|---|
| | | ((STATE) == TIM_OSSIState_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup OSSR_Off_State_Selection_for_Run_mode_state |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OSSRState_Enable ((uint16_t)0x0800)
|
|---|
| | | #define TIM_OSSRState_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
|
|---|
| | | ((STATE) == TIM_OSSRState_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_Idle_State |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCIdleState_Set ((uint16_t)0x0100)
|
|---|
| | | #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
|
|---|
| | | ((STATE) == TIM_OCIdleState_Reset))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_N_Idle_State |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
|
|---|
| | | #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
|
|---|
| | | ((STATE) == TIM_OCNIdleState_Reset))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Input_Capture_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
|---|
| | | #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
|---|
| | | #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
|---|
| | | #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
|---|
| | | ((POLARITY) == TIM_ICPolarity_Falling))
|
|---|
| | | #define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
|---|
| | | ((POLARITY) == TIM_ICPolarity_Falling)|| \
|
|---|
| | | ((POLARITY) == TIM_ICPolarity_BothEdge)) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Input_Capture_Selection |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
|---|
| | | connected to IC1, IC2, IC3 or IC4, respectively */
|
|---|
| | | #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
|---|
| | | connected to IC2, IC1, IC4 or IC3, respectively. */
|
|---|
| | | #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
|---|
| | | #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
|---|
| | | ((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
|---|
| | | ((SELECTION) == TIM_ICSelection_TRC))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Input_Capture_Prescaler |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
|---|
| | | #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
|---|
| | | #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
|---|
| | | #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
|---|
| | | #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
|
|---|
| | | ((PRESCALER) == TIM_ICPSC_DIV2) || \
|
|---|
| | | ((PRESCALER) == TIM_ICPSC_DIV4) || \
|
|---|
| | | ((PRESCALER) == TIM_ICPSC_DIV8))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_interrupt_sources |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_IT_Update ((uint16_t)0x0001)
|
|---|
| | | #define TIM_IT_CC1 ((uint16_t)0x0002)
|
|---|
| | | #define TIM_IT_CC2 ((uint16_t)0x0004)
|
|---|
| | | #define TIM_IT_CC3 ((uint16_t)0x0008)
|
|---|
| | | #define TIM_IT_CC4 ((uint16_t)0x0010)
|
|---|
| | | #define TIM_IT_COM ((uint16_t)0x0020)
|
|---|
| | | #define TIM_IT_Trigger ((uint16_t)0x0040)
|
|---|
| | | #define TIM_IT_Break ((uint16_t)0x0080)
|
|---|
| | | #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
|
|---|
| | |
|
|---|
| | | #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
|---|
| | | ((IT) == TIM_IT_CC1) || \
|
|---|
| | | ((IT) == TIM_IT_CC2) || \
|
|---|
| | | ((IT) == TIM_IT_CC3) || \
|
|---|
| | | ((IT) == TIM_IT_CC4) || \
|
|---|
| | | ((IT) == TIM_IT_COM) || \
|
|---|
| | | ((IT) == TIM_IT_Trigger) || \
|
|---|
| | | ((IT) == TIM_IT_Break))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_DMA_Base_address |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
|---|
| | | #define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
|---|
| | | #define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
|---|
| | | #define TIM_DMABase_DIER ((uint16_t)0x0003)
|
|---|
| | | #define TIM_DMABase_SR ((uint16_t)0x0004)
|
|---|
| | | #define TIM_DMABase_EGR ((uint16_t)0x0005)
|
|---|
| | | #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
|---|
| | | #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
|---|
| | | #define TIM_DMABase_CCER ((uint16_t)0x0008)
|
|---|
| | | #define TIM_DMABase_CNT ((uint16_t)0x0009)
|
|---|
| | | #define TIM_DMABase_PSC ((uint16_t)0x000A)
|
|---|
| | | #define TIM_DMABase_ARR ((uint16_t)0x000B)
|
|---|
| | | #define TIM_DMABase_RCR ((uint16_t)0x000C)
|
|---|
| | | #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
|---|
| | | #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
|---|
| | | #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
|---|
| | | #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
|---|
| | | #define TIM_DMABase_BDTR ((uint16_t)0x0011)
|
|---|
| | | #define TIM_DMABase_DCR ((uint16_t)0x0012)
|
|---|
| | | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CR2) || \
|
|---|
| | | ((BASE) == TIM_DMABase_SMCR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_DIER) || \
|
|---|
| | | ((BASE) == TIM_DMABase_SR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_EGR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCMR1) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCMR2) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCER) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CNT) || \
|
|---|
| | | ((BASE) == TIM_DMABase_PSC) || \
|
|---|
| | | ((BASE) == TIM_DMABase_ARR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_RCR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCR1) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCR2) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCR3) || \
|
|---|
| | | ((BASE) == TIM_DMABase_CCR4) || \
|
|---|
| | | ((BASE) == TIM_DMABase_BDTR) || \
|
|---|
| | | ((BASE) == TIM_DMABase_DCR))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_DMA_Burst_Length |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
|
|---|
| | | #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
|
|---|
| | | #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
|
|---|
| | | #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
|
|---|
| | | #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
|
|---|
| | | #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
|
|---|
| | | #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
|
|---|
| | | #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
|
|---|
| | | #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
|
|---|
| | | #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
|
|---|
| | | #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
|
|---|
| | | #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
|
|---|
| | | #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
|
|---|
| | | #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
|
|---|
| | | #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
|
|---|
| | | #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
|
|---|
| | | #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
|
|---|
| | | #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
|
|---|
| | | #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
|
|---|
| | | ((LENGTH) == TIM_DMABurstLength_18Transfers))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_DMA_sources |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_DMA_Update ((uint16_t)0x0100)
|
|---|
| | | #define TIM_DMA_CC1 ((uint16_t)0x0200)
|
|---|
| | | #define TIM_DMA_CC2 ((uint16_t)0x0400)
|
|---|
| | | #define TIM_DMA_CC3 ((uint16_t)0x0800)
|
|---|
| | | #define TIM_DMA_CC4 ((uint16_t)0x1000)
|
|---|
| | | #define TIM_DMA_COM ((uint16_t)0x2000)
|
|---|
| | | #define TIM_DMA_Trigger ((uint16_t)0x4000)
|
|---|
| | | #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_External_Trigger_Prescaler |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
|---|
| | | #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
|---|
| | | #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
|---|
| | | #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
|---|
| | | #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
|---|
| | | ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
|---|
| | | ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
|---|
| | | ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Internal_Trigger_Selection |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_TS_ITR0 ((uint16_t)0x0000)
|
|---|
| | | #define TIM_TS_ITR1 ((uint16_t)0x0010)
|
|---|
| | | #define TIM_TS_ITR2 ((uint16_t)0x0020)
|
|---|
| | | #define TIM_TS_ITR3 ((uint16_t)0x0030)
|
|---|
| | | #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
|---|
| | | #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
|---|
| | | #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
|---|
| | | #define TIM_TS_ETRF ((uint16_t)0x0070)
|
|---|
| | | #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR1) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR2) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR3) || \
|
|---|
| | | ((SELECTION) == TIM_TS_TI1F_ED) || \
|
|---|
| | | ((SELECTION) == TIM_TS_TI1FP1) || \
|
|---|
| | | ((SELECTION) == TIM_TS_TI2FP2) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ETRF))
|
|---|
| | | #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR1) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR2) || \
|
|---|
| | | ((SELECTION) == TIM_TS_ITR3))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_TIx_External_Clock_Source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
|---|
| | | #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
|---|
| | | #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
|---|
| | | #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
|
|---|
| | | ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
|
|---|
| | | ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_External_Trigger_Polarity |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
|---|
| | | #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
|---|
| | | ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Prescaler_Reload_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
|---|
| | | #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
|---|
| | | #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
|---|
| | | ((RELOAD) == TIM_PSCReloadMode_Immediate))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Forced_Action |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
|---|
| | | #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
|---|
| | | #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
|---|
| | | ((ACTION) == TIM_ForcedAction_InActive))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Encoder_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
|---|
| | | #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
|---|
| | | #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
|---|
| | | #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
|---|
| | | ((MODE) == TIM_EncoderMode_TI2) || \
|
|---|
| | | ((MODE) == TIM_EncoderMode_TI12))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Event_Source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_EventSource_Update ((uint16_t)0x0001)
|
|---|
| | | #define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
|---|
| | | #define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
|---|
| | | #define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
|---|
| | | #define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
|---|
| | | #define TIM_EventSource_COM ((uint16_t)0x0020)
|
|---|
| | | #define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
|---|
| | | #define TIM_EventSource_Break ((uint16_t)0x0080)
|
|---|
| | | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Update_Source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
|
|---|
| | | or the setting of UG bit, or an update generation
|
|---|
| | | through the slave mode controller. */
|
|---|
| | | #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
|---|
| | | #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
|---|
| | | ((SOURCE) == TIM_UpdateSource_Regular))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_Preload_State |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
|---|
| | | #define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
|---|
| | | ((STATE) == TIM_OCPreload_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_Fast_State |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCFast_Enable ((uint16_t)0x0004)
|
|---|
| | | #define TIM_OCFast_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
|---|
| | | ((STATE) == TIM_OCFast_Disable))
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Output_Compare_Clear_State |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_OCClear_Enable ((uint16_t)0x0080)
|
|---|
| | | #define TIM_OCClear_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
|---|
| | | ((STATE) == TIM_OCClear_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Trigger_Output_Source |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
|---|
| | | #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
|---|
| | | #define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
|---|
| | | #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
|---|
| | | #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
|---|
| | | #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
|---|
| | | #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
|---|
| | | #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
|---|
| | | #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_Enable) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_Update) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_OC1) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
|---|
| | | ((SOURCE) == TIM_TRGOSource_OC4Ref))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Slave_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
|---|
| | | #define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
|---|
| | | #define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
|---|
| | | #define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
|---|
| | | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
|---|
| | | ((MODE) == TIM_SlaveMode_Gated) || \
|
|---|
| | | ((MODE) == TIM_SlaveMode_Trigger) || \
|
|---|
| | | ((MODE) == TIM_SlaveMode_External1))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Master_Slave_Mode |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
|---|
| | | #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
|---|
| | | #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
|---|
| | | ((STATE) == TIM_MasterSlaveMode_Disable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_FLAG_Update ((uint16_t)0x0001)
|
|---|
| | | #define TIM_FLAG_CC1 ((uint16_t)0x0002)
|
|---|
| | | #define TIM_FLAG_CC2 ((uint16_t)0x0004)
|
|---|
| | | #define TIM_FLAG_CC3 ((uint16_t)0x0008)
|
|---|
| | | #define TIM_FLAG_CC4 ((uint16_t)0x0010)
|
|---|
| | | #define TIM_FLAG_COM ((uint16_t)0x0020)
|
|---|
| | | #define TIM_FLAG_Trigger ((uint16_t)0x0040)
|
|---|
| | | #define TIM_FLAG_Break ((uint16_t)0x0080)
|
|---|
| | | #define TIM_FLAG_CC1OF ((uint16_t)0x0200)
|
|---|
| | | #define TIM_FLAG_CC2OF ((uint16_t)0x0400)
|
|---|
| | | #define TIM_FLAG_CC3OF ((uint16_t)0x0800)
|
|---|
| | | #define TIM_FLAG_CC4OF ((uint16_t)0x1000)
|
|---|
| | | #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC1) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC2) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC3) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC4) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_COM) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_Trigger) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_Break) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC1OF) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC2OF) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC3OF) || \
|
|---|
| | | ((FLAG) == TIM_FLAG_CC4OF))
|
|---|
| | | |
|---|
| | | |
|---|
| | | #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Input_Capture_Filer_Value |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_External_Trigger_Filter |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Legacy |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
|
|---|
| | | #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
|
|---|
| | | #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
|
|---|
| | | #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
|
|---|
| | | #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
|
|---|
| | | #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
|
|---|
| | | #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
|
|---|
| | | #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
|
|---|
| | | #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
|
|---|
| | | #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
|
|---|
| | | #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
|
|---|
| | | #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
|
|---|
| | | #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
|
|---|
| | | #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
|
|---|
| | | #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
|
|---|
| | | #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
|
|---|
| | | #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
|
|---|
| | | #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup TIM_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void TIM_DeInit(TIM_TypeDef* TIMx);
|
|---|
| | | void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
|---|
| | | void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
|---|
| | | void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
|---|
| | | void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
|---|
| | | void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
|---|
| | | void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
|
|---|
| | | void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
|
|---|
| | | void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
|
|---|
| | | void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
|---|
| | | void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
|
|---|
| | | void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
|
|---|
| | | void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
|
|---|
| | | void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
|
|---|
| | | void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
|
|---|
| | | void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
|
|---|
| | | void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
|
|---|
| | | void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
|
|---|
| | | void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
|
|---|
| | | void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
|
|---|
| | | uint16_t TIM_ICPolarity, uint16_t ICFilter);
|
|---|
| | | void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
|
|---|
| | | uint16_t ExtTRGFilter);
|
|---|
| | | void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, |
|---|
| | | uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
|
|---|
| | | void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
|
|---|
| | | uint16_t ExtTRGFilter);
|
|---|
| | | void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
|
|---|
| | | void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
|
|---|
| | | void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
|
|---|
| | | void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
|
|---|
| | | uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
|---|
| | | void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
|---|
| | | void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
|---|
| | | void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
|---|
| | | void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
|---|
| | | void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
|---|
| | | void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
|---|
| | | void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
|---|
| | | void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
|---|
| | | void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
|---|
| | | void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
|---|
| | | void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
|---|
| | | void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
|---|
| | | void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
|---|
| | | void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
|---|
| | | void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
|---|
| | | void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
|---|
| | | void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
|---|
| | | void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
|
|---|
| | | void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
|---|
| | | void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
|
|---|
| | | void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
|---|
| | | void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
|
|---|
| | | void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
|---|
| | | void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
|
|---|
| | | void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
|
|---|
| | | void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
|
|---|
| | | void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
|
|---|
| | | void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
|
|---|
| | | void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
|
|---|
| | | void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
|
|---|
| | | void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
|
|---|
| | | void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
|
|---|
| | | void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter);
|
|---|
| | | void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload);
|
|---|
| | | void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1);
|
|---|
| | | void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2);
|
|---|
| | | void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3);
|
|---|
| | | void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4);
|
|---|
| | | void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
|---|
| | | void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
|---|
| | | void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
|---|
| | | void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
|---|
| | | void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
|
|---|
| | | uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx);
|
|---|
| | | uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx);
|
|---|
| | | uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx);
|
|---|
| | | uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx);
|
|---|
| | | uint16_t TIM_GetCounter(TIM_TypeDef* TIMx);
|
|---|
| | | uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
|
|---|
| | | FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
|
|---|
| | | void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
|
|---|
| | | ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
|
|---|
| | | void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__STM32F10x_TIM_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_usart.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the USART |
|---|
| | | * firmware library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_USART_H
|
|---|
| | | #define __STM32F10x_USART_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup USART
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief USART Init Structure definition |
|---|
| | | */ |
|---|
| | | |
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | | uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
|---|
| | | The baud rate is computed using the following formula:
|
|---|
| | | - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
|---|
| | | - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
|---|
| | |
|
|---|
| | | uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
|---|
| | | This parameter can be a value of @ref USART_Word_Length */
|
|---|
| | |
|
|---|
| | | uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
|---|
| | | This parameter can be a value of @ref USART_Stop_Bits */
|
|---|
| | |
|
|---|
| | | uint16_t USART_Parity; /*!< Specifies the parity mode.
|
|---|
| | | This parameter can be a value of @ref USART_Parity
|
|---|
| | | @note When parity is enabled, the computed parity is inserted
|
|---|
| | | at the MSB position of the transmitted data (9th bit when
|
|---|
| | | the word length is set to 9 data bits; 8th bit when the
|
|---|
| | | word length is set to 8 data bits). */
|
|---|
| | | |
|---|
| | | uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
|---|
| | | This parameter can be a value of @ref USART_Mode */
|
|---|
| | |
|
|---|
| | | uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
|---|
| | | or disabled.
|
|---|
| | | This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
|---|
| | | } USART_InitTypeDef;
|
|---|
| | |
|
|---|
| | | /** |
|---|
| | | * @brief USART Clock Init Structure definition |
|---|
| | | */ |
|---|
| | | |
|---|
| | | typedef struct
|
|---|
| | | {
|
|---|
| | |
|
|---|
| | | uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
|---|
| | | This parameter can be a value of @ref USART_Clock */
|
|---|
| | |
|
|---|
| | | uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
|---|
| | | This parameter can be a value of @ref USART_Clock_Polarity */
|
|---|
| | |
|
|---|
| | | uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
|---|
| | | This parameter can be a value of @ref USART_Clock_Phase */
|
|---|
| | |
|
|---|
| | | uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
|---|
| | | data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
|---|
| | | This parameter can be a value of @ref USART_Last_Bit */
|
|---|
| | | } USART_ClockInitTypeDef;
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
|---|
| | | ((PERIPH) == USART2) || \
|
|---|
| | | ((PERIPH) == USART3) || \
|
|---|
| | | ((PERIPH) == UART4) || \
|
|---|
| | | ((PERIPH) == UART5))
|
|---|
| | |
|
|---|
| | | #define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
|---|
| | | ((PERIPH) == USART2) || \
|
|---|
| | | ((PERIPH) == USART3))
|
|---|
| | |
|
|---|
| | | #define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
|---|
| | | ((PERIPH) == USART2) || \
|
|---|
| | | ((PERIPH) == USART3) || \
|
|---|
| | | ((PERIPH) == UART4))
|
|---|
| | | /** @defgroup USART_Word_Length |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define USART_WordLength_8b ((uint16_t)0x0000)
|
|---|
| | | #define USART_WordLength_9b ((uint16_t)0x1000)
|
|---|
| | | |
|---|
| | | #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
|---|
| | | ((LENGTH) == USART_WordLength_9b))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Stop_Bits |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define USART_StopBits_1 ((uint16_t)0x0000)
|
|---|
| | | #define USART_StopBits_0_5 ((uint16_t)0x1000)
|
|---|
| | | #define USART_StopBits_2 ((uint16_t)0x2000)
|
|---|
| | | #define USART_StopBits_1_5 ((uint16_t)0x3000)
|
|---|
| | | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
|---|
| | | ((STOPBITS) == USART_StopBits_0_5) || \
|
|---|
| | | ((STOPBITS) == USART_StopBits_2) || \
|
|---|
| | | ((STOPBITS) == USART_StopBits_1_5))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Parity |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define USART_Parity_No ((uint16_t)0x0000)
|
|---|
| | | #define USART_Parity_Even ((uint16_t)0x0400)
|
|---|
| | | #define USART_Parity_Odd ((uint16_t)0x0600) |
|---|
| | | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
|---|
| | | ((PARITY) == USART_Parity_Even) || \
|
|---|
| | | ((PARITY) == USART_Parity_Odd))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Mode |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define USART_Mode_Rx ((uint16_t)0x0004)
|
|---|
| | | #define USART_Mode_Tx ((uint16_t)0x0008)
|
|---|
| | | #define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Hardware_Flow_Control |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
|---|
| | | #define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
|---|
| | | #define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
|---|
| | | #define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
|---|
| | | #define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
|---|
| | | (((CONTROL) == USART_HardwareFlowControl_None) || \
|
|---|
| | | ((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
|---|
| | | ((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
|---|
| | | ((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Clock |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | #define USART_Clock_Disable ((uint16_t)0x0000)
|
|---|
| | | #define USART_Clock_Enable ((uint16_t)0x0800)
|
|---|
| | | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
|---|
| | | ((CLOCK) == USART_Clock_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Clock_Polarity |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define USART_CPOL_Low ((uint16_t)0x0000)
|
|---|
| | | #define USART_CPOL_High ((uint16_t)0x0400)
|
|---|
| | | #define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Clock_Phase
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_CPHA_1Edge ((uint16_t)0x0000)
|
|---|
| | | #define USART_CPHA_2Edge ((uint16_t)0x0200)
|
|---|
| | | #define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup USART_Last_Bit
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_LastBit_Disable ((uint16_t)0x0000)
|
|---|
| | | #define USART_LastBit_Enable ((uint16_t)0x0100)
|
|---|
| | | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
|---|
| | | ((LASTBIT) == USART_LastBit_Enable))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Interrupt_definition |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define USART_IT_PE ((uint16_t)0x0028)
|
|---|
| | | #define USART_IT_TXE ((uint16_t)0x0727)
|
|---|
| | | #define USART_IT_TC ((uint16_t)0x0626)
|
|---|
| | | #define USART_IT_RXNE ((uint16_t)0x0525)
|
|---|
| | | #define USART_IT_IDLE ((uint16_t)0x0424)
|
|---|
| | | #define USART_IT_LBD ((uint16_t)0x0846)
|
|---|
| | | #define USART_IT_CTS ((uint16_t)0x096A)
|
|---|
| | | #define USART_IT_ERR ((uint16_t)0x0060)
|
|---|
| | | #define USART_IT_ORE ((uint16_t)0x0360)
|
|---|
| | | #define USART_IT_NE ((uint16_t)0x0260)
|
|---|
| | | #define USART_IT_FE ((uint16_t)0x0160)
|
|---|
| | | #define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
|---|
| | | ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
|---|
| | | ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
|---|
| | | ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
|---|
| | | #define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
|---|
| | | ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
|---|
| | | ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
|---|
| | | ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
|---|
| | | ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
|---|
| | | #define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
|---|
| | | ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup USART_DMA_Requests |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_DMAReq_Tx ((uint16_t)0x0080)
|
|---|
| | | #define USART_DMAReq_Rx ((uint16_t)0x0040)
|
|---|
| | | #define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_WakeUp_methods
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
|---|
| | | #define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
|---|
| | | #define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
|---|
| | | ((WAKEUP) == USART_WakeUp_AddressMark))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup USART_LIN_Break_Detection_Length |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | #define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
|---|
| | | #define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
|---|
| | | #define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
|---|
| | | (((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
|---|
| | | ((LENGTH) == USART_LINBreakDetectLength_11b))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup USART_IrDA_Low_Power |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
|---|
| | | #define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
|---|
| | | #define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
|---|
| | | ((MODE) == USART_IrDAMode_Normal))
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Flags |
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define USART_FLAG_CTS ((uint16_t)0x0200)
|
|---|
| | | #define USART_FLAG_LBD ((uint16_t)0x0100)
|
|---|
| | | #define USART_FLAG_TXE ((uint16_t)0x0080)
|
|---|
| | | #define USART_FLAG_TC ((uint16_t)0x0040)
|
|---|
| | | #define USART_FLAG_RXNE ((uint16_t)0x0020)
|
|---|
| | | #define USART_FLAG_IDLE ((uint16_t)0x0010)
|
|---|
| | | #define USART_FLAG_ORE ((uint16_t)0x0008)
|
|---|
| | | #define USART_FLAG_NE ((uint16_t)0x0004)
|
|---|
| | | #define USART_FLAG_FE ((uint16_t)0x0002)
|
|---|
| | | #define USART_FLAG_PE ((uint16_t)0x0001)
|
|---|
| | | #define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
|---|
| | | ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
|---|
| | | ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
|---|
| | | ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
|---|
| | | ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
|---|
| | | |
|---|
| | | #define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
|---|
| | | #define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
|
|---|
| | | ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
|
|---|
| | | || ((USART_FLAG) != USART_FLAG_CTS)) |
|---|
| | | #define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
|---|
| | | #define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
|---|
| | | #define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup USART_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | void USART_DeInit(USART_TypeDef* USARTx);
|
|---|
| | | void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
|---|
| | | void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
|---|
| | | void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
|---|
| | | void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
|---|
| | | void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
|---|
| | | void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
|---|
| | | void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
|---|
| | | void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
|---|
| | | void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
|---|
| | | void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
|---|
| | | uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
|---|
| | | void USART_SendBreak(USART_TypeDef* USARTx);
|
|---|
| | | void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
|---|
| | | void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
|---|
| | | void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
|---|
| | | void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
|---|
| | | FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
|---|
| | | void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
|---|
| | | ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
|---|
| | | void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_USART_H */
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_wwdg.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file contains all the functions prototypes for the WWDG firmware
|
|---|
| | | * library.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Define to prevent recursive inclusion -------------------------------------*/
|
|---|
| | | #ifndef __STM32F10x_WWDG_H
|
|---|
| | | #define __STM32F10x_WWDG_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup WWDG
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup WWDG_Exported_Types
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup WWDG_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | /** @defgroup WWDG_Prescaler |
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
|
|---|
| | | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
|
|---|
| | | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
|
|---|
| | | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
|
|---|
| | | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
|
|---|
| | | ((PRESCALER) == WWDG_Prescaler_2) || \
|
|---|
| | | ((PRESCALER) == WWDG_Prescaler_4) || \
|
|---|
| | | ((PRESCALER) == WWDG_Prescaler_8))
|
|---|
| | | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
|
|---|
| | | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup WWDG_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup WWDG_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | void WWDG_DeInit(void);
|
|---|
| | | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
|
|---|
| | | void WWDG_SetWindowValue(uint8_t WindowValue);
|
|---|
| | | void WWDG_EnableIT(void);
|
|---|
| | | void WWDG_SetCounter(uint8_t Counter);
|
|---|
| | | void WWDG_Enable(uint8_t Counter);
|
|---|
| | | FlagStatus WWDG_GetFlagStatus(void);
|
|---|
| | | void WWDG_ClearFlag(void);
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /* __STM32F10x_WWDG_H */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file system_stm32f10x.h
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup CMSIS
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup stm32f10x_system
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @brief Define to prevent recursive inclusion
|
|---|
| | | */
|
|---|
| | | #ifndef __SYSTEM_STM32F10X_H
|
|---|
| | | #define __SYSTEM_STM32F10X_H
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | extern "C" {
|
|---|
| | | #endif |
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_System_Includes
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_System_Exported_types
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_System_Exported_Constants
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_System_Exported_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_System_Exported_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | extern void SystemInit(void);
|
|---|
| | | extern void SystemCoreClockUpdate(void);
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #ifdef __cplusplus
|
|---|
| | | }
|
|---|
| | | #endif
|
|---|
| | |
|
|---|
| | | #endif /*__SYSTEM_STM32F10X_H */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | | |
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file misc.c
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file provides all the miscellaneous firmware functions (add-on
|
|---|
| | | * to CMSIS functions).
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "misc.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC |
|---|
| | | * @brief MISC driver modules
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_TypesDefinitions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_Defines
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_Variables
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_FunctionPrototypes
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup MISC_Private_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the priority grouping: pre-emption priority and subpriority.
|
|---|
| | | * @param NVIC_PriorityGroup: specifies the priority grouping bits length. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
|
|---|
| | | * 4 bits for subpriority
|
|---|
| | | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
|
|---|
| | | * 3 bits for subpriority
|
|---|
| | | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
|
|---|
| | | * 2 bits for subpriority
|
|---|
| | | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
|
|---|
| | | * 1 bits for subpriority
|
|---|
| | | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
|
|---|
| | | * 0 bits for subpriority
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
|
|---|
| | | |
|---|
| | | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
|
|---|
| | | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Initializes the NVIC peripheral according to the specified
|
|---|
| | | * parameters in the NVIC_InitStruct.
|
|---|
| | | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
|
|---|
| | | * the configuration information for the specified NVIC peripheral.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
|
|---|
| | | {
|
|---|
| | | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
|
|---|
| | | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); |
|---|
| | | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
|
|---|
| | | |
|---|
| | | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Compute the Corresponding IRQ Priority --------------------------------*/ |
|---|
| | | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
|
|---|
| | | tmppre = (0x4 - tmppriority);
|
|---|
| | | tmpsub = tmpsub >> tmppriority;
|
|---|
| | |
|
|---|
| | | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
|
|---|
| | | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
|
|---|
| | | tmppriority = tmppriority << 0x04;
|
|---|
| | | |
|---|
| | | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
|
|---|
| | | |
|---|
| | | /* Enable the Selected IRQ Channels --------------------------------------*/
|
|---|
| | | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
|---|
| | | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the Selected IRQ Channels -------------------------------------*/
|
|---|
| | | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
|---|
| | | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Sets the vector table location and Offset.
|
|---|
| | | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg NVIC_VectTab_RAM
|
|---|
| | | * @arg NVIC_VectTab_FLASH
|
|---|
| | | * @param Offset: Vector Table base offset field. This value must be a multiple |
|---|
| | | * of 0x200.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
|
|---|
| | | { |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
|
|---|
| | | assert_param(IS_NVIC_OFFSET(Offset)); |
|---|
| | | |
|---|
| | | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Selects the condition for the system to enter low power mode.
|
|---|
| | | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg NVIC_LP_SEVONPEND
|
|---|
| | | * @arg NVIC_LP_SLEEPDEEP
|
|---|
| | | * @arg NVIC_LP_SLEEPONEXIT
|
|---|
| | | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_NVIC_LP(LowPowerMode));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
|---|
| | | |
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | SCB->SCR |= LowPowerMode;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the SysTick clock source.
|
|---|
| | | * @param SysTick_CLKSource: specifies the SysTick clock source.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
|
|---|
| | | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
|
|---|
| | | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
|
|---|
| | | {
|
|---|
| | | SysTick->CTRL |= SysTick_CLKSource_HCLK;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_adc.c
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file provides all the ADC firmware functions.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x_adc.h"
|
|---|
| | | #include "stm32f10x_rcc.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC |
|---|
| | | * @brief ADC driver modules
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_TypesDefinitions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_Defines
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* ADC DISCNUM mask */
|
|---|
| | | #define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF)
|
|---|
| | |
|
|---|
| | | /* ADC DISCEN mask */
|
|---|
| | | #define CR1_DISCEN_Set ((uint32_t)0x00000800)
|
|---|
| | | #define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF)
|
|---|
| | |
|
|---|
| | | /* ADC JAUTO mask */
|
|---|
| | | #define CR1_JAUTO_Set ((uint32_t)0x00000400)
|
|---|
| | | #define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF)
|
|---|
| | |
|
|---|
| | | /* ADC JDISCEN mask */
|
|---|
| | | #define CR1_JDISCEN_Set ((uint32_t)0x00001000)
|
|---|
| | | #define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF)
|
|---|
| | |
|
|---|
| | | /* ADC AWDCH mask */
|
|---|
| | | #define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0)
|
|---|
| | |
|
|---|
| | | /* ADC Analog watchdog enable mode mask */
|
|---|
| | | #define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF)
|
|---|
| | |
|
|---|
| | | /* CR1 register Mask */
|
|---|
| | | #define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF)
|
|---|
| | |
|
|---|
| | | /* ADC ADON mask */
|
|---|
| | | #define CR2_ADON_Set ((uint32_t)0x00000001)
|
|---|
| | | #define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE)
|
|---|
| | |
|
|---|
| | | /* ADC DMA mask */
|
|---|
| | | #define CR2_DMA_Set ((uint32_t)0x00000100)
|
|---|
| | | #define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF)
|
|---|
| | |
|
|---|
| | | /* ADC RSTCAL mask */
|
|---|
| | | #define CR2_RSTCAL_Set ((uint32_t)0x00000008)
|
|---|
| | |
|
|---|
| | | /* ADC CAL mask */
|
|---|
| | | #define CR2_CAL_Set ((uint32_t)0x00000004)
|
|---|
| | |
|
|---|
| | | /* ADC SWSTART mask */
|
|---|
| | | #define CR2_SWSTART_Set ((uint32_t)0x00400000)
|
|---|
| | |
|
|---|
| | | /* ADC EXTTRIG mask */
|
|---|
| | | #define CR2_EXTTRIG_Set ((uint32_t)0x00100000)
|
|---|
| | | #define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF)
|
|---|
| | |
|
|---|
| | | /* ADC Software start mask */
|
|---|
| | | #define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000)
|
|---|
| | | #define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF)
|
|---|
| | |
|
|---|
| | | /* ADC JEXTSEL mask */
|
|---|
| | | #define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF)
|
|---|
| | |
|
|---|
| | | /* ADC JEXTTRIG mask */
|
|---|
| | | #define CR2_JEXTTRIG_Set ((uint32_t)0x00008000)
|
|---|
| | | #define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF)
|
|---|
| | |
|
|---|
| | | /* ADC JSWSTART mask */
|
|---|
| | | #define CR2_JSWSTART_Set ((uint32_t)0x00200000)
|
|---|
| | |
|
|---|
| | | /* ADC injected software start mask */
|
|---|
| | | #define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000)
|
|---|
| | | #define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF)
|
|---|
| | |
|
|---|
| | | /* ADC TSPD mask */
|
|---|
| | | #define CR2_TSVREFE_Set ((uint32_t)0x00800000)
|
|---|
| | | #define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF)
|
|---|
| | |
|
|---|
| | | /* CR2 register Mask */
|
|---|
| | | #define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD)
|
|---|
| | |
|
|---|
| | | /* ADC SQx mask */
|
|---|
| | | #define SQR3_SQ_Set ((uint32_t)0x0000001F)
|
|---|
| | | #define SQR2_SQ_Set ((uint32_t)0x0000001F)
|
|---|
| | | #define SQR1_SQ_Set ((uint32_t)0x0000001F)
|
|---|
| | |
|
|---|
| | | /* SQR1 register Mask */
|
|---|
| | | #define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF)
|
|---|
| | |
|
|---|
| | | /* ADC JSQx mask */
|
|---|
| | | #define JSQR_JSQ_Set ((uint32_t)0x0000001F)
|
|---|
| | |
|
|---|
| | | /* ADC JL mask */
|
|---|
| | | #define JSQR_JL_Set ((uint32_t)0x00300000)
|
|---|
| | | #define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF)
|
|---|
| | |
|
|---|
| | | /* ADC SMPx mask */
|
|---|
| | | #define SMPR1_SMP_Set ((uint32_t)0x00000007)
|
|---|
| | | #define SMPR2_SMP_Set ((uint32_t)0x00000007)
|
|---|
| | |
|
|---|
| | | /* ADC JDRx registers offset */
|
|---|
| | | #define JDR_Offset ((uint8_t)0x28)
|
|---|
| | |
|
|---|
| | | /* ADC1 DR register base address */
|
|---|
| | | #define DR_ADDRESS ((uint32_t)0x4001244C)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_Variables
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_FunctionPrototypes
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup ADC_Private_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Deinitializes the ADCx peripheral registers to their default reset values.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_DeInit(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | |
|---|
| | | if (ADCx == ADC1)
|
|---|
| | | {
|
|---|
| | | /* Enable ADC1 reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
|
|---|
| | | /* Release ADC1 from reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
|
|---|
| | | }
|
|---|
| | | else if (ADCx == ADC2)
|
|---|
| | | {
|
|---|
| | | /* Enable ADC2 reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
|
|---|
| | | /* Release ADC2 from reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | if (ADCx == ADC3)
|
|---|
| | | {
|
|---|
| | | /* Enable ADC3 reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
|
|---|
| | | /* Release ADC3 from reset state */
|
|---|
| | | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Initializes the ADCx peripheral according to the specified parameters
|
|---|
| | | * in the ADC_InitStruct.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
|
|---|
| | | * the configuration information for the specified ADC peripheral.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg1 = 0;
|
|---|
| | | uint8_t tmpreg2 = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
|
|---|
| | | assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv)); |
|---|
| | | assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); |
|---|
| | | assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
|
|---|
| | |
|
|---|
| | | /*---------------------------- ADCx CR1 Configuration -----------------*/
|
|---|
| | | /* Get the ADCx CR1 value */
|
|---|
| | | tmpreg1 = ADCx->CR1;
|
|---|
| | | /* Clear DUALMOD and SCAN bits */
|
|---|
| | | tmpreg1 &= CR1_CLEAR_Mask;
|
|---|
| | | /* Configure ADCx: Dual mode and scan conversion mode */
|
|---|
| | | /* Set DUALMOD bits according to ADC_Mode value */
|
|---|
| | | /* Set SCAN bit according to ADC_ScanConvMode value */
|
|---|
| | | tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8));
|
|---|
| | | /* Write to ADCx CR1 */
|
|---|
| | | ADCx->CR1 = tmpreg1;
|
|---|
| | |
|
|---|
| | | /*---------------------------- ADCx CR2 Configuration -----------------*/
|
|---|
| | | /* Get the ADCx CR2 value */
|
|---|
| | | tmpreg1 = ADCx->CR2;
|
|---|
| | | /* Clear CONT, ALIGN and EXTSEL bits */
|
|---|
| | | tmpreg1 &= CR2_CLEAR_Mask;
|
|---|
| | | /* Configure ADCx: external trigger event and continuous conversion mode */
|
|---|
| | | /* Set ALIGN bit according to ADC_DataAlign value */
|
|---|
| | | /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
|
|---|
| | | /* Set CONT bit according to ADC_ContinuousConvMode value */
|
|---|
| | | tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
|
|---|
| | | ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
|
|---|
| | | /* Write to ADCx CR2 */
|
|---|
| | | ADCx->CR2 = tmpreg1;
|
|---|
| | |
|
|---|
| | | /*---------------------------- ADCx SQR1 Configuration -----------------*/
|
|---|
| | | /* Get the ADCx SQR1 value */
|
|---|
| | | tmpreg1 = ADCx->SQR1;
|
|---|
| | | /* Clear L bits */
|
|---|
| | | tmpreg1 &= SQR1_CLEAR_Mask;
|
|---|
| | | /* Configure ADCx: regular channel sequence length */
|
|---|
| | | /* Set L bits according to ADC_NbrOfChannel value */
|
|---|
| | | tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1);
|
|---|
| | | tmpreg1 |= (uint32_t)tmpreg2 << 20;
|
|---|
| | | /* Write to ADCx SQR1 */
|
|---|
| | | ADCx->SQR1 = tmpreg1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Fills each ADC_InitStruct member with its default value.
|
|---|
| | | * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
|
|---|
| | | {
|
|---|
| | | /* Reset ADC init structure parameters values */
|
|---|
| | | /* Initialize the ADC_Mode member */
|
|---|
| | | ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
|
|---|
| | | /* initialize the ADC_ScanConvMode member */
|
|---|
| | | ADC_InitStruct->ADC_ScanConvMode = DISABLE;
|
|---|
| | | /* Initialize the ADC_ContinuousConvMode member */
|
|---|
| | | ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
|
|---|
| | | /* Initialize the ADC_ExternalTrigConv member */
|
|---|
| | | ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
|
|---|
| | | /* Initialize the ADC_DataAlign member */
|
|---|
| | | ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
|
|---|
| | | /* Initialize the ADC_NbrOfChannel member */
|
|---|
| | | ADC_InitStruct->ADC_NbrOfChannel = 1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the specified ADC peripheral.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the ADCx peripheral.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Set the ADON bit to wake up the ADC from power down mode */
|
|---|
| | | ADCx->CR2 |= CR2_ADON_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC peripheral */
|
|---|
| | | ADCx->CR2 &= CR2_ADON_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the specified ADC DMA request.
|
|---|
| | | * @param ADCx: where x can be 1 or 3 to select the ADC peripheral.
|
|---|
| | | * Note: ADC2 hasn't a DMA capability.
|
|---|
| | | * @param NewState: new state of the selected ADC DMA transfer.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_DMA_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC DMA request */
|
|---|
| | | ADCx->CR2 |= CR2_DMA_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC DMA request */
|
|---|
| | | ADCx->CR2 &= CR2_DMA_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the specified ADC interrupts.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. |
|---|
| | | * This parameter can be any combination of the following values:
|
|---|
| | | * @arg ADC_IT_EOC: End of conversion interrupt mask
|
|---|
| | | * @arg ADC_IT_AWD: Analog watchdog interrupt mask
|
|---|
| | | * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
|
|---|
| | | * @param NewState: new state of the specified ADC interrupts.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | uint8_t itmask = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | assert_param(IS_ADC_IT(ADC_IT));
|
|---|
| | | /* Get the ADC IT index */
|
|---|
| | | itmask = (uint8_t)ADC_IT;
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC interrupts */
|
|---|
| | | ADCx->CR1 |= itmask;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC interrupts */
|
|---|
| | | ADCx->CR1 &= (~(uint32_t)itmask);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Resets the selected ADC calibration registers.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ResetCalibration(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Resets the selected ADC calibration registers */ |
|---|
| | | ADCx->CR2 |= CR2_RSTCAL_Set;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Gets the selected ADC reset calibration registers status.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval The new state of ADC reset calibration registers (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Check the status of RSTCAL bit */
|
|---|
| | | if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* RSTCAL bit is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* RSTCAL bit is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the RSTCAL bit status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Starts the selected ADC calibration process.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_StartCalibration(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Enable the selected ADC calibration process */ |
|---|
| | | ADCx->CR2 |= CR2_CAL_Set;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Gets the selected ADC calibration status.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval The new state of ADC calibration (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Check the status of CAL bit */
|
|---|
| | | if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* CAL bit is set: calibration on going */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* CAL bit is reset: end of calibration */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the CAL bit status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the selected ADC software start conversion .
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC software start conversion.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC conversion on external event and start the selected
|
|---|
| | | ADC conversion */
|
|---|
| | | ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC conversion on external event and stop the selected
|
|---|
| | | ADC conversion */
|
|---|
| | | ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Gets the selected ADC Software start conversion Status.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval The new state of ADC software start conversion (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Check the status of SWSTART bit */
|
|---|
| | | if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* SWSTART bit is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* SWSTART bit is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the SWSTART bit status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the discontinuous mode for the selected ADC regular
|
|---|
| | | * group channel.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param Number: specifies the discontinuous mode regular channel
|
|---|
| | | * count value. This number must be between 1 and 8.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg1 = 0;
|
|---|
| | | uint32_t tmpreg2 = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->CR1;
|
|---|
| | | /* Clear the old discontinuous mode channel count */
|
|---|
| | | tmpreg1 &= CR1_DISCNUM_Reset;
|
|---|
| | | /* Set the discontinuous mode channel count */
|
|---|
| | | tmpreg2 = Number - 1;
|
|---|
| | | tmpreg1 |= tmpreg2 << 13;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->CR1 = tmpreg1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the discontinuous mode on regular group
|
|---|
| | | * channel for the specified ADC
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC discontinuous mode
|
|---|
| | | * on regular group channel.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC regular discontinuous mode */
|
|---|
| | | ADCx->CR1 |= CR1_DISCEN_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC regular discontinuous mode */
|
|---|
| | | ADCx->CR1 &= CR1_DISCEN_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures for the selected ADC regular channel its corresponding
|
|---|
| | | * rank in the sequencer and its sample time.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_Channel: the ADC channel to configure. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_Channel_0: ADC Channel0 selected
|
|---|
| | | * @arg ADC_Channel_1: ADC Channel1 selected
|
|---|
| | | * @arg ADC_Channel_2: ADC Channel2 selected
|
|---|
| | | * @arg ADC_Channel_3: ADC Channel3 selected
|
|---|
| | | * @arg ADC_Channel_4: ADC Channel4 selected
|
|---|
| | | * @arg ADC_Channel_5: ADC Channel5 selected
|
|---|
| | | * @arg ADC_Channel_6: ADC Channel6 selected
|
|---|
| | | * @arg ADC_Channel_7: ADC Channel7 selected
|
|---|
| | | * @arg ADC_Channel_8: ADC Channel8 selected
|
|---|
| | | * @arg ADC_Channel_9: ADC Channel9 selected
|
|---|
| | | * @arg ADC_Channel_10: ADC Channel10 selected
|
|---|
| | | * @arg ADC_Channel_11: ADC Channel11 selected
|
|---|
| | | * @arg ADC_Channel_12: ADC Channel12 selected
|
|---|
| | | * @arg ADC_Channel_13: ADC Channel13 selected
|
|---|
| | | * @arg ADC_Channel_14: ADC Channel14 selected
|
|---|
| | | * @arg ADC_Channel_15: ADC Channel15 selected
|
|---|
| | | * @arg ADC_Channel_16: ADC Channel16 selected
|
|---|
| | | * @arg ADC_Channel_17: ADC Channel17 selected
|
|---|
| | | * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16.
|
|---|
| | | * @param ADC_SampleTime: The sample time value to be set for the selected channel. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles |
|---|
| | | * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles |
|---|
| | | * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles |
|---|
| | | * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles |
|---|
| | | * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles |
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg1 = 0, tmpreg2 = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_CHANNEL(ADC_Channel));
|
|---|
| | | assert_param(IS_ADC_REGULAR_RANK(Rank));
|
|---|
| | | assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
|
|---|
| | | /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
|
|---|
| | | if (ADC_Channel > ADC_Channel_9)
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SMPR1;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
|
|---|
| | | /* Clear the old channel sample time */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
|
|---|
| | | /* Set the new channel sample time */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SMPR1 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | else /* ADC_Channel include in ADC_Channel_[0..9] */
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SMPR2;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
|
|---|
| | | /* Clear the old channel sample time */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
|
|---|
| | | /* Set the new channel sample time */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SMPR2 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | /* For Rank 1 to 6 */
|
|---|
| | | if (Rank < 7)
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SQR3;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1));
|
|---|
| | | /* Clear the old SQx bits for the selected rank */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1));
|
|---|
| | | /* Set the SQx bits for the selected rank */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SQR3 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | /* For Rank 7 to 12 */
|
|---|
| | | else if (Rank < 13)
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SQR2;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7));
|
|---|
| | | /* Clear the old SQx bits for the selected rank */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7));
|
|---|
| | | /* Set the SQx bits for the selected rank */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SQR2 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | /* For Rank 13 to 16 */
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SQR1;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
|
|---|
| | | /* Clear the old SQx bits for the selected rank */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13));
|
|---|
| | | /* Set the SQx bits for the selected rank */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SQR1 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the ADCx conversion through external trigger.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC external trigger start of conversion.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC conversion on external event */
|
|---|
| | | ADCx->CR2 |= CR2_EXTTRIG_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC conversion on external event */
|
|---|
| | | ADCx->CR2 &= CR2_EXTTRIG_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the last ADCx conversion result data for regular channel.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval The Data conversion value.
|
|---|
| | | */
|
|---|
| | | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Return the selected ADC conversion value */
|
|---|
| | | return (uint16_t) ADCx->DR;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode.
|
|---|
| | | * @retval The Data conversion value.
|
|---|
| | | */
|
|---|
| | | uint32_t ADC_GetDualModeConversionValue(void)
|
|---|
| | | {
|
|---|
| | | /* Return the dual mode conversion value */
|
|---|
| | | return (*(__IO uint32_t *) DR_ADDRESS);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the selected ADC automatic injected group
|
|---|
| | | * conversion after regular one.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC auto injected conversion
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC automatic injected group conversion */
|
|---|
| | | ADCx->CR1 |= CR1_JAUTO_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC automatic injected group conversion */
|
|---|
| | | ADCx->CR1 &= CR1_JAUTO_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the discontinuous mode for injected group
|
|---|
| | | * channel for the specified ADC
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC discontinuous mode
|
|---|
| | | * on injected group channel.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC injected discontinuous mode */
|
|---|
| | | ADCx->CR1 |= CR1_JDISCEN_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC injected discontinuous mode */
|
|---|
| | | ADCx->CR1 &= CR1_JDISCEN_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the ADCx external trigger for injected channels conversion.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8
|
|---|
| | | * capture compare4 event selected (for ADC1 and ADC2) |
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only) |
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only)
|
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only) |
|---|
| | | * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only) |
|---|
| | | * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not
|
|---|
| | | * by external trigger (for ADC1, ADC2 and ADC3)
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg = ADCx->CR2;
|
|---|
| | | /* Clear the old external event selection for injected group */
|
|---|
| | | tmpreg &= CR2_JEXTSEL_Reset;
|
|---|
| | | /* Set the external event selection for injected group */
|
|---|
| | | tmpreg |= ADC_ExternalTrigInjecConv;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->CR2 = tmpreg;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the ADCx injected channels conversion through
|
|---|
| | | * external trigger
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC external trigger start of
|
|---|
| | | * injected conversion.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC external event selection for injected group */
|
|---|
| | | ADCx->CR2 |= CR2_JEXTTRIG_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC external event selection for injected group */
|
|---|
| | | ADCx->CR2 &= CR2_JEXTTRIG_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the selected ADC start of the injected |
|---|
| | | * channels conversion.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param NewState: new state of the selected ADC software start injected conversion.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected ADC conversion for injected group on external event and start the selected
|
|---|
| | | ADC injected conversion */
|
|---|
| | | ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected ADC conversion on external event for injected group and stop the selected
|
|---|
| | | ADC injected conversion */
|
|---|
| | | ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Gets the selected ADC Software start injected conversion Status.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @retval The new state of ADC software start injected conversion (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | /* Check the status of JSWSTART bit */
|
|---|
| | | if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* JSWSTART bit is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* JSWSTART bit is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the JSWSTART bit status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures for the selected ADC injected channel its corresponding
|
|---|
| | | * rank in the sequencer and its sample time.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_Channel: the ADC channel to configure. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_Channel_0: ADC Channel0 selected
|
|---|
| | | * @arg ADC_Channel_1: ADC Channel1 selected
|
|---|
| | | * @arg ADC_Channel_2: ADC Channel2 selected
|
|---|
| | | * @arg ADC_Channel_3: ADC Channel3 selected
|
|---|
| | | * @arg ADC_Channel_4: ADC Channel4 selected
|
|---|
| | | * @arg ADC_Channel_5: ADC Channel5 selected
|
|---|
| | | * @arg ADC_Channel_6: ADC Channel6 selected
|
|---|
| | | * @arg ADC_Channel_7: ADC Channel7 selected
|
|---|
| | | * @arg ADC_Channel_8: ADC Channel8 selected
|
|---|
| | | * @arg ADC_Channel_9: ADC Channel9 selected
|
|---|
| | | * @arg ADC_Channel_10: ADC Channel10 selected
|
|---|
| | | * @arg ADC_Channel_11: ADC Channel11 selected
|
|---|
| | | * @arg ADC_Channel_12: ADC Channel12 selected
|
|---|
| | | * @arg ADC_Channel_13: ADC Channel13 selected
|
|---|
| | | * @arg ADC_Channel_14: ADC Channel14 selected
|
|---|
| | | * @arg ADC_Channel_15: ADC Channel15 selected
|
|---|
| | | * @arg ADC_Channel_16: ADC Channel16 selected
|
|---|
| | | * @arg ADC_Channel_17: ADC Channel17 selected
|
|---|
| | | * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4.
|
|---|
| | | * @param ADC_SampleTime: The sample time value to be set for the selected channel. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
|
|---|
| | | * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles |
|---|
| | | * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles |
|---|
| | | * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles |
|---|
| | | * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles |
|---|
| | | * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles |
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_CHANNEL(ADC_Channel));
|
|---|
| | | assert_param(IS_ADC_INJECTED_RANK(Rank));
|
|---|
| | | assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
|
|---|
| | | /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
|
|---|
| | | if (ADC_Channel > ADC_Channel_9)
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SMPR1;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10));
|
|---|
| | | /* Clear the old channel sample time */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10));
|
|---|
| | | /* Set the new channel sample time */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SMPR1 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | else /* ADC_Channel include in ADC_Channel_[0..9] */
|
|---|
| | | {
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->SMPR2;
|
|---|
| | | /* Calculate the mask to clear */
|
|---|
| | | tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
|
|---|
| | | /* Clear the old channel sample time */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
|
|---|
| | | /* Set the new channel sample time */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->SMPR2 = tmpreg1;
|
|---|
| | | }
|
|---|
| | | /* Rank configuration */
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->JSQR;
|
|---|
| | | /* Get JL value: Number = JL+1 */
|
|---|
| | | tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20;
|
|---|
| | | /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
|
|---|
| | | tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
|
|---|
| | | /* Clear the old JSQx bits for the selected rank */
|
|---|
| | | tmpreg1 &= ~tmpreg2;
|
|---|
| | | /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
|
|---|
| | | tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
|
|---|
| | | /* Set the JSQx bits for the selected rank */
|
|---|
| | | tmpreg1 |= tmpreg2;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->JSQR = tmpreg1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the sequencer length for injected channels
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param Length: The sequencer length. |
|---|
| | | * This parameter must be a number between 1 to 4.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg1 = 0;
|
|---|
| | | uint32_t tmpreg2 = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_INJECTED_LENGTH(Length));
|
|---|
| | | |
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg1 = ADCx->JSQR;
|
|---|
| | | /* Clear the old injected sequnence lenght JL bits */
|
|---|
| | | tmpreg1 &= JSQR_JL_Reset;
|
|---|
| | | /* Set the injected sequnence lenght JL bits */
|
|---|
| | | tmpreg2 = Length - 1; |
|---|
| | | tmpreg1 |= tmpreg2 << 20;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->JSQR = tmpreg1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Set the injected channels conversion value offset
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_InjectedChannel: the ADC injected channel to set its offset. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_InjectedChannel_1: Injected Channel1 selected
|
|---|
| | | * @arg ADC_InjectedChannel_2: Injected Channel2 selected
|
|---|
| | | * @arg ADC_InjectedChannel_3: Injected Channel3 selected
|
|---|
| | | * @arg ADC_InjectedChannel_4: Injected Channel4 selected
|
|---|
| | | * @param Offset: the offset value for the selected ADC injected channel
|
|---|
| | | * This parameter must be a 12bit value.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
|
|---|
| | | {
|
|---|
| | | __IO uint32_t tmp = 0;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
|
|---|
| | | assert_param(IS_ADC_OFFSET(Offset)); |
|---|
| | | |
|---|
| | | tmp = (uint32_t)ADCx;
|
|---|
| | | tmp += ADC_InjectedChannel;
|
|---|
| | | |
|---|
| | | /* Set the selected injected channel data offset */
|
|---|
| | | *(__IO uint32_t *) tmp = (uint32_t)Offset;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the ADC injected channel conversion result
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_InjectedChannel: the converted ADC injected channel.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_InjectedChannel_1: Injected Channel1 selected
|
|---|
| | | * @arg ADC_InjectedChannel_2: Injected Channel2 selected
|
|---|
| | | * @arg ADC_InjectedChannel_3: Injected Channel3 selected
|
|---|
| | | * @arg ADC_InjectedChannel_4: Injected Channel4 selected
|
|---|
| | | * @retval The Data conversion value.
|
|---|
| | | */
|
|---|
| | | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel)
|
|---|
| | | {
|
|---|
| | | __IO uint32_t tmp = 0;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
|
|---|
| | |
|
|---|
| | | tmp = (uint32_t)ADCx;
|
|---|
| | | tmp += ADC_InjectedChannel + JDR_Offset;
|
|---|
| | | |
|---|
| | | /* Returns the selected injected channel conversion data value */
|
|---|
| | | return (uint16_t) (*(__IO uint32_t*) tmp); |
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the analog watchdog on single/all regular
|
|---|
| | | * or injected channels
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
|
|---|
| | | * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
|
|---|
| | | * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
|
|---|
| | | * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel
|
|---|
| | | * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel
|
|---|
| | | * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
|
|---|
| | | * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
|
|---|
| | | * @retval None |
|---|
| | | */
|
|---|
| | | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg = ADCx->CR1;
|
|---|
| | | /* Clear AWDEN, AWDENJ and AWDSGL bits */
|
|---|
| | | tmpreg &= CR1_AWDMode_Reset;
|
|---|
| | | /* Set the analog watchdog enable mode */
|
|---|
| | | tmpreg |= ADC_AnalogWatchdog;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->CR1 = tmpreg;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the high and low thresholds of the analog watchdog.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param HighThreshold: the ADC analog watchdog High threshold value.
|
|---|
| | | * This parameter must be a 12bit value.
|
|---|
| | | * @param LowThreshold: the ADC analog watchdog Low threshold value.
|
|---|
| | | * This parameter must be a 12bit value.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
|
|---|
| | | uint16_t LowThreshold)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_THRESHOLD(HighThreshold));
|
|---|
| | | assert_param(IS_ADC_THRESHOLD(LowThreshold));
|
|---|
| | | /* Set the ADCx high threshold */
|
|---|
| | | ADCx->HTR = HighThreshold;
|
|---|
| | | /* Set the ADCx low threshold */
|
|---|
| | | ADCx->LTR = LowThreshold;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the analog watchdog guarded single channel
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_Channel: the ADC channel to configure for the analog watchdog. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_Channel_0: ADC Channel0 selected
|
|---|
| | | * @arg ADC_Channel_1: ADC Channel1 selected
|
|---|
| | | * @arg ADC_Channel_2: ADC Channel2 selected
|
|---|
| | | * @arg ADC_Channel_3: ADC Channel3 selected
|
|---|
| | | * @arg ADC_Channel_4: ADC Channel4 selected
|
|---|
| | | * @arg ADC_Channel_5: ADC Channel5 selected
|
|---|
| | | * @arg ADC_Channel_6: ADC Channel6 selected
|
|---|
| | | * @arg ADC_Channel_7: ADC Channel7 selected
|
|---|
| | | * @arg ADC_Channel_8: ADC Channel8 selected
|
|---|
| | | * @arg ADC_Channel_9: ADC Channel9 selected
|
|---|
| | | * @arg ADC_Channel_10: ADC Channel10 selected
|
|---|
| | | * @arg ADC_Channel_11: ADC Channel11 selected
|
|---|
| | | * @arg ADC_Channel_12: ADC Channel12 selected
|
|---|
| | | * @arg ADC_Channel_13: ADC Channel13 selected
|
|---|
| | | * @arg ADC_Channel_14: ADC Channel14 selected
|
|---|
| | | * @arg ADC_Channel_15: ADC Channel15 selected
|
|---|
| | | * @arg ADC_Channel_16: ADC Channel16 selected
|
|---|
| | | * @arg ADC_Channel_17: ADC Channel17 selected
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
|
|---|
| | | {
|
|---|
| | | uint32_t tmpreg = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_CHANNEL(ADC_Channel));
|
|---|
| | | /* Get the old register value */
|
|---|
| | | tmpreg = ADCx->CR1;
|
|---|
| | | /* Clear the Analog watchdog channel select bits */
|
|---|
| | | tmpreg &= CR1_AWDCH_Reset;
|
|---|
| | | /* Set the Analog watchdog channel */
|
|---|
| | | tmpreg |= ADC_Channel;
|
|---|
| | | /* Store the new register value */
|
|---|
| | | ADCx->CR1 = tmpreg;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the temperature sensor and Vrefint channel.
|
|---|
| | | * @param NewState: new state of the temperature sensor.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_TempSensorVrefintCmd(FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the temperature sensor and Vrefint channel*/
|
|---|
| | | ADC1->CR2 |= CR2_TSVREFE_Set;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the temperature sensor and Vrefint channel*/
|
|---|
| | | ADC1->CR2 &= CR2_TSVREFE_Reset;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the specified ADC flag is set or not.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_FLAG: specifies the flag to check. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_FLAG_AWD: Analog watchdog flag
|
|---|
| | | * @arg ADC_FLAG_EOC: End of conversion flag
|
|---|
| | | * @arg ADC_FLAG_JEOC: End of injected group conversion flag
|
|---|
| | | * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
|
|---|
| | | * @arg ADC_FLAG_STRT: Start of regular group conversion flag
|
|---|
| | | * @retval The new state of ADC_FLAG (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
|
|---|
| | | /* Check the status of the specified ADC flag */
|
|---|
| | | if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* ADC_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* ADC_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the ADC_FLAG status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears the ADCx's pending flags.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_FLAG: specifies the flag to clear. |
|---|
| | | * This parameter can be any combination of the following values:
|
|---|
| | | * @arg ADC_FLAG_AWD: Analog watchdog flag
|
|---|
| | | * @arg ADC_FLAG_EOC: End of conversion flag
|
|---|
| | | * @arg ADC_FLAG_JEOC: End of injected group conversion flag
|
|---|
| | | * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
|
|---|
| | | * @arg ADC_FLAG_STRT: Start of regular group conversion flag
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
|
|---|
| | | /* Clear the selected ADC flags */
|
|---|
| | | ADCx->SR = ~(uint32_t)ADC_FLAG;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the specified ADC interrupt has occurred or not.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_IT: specifies the ADC interrupt source to check. |
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg ADC_IT_EOC: End of conversion interrupt mask
|
|---|
| | | * @arg ADC_IT_AWD: Analog watchdog interrupt mask
|
|---|
| | | * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
|
|---|
| | | * @retval The new state of ADC_IT (SET or RESET).
|
|---|
| | | */
|
|---|
| | | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT)
|
|---|
| | | {
|
|---|
| | | ITStatus bitstatus = RESET;
|
|---|
| | | uint32_t itmask = 0, enablestatus = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_GET_IT(ADC_IT));
|
|---|
| | | /* Get the ADC IT index */
|
|---|
| | | itmask = ADC_IT >> 8;
|
|---|
| | | /* Get the ADC_IT enable bit status */
|
|---|
| | | enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ;
|
|---|
| | | /* Check the status of the specified ADC interrupt */
|
|---|
| | | if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus)
|
|---|
| | | {
|
|---|
| | | /* ADC_IT is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* ADC_IT is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | /* Return the ADC_IT status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears the ADCx's interrupt pending bits.
|
|---|
| | | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
|
|---|
| | | * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
|
|---|
| | | * This parameter can be any combination of the following values:
|
|---|
| | | * @arg ADC_IT_EOC: End of conversion interrupt mask
|
|---|
| | | * @arg ADC_IT_AWD: Analog watchdog interrupt mask
|
|---|
| | | * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT)
|
|---|
| | | {
|
|---|
| | | uint8_t itmask = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_ADC_ALL_PERIPH(ADCx));
|
|---|
| | | assert_param(IS_ADC_IT(ADC_IT));
|
|---|
| | | /* Get the ADC IT index */
|
|---|
| | | itmask = (uint8_t)(ADC_IT >> 8);
|
|---|
| | | /* Clear the selected ADC interrupt pending bits */
|
|---|
| | | ADCx->SR = ~(uint32_t)itmask;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_bkp.c
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file provides all the BKP firmware functions.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x_bkp.h"
|
|---|
| | | #include "stm32f10x_rcc.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP |
|---|
| | | * @brief BKP driver modules
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_TypesDefinitions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_Defines
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* ------------ BKP registers bit address in the alias region --------------- */
|
|---|
| | | #define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
|
|---|
| | |
|
|---|
| | | /* --- CR Register ----*/
|
|---|
| | |
|
|---|
| | | /* Alias word address of TPAL bit */
|
|---|
| | | #define CR_OFFSET (BKP_OFFSET + 0x30)
|
|---|
| | | #define TPAL_BitNumber 0x01
|
|---|
| | | #define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4))
|
|---|
| | |
|
|---|
| | | /* Alias word address of TPE bit */
|
|---|
| | | #define TPE_BitNumber 0x00
|
|---|
| | | #define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4))
|
|---|
| | |
|
|---|
| | | /* --- CSR Register ---*/
|
|---|
| | |
|
|---|
| | | /* Alias word address of TPIE bit */
|
|---|
| | | #define CSR_OFFSET (BKP_OFFSET + 0x34)
|
|---|
| | | #define TPIE_BitNumber 0x02
|
|---|
| | | #define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4))
|
|---|
| | |
|
|---|
| | | /* Alias word address of TIF bit */
|
|---|
| | | #define TIF_BitNumber 0x09
|
|---|
| | | #define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4))
|
|---|
| | |
|
|---|
| | | /* Alias word address of TEF bit */
|
|---|
| | | #define TEF_BitNumber 0x08
|
|---|
| | | #define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4))
|
|---|
| | |
|
|---|
| | | /* ---------------------- BKP registers bit mask ------------------------ */
|
|---|
| | |
|
|---|
| | | /* RTCCR register bit mask */
|
|---|
| | | #define RTCCR_CAL_MASK ((uint16_t)0xFF80)
|
|---|
| | | #define RTCCR_MASK ((uint16_t)0xFC7F)
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_Variables
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_FunctionPrototypes
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup BKP_Private_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Deinitializes the BKP peripheral registers to their default reset values.
|
|---|
| | | * @param None
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_DeInit(void)
|
|---|
| | | {
|
|---|
| | | RCC_BackupResetCmd(ENABLE);
|
|---|
| | | RCC_BackupResetCmd(DISABLE);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Configures the Tamper Pin active level.
|
|---|
| | | * @param BKP_TamperPinLevel: specifies the Tamper Pin active level.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg BKP_TamperPinLevel_High: Tamper pin active on high level
|
|---|
| | | * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel));
|
|---|
| | | *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the Tamper Pin activation.
|
|---|
| | | * @param NewState: new state of the Tamper Pin activation.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_TamperPinCmd(FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the Tamper Pin Interrupt.
|
|---|
| | | * @param NewState: new state of the Tamper Pin Interrupt.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_ITConfig(FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Select the RTC output source to output on the Tamper pin.
|
|---|
| | | * @param BKP_RTCOutputSource: specifies the RTC output source.
|
|---|
| | | * This parameter can be one of the following values:
|
|---|
| | | * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin.
|
|---|
| | | * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency
|
|---|
| | | * divided by 64 on the Tamper pin.
|
|---|
| | | * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on
|
|---|
| | | * the Tamper pin.
|
|---|
| | | * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on
|
|---|
| | | * the Tamper pin. |
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource)
|
|---|
| | | {
|
|---|
| | | uint16_t tmpreg = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource));
|
|---|
| | | tmpreg = BKP->RTCCR;
|
|---|
| | | /* Clear CCO, ASOE and ASOS bits */
|
|---|
| | | tmpreg &= RTCCR_MASK;
|
|---|
| | | |
|---|
| | | /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */
|
|---|
| | | tmpreg |= BKP_RTCOutputSource;
|
|---|
| | | /* Store the new value */
|
|---|
| | | BKP->RTCCR = tmpreg;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Sets RTC Clock Calibration value.
|
|---|
| | | * @param CalibrationValue: specifies the RTC Clock Calibration value.
|
|---|
| | | * This parameter must be a number between 0 and 0x7F.
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue)
|
|---|
| | | {
|
|---|
| | | uint16_t tmpreg = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue));
|
|---|
| | | tmpreg = BKP->RTCCR;
|
|---|
| | | /* Clear CAL[6:0] bits */
|
|---|
| | | tmpreg &= RTCCR_CAL_MASK;
|
|---|
| | | /* Set CAL[6:0] bits according to CalibrationValue value */
|
|---|
| | | tmpreg |= CalibrationValue;
|
|---|
| | | /* Store the new value */
|
|---|
| | | BKP->RTCCR = tmpreg;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Writes user data to the specified Data Backup Register.
|
|---|
| | | * @param BKP_DR: specifies the Data Backup Register.
|
|---|
| | | * This parameter can be BKP_DRx where x:[1, 42]
|
|---|
| | | * @param Data: data to write
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data)
|
|---|
| | | {
|
|---|
| | | __IO uint32_t tmp = 0;
|
|---|
| | |
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_BKP_DR(BKP_DR));
|
|---|
| | |
|
|---|
| | | tmp = (uint32_t)BKP_BASE; |
|---|
| | | tmp += BKP_DR;
|
|---|
| | |
|
|---|
| | | *(__IO uint32_t *) tmp = Data;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Reads data from the specified Data Backup Register.
|
|---|
| | | * @param BKP_DR: specifies the Data Backup Register.
|
|---|
| | | * This parameter can be BKP_DRx where x:[1, 42]
|
|---|
| | | * @retval The content of the specified Data Backup Register
|
|---|
| | | */
|
|---|
| | | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR)
|
|---|
| | | {
|
|---|
| | | __IO uint32_t tmp = 0;
|
|---|
| | |
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_BKP_DR(BKP_DR));
|
|---|
| | |
|
|---|
| | | tmp = (uint32_t)BKP_BASE; |
|---|
| | | tmp += BKP_DR;
|
|---|
| | |
|
|---|
| | | return (*(__IO uint16_t *) tmp);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the Tamper Pin Event flag is set or not.
|
|---|
| | | * @param None
|
|---|
| | | * @retval The new state of the Tamper Pin Event flag (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus BKP_GetFlagStatus(void)
|
|---|
| | | {
|
|---|
| | | return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears Tamper Pin Event pending flag.
|
|---|
| | | * @param None
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_ClearFlag(void)
|
|---|
| | | {
|
|---|
| | | /* Set CTE bit to clear Tamper Pin Event flag */
|
|---|
| | | BKP->CSR |= BKP_CSR_CTE;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the Tamper Pin Interrupt has occurred or not.
|
|---|
| | | * @param None
|
|---|
| | | * @retval The new state of the Tamper Pin Interrupt (SET or RESET).
|
|---|
| | | */
|
|---|
| | | ITStatus BKP_GetITStatus(void)
|
|---|
| | | {
|
|---|
| | | return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears Tamper Pin Interrupt pending bit.
|
|---|
| | | * @param None
|
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void BKP_ClearITPendingBit(void)
|
|---|
| | | {
|
|---|
| | | /* Set CTI bit to clear Tamper Pin Interrupt pending bit */
|
|---|
| | | BKP->CSR |= BKP_CSR_CTI;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| New file |
| | |
|---|
| | | /**
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @file stm32f10x_can.c
|
|---|
| | | * @author MCD Application Team
|
|---|
| | | * @version V3.5.0
|
|---|
| | | * @date 11-March-2011
|
|---|
| | | * @brief This file provides all the CAN firmware functions.
|
|---|
| | | ******************************************************************************
|
|---|
| | | * @attention
|
|---|
| | | *
|
|---|
| | | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|---|
| | | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|---|
| | | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|---|
| | | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|---|
| | | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|---|
| | | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|---|
| | | *
|
|---|
| | | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|---|
| | | ******************************************************************************
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* Includes ------------------------------------------------------------------*/
|
|---|
| | | #include "stm32f10x_can.h"
|
|---|
| | | #include "stm32f10x_rcc.h"
|
|---|
| | |
|
|---|
| | | /** @addtogroup STM32F10x_StdPeriph_Driver
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN |
|---|
| | | * @brief CAN driver modules
|
|---|
| | | * @{
|
|---|
| | | */ |
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_TypesDefinitions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_Defines
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /* CAN Master Control Register bits */
|
|---|
| | |
|
|---|
| | | #define MCR_DBF ((uint32_t)0x00010000) /* software master reset */
|
|---|
| | |
|
|---|
| | | /* CAN Mailbox Transmit Request */
|
|---|
| | | #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */
|
|---|
| | |
|
|---|
| | | /* CAN Filter Master Register bits */
|
|---|
| | | #define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */
|
|---|
| | |
|
|---|
| | | /* Time out for INAK bit */
|
|---|
| | | #define INAK_TIMEOUT ((uint32_t)0x0000FFFF)
|
|---|
| | | /* Time out for SLAK bit */
|
|---|
| | | #define SLAK_TIMEOUT ((uint32_t)0x0000FFFF)
|
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /* Flags in TSR register */
|
|---|
| | | #define CAN_FLAGS_TSR ((uint32_t)0x08000000) |
|---|
| | | /* Flags in RF1R register */
|
|---|
| | | #define CAN_FLAGS_RF1R ((uint32_t)0x04000000) |
|---|
| | | /* Flags in RF0R register */
|
|---|
| | | #define CAN_FLAGS_RF0R ((uint32_t)0x02000000) |
|---|
| | | /* Flags in MSR register */
|
|---|
| | | #define CAN_FLAGS_MSR ((uint32_t)0x01000000) |
|---|
| | | /* Flags in ESR register */
|
|---|
| | | #define CAN_FLAGS_ESR ((uint32_t)0x00F00000) |
|---|
| | |
|
|---|
| | | /* Mailboxes definition */
|
|---|
| | | #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
|
|---|
| | | #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
|
|---|
| | | #define CAN_TXMAILBOX_2 ((uint8_t)0x02) |
|---|
| | |
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | #define CAN_MODE_MASK ((uint32_t) 0x00000003)
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_Macros
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_Variables
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_FunctionPrototypes
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /** @defgroup CAN_Private_Functions
|
|---|
| | | * @{
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Deinitializes the CAN peripheral registers to their default reset values.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to select the CAN peripheral.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_DeInit(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | if (CANx == CAN1)
|
|---|
| | | {
|
|---|
| | | /* Enable CAN1 reset state */
|
|---|
| | | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
|
|---|
| | | /* Release CAN1 from reset state */
|
|---|
| | | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* Enable CAN2 reset state */
|
|---|
| | | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE);
|
|---|
| | | /* Release CAN2 from reset state */
|
|---|
| | | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Initializes the CAN peripheral according to the specified
|
|---|
| | | * parameters in the CAN_InitStruct.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN |
|---|
| | | * peripheral.
|
|---|
| | | * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
|
|---|
| | | * contains the configuration information for the |
|---|
| | | * CAN peripheral.
|
|---|
| | | * @retval Constant indicates initialization succeed which will be |
|---|
| | | * CAN_InitStatus_Failed or CAN_InitStatus_Success.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
|
|---|
| | | {
|
|---|
| | | uint8_t InitStatus = CAN_InitStatus_Failed;
|
|---|
| | | uint32_t wait_ack = 0x00000000;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
|
|---|
| | | assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
|
|---|
| | | assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
|
|---|
| | | assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
|
|---|
| | | assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
|
|---|
| | | assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
|
|---|
| | |
|
|---|
| | | /* Exit from sleep mode */
|
|---|
| | | CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
|
|---|
| | |
|
|---|
| | | /* Request initialisation */
|
|---|
| | | CANx->MCR |= CAN_MCR_INRQ ;
|
|---|
| | |
|
|---|
| | | /* Wait the acknowledge */
|
|---|
| | | while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
|
|---|
| | | {
|
|---|
| | | wait_ack++;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Check acknowledge */
|
|---|
| | | if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
|
|---|
| | | {
|
|---|
| | | InitStatus = CAN_InitStatus_Failed;
|
|---|
| | | }
|
|---|
| | | else |
|---|
| | | {
|
|---|
| | | /* Set the time triggered communication mode */
|
|---|
| | | if (CAN_InitStruct->CAN_TTCM == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_TTCM;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the automatic bus-off management */
|
|---|
| | | if (CAN_InitStruct->CAN_ABOM == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_ABOM;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the automatic wake-up mode */
|
|---|
| | | if (CAN_InitStruct->CAN_AWUM == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_AWUM;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the no automatic retransmission */
|
|---|
| | | if (CAN_InitStruct->CAN_NART == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_NART;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the receive FIFO locked mode */
|
|---|
| | | if (CAN_InitStruct->CAN_RFLM == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_RFLM;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the transmit FIFO priority */
|
|---|
| | | if (CAN_InitStruct->CAN_TXFP == ENABLE)
|
|---|
| | | {
|
|---|
| | | CANx->MCR |= CAN_MCR_TXFP;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Set the bit timing register */
|
|---|
| | | CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
|
|---|
| | | ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
|
|---|
| | | ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
|
|---|
| | | ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
|
|---|
| | | ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
|
|---|
| | |
|
|---|
| | | /* Request leave initialisation */
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
|
|---|
| | |
|
|---|
| | | /* Wait the acknowledge */
|
|---|
| | | wait_ack = 0;
|
|---|
| | |
|
|---|
| | | while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
|
|---|
| | | {
|
|---|
| | | wait_ack++;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* ...and check acknowledged */
|
|---|
| | | if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
|
|---|
| | | {
|
|---|
| | | InitStatus = CAN_InitStatus_Failed;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | InitStatus = CAN_InitStatus_Success ;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* At this step, return the status of initialization */
|
|---|
| | | return InitStatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Initializes the CAN peripheral according to the specified
|
|---|
| | | * parameters in the CAN_FilterInitStruct.
|
|---|
| | | * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef
|
|---|
| | | * structure that contains the configuration |
|---|
| | | * information.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
|
|---|
| | | {
|
|---|
| | | uint32_t filter_number_bit_pos = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
|
|---|
| | | assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
|
|---|
| | | assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
|
|---|
| | | assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
|
|---|
| | |
|
|---|
| | | filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
|
|---|
| | |
|
|---|
| | | /* Initialisation mode for the filter */
|
|---|
| | | CAN1->FMR |= FMR_FINIT;
|
|---|
| | |
|
|---|
| | | /* Filter Deactivation */
|
|---|
| | | CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
|
|---|
| | |
|
|---|
| | | /* Filter Scale */
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
|
|---|
| | | {
|
|---|
| | | /* 16-bit scale for the filter */
|
|---|
| | | CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
|
|---|
| | |
|
|---|
| | | /* First 16-bit identifier and First 16-bit mask */
|
|---|
| | | /* Or First 16-bit identifier and Second 16-bit identifier */
|
|---|
| | | CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = |
|---|
| | | ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
|
|---|
| | | (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
|
|---|
| | |
|
|---|
| | | /* Second 16-bit identifier and Second 16-bit mask */
|
|---|
| | | /* Or Third 16-bit identifier and Fourth 16-bit identifier */
|
|---|
| | | CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = |
|---|
| | | ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
|
|---|
| | | (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
|
|---|
| | | {
|
|---|
| | | /* 32-bit scale for the filter */
|
|---|
| | | CAN1->FS1R |= filter_number_bit_pos;
|
|---|
| | | /* 32-bit identifier or First 32-bit identifier */
|
|---|
| | | CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = |
|---|
| | | ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
|
|---|
| | | (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
|
|---|
| | | /* 32-bit mask or Second 32-bit identifier */
|
|---|
| | | CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = |
|---|
| | | ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
|
|---|
| | | (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Filter Mode */
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
|
|---|
| | | {
|
|---|
| | | /*Id/Mask mode for the filter*/
|
|---|
| | | CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
|
|---|
| | | }
|
|---|
| | | else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
|
|---|
| | | {
|
|---|
| | | /*Identifier list mode for the filter*/
|
|---|
| | | CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Filter FIFO assignment */
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
|
|---|
| | | {
|
|---|
| | | /* FIFO 0 assignation for the filter */
|
|---|
| | | CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
|
|---|
| | | {
|
|---|
| | | /* FIFO 1 assignation for the filter */
|
|---|
| | | CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | /* Filter activation */
|
|---|
| | | if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
|
|---|
| | | {
|
|---|
| | | CAN1->FA1R |= filter_number_bit_pos;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /* Leave the initialisation mode for the filter */
|
|---|
| | | CAN1->FMR &= ~FMR_FINIT;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Fills each CAN_InitStruct member with its default value.
|
|---|
| | | * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which
|
|---|
| | | * will be initialized.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
|
|---|
| | | {
|
|---|
| | | /* Reset CAN init structure parameters values */
|
|---|
| | | |
|---|
| | | /* Initialize the time triggered communication mode */
|
|---|
| | | CAN_InitStruct->CAN_TTCM = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the automatic bus-off management */
|
|---|
| | | CAN_InitStruct->CAN_ABOM = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the automatic wake-up mode */
|
|---|
| | | CAN_InitStruct->CAN_AWUM = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the no automatic retransmission */
|
|---|
| | | CAN_InitStruct->CAN_NART = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the receive FIFO locked mode */
|
|---|
| | | CAN_InitStruct->CAN_RFLM = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the transmit FIFO priority */
|
|---|
| | | CAN_InitStruct->CAN_TXFP = DISABLE;
|
|---|
| | | |
|---|
| | | /* Initialize the CAN_Mode member */
|
|---|
| | | CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
|
|---|
| | | |
|---|
| | | /* Initialize the CAN_SJW member */
|
|---|
| | | CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
|
|---|
| | | |
|---|
| | | /* Initialize the CAN_BS1 member */
|
|---|
| | | CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
|
|---|
| | | |
|---|
| | | /* Initialize the CAN_BS2 member */
|
|---|
| | | CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
|
|---|
| | | |
|---|
| | | /* Initialize the CAN_Prescaler member */
|
|---|
| | | CAN_InitStruct->CAN_Prescaler = 1;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Select the start bank filter for slave CAN.
|
|---|
| | | * @note This function applies only to STM32 Connectivity line devices.
|
|---|
| | | * @param CAN_BankNumber: Select the start slave bank filter from 1..27.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_SlaveStartBank(uint8_t CAN_BankNumber) |
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
|
|---|
| | | |
|---|
| | | /* Enter Initialisation mode for the filter */
|
|---|
| | | CAN1->FMR |= FMR_FINIT;
|
|---|
| | | |
|---|
| | | /* Select the start slave bank */
|
|---|
| | | CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
|
|---|
| | | CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
|
|---|
| | | |
|---|
| | | /* Leave Initialisation mode for the filter */
|
|---|
| | | CAN1->FMR &= ~FMR_FINIT;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the DBG Freeze for CAN.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param NewState: new state of the CAN peripheral. This parameter can |
|---|
| | | * be: ENABLE or DISABLE.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | |
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable Debug Freeze */
|
|---|
| | | CANx->MCR |= MCR_DBF;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable Debug Freeze */
|
|---|
| | | CANx->MCR &= ~MCR_DBF;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disabes the CAN Time TriggerOperation communication mode.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param NewState : Mode new state , can be one of @ref FunctionalState.
|
|---|
| | | * @note when enabled, Time stamp (TIME[15:0]) value is sent in the last |
|---|
| | | * two data bytes of the 8-byte message: TIME[7:0] in data byte 6 |
|---|
| | | * and TIME[15:8] in data byte 7 |
|---|
| | | * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be |
|---|
| | | * sent over the CAN bus. |
|---|
| | | * @retval None
|
|---|
| | | */
|
|---|
| | | void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the TTCM mode */
|
|---|
| | | CANx->MCR |= CAN_MCR_TTCM;
|
|---|
| | |
|
|---|
| | | /* Set TGT bits */
|
|---|
| | | CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT);
|
|---|
| | | CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT);
|
|---|
| | | CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the TTCM mode */
|
|---|
| | | CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM);
|
|---|
| | |
|
|---|
| | | /* Reset TGT bits */
|
|---|
| | | CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT);
|
|---|
| | | CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT);
|
|---|
| | | CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | /**
|
|---|
| | | * @brief Initiates the transmission of a message.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param TxMessage: pointer to a structure which contains CAN Id, CAN
|
|---|
| | | * DLC and CAN data.
|
|---|
| | | * @retval The number of the mailbox that is used for transmission
|
|---|
| | | * or CAN_TxStatus_NoMailBox if there is no empty mailbox.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
|
|---|
| | | {
|
|---|
| | | uint8_t transmit_mailbox = 0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
|
|---|
| | | assert_param(IS_CAN_RTR(TxMessage->RTR));
|
|---|
| | | assert_param(IS_CAN_DLC(TxMessage->DLC));
|
|---|
| | |
|
|---|
| | | /* Select one empty transmit mailbox */
|
|---|
| | | if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
|
|---|
| | | {
|
|---|
| | | transmit_mailbox = 0;
|
|---|
| | | }
|
|---|
| | | else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
|
|---|
| | | {
|
|---|
| | | transmit_mailbox = 1;
|
|---|
| | | }
|
|---|
| | | else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
|
|---|
| | | {
|
|---|
| | | transmit_mailbox = 2;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | transmit_mailbox = CAN_TxStatus_NoMailBox;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | if (transmit_mailbox != CAN_TxStatus_NoMailBox)
|
|---|
| | | {
|
|---|
| | | /* Set up the Id */
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
|
|---|
| | | if (TxMessage->IDE == CAN_Id_Standard)
|
|---|
| | | {
|
|---|
| | | assert_param(IS_CAN_STDID(TxMessage->StdId)); |
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \
|
|---|
| | | TxMessage->RTR);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | assert_param(IS_CAN_EXTID(TxMessage->ExtId));
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \
|
|---|
| | | TxMessage->IDE | \
|
|---|
| | | TxMessage->RTR);
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | /* Set up the DLC */
|
|---|
| | | TxMessage->DLC &= (uint8_t)0x0000000F;
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
|
|---|
| | |
|
|---|
| | | /* Set up the data field */
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | |
|---|
| | | ((uint32_t)TxMessage->Data[2] << 16) |
|
|---|
| | | ((uint32_t)TxMessage->Data[1] << 8) | |
|---|
| | | ((uint32_t)TxMessage->Data[0]));
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | |
|---|
| | | ((uint32_t)TxMessage->Data[6] << 16) |
|
|---|
| | | ((uint32_t)TxMessage->Data[5] << 8) |
|
|---|
| | | ((uint32_t)TxMessage->Data[4]));
|
|---|
| | | /* Request transmission */
|
|---|
| | | CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
|
|---|
| | | }
|
|---|
| | | return transmit_mailbox;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks the transmission of a message.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the |
|---|
| | | * CAN peripheral.
|
|---|
| | | * @param TransmitMailbox: the number of the mailbox that is used for |
|---|
| | | * transmission.
|
|---|
| | | * @retval CAN_TxStatus_Ok if the CAN driver transmits the message, CAN_TxStatus_Failed |
|---|
| | | * in an other case.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
|
|---|
| | | {
|
|---|
| | | uint32_t state = 0;
|
|---|
| | |
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
|
|---|
| | | |
|---|
| | | switch (TransmitMailbox)
|
|---|
| | | {
|
|---|
| | | case (CAN_TXMAILBOX_0): |
|---|
| | | state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0);
|
|---|
| | | break;
|
|---|
| | | case (CAN_TXMAILBOX_1): |
|---|
| | | state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1);
|
|---|
| | | break;
|
|---|
| | | case (CAN_TXMAILBOX_2): |
|---|
| | | state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2);
|
|---|
| | | break;
|
|---|
| | | default:
|
|---|
| | | state = CAN_TxStatus_Failed;
|
|---|
| | | break;
|
|---|
| | | }
|
|---|
| | | switch (state)
|
|---|
| | | {
|
|---|
| | | /* transmit pending */
|
|---|
| | | case (0x0): state = CAN_TxStatus_Pending;
|
|---|
| | | break;
|
|---|
| | | /* transmit failed */
|
|---|
| | | case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed;
|
|---|
| | | break;
|
|---|
| | | /* transmit succeeded */
|
|---|
| | | case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok;
|
|---|
| | | break;
|
|---|
| | | default: state = CAN_TxStatus_Failed;
|
|---|
| | | break;
|
|---|
| | | }
|
|---|
| | | return (uint8_t) state;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Cancels a transmit request.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. |
|---|
| | | * @param Mailbox: Mailbox number.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
|
|---|
| | | /* abort transmission */
|
|---|
| | | switch (Mailbox)
|
|---|
| | | {
|
|---|
| | | case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1;
|
|---|
| | | break;
|
|---|
| | | case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2;
|
|---|
| | | break;
|
|---|
| | | default:
|
|---|
| | | break;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Receives a message.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
|---|
| | | * @param RxMessage: pointer to a structure receive message which contains |
|---|
| | | * CAN Id, CAN DLC, CAN datas and FMI number.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_FIFO(FIFONumber));
|
|---|
| | | /* Get the Id */
|
|---|
| | | RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
|
|---|
| | | if (RxMessage->IDE == CAN_Id_Standard)
|
|---|
| | | {
|
|---|
| | | RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
|
|---|
| | | /* Get the DLC */
|
|---|
| | | RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
|
|---|
| | | /* Get the FMI */
|
|---|
| | | RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
|
|---|
| | | /* Get the data field */
|
|---|
| | | RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
|
|---|
| | | RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
|
|---|
| | | RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
|
|---|
| | | RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
|
|---|
| | | RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
|
|---|
| | | RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
|
|---|
| | | RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
|
|---|
| | | RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
|
|---|
| | | /* Release the FIFO */
|
|---|
| | | /* Release FIFO0 */
|
|---|
| | | if (FIFONumber == CAN_FIFO0)
|
|---|
| | | {
|
|---|
| | | CANx->RF0R |= CAN_RF0R_RFOM0;
|
|---|
| | | }
|
|---|
| | | /* Release FIFO1 */
|
|---|
| | | else /* FIFONumber == CAN_FIFO1 */
|
|---|
| | | {
|
|---|
| | | CANx->RF1R |= CAN_RF1R_RFOM1;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Releases the specified FIFO.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. |
|---|
| | | * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_FIFO(FIFONumber));
|
|---|
| | | /* Release FIFO0 */
|
|---|
| | | if (FIFONumber == CAN_FIFO0)
|
|---|
| | | {
|
|---|
| | | CANx->RF0R |= CAN_RF0R_RFOM0;
|
|---|
| | | }
|
|---|
| | | /* Release FIFO1 */
|
|---|
| | | else /* FIFONumber == CAN_FIFO1 */
|
|---|
| | | {
|
|---|
| | | CANx->RF1R |= CAN_RF1R_RFOM1;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the number of pending messages.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
|---|
| | | * @retval NbMessage : which is the number of pending message.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
|
|---|
| | | {
|
|---|
| | | uint8_t message_pending=0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_FIFO(FIFONumber));
|
|---|
| | | if (FIFONumber == CAN_FIFO0)
|
|---|
| | | {
|
|---|
| | | message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
|
|---|
| | | }
|
|---|
| | | else if (FIFONumber == CAN_FIFO1)
|
|---|
| | | {
|
|---|
| | | message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | message_pending = 0;
|
|---|
| | | }
|
|---|
| | | return message_pending;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Select the CAN Operation mode.
|
|---|
| | | * @param CAN_OperatingMode : CAN Operating Mode. This parameter can be one |
|---|
| | | * of @ref CAN_OperatingMode_TypeDef enumeration.
|
|---|
| | | * @retval status of the requested mode which can be |
|---|
| | | * - CAN_ModeStatus_Failed CAN failed entering the specific mode |
|---|
| | | * - CAN_ModeStatus_Success CAN Succeed entering the specific mode |
|---|
| | |
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
|
|---|
| | | {
|
|---|
| | | uint8_t status = CAN_ModeStatus_Failed;
|
|---|
| | | |
|---|
| | | /* Timeout for INAK or also for SLAK bits*/
|
|---|
| | | uint32_t timeout = INAK_TIMEOUT; |
|---|
| | |
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
|
|---|
| | |
|
|---|
| | | if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
|
|---|
| | | {
|
|---|
| | | /* Request initialisation */
|
|---|
| | | CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
|
|---|
| | |
|
|---|
| | | /* Wait the acknowledge */
|
|---|
| | | while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
|
|---|
| | | {
|
|---|
| | | timeout--;
|
|---|
| | | }
|
|---|
| | | if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Failed;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Success;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else if (CAN_OperatingMode == CAN_OperatingMode_Normal)
|
|---|
| | | {
|
|---|
| | | /* Request leave initialisation and sleep mode and enter Normal mode */
|
|---|
| | | CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
|
|---|
| | |
|
|---|
| | | /* Wait the acknowledge */
|
|---|
| | | while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
|
|---|
| | | {
|
|---|
| | | timeout--;
|
|---|
| | | }
|
|---|
| | | if ((CANx->MSR & CAN_MODE_MASK) != 0)
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Failed;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Success;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
|
|---|
| | | {
|
|---|
| | | /* Request Sleep mode */
|
|---|
| | | CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
|
|---|
| | |
|
|---|
| | | /* Wait the acknowledge */
|
|---|
| | | while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
|
|---|
| | | {
|
|---|
| | | timeout--;
|
|---|
| | | }
|
|---|
| | | if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Failed;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Success;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | status = CAN_ModeStatus_Failed;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | return (uint8_t) status;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enters the low power mode.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @retval status: CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed in an |
|---|
| | | * other case.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_Sleep(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | uint8_t sleepstatus = CAN_Sleep_Failed;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | /* Request Sleep mode */
|
|---|
| | | CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
|
|---|
| | | |
|---|
| | | /* Sleep mode status */
|
|---|
| | | if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
|
|---|
| | | {
|
|---|
| | | /* Sleep mode not entered */
|
|---|
| | | sleepstatus = CAN_Sleep_Ok;
|
|---|
| | | }
|
|---|
| | | /* return sleep mode status */
|
|---|
| | | return (uint8_t)sleepstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Wakes the CAN up.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @retval status: CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed in an |
|---|
| | | * other case.
|
|---|
| | | */
|
|---|
| | | uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | uint32_t wait_slak = SLAK_TIMEOUT;
|
|---|
| | | uint8_t wakeupstatus = CAN_WakeUp_Failed;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | /* Wake up request */
|
|---|
| | | CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
|
|---|
| | | |
|---|
| | | /* Sleep mode status */
|
|---|
| | | while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
|
|---|
| | | {
|
|---|
| | | wait_slak--;
|
|---|
| | | }
|
|---|
| | | if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
|
|---|
| | | {
|
|---|
| | | /* wake up done : Sleep mode exited */
|
|---|
| | | wakeupstatus = CAN_WakeUp_Ok;
|
|---|
| | | }
|
|---|
| | | /* return wakeup status */
|
|---|
| | | return (uint8_t)wakeupstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the CANx's last error code (LEC).
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. |
|---|
| | | * @retval CAN_ErrorCode: specifies the Error code : |
|---|
| | | * - CAN_ERRORCODE_NoErr No Error |
|---|
| | | * - CAN_ERRORCODE_StuffErr Stuff Error
|
|---|
| | | * - CAN_ERRORCODE_FormErr Form Error
|
|---|
| | | * - CAN_ERRORCODE_ACKErr Acknowledgment Error
|
|---|
| | | * - CAN_ERRORCODE_BitRecessiveErr Bit Recessive Error
|
|---|
| | | * - CAN_ERRORCODE_BitDominantErr Bit Dominant Error
|
|---|
| | | * - CAN_ERRORCODE_CRCErr CRC Error
|
|---|
| | | * - CAN_ERRORCODE_SoftwareSetErr Software Set Error |
|---|
| | | */
|
|---|
| | | |
|---|
| | | uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | uint8_t errorcode=0;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | /* Get the error code*/
|
|---|
| | | errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
|
|---|
| | | |
|---|
| | | /* Return the error code*/
|
|---|
| | | return errorcode;
|
|---|
| | | }
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the CANx Receive Error Counter (REC).
|
|---|
| | | * @note In case of an error during reception, this counter is incremented |
|---|
| | | * by 1 or by 8 depending on the error condition as defined by the CAN |
|---|
| | | * standard. After every successful reception, the counter is |
|---|
| | | * decremented by 1 or reset to 120 if its value was higher than 128. |
|---|
| | | * When the counter value exceeds 127, the CAN controller enters the |
|---|
| | | * error passive state. |
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. |
|---|
| | | * @retval CAN Receive Error Counter. |
|---|
| | | */
|
|---|
| | | uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | uint8_t counter=0;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | /* Get the Receive Error Counter*/
|
|---|
| | | counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
|
|---|
| | | |
|---|
| | | /* Return the Receive Error Counter*/
|
|---|
| | | return counter;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. |
|---|
| | | * @retval LSB of the 9-bit CAN Transmit Error Counter. |
|---|
| | | */
|
|---|
| | | uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
|
|---|
| | | {
|
|---|
| | | uint8_t counter=0;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | |
|---|
| | | /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
|
|---|
| | | counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
|
|---|
| | | |
|---|
| | | /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
|
|---|
| | | return counter;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Enables or disables the specified CANx interrupts.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
|
|---|
| | | * This parameter can be: |
|---|
| | | * - CAN_IT_TME, |
|---|
| | | * - CAN_IT_FMP0, |
|---|
| | | * - CAN_IT_FF0,
|
|---|
| | | * - CAN_IT_FOV0, |
|---|
| | | * - CAN_IT_FMP1, |
|---|
| | | * - CAN_IT_FF1,
|
|---|
| | | * - CAN_IT_FOV1, |
|---|
| | | * - CAN_IT_EWG, |
|---|
| | | * - CAN_IT_EPV,
|
|---|
| | | * - CAN_IT_LEC, |
|---|
| | | * - CAN_IT_ERR, |
|---|
| | | * - CAN_IT_WKU or |
|---|
| | | * - CAN_IT_SLK.
|
|---|
| | | * @param NewState: new state of the CAN interrupts.
|
|---|
| | | * This parameter can be: ENABLE or DISABLE.
|
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_IT(CAN_IT));
|
|---|
| | | assert_param(IS_FUNCTIONAL_STATE(NewState));
|
|---|
| | |
|
|---|
| | | if (NewState != DISABLE)
|
|---|
| | | {
|
|---|
| | | /* Enable the selected CANx interrupt */
|
|---|
| | | CANx->IER |= CAN_IT;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* Disable the selected CANx interrupt */
|
|---|
| | | CANx->IER &= ~CAN_IT;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the specified CAN flag is set or not.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param CAN_FLAG: specifies the flag to check.
|
|---|
| | | * This parameter can be one of the following flags: |
|---|
| | | * - CAN_FLAG_EWG
|
|---|
| | | * - CAN_FLAG_EPV |
|---|
| | | * - CAN_FLAG_BOF
|
|---|
| | | * - CAN_FLAG_RQCP0
|
|---|
| | | * - CAN_FLAG_RQCP1
|
|---|
| | | * - CAN_FLAG_RQCP2
|
|---|
| | | * - CAN_FLAG_FMP1 |
|---|
| | | * - CAN_FLAG_FF1 |
|---|
| | | * - CAN_FLAG_FOV1 |
|---|
| | | * - CAN_FLAG_FMP0 |
|---|
| | | * - CAN_FLAG_FF0 |
|---|
| | | * - CAN_FLAG_FOV0 |
|---|
| | | * - CAN_FLAG_WKU |
|---|
| | | * - CAN_FLAG_SLAK |
|---|
| | | * - CAN_FLAG_LEC |
|---|
| | | * @retval The new state of CAN_FLAG (SET or RESET).
|
|---|
| | | */
|
|---|
| | | FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
|
|---|
| | | {
|
|---|
| | | FlagStatus bitstatus = RESET;
|
|---|
| | | |
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
|
|---|
| | | |
|---|
| | |
|
|---|
| | | if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* Check the status of the specified CAN flag */
|
|---|
| | | if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* Check the status of the specified CAN flag */
|
|---|
| | | if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* Check the status of the specified CAN flag */
|
|---|
| | | if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* Check the status of the specified CAN flag */
|
|---|
| | | if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
|
|---|
| | | { |
|---|
| | | /* Check the status of the specified CAN flag */
|
|---|
| | | if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is set */
|
|---|
| | | bitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | { |
|---|
| | | /* CAN_FLAG is reset */
|
|---|
| | | bitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | /* Return the CAN_FLAG status */
|
|---|
| | | return bitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears the CAN's pending flags.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param CAN_FLAG: specifies the flag to clear.
|
|---|
| | | * This parameter can be one of the following flags: |
|---|
| | | * - CAN_FLAG_RQCP0
|
|---|
| | | * - CAN_FLAG_RQCP1
|
|---|
| | | * - CAN_FLAG_RQCP2
|
|---|
| | | * - CAN_FLAG_FF1 |
|---|
| | | * - CAN_FLAG_FOV1 |
|---|
| | | * - CAN_FLAG_FF0 |
|---|
| | | * - CAN_FLAG_FOV0 |
|---|
| | | * - CAN_FLAG_WKU |
|---|
| | | * - CAN_FLAG_SLAK |
|---|
| | | * - CAN_FLAG_LEC |
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
|
|---|
| | | {
|
|---|
| | | uint32_t flagtmp=0;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
|
|---|
| | | |
|---|
| | | if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
|
|---|
| | | {
|
|---|
| | | /* Clear the selected CAN flags */
|
|---|
| | | CANx->ESR = (uint32_t)RESET;
|
|---|
| | | }
|
|---|
| | | else /* MSR or TSR or RF0R or RF1R */
|
|---|
| | | {
|
|---|
| | | flagtmp = CAN_FLAG & 0x000FFFFF;
|
|---|
| | |
|
|---|
| | | if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* Receive Flags */
|
|---|
| | | CANx->RF0R = (uint32_t)(flagtmp);
|
|---|
| | | }
|
|---|
| | | else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* Receive Flags */
|
|---|
| | | CANx->RF1R = (uint32_t)(flagtmp);
|
|---|
| | | }
|
|---|
| | | else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* Transmit Flags */
|
|---|
| | | CANx->TSR = (uint32_t)(flagtmp);
|
|---|
| | | }
|
|---|
| | | else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
|
|---|
| | | {
|
|---|
| | | /* Operating mode Flags */
|
|---|
| | | CANx->MSR = (uint32_t)(flagtmp);
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the specified CANx interrupt has occurred or not.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param CAN_IT: specifies the CAN interrupt source to check.
|
|---|
| | | * This parameter can be one of the following flags: |
|---|
| | | * - CAN_IT_TME |
|---|
| | | * - CAN_IT_FMP0 |
|---|
| | | * - CAN_IT_FF0 |
|---|
| | | * - CAN_IT_FOV0 |
|---|
| | | * - CAN_IT_FMP1 |
|---|
| | | * - CAN_IT_FF1 |
|---|
| | | * - CAN_IT_FOV1 |
|---|
| | | * - CAN_IT_WKU |
|---|
| | | * - CAN_IT_SLK |
|---|
| | | * - CAN_IT_EWG |
|---|
| | | * - CAN_IT_EPV |
|---|
| | | * - CAN_IT_BOF |
|---|
| | | * - CAN_IT_LEC |
|---|
| | | * - CAN_IT_ERR |
|---|
| | | * @retval The current state of CAN_IT (SET or RESET).
|
|---|
| | | */
|
|---|
| | | ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
|
|---|
| | | {
|
|---|
| | | ITStatus itstatus = RESET;
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_IT(CAN_IT));
|
|---|
| | | |
|---|
| | | /* check the enable interrupt bit */
|
|---|
| | | if((CANx->IER & CAN_IT) != RESET)
|
|---|
| | | {
|
|---|
| | | /* in case the Interrupt is enabled, .... */
|
|---|
| | | switch (CAN_IT)
|
|---|
| | | {
|
|---|
| | | case CAN_IT_TME:
|
|---|
| | | /* Check CAN_TSR_RQCPx bits */
|
|---|
| | | itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FMP0:
|
|---|
| | | /* Check CAN_RF0R_FMP0 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FF0:
|
|---|
| | | /* Check CAN_RF0R_FULL0 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FOV0:
|
|---|
| | | /* Check CAN_RF0R_FOVR0 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FMP1:
|
|---|
| | | /* Check CAN_RF1R_FMP1 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FF1:
|
|---|
| | | /* Check CAN_RF1R_FULL1 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FOV1:
|
|---|
| | | /* Check CAN_RF1R_FOVR1 bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_WKU:
|
|---|
| | | /* Check CAN_MSR_WKUI bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_SLK:
|
|---|
| | | /* Check CAN_MSR_SLAKI bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_EWG:
|
|---|
| | | /* Check CAN_ESR_EWGF bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_EPV:
|
|---|
| | | /* Check CAN_ESR_EPVF bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_BOF:
|
|---|
| | | /* Check CAN_ESR_BOFF bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_LEC:
|
|---|
| | | /* Check CAN_ESR_LEC bit */
|
|---|
| | | itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC); |
|---|
| | | break;
|
|---|
| | | case CAN_IT_ERR:
|
|---|
| | | /* Check CAN_MSR_ERRI bit */ |
|---|
| | | itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); |
|---|
| | | break;
|
|---|
| | | default :
|
|---|
| | | /* in case of error, return RESET */
|
|---|
| | | itstatus = RESET;
|
|---|
| | | break;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* in case the Interrupt is not enabled, return RESET */
|
|---|
| | | itstatus = RESET;
|
|---|
| | | }
|
|---|
| | | |
|---|
| | | /* Return the CAN_IT status */
|
|---|
| | | return itstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Clears the CANx's interrupt pending bits.
|
|---|
| | | * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
|
|---|
| | | * @param CAN_IT: specifies the interrupt pending bit to clear.
|
|---|
| | | * - CAN_IT_TME |
|---|
| | | * - CAN_IT_FF0 |
|---|
| | | * - CAN_IT_FOV0 |
|---|
| | | * - CAN_IT_FF1 |
|---|
| | | * - CAN_IT_FOV1 |
|---|
| | | * - CAN_IT_WKU |
|---|
| | | * - CAN_IT_SLK |
|---|
| | | * - CAN_IT_EWG |
|---|
| | | * - CAN_IT_EPV |
|---|
| | | * - CAN_IT_BOF |
|---|
| | | * - CAN_IT_LEC |
|---|
| | | * - CAN_IT_ERR |
|---|
| | | * @retval None.
|
|---|
| | | */
|
|---|
| | | void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
|
|---|
| | | {
|
|---|
| | | /* Check the parameters */
|
|---|
| | | assert_param(IS_CAN_ALL_PERIPH(CANx));
|
|---|
| | | assert_param(IS_CAN_CLEAR_IT(CAN_IT));
|
|---|
| | |
|
|---|
| | | switch (CAN_IT)
|
|---|
| | | {
|
|---|
| | | case CAN_IT_TME:
|
|---|
| | | /* Clear CAN_TSR_RQCPx (rc_w1)*/
|
|---|
| | | CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FF0:
|
|---|
| | | /* Clear CAN_RF0R_FULL0 (rc_w1)*/
|
|---|
| | | CANx->RF0R = CAN_RF0R_FULL0; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FOV0:
|
|---|
| | | /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
|
|---|
| | | CANx->RF0R = CAN_RF0R_FOVR0; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FF1:
|
|---|
| | | /* Clear CAN_RF1R_FULL1 (rc_w1)*/
|
|---|
| | | CANx->RF1R = CAN_RF1R_FULL1; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_FOV1:
|
|---|
| | | /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
|
|---|
| | | CANx->RF1R = CAN_RF1R_FOVR1; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_WKU:
|
|---|
| | | /* Clear CAN_MSR_WKUI (rc_w1)*/
|
|---|
| | | CANx->MSR = CAN_MSR_WKUI; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_SLK:
|
|---|
| | | /* Clear CAN_MSR_SLAKI (rc_w1)*/ |
|---|
| | | CANx->MSR = CAN_MSR_SLAKI; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_EWG:
|
|---|
| | | /* Clear CAN_MSR_ERRI (rc_w1) */
|
|---|
| | | CANx->MSR = CAN_MSR_ERRI;
|
|---|
| | | /* Note : the corresponding Flag is cleared by hardware depending |
|---|
| | | of the CAN Bus status*/ |
|---|
| | | break;
|
|---|
| | | case CAN_IT_EPV:
|
|---|
| | | /* Clear CAN_MSR_ERRI (rc_w1) */
|
|---|
| | | CANx->MSR = CAN_MSR_ERRI; |
|---|
| | | /* Note : the corresponding Flag is cleared by hardware depending |
|---|
| | | of the CAN Bus status*/
|
|---|
| | | break;
|
|---|
| | | case CAN_IT_BOF:
|
|---|
| | | /* Clear CAN_MSR_ERRI (rc_w1) */ |
|---|
| | | CANx->MSR = CAN_MSR_ERRI; |
|---|
| | | /* Note : the corresponding Flag is cleared by hardware depending |
|---|
| | | of the CAN Bus status*/
|
|---|
| | | break;
|
|---|
| | | case CAN_IT_LEC:
|
|---|
| | | /* Clear LEC bits */
|
|---|
| | | CANx->ESR = RESET; |
|---|
| | | /* Clear CAN_MSR_ERRI (rc_w1) */
|
|---|
| | | CANx->MSR = CAN_MSR_ERRI; |
|---|
| | | break;
|
|---|
| | | case CAN_IT_ERR:
|
|---|
| | | /*Clear LEC bits */
|
|---|
| | | CANx->ESR = RESET; |
|---|
| | | /* Clear CAN_MSR_ERRI (rc_w1) */
|
|---|
| | | CANx->MSR = CAN_MSR_ERRI; |
|---|
| | | /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending |
|---|
| | | of the CAN Bus status*/
|
|---|
| | | break;
|
|---|
| | | default :
|
|---|
| | | break;
|
|---|
| | | }
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @brief Checks whether the CAN interrupt has occurred or not.
|
|---|
| | | * @param CAN_Reg: specifies the CAN interrupt register to check.
|
|---|
| | | * @param It_Bit: specifies the interrupt source bit to check.
|
|---|
| | | * @retval The new state of the CAN Interrupt (SET or RESET).
|
|---|
| | | */
|
|---|
| | | static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
|
|---|
| | | {
|
|---|
| | | ITStatus pendingbitstatus = RESET;
|
|---|
| | | |
|---|
| | | if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
|
|---|
| | | {
|
|---|
| | | /* CAN_IT is set */
|
|---|
| | | pendingbitstatus = SET;
|
|---|
| | | }
|
|---|
| | | else
|
|---|
| | | {
|
|---|
| | | /* CAN_IT is reset */
|
|---|
| | | pendingbitstatus = RESET;
|
|---|
| | | }
|
|---|
| | | return pendingbitstatus;
|
|---|
| | | }
|
|---|
| | |
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /**
|
|---|
| | | * @}
|
|---|
| | | */
|
|---|
| | |
|
|---|
| | | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|---|
| src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_cec.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_crc.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_dac.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_dbgmcu.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_dma.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_exti.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_flash.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_fsmc.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_gpio.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_i2c.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_it.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_iwdg.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_pwr.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_rcc.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_rtc.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_sdio.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_spi.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_tim.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_usart.c
src/IAR_project/stm32_ov7670/fwlib/src/stm32f10x_wwdg.c
src/IAR_project/stm32_ov7670/fwlib/src/system_stm32f10x.c
src/IAR_project/stm32_ov7670/iar_clean.bat
src/IAR_project/stm32_ov7670/main/main.c
src/IAR_project/stm32_ov7670/stm32_ov7670.ewd
src/IAR_project/stm32_ov7670/stm32_ov7670.ewp
src/IAR_project/stm32_ov7670/stm32_ov7670.eww
src/bare_test/stm32_key/JLinkSettings.ini
src/bare_test/stm32_key/board/startup_stm32f10x_hd.s
src/bare_test/stm32_key/board/stm32v5_key.c
src/bare_test/stm32_key/board/stm32v5_key.h
src/bare_test/stm32_key/board/stm32v5_led.c
src/bare_test/stm32_key/board/stm32v5_led.h
src/bare_test/stm32_key/cmsis/core_cm3.c
src/bare_test/stm32_key/cmsis/core_cm3.h
src/bare_test/stm32_key/cmsis/stm32f10x.h
src/bare_test/stm32_key/cmsis/system_stm32f10x.c
src/bare_test/stm32_key/cmsis/system_stm32f10x.h
src/bare_test/stm32_key/fwlib/inc/misc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_adc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_bkp.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_can.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_cec.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_conf.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_crc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_dac.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_dbgmcu.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_dma.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_exti.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_flash.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_fsmc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_gpio.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_i2c.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_iwdg.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_pwr.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_rcc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_rtc.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_sdio.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_spi.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_tim.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_usart.h
src/bare_test/stm32_key/fwlib/inc/stm32f10x_wwdg.h
src/bare_test/stm32_key/fwlib/src/misc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_adc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_bkp.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_can.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_cec.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_crc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_dac.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_dbgmcu.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_dma.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_exti.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_flash.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_fsmc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_gpio.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_i2c.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_iwdg.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_pwr.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_rcc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_rtc.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_sdio.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_spi.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_tim.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_usart.c
src/bare_test/stm32_key/fwlib/src/stm32f10x_wwdg.c
src/bare_test/stm32_key/fwlib/src/system_stm32f10x.c
src/bare_test/stm32_key/keil_clean.bat
src/bare_test/stm32_key/main/main.c
src/bare_test/stm32_key/stm32_interrupt.uvgui.USER
src/bare_test/stm32_key/stm32_interrupt.uvopt
src/bare_test/stm32_key/stm32_interrupt.uvproj
src/bare_test/stm32_lcd/JLinkSettings.ini
src/bare_test/stm32_lcd/board/lcd_draw.c
src/bare_test/stm32_lcd/board/lcd_draw.h
src/bare_test/stm32_lcd/board/lcd_font.c
src/bare_test/stm32_lcd/board/lcd_font.h
src/bare_test/stm32_lcd/board/lcd_font10x14.c
src/bare_test/stm32_lcd/board/lcd_font10x14.h
src/bare_test/stm32_lcd/board/lcd_gimp_image.h
src/bare_test/stm32_lcd/board/lcd_r61509v.c
src/bare_test/stm32_lcd/board/lcd_r61509v.h
src/bare_test/stm32_lcd/board/startup_stm32f10x_hd.s
src/bare_test/stm32_lcd/board/stm32f10x_conf.h
src/bare_test/stm32_lcd/board/stm32f10x_it.c
src/bare_test/stm32_lcd/board/stm32f10x_it.h
src/bare_test/stm32_lcd/board/stm32v5_led.c
src/bare_test/stm32_lcd/board/stm32v5_led.h
src/bare_test/stm32_lcd/board/stm32v5_systick.c
src/bare_test/stm32_lcd/board/stm32v5_systick.h
src/bare_test/stm32_lcd/board/stm32v5_uart.c
src/bare_test/stm32_lcd/board/stm32v5_uart.h
src/bare_test/stm32_lcd/cmsis/core_cm3.c
src/bare_test/stm32_lcd/cmsis/core_cm3.h
src/bare_test/stm32_lcd/cmsis/stm32f10x.h
src/bare_test/stm32_lcd/cmsis/system_stm32f10x.c
src/bare_test/stm32_lcd/cmsis/system_stm32f10x.h
src/bare_test/stm32_lcd/fwlib/inc/misc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_adc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_bkp.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_can.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_cec.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_conf.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_crc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_dac.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_dbgmcu.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_dma.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_exti.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_flash.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_fsmc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_gpio.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_i2c.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_iwdg.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_pwr.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_rcc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_rtc.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_sdio.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_spi.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_tim.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_usart.h
src/bare_test/stm32_lcd/fwlib/inc/stm32f10x_wwdg.h
src/bare_test/stm32_lcd/fwlib/src/misc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_adc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_bkp.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_can.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_cec.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_crc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_dac.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_dbgmcu.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_dma.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_exti.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_flash.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_fsmc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_gpio.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_i2c.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_iwdg.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_pwr.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_rcc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_rtc.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_sdio.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_spi.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_tim.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_usart.c
src/bare_test/stm32_lcd/fwlib/src/stm32f10x_wwdg.c
src/bare_test/stm32_lcd/fwlib/src/system_stm32f10x.c
src/bare_test/stm32_lcd/keil_clean.bat
src/bare_test/stm32_lcd/main/main.c
src/bare_test/stm32_lcd/st32_lcd.uvgui.USER
src/bare_test/stm32_lcd/st32_lcd.uvopt
src/bare_test/stm32_lcd/st32_lcd.uvproj
src/bare_test/stm32_led/JLinkSettings.ini
src/bare_test/stm32_led/asm/startup_stm32f10x_hd.s
src/bare_test/stm32_led/cmsis/core_cm3.c
src/bare_test/stm32_led/cmsis/core_cm3.h
src/bare_test/stm32_led/cmsis/stm32f10x.h
src/bare_test/stm32_led/cmsis/system_stm32f10x.c
src/bare_test/stm32_led/cmsis/system_stm32f10x.h
src/bare_test/stm32_led/fwlib/inc/misc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_adc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_bkp.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_can.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_cec.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_conf.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_crc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_dac.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_dbgmcu.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_dma.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_exti.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_flash.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_fsmc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_gpio.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_i2c.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_iwdg.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_pwr.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_rcc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_rtc.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_sdio.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_spi.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_tim.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_usart.h
src/bare_test/stm32_led/fwlib/inc/stm32f10x_wwdg.h
src/bare_test/stm32_led/fwlib/src/misc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_adc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_bkp.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_can.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_cec.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_crc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_dac.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_dbgmcu.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_dma.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_exti.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_flash.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_fsmc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_gpio.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_i2c.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_iwdg.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_pwr.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_rcc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_rtc.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_sdio.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_spi.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_tim.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_usart.c
src/bare_test/stm32_led/fwlib/src/stm32f10x_wwdg.c
src/bare_test/stm32_led/fwlib/src/system_stm32f10x.c
src/bare_test/stm32_led/keil_clean.bat
src/bare_test/stm32_led/stm32_led.uvgui.USER
src/bare_test/stm32_led/stm32_led.uvopt
src/bare_test/stm32_led/stm32_led.uvproj
src/bare_test/stm32_led/user/main.c
src/bare_test/stm32_led/user/main.c.dump
src/bare_test/stm32_led/user/stm32f10x_conf.h
src/bare_test/stm32_led/user/stm32f10x_it.c
src/bare_test/stm32_led/user/stm32f10x_it.h
src/bare_test/stm32_ov7670/JLinkSettings.ini
src/bare_test/stm32_ov7670/board/lcd_draw.c
src/bare_test/stm32_ov7670/board/lcd_draw.h
src/bare_test/stm32_ov7670/board/lcd_font.c
src/bare_test/stm32_ov7670/board/lcd_font.h
src/bare_test/stm32_ov7670/board/lcd_font10x14.c
src/bare_test/stm32_ov7670/board/lcd_font10x14.h
src/bare_test/stm32_ov7670/board/lcd_gimp_image.h
src/bare_test/stm32_ov7670/board/lcd_r61509v.c
src/bare_test/stm32_ov7670/board/lcd_r61509v.h
src/bare_test/stm32_ov7670/board/ov7670_reg.h
src/bare_test/stm32_ov7670/board/startup_stm32f10x_hd.s
src/bare_test/stm32_ov7670/board/stm32f10x_conf.h
src/bare_test/stm32_ov7670/board/stm32f10x_it.c
src/bare_test/stm32_ov7670/board/stm32f10x_it.h
src/bare_test/stm32_ov7670/board/stm32v5_led.c
src/bare_test/stm32_ov7670/board/stm32v5_led.h
src/bare_test/stm32_ov7670/board/stm32v5_ov7670.c
src/bare_test/stm32_ov7670/board/stm32v5_ov7670.h
src/bare_test/stm32_ov7670/board/stm32v5_sccb.c
src/bare_test/stm32_ov7670/board/stm32v5_sccb.h
src/bare_test/stm32_ov7670/board/stm32v5_systick.c
src/bare_test/stm32_ov7670/board/stm32v5_systick.h
src/bare_test/stm32_ov7670/board/stm32v5_uart.c
src/bare_test/stm32_ov7670/board/stm32v5_uart.h
src/bare_test/stm32_ov7670/cmsis/core_cm3.c
src/bare_test/stm32_ov7670/cmsis/core_cm3.h
src/bare_test/stm32_ov7670/cmsis/stm32f10x.h
src/bare_test/stm32_ov7670/cmsis/system_stm32f10x.c
src/bare_test/stm32_ov7670/cmsis/system_stm32f10x.h
src/bare_test/stm32_ov7670/fwlib/inc/misc.h
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src/bare_test/stm32_ov7670/fwlib/inc/stm32f10x_bkp.h
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src/os_contiki/contiki/core/net/rime/abc.h
src/os_contiki/contiki/core/net/rime/announcement.c
src/os_contiki/contiki/core/net/rime/announcement.h
src/os_contiki/contiki/core/net/rime/broadcast-announcement.c
src/os_contiki/contiki/core/net/rime/broadcast-announcement.h
src/os_contiki/contiki/core/net/rime/broadcast.c
src/os_contiki/contiki/core/net/rime/broadcast.h
src/os_contiki/contiki/core/net/rime/chameleon-bitopt.c
src/os_contiki/contiki/core/net/rime/chameleon-bitopt.h
src/os_contiki/contiki/core/net/rime/chameleon-raw.c
src/os_contiki/contiki/core/net/rime/chameleon-raw.h
src/os_contiki/contiki/core/net/rime/chameleon.c
src/os_contiki/contiki/core/net/rime/chameleon.h
src/os_contiki/contiki/core/net/rime/channel.c
src/os_contiki/contiki/core/net/rime/channel.h
src/os_contiki/contiki/core/net/rime/collect-link-estimate.c
src/os_contiki/contiki/core/net/rime/collect-link-estimate.h
src/os_contiki/contiki/core/net/rime/collect-neighbor.c
src/os_contiki/contiki/core/net/rime/collect-neighbor.h
src/os_contiki/contiki/core/net/rime/collect.c
src/os_contiki/contiki/core/net/rime/collect.h
src/os_contiki/contiki/core/net/rime/ipolite.c
src/os_contiki/contiki/core/net/rime/ipolite.h
src/os_contiki/contiki/core/net/rime/mesh.c
src/os_contiki/contiki/core/net/rime/mesh.h
src/os_contiki/contiki/core/net/rime/multihop.c
src/os_contiki/contiki/core/net/rime/multihop.h
src/os_contiki/contiki/core/net/rime/neighbor-discovery.c
src/os_contiki/contiki/core/net/rime/neighbor-discovery.h
src/os_contiki/contiki/core/net/rime/netflood.c
src/os_contiki/contiki/core/net/rime/netflood.h
src/os_contiki/contiki/core/net/rime/polite-announcement.c
src/os_contiki/contiki/core/net/rime/polite-announcement.h
src/os_contiki/contiki/core/net/rime/polite.c
src/os_contiki/contiki/core/net/rime/polite.h
src/os_contiki/contiki/core/net/rime/rime-udp.c
src/os_contiki/contiki/core/net/rime/rime-udp.h
src/os_contiki/contiki/core/net/rime/rime.c
src/os_contiki/contiki/core/net/rime/rimeaddr.c
src/os_contiki/contiki/core/net/rime/rimeaddr.h
src/os_contiki/contiki/core/net/rime/rimestats.c
src/os_contiki/contiki/core/net/rime/rimestats.h
src/os_contiki/contiki/core/net/rime/rmh.c
src/os_contiki/contiki/core/net/rime/rmh.h
src/os_contiki/contiki/core/net/rime/route-discovery.c
src/os_contiki/contiki/core/net/rime/route-discovery.h
src/os_contiki/contiki/core/net/rime/route.c
src/os_contiki/contiki/core/net/rime/route.h
src/os_contiki/contiki/core/net/rime/rucb.c
src/os_contiki/contiki/core/net/rime/rucb.h
src/os_contiki/contiki/core/net/rime/rudolph0.c
src/os_contiki/contiki/core/net/rime/rudolph0.h
src/os_contiki/contiki/core/net/rime/rudolph1.c
src/os_contiki/contiki/core/net/rime/rudolph1.h
src/os_contiki/contiki/core/net/rime/rudolph2.c
src/os_contiki/contiki/core/net/rime/rudolph2.h
src/os_contiki/contiki/core/net/rime/runicast.c
src/os_contiki/contiki/core/net/rime/runicast.h
src/os_contiki/contiki/core/net/rime/stbroadcast.c
src/os_contiki/contiki/core/net/rime/stbroadcast.h
src/os_contiki/contiki/core/net/rime/stunicast.c
src/os_contiki/contiki/core/net/rime/stunicast.h
src/os_contiki/contiki/core/net/rime/timesynch.c
src/os_contiki/contiki/core/net/rime/timesynch.h
src/os_contiki/contiki/core/net/rime/trickle.c
src/os_contiki/contiki/core/net/rime/trickle.h
src/os_contiki/contiki/core/net/rime/unicast.c
src/os_contiki/contiki/core/net/rime/unicast.h
src/os_contiki/contiki/core/net/rpl/Makefile.rpl
src/os_contiki/contiki/core/net/rpl/rpl-conf.h
src/os_contiki/contiki/core/net/rpl/rpl-dag.c
src/os_contiki/contiki/core/net/rpl/rpl-ext-header.c
src/os_contiki/contiki/core/net/rpl/rpl-icmp6.c
src/os_contiki/contiki/core/net/rpl/rpl-mrhof.c
src/os_contiki/contiki/core/net/rpl/rpl-of0.c
src/os_contiki/contiki/core/net/rpl/rpl-private.h
src/os_contiki/contiki/core/net/rpl/rpl-timers.c
src/os_contiki/contiki/core/net/rpl/rpl.c
src/os_contiki/contiki/core/net/rpl/rpl.h
src/os_contiki/contiki/core/net/sicslowpan.c
src/os_contiki/contiki/core/net/sicslowpan.h
src/os_contiki/contiki/core/net/simple-udp.c
src/os_contiki/contiki/core/net/simple-udp.h
src/os_contiki/contiki/core/net/slipdev.c
src/os_contiki/contiki/core/net/slipdev.h
src/os_contiki/contiki/core/net/tcpdump.c
src/os_contiki/contiki/core/net/tcpdump.h
src/os_contiki/contiki/core/net/tcpip.c
src/os_contiki/contiki/core/net/tcpip.h
src/os_contiki/contiki/core/net/uaodv-def.h
src/os_contiki/contiki/core/net/uaodv-rt.c
src/os_contiki/contiki/core/net/uaodv-rt.h
src/os_contiki/contiki/core/net/uaodv.c
src/os_contiki/contiki/core/net/uaodv.h
src/os_contiki/contiki/core/net/uip-debug.c
src/os_contiki/contiki/core/net/uip-debug.h
src/os_contiki/contiki/core/net/uip-ds6-nbr.c
src/os_contiki/contiki/core/net/uip-ds6-nbr.h
src/os_contiki/contiki/core/net/uip-ds6-route.c
src/os_contiki/contiki/core/net/uip-ds6-route.h
src/os_contiki/contiki/core/net/uip-ds6.c
src/os_contiki/contiki/core/net/uip-ds6.h
src/os_contiki/contiki/core/net/uip-fw-drv.c
src/os_contiki/contiki/core/net/uip-fw-drv.h
src/os_contiki/contiki/core/net/uip-fw.c
src/os_contiki/contiki/core/net/uip-fw.h
src/os_contiki/contiki/core/net/uip-icmp6.c
src/os_contiki/contiki/core/net/uip-icmp6.h
src/os_contiki/contiki/core/net/uip-nd6.c
src/os_contiki/contiki/core/net/uip-nd6.h
src/os_contiki/contiki/core/net/uip-neighbor.c
src/os_contiki/contiki/core/net/uip-neighbor.h
src/os_contiki/contiki/core/net/uip-over-mesh.c
src/os_contiki/contiki/core/net/uip-over-mesh.h
src/os_contiki/contiki/core/net/uip-packetqueue.c
src/os_contiki/contiki/core/net/uip-packetqueue.h
src/os_contiki/contiki/core/net/uip-split.c
src/os_contiki/contiki/core/net/uip-split.h
src/os_contiki/contiki/core/net/uip-udp-packet.c
src/os_contiki/contiki/core/net/uip-udp-packet.h
src/os_contiki/contiki/core/net/uip.c
src/os_contiki/contiki/core/net/uip.h
src/os_contiki/contiki/core/net/uip6.c
src/os_contiki/contiki/core/net/uip_arch.h
src/os_contiki/contiki/core/net/uip_arp.c
src/os_contiki/contiki/core/net/uip_arp.h
src/os_contiki/contiki/core/net/uiplib.c
src/os_contiki/contiki/core/net/uiplib.h
src/os_contiki/contiki/core/net/uipopt.h
src/os_contiki/contiki/core/sys/arg.c
src/os_contiki/contiki/core/sys/arg.h
src/os_contiki/contiki/core/sys/autostart.c
src/os_contiki/contiki/core/sys/autostart.h
src/os_contiki/contiki/core/sys/cc.h
src/os_contiki/contiki/core/sys/clock.h
src/os_contiki/contiki/core/sys/compower.c
src/os_contiki/contiki/core/sys/compower.h
src/os_contiki/contiki/core/sys/ctimer.c
src/os_contiki/contiki/core/sys/ctimer.h
src/os_contiki/contiki/core/sys/dsc.h
src/os_contiki/contiki/core/sys/energest.c
src/os_contiki/contiki/core/sys/energest.h
src/os_contiki/contiki/core/sys/etimer.c
src/os_contiki/contiki/core/sys/etimer.h
src/os_contiki/contiki/core/sys/lc-addrlabels.h
src/os_contiki/contiki/core/sys/lc-switch.h
src/os_contiki/contiki/core/sys/lc.h
src/os_contiki/contiki/core/sys/loader.h
src/os_contiki/contiki/core/sys/log.h
src/os_contiki/contiki/core/sys/mt.c
src/os_contiki/contiki/core/sys/mt.h
src/os_contiki/contiki/core/sys/node-id.h
src/os_contiki/contiki/core/sys/process.c
src/os_contiki/contiki/core/sys/process.h
src/os_contiki/contiki/core/sys/procinit.c
src/os_contiki/contiki/core/sys/procinit.h
src/os_contiki/contiki/core/sys/profile-aggregates.c
src/os_contiki/contiki/core/sys/profile.c
src/os_contiki/contiki/core/sys/profile.h
src/os_contiki/contiki/core/sys/pt-sem.h
src/os_contiki/contiki/core/sys/pt.h
src/os_contiki/contiki/core/sys/rtimer.c
src/os_contiki/contiki/core/sys/rtimer.h
src/os_contiki/contiki/core/sys/stimer.c
src/os_contiki/contiki/core/sys/stimer.h
src/os_contiki/contiki/core/sys/subprocess.h
src/os_contiki/contiki/core/sys/timer.c
src/os_contiki/contiki/core/sys/timer.h
src/os_contiki/contiki/core/sys/timetable-aggregate.c
src/os_contiki/contiki/core/sys/timetable-aggregate.h
src/os_contiki/contiki/core/sys/timetable.c
src/os_contiki/contiki/core/sys/timetable.h
src/os_contiki/fwlib/inc/misc.h
src/os_contiki/fwlib/inc/stm32f10x_adc.h
src/os_contiki/fwlib/inc/stm32f10x_bkp.h
src/os_contiki/fwlib/inc/stm32f10x_can.h
src/os_contiki/fwlib/inc/stm32f10x_cec.h
src/os_contiki/fwlib/inc/stm32f10x_conf.h
src/os_contiki/fwlib/inc/stm32f10x_crc.h
src/os_contiki/fwlib/inc/stm32f10x_dac.h
src/os_contiki/fwlib/inc/stm32f10x_dbgmcu.h
src/os_contiki/fwlib/inc/stm32f10x_dma.h
src/os_contiki/fwlib/inc/stm32f10x_exti.h
src/os_contiki/fwlib/inc/stm32f10x_flash.h
src/os_contiki/fwlib/inc/stm32f10x_fsmc.h
src/os_contiki/fwlib/inc/stm32f10x_gpio.h
src/os_contiki/fwlib/inc/stm32f10x_i2c.h
src/os_contiki/fwlib/inc/stm32f10x_iwdg.h
src/os_contiki/fwlib/inc/stm32f10x_pwr.h
src/os_contiki/fwlib/inc/stm32f10x_rcc.h
src/os_contiki/fwlib/inc/stm32f10x_rtc.h
src/os_contiki/fwlib/inc/stm32f10x_sdio.h
src/os_contiki/fwlib/inc/stm32f10x_spi.h
src/os_contiki/fwlib/inc/stm32f10x_tim.h
src/os_contiki/fwlib/inc/stm32f10x_usart.h
src/os_contiki/fwlib/inc/stm32f10x_wwdg.h
src/os_contiki/fwlib/src/misc.c
src/os_contiki/fwlib/src/stm32f10x_adc.c
src/os_contiki/fwlib/src/stm32f10x_bkp.c
src/os_contiki/fwlib/src/stm32f10x_can.c
src/os_contiki/fwlib/src/stm32f10x_cec.c
src/os_contiki/fwlib/src/stm32f10x_crc.c
src/os_contiki/fwlib/src/stm32f10x_dac.c
src/os_contiki/fwlib/src/stm32f10x_dbgmcu.c
src/os_contiki/fwlib/src/stm32f10x_dma.c
src/os_contiki/fwlib/src/stm32f10x_exti.c
src/os_contiki/fwlib/src/stm32f10x_flash.c
src/os_contiki/fwlib/src/stm32f10x_fsmc.c
src/os_contiki/fwlib/src/stm32f10x_gpio.c
src/os_contiki/fwlib/src/stm32f10x_i2c.c
src/os_contiki/fwlib/src/stm32f10x_iwdg.c
src/os_contiki/fwlib/src/stm32f10x_pwr.c
src/os_contiki/fwlib/src/stm32f10x_rcc.c
src/os_contiki/fwlib/src/stm32f10x_rtc.c
src/os_contiki/fwlib/src/stm32f10x_sdio.c
src/os_contiki/fwlib/src/stm32f10x_spi.c
src/os_contiki/fwlib/src/stm32f10x_tim.c
src/os_contiki/fwlib/src/stm32f10x_usart.c
src/os_contiki/fwlib/src/stm32f10x_wwdg.c
src/os_contiki/fwlib/src/system_stm32f10x.c
src/os_contiki/keil_clean.bat
src/os_contiki/stm32_contiki.uvgui.USER
src/os_contiki/stm32_contiki.uvopt
src/os_contiki/stm32_contiki.uvproj |
