From f65620d524df2a16958a4be9adc4845ced887902 Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Mon, 06 Nov 2023 15:57:08 +0800
Subject: [PATCH] add linux-imx-lf-6.1.36-2.1.0.patch and remove unused old linux kernel patch

---
 /dev/null                                                    | 2002 ----------------------------------
 kernel/patches/igkboard-6ull/linux-imx-lf-6.1.36-2.1.0.patch | 1467 ++++++++++++-------------
 README.md                                                    |    8 
 3 files changed, 710 insertions(+), 2,767 deletions(-)

diff --git a/README.md b/README.md
index 0da7b86..fca2aa7 100644
--- a/README.md
+++ b/README.md
@@ -132,10 +132,10 @@
 
 下面是IGKBoard当前支持BSP版本及它与Yocto/Android的对应版本关系:
 
-| IMX BSP Version  | Yocto Version      | Android Version |
-| ---------------- | ------------------ | --------------- |
-| lf-6.1.22-2.0.0  | Langdale(4.1)  EOL |                 |
-| lf-5.15.71-2.2.0 | Kirkstone(4.0) LTS | 13.0.0_1.2.0    |
+| IMX BSP Version  | Yocto Version       | Android Version |
+| ---------------- | ------------------- | --------------- |
+| lf-6.1.36-2.1.0  | Mickledore(4.2) NEW | 13.0.0_2.2.0    |
+| lf-5.15.71-2.2.0 | Kirkstone(4.0) LTS  | 13.0.0_1.2.0    |
 
 
 
diff --git a/bootloader/patches/igkboard-6ull/uboot-imx-lf-6.1.22-2.0.0.patch b/bootloader/patches/igkboard-6ull/uboot-imx-lf-6.1.22-2.0.0.patch
deleted file mode 100644
index c412b4b..0000000
--- a/bootloader/patches/igkboard-6ull/uboot-imx-lf-6.1.22-2.0.0.patch
+++ /dev/null
@@ -1,1640 +0,0 @@
-diff -Nuar -x tools uboot-imx/arch/arm/dts/igkboard-6ull.dts uboot-imx-lf-6.1.22-2.0.0/arch/arm/dts/igkboard-6ull.dts
---- uboot-imx/arch/arm/dts/igkboard-6ull.dts	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/arch/arm/dts/igkboard-6ull.dts	2023-07-27 17:43:42.957319406 +0800
-@@ -0,0 +1,377 @@
-+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-+//
-+// Copyright (C) 2023 LingYun IoT System Studio
-+
-+/dts-v1/;
-+
-+#include "imx6ull.dtsi"
-+
-+/ {
-+	model = "LingYun IoT Gateway Kits Board";
-+	compatible = "lingyun,igkboard-6ull", "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
-+
-+	chosen {
-+		stdout-path = &uart1;
-+	};
-+
-+	memory@80000000 {
-+		device_type = "memory";
-+		reg = <0x80000000 0x20000000>;
-+	};
-+
-+	reg_sd1_vmmc: regulator-sd1-vmmc {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VSD_3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
-+		off-on-delay-us = <20000>;
-+		enable-active-high;
-+	};
-+};
-+
-+&fec1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_enet1>;
-+	phy-mode = "rmii";
-+	phy-handle = <&ethphy0>;
-+	phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
-+	phy-reset-duration = <50>;
-+	phy-reset-post-delay = <15>;
-+	status = "okay";
-+};
-+
-+&fec2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_enet2>;
-+	phy-mode = "rmii";
-+	phy-handle = <&ethphy1>;
-+	phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
-+	phy-reset-duration = <50>;
-+	phy-reset-post-delay = <15>;
-+	status = "okay";
-+
-+	mdio {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		ethphy0: ethernet-phy@0 {
-+			reg = <0>;
-+			micrel,led-mode = <1>;
-+			clocks = <&clks IMX6UL_CLK_ENET_REF>;
-+			clock-names = "rmii-ref";
-+		};
-+
-+		ethphy1: ethernet-phy@1 {
-+			reg = <1>;
-+			micrel,led-mode = <1>;
-+			clocks = <&clks IMX6UL_CLK_ENET2_REF>;
-+			clock-names = "rmii-ref";
-+		};
-+	};
-+};
-+
-+&lcdif {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_lcdif_dat
-+		     &pinctrl_lcdif_ctrl>;
-+
-+	display = <&display0>;
-+	status = "okay";
-+
-+	display0: display@0 {
-+		bits-per-pixel = <16>;
-+		bus-width = <16>;
-+
-+		display-timings {
-+			native-mode = <&timing0>;
-+			timing0: timing0 {
-+			clock-frequency = <30000000>;
-+			hactive = <800>;
-+			vactive = <480>;
-+			hfront-porch = <40>;
-+			hback-porch = <88>;
-+			hsync-len = <48>;
-+			vback-porch = <32>;
-+			vfront-porch = <13>;
-+			vsync-len = <3>;
-+
-+			hsync-active = <0>;
-+			vsync-active = <0>;
-+			de-active = <1>;
-+			pixelclk-active = <0>;
-+			};
-+		};
-+	};
-+};
-+
-+&snvs_poweroff {
-+	status = "okay";
-+};
-+
-+&uart1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart1>;
-+	status = "okay";
-+};
-+
-+&usbotg1 {
-+	dr_mode = "otg";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_usb_otg1>;
-+	status = "okay";
-+};
-+
-+&usbotg2 {
-+	dr_mode = "host";
-+	disable-over-current;
-+	status = "okay";
-+};
-+
-+&usbphy1 {
-+	fsl,tx-d-cal = <106>;
-+};
-+
-+&usbphy2 {
-+	fsl,tx-d-cal = <106>;
-+};
-+
-+&usdhc1 {
-+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+	pinctrl-0 = <&pinctrl_usdhc1>;
-+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-+	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-+	keep-power-in-suspend;
-+	wakeup-source;
-+	vmmc-supply = <&reg_sd1_vmmc>;
-+	status = "okay";
-+};
-+
-+&usdhc2 {
-+    pinctrl-names = "default";
-+    pinctrl-0 = <&pinctrl_usdhc2>;
-+    no-1-8-v;
-+    broken-cd;
-+    keep-power-in-suspend;
-+    wakeup-source;
-+    status = "okay";
-+};
-+
-+&wdog1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_wdog>;
-+	fsl,ext-reset-output;
-+};
-+
-+&iomuxc {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_extgpio>;
-+
-+	pinctrl_extgpio: extgpiogrp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x17059 /*	3# I2C1_SDA */
-+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x17059 /*	5# I2C1_SCL */
-+			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x17059 /*	7#	GPIO	*/
-+			MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x17059 /* 11# UART3_TX */
-+			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x17059 /* 13# UART4_TX */
-+			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x17059 /* 15# UART4_RX */
-+			MX6UL_PAD_LCD_DATA22__GPIO3_IO27	0x17059 /* 19# SPI1_MOSI*/
-+			MX6UL_PAD_LCD_DATA23__GPIO3_IO28	0x17059 /* 21# SPI1_MISO*/
-+			MX6UL_PAD_LCD_DATA20__GPIO3_IO25	0x17059 /* 23# SPI1_SCLK*/
-+			MX6UL_PAD_UART3_CTS_B__GPIO1_IO26	0x17059 /* 27# CAN1_TX	*/
-+			MX6UL_PAD_UART3_RTS_B__GPIO1_IO27	0x17059 /* 29# CAN1_RX	*/
-+			MX6UL_PAD_UART2_CTS_B__GPIO1_IO22	0x17059 /* 31# CAN2_TX	*/
-+			MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	0x17059 /* 33# CAN2_RX	*/
-+			MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x17059 /* 35#	GPIO	*/
-+			MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x17059 /* 37#	GPIO	*/
-+			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x17059 /* 8# UART2_TX */
-+			MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x17059 /* 10# UART2_RX */
-+			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x17059 /* 12# UART3_RX */
-+			MX6UL_PAD_LCD_DATA16__GPIO3_IO21	0x17059 /* 16# UART7_TX */
-+			MX6UL_PAD_LCD_DATA17__GPIO3_IO22	0x17059 /* 18# UART7_RX */
-+			MX6UL_PAD_LCD_DATA18__GPIO3_IO23	0x17059 /* 22# GPIO		*/
-+			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x17059 /* 24# SPI1_SS0 */
-+			MX6UL_PAD_LCD_DATA19__GPIO3_IO24	0x17059 /* 26# GPIO		*/
-+			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	0x17059 /* 28# PWM8		*/
-+			MX6UL_PAD_JTAG_TCK__GPIO1_IO14		0x17059 /* 32# PWM7		*/
-+			MX6UL_PAD_JTAG_TMS__GPIO1_IO11		0x17059 /* 36# GPIO */
-+			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x17059 /* 38# GPIO */
-+			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x17059 /* 40# GPIO */
-+		>;
-+	};
-+
-+	pinctrl_enet1: enet1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
-+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
-+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
-+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
-+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
-+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
-+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
-+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
-+			MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0 /* ENET1 RESET */
-+		>;
-+	};
-+
-+	pinctrl_enet2: enet2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x1b0b0
-+			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0
-+			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0
-+			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0
-+			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0
-+			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0
-+			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b0b0
-+			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0
-+			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0
-+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
-+			MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x10B0 /* ENET2 RESET */
-+		>;
-+	};
-+
-+	pinctrl_lcdif_dat: lcdifdatgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
-+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
-+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
-+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
-+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
-+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
-+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
-+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
-+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
-+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
-+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
-+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
-+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
-+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
-+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
-+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
-+		>;
-+	};
-+
-+	pinctrl_lcdif_ctrl: lcdifctrlgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x79
-+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
-+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
-+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
-+			/* used for lcd reset */
-+			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
-+		>;
-+	};
-+
-+	pinctrl_uart1: uart1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
-+		>;
-+	};
-+
-+	pinctrl_usb_otg1: usbotg1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc1: usdhc1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD     	0x17059
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10071
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 	0x17059
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 	0x17059
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 	0x17059
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 	0x17059
-+			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
-+			MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
-+			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
-+		>;
-+	};
-+
-+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
-+
-+		>;
-+	};
-+
-+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
-+		>;
-+	};
-+
-+	pinctrl_usdhc2: usdhc2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x17059
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit: usdhc2grp_8bit {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
-+		>;
-+	};
-+
-+	pinctrl_wdog: wdoggrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
-+		>;
-+	};
-+};
-diff -Nuar -x tools uboot-imx/arch/arm/dts/Makefile uboot-imx-lf-6.1.22-2.0.0/arch/arm/dts/Makefile
---- uboot-imx/arch/arm/dts/Makefile	2023-07-27 16:38:38.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/arch/arm/dts/Makefile	2023-07-27 17:45:05.853229258 +0800
-@@ -936,6 +936,7 @@
- 	imx6ull-kontron-bl.dtb
- 
- dtb-$(CONFIG_MX6ULL) += \
-+	igkboard-6ull.dtb \
- 	imx6ull-14x14-ddr3-val.dtb \
- 	imx6ull-14x14-ddr3-val-epdc.dtb \
- 	imx6ull-14x14-ddr3-val-emmc.dtb \
-diff -Nuar -x tools uboot-imx/arch/arm/mach-imx/mx6/Kconfig uboot-imx-lf-6.1.22-2.0.0/arch/arm/mach-imx/mx6/Kconfig
---- uboot-imx/arch/arm/mach-imx/mx6/Kconfig	2023-07-27 16:38:38.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/arch/arm/mach-imx/mx6/Kconfig	2023-07-27 20:23:32.677280767 +0800
-@@ -157,6 +157,16 @@
- 	prompt "MX6 board select"
- 	optional
- 
-+config TARGET_LINGYUN_IGKBOARD_6ULL
-+	bool "LingYun i.MX6ULL IoT Gateway Kits Board(IGKBoard-6ULL)"
-+	depends on MX6ULL
-+	select BOARD_LATE_INIT
-+	select DM
-+	select DM_THERMAL
-+	select IMX_MODULE_FUSE
-+	select OF_SYSTEM_SETUP
-+	imply CMD_DM
-+
- config TARGET_APALIS_IMX6
- 	bool "Toradex Apalis iMX6 board"
- 	depends on MX6Q
-@@ -901,5 +911,6 @@
- source "board/wandboard/Kconfig"
- source "board/BuR/brppt2/Kconfig"
- source "board/out4/o4-imx6ull-nano/Kconfig"
-+source "board/lingyun/igkboard-6ull/Kconfig"
- 
- endif
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/igkboard-6ull.c uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/igkboard-6ull.c
---- uboot-imx/board/lingyun/igkboard-6ull/igkboard-6ull.c	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/igkboard-6ull.c	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,362 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <init.h>
-+#include <asm/arch/clock.h>
-+#include <asm/arch/iomux.h>
-+#include <asm/arch/imx-regs.h>
-+#include <asm/arch/crm_regs.h>
-+#include <asm/arch/mx6-pins.h>
-+#include <asm/arch/sys_proto.h>
-+#include <asm/global_data.h>
-+#include <asm/gpio.h>
-+#include <asm/mach-imx/iomux-v3.h>
-+#include <asm/mach-imx/boot_mode.h>
-+#include <asm/mach-imx/mxc_i2c.h>
-+#include <asm/io.h>
-+#include <common.h>
-+#include <env.h>
-+#include <fsl_esdhc_imx.h>
-+#include <i2c.h>
-+#include <miiphy.h>
-+#include <linux/sizes.h>
-+#include <linux/delay.h>
-+#include <mmc.h>
-+#include <miiphy.h>
-+#include <power/pmic.h>
-+#include <power/pfuze3000_pmic.h>
-+#include "../../freescale/common/pfuze.h"
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-+	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-+
-+#define I2C_PAD_CTRL    (PAD_CTL_PKE | PAD_CTL_PUE |            \
-+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-+	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |			\
-+	PAD_CTL_ODE)
-+
-+#define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
-+	PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
-+
-+#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
-+#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \
-+			PAD_CTL_SRE_FAST)
-+#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1)
-+
-+
-+#ifdef CONFIG_DM_PMIC
-+int power_init_board(void)
-+{
-+	struct udevice *dev;
-+	int ret, dev_id, rev_id;
-+	unsigned int reg;
-+
-+	ret = pmic_get("pfuze3000@8", &dev);
-+	if (ret == -ENODEV)
-+		return 0;
-+	if (ret != 0)
-+		return ret;
-+
-+	dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
-+	rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
-+	printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
-+
-+	/* disable Low Power Mode during standby mode */
-+	reg = pmic_reg_read(dev, PFUZE3000_LDOGCTL);
-+	reg |= 0x1;
-+	pmic_reg_write(dev, PFUZE3000_LDOGCTL, reg);
-+
-+	/* SW1B step ramp up time from 2us to 4us/25mV */
-+	pmic_reg_write(dev, PFUZE3000_SW1BCONF, 0x40);
-+
-+	/* SW1B mode to APS/PFM */
-+	pmic_reg_write(dev, PFUZE3000_SW1BMODE, 0xc);
-+
-+	/* SW1B standby voltage set to 0.975V */
-+	pmic_reg_write(dev, PFUZE3000_SW1BSTBY, 0xb);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_LDO_BYPASS_CHECK
-+void ldo_mode_set(int ldo_bypass)
-+{
-+	unsigned int value;
-+	u32 vddarm;
-+	struct udevice *dev;
-+	int ret;
-+
-+	ret = pmic_get("pfuze3000@8", &dev);
-+	if (ret == -ENODEV) {
-+		printf("No PMIC found!\n");
-+		return;
-+	}
-+
-+	/* switch to ldo_bypass mode */
-+	if (ldo_bypass) {
-+		prep_anatop_bypass();
-+		/* decrease VDDARM to 1.275V */
-+		value = pmic_reg_read(dev, PFUZE3000_SW1BVOLT);
-+		value &= ~0x1f;
-+		value |= PFUZE3000_SW1AB_SETP(12750);
-+		pmic_reg_write(dev, PFUZE3000_SW1BVOLT, value);
-+
-+		set_anatop_bypass(1);
-+		vddarm = PFUZE3000_SW1AB_SETP(11750);
-+
-+		value = pmic_reg_read(dev, PFUZE3000_SW1BVOLT);
-+		value &= ~0x1f;
-+		value |= vddarm;
-+		pmic_reg_write(dev, PFUZE3000_SW1BVOLT, value);
-+
-+		finish_anatop_bypass();
-+
-+		printf("switch to ldo_bypass mode!\n");
-+	}
-+}
-+#endif
-+#endif
-+
-+int dram_init(void)
-+{
-+	gd->ram_size = imx_ddr_size();
-+
-+	return 0;
-+}
-+
-+static iomux_v3_cfg_t const uart1_pads[] = {
-+	MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-+	MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-+};
-+
-+static void setup_iomux_uart(void)
-+{
-+	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-+}
-+
-+#ifdef CONFIG_FSL_QSPI
-+
-+#ifndef CONFIG_DM_SPI
-+#define QSPI_PAD_CTRL1	\
-+	(PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
-+	 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
-+
-+static iomux_v3_cfg_t const quadspi_pads[] = {
-+	MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+	MX6_PAD_NAND_READY_B__QSPI_A_DATA00 | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+	MX6_PAD_NAND_CE0_B__QSPI_A_DATA01 | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+	MX6_PAD_NAND_CE1_B__QSPI_A_DATA02 | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+	MX6_PAD_NAND_CLE__QSPI_A_DATA03 | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+	MX6_PAD_NAND_DQS__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-+};
-+#endif
-+
-+static int board_qspi_init(void)
-+{
-+#ifndef CONFIG_DM_SPI
-+	/* Set the iomux */
-+	imx_iomux_v3_setup_multiple_pads(quadspi_pads,
-+					 ARRAY_SIZE(quadspi_pads));
-+#endif
-+	/* Set the clock */
-+	enable_qspi_clk(0);
-+
-+	return 0;
-+}
-+#endif
-+
-+#ifdef CONFIG_NAND_MXS
-+static iomux_v3_cfg_t const nand_pads[] = {
-+	MX6_PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+	MX6_PAD_NAND_DQS__RAWNAND_DQS | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
-+};
-+
-+static void setup_gpmi_nand(void)
-+{
-+	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-+
-+	/* config gpmi nand iomux */
-+	imx_iomux_v3_setup_multiple_pads(nand_pads, ARRAY_SIZE(nand_pads));
-+
-+	setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
-+			MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
-+			MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
-+
-+	/* enable apbh clock gating */
-+	setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
-+}
-+#endif
-+
-+#ifdef CONFIG_FEC_MXC
-+static int setup_fec(void)
-+{
-+	struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
-+	int ret;
-+
-+	/*
-+	 * Use 50M anatop loopback REF_CLK1 for ENET1,
-+	 * clear gpr1[13], set gpr1[17].
-+	 */
-+	clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
-+			IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
-+	/*
-+	 * Use 50M anatop loopback REF_CLK2 for ENET2,
-+	 * clear gpr1[14], set gpr1[18].
-+	 */
-+	if (!check_module_fused(MODULE_ENET2)) {
-+		clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
-+				IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
-+	}
-+
-+	ret = enable_fec_anatop_clock(0, ENET_50MHZ);
-+	if (ret)
-+		return ret;
-+
-+	if (!check_module_fused(MODULE_ENET2)) {
-+		ret = enable_fec_anatop_clock(1, ENET_50MHZ);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	enable_enet_clk(1);
-+
-+	return 0;
-+}
-+
-+int board_phy_config(struct phy_device *phydev)
-+{
-+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
-+
-+	if (phydev->drv->config)
-+		phydev->drv->config(phydev);
-+
-+	return 0;
-+}
-+#endif
-+
-+#ifdef CONFIG_DM_VIDEO
-+static iomux_v3_cfg_t const lcd_pads[] = {
-+	/* Use GPIO for Brightness adjustment, duty cycle = period. */
-+	MX6_PAD_GPIO1_IO08__GPIO1_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL),
-+};
-+
-+static int setup_lcd(void)
-+{
-+	enable_lcdif_clock(LCDIF1_BASE_ADDR, 1);
-+
-+	imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
-+
-+	/* Reset the LCD */
-+	gpio_request(IMX_GPIO_NR(5, 9), "lcd reset");
-+	gpio_direction_output(IMX_GPIO_NR(5, 9) , 0);
-+	udelay(500);
-+	gpio_direction_output(IMX_GPIO_NR(5, 9) , 1);
-+
-+	/* Set Brightness to high */
-+	gpio_request(IMX_GPIO_NR(1, 8), "backlight");
-+	gpio_direction_output(IMX_GPIO_NR(1, 8) , 1);
-+
-+	return 0;
-+}
-+#else
-+static inline int setup_lcd(void) { return 0; }
-+#endif
-+
-+int board_early_init_f(void)
-+{
-+	setup_iomux_uart();
-+
-+	return 0;
-+}
-+
-+int board_init(void)
-+{
-+	/* Address of boot parameters */
-+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-+
-+#ifdef	CONFIG_FEC_MXC
-+	setup_fec();
-+#endif
-+
-+#ifdef CONFIG_FSL_QSPI
-+	board_qspi_init();
-+#endif
-+
-+#ifdef CONFIG_NAND_MXS
-+	setup_gpmi_nand();
-+#endif
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_CMD_BMODE
-+static const struct boot_mode board_boot_modes[] = {
-+	/* 4 bit bus width */
-+	{"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)},
-+	{"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
-+	{"qspi1", MAKE_CFGVAL(0x10, 0x00, 0x00, 0x00)},
-+	{NULL,	 0},
-+};
-+#endif
-+
-+int board_late_init(void)
-+{
-+#ifdef CONFIG_CMD_BMODE
-+	add_board_boot_modes(board_boot_modes);
-+#endif
-+
-+	env_set("tee", "no");
-+#ifdef CONFIG_IMX_OPTEE
-+	env_set("tee", "yes");
-+#endif
-+
-+	setup_lcd();
-+
-+#ifdef CONFIG_ENV_IS_IN_MMC
-+	board_late_mmc_env_init();
-+#endif
-+
-+	set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);
-+
-+	return 0;
-+}
-+
-+int checkboard(void)
-+{
-+	if (is_mx6ull_9x9_evk())
-+		puts("Board: MX6ULL 9x9 EVK\n");
-+	else if (is_cpu_type(MXC_CPU_MX6ULZ))
-+		puts("Board: MX6ULZ 14x14 EVK\n");
-+	else
-+		puts("Board: IGKBoard-6ULL\n\n");
-+
-+	return 0;
-+}
-+
-+void board_quiesce_devices(void)
-+{
-+#if defined(CONFIG_VIDEO_MXS)
-+	enable_lcdif_clock(LCDIF1_BASE_ADDR, 0);
-+#endif
-+}
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/imximage.cfg uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/imximage.cfg
---- uboot-imx/board/lingyun/igkboard-6ull/imximage.cfg	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/imximage.cfg	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,120 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
-+ * and create imximage boot image
-+ *
-+ * The syntax is taken as close as possible with the kwbimage
-+ */
-+
-+#include <config.h>
-+
-+/* image version */
-+
-+IMAGE_VERSION 2
-+
-+/*
-+ * Boot Device : one of
-+ * spi/sd/nand/onenand, qspi/nor
-+ */
-+
-+#ifdef CONFIG_QSPI_BOOT
-+BOOT_FROM	qspi
-+#elif defined(CONFIG_NOR_BOOT)
-+BOOT_FROM	nor
-+#else
-+BOOT_FROM	sd
-+#endif
-+
-+#ifdef CONFIG_USE_IMXIMG_PLUGIN
-+/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
-+PLUGIN	board/freescale/mx6ullevk/plugin.bin 0x00907000
-+#else
-+
-+#ifdef CONFIG_IMX_HAB
-+CSF CONFIG_CSF_SIZE
-+#endif
-+
-+/*
-+ * Device Configuration Data (DCD)
-+ *
-+ * Each entry must have the format:
-+ * Addr-type           Address        Value
-+ *
-+ * where:
-+ *	Addr-type register length (1,2 or 4 bytes)
-+ *	Address	  absolute address of the register
-+ *	value	  value to be stored in the register
-+ */
-+
-+/* Enable all clocks */
-+DATA 4 0x020c4068 0xffffffff
-+DATA 4 0x020c406c 0xffffffff
-+DATA 4 0x020c4070 0xffffffff
-+DATA 4 0x020c4074 0xffffffff
-+DATA 4 0x020c4078 0xffffffff
-+DATA 4 0x020c407c 0xffffffff
-+DATA 4 0x020c4080 0xffffffff
-+
-+#ifdef CONFIG_IMX_OPTEE
-+DATA 4 0x20e4024 0x00000001
-+CHECK_BITS_SET 4 0x20e4024 0x1
-+#endif
-+
-+DATA 4 0x020E04B4 0x000C0000
-+DATA 4 0x020E04AC 0x00000000
-+DATA 4 0x020E027C 0x00000030
-+DATA 4 0x020E0250 0x00000030
-+DATA 4 0x020E024C 0x00000030
-+DATA 4 0x020E0490 0x00000030
-+DATA 4 0x020E0288 0x000C0030
-+DATA 4 0x020E0270 0x00000000
-+DATA 4 0x020E0260 0x00000030
-+DATA 4 0x020E0264 0x00000030
-+DATA 4 0x020E04A0 0x00000030
-+DATA 4 0x020E0494 0x00020000
-+DATA 4 0x020E0280 0x00000030
-+DATA 4 0x020E0284 0x00000030
-+DATA 4 0x020E04B0 0x00020000
-+DATA 4 0x020E0498 0x00000030
-+DATA 4 0x020E04A4 0x00000030
-+DATA 4 0x020E0244 0x00000030
-+DATA 4 0x020E0248 0x00000030
-+DATA 4 0x021B001C 0x00008000
-+DATA 4 0x021B0800 0xA1390003
-+DATA 4 0x021B080C 0x00000004
-+DATA 4 0x021B083C 0x41640158
-+DATA 4 0x021B0848 0x40403237
-+DATA 4 0x021B0850 0x40403C33
-+DATA 4 0x021B081C 0x33333333
-+DATA 4 0x021B0820 0x33333333
-+DATA 4 0x021B082C 0xf3333333
-+DATA 4 0x021B0830 0xf3333333
-+DATA 4 0x021B08C0 0x00944009
-+DATA 4 0x021B08b8 0x00000800
-+DATA 4 0x021B0004 0x0002002D
-+DATA 4 0x021B0008 0x1B333030
-+DATA 4 0x021B000C 0x676B52F3
-+DATA 4 0x021B0010 0xB66D0B63
-+DATA 4 0x021B0014 0x01FF00DB
-+DATA 4 0x021B0018 0x00201740
-+DATA 4 0x021B001C 0x00008000
-+DATA 4 0x021B002C 0x000026D2
-+DATA 4 0x021B0030 0x006B1023
-+DATA 4 0x021B0040 0x0000004F
-+DATA 4 0x021B0000 0x84180000
-+DATA 4 0x021B0890 0x00400000
-+DATA 4 0x021B001C 0x02008032
-+DATA 4 0x021B001C 0x00008033
-+DATA 4 0x021B001C 0x00048031
-+DATA 4 0x021B001C 0x15208030
-+DATA 4 0x021B001C 0x04008040
-+DATA 4 0x021B0020 0x00000800
-+DATA 4 0x021B0818 0x00000227
-+DATA 4 0x021B0004 0x0002552D
-+DATA 4 0x021B0404 0x00011006
-+DATA 4 0x021B001C 0x00000000
-+
-+#endif
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg
---- uboot-imx/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/imximage_lpddr2.cfg	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,125 @@
-+/*
-+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * SPDX-License-Identifier:	GPL-2.0+
-+ *
-+ * Refer docs/README.imxmage for more details about how-to configure
-+ * and create imximage boot image
-+ *
-+ * The syntax is taken as close as possible with the kwbimage
-+ */
-+
-+#include <config.h>
-+
-+/* image version */
-+
-+IMAGE_VERSION 2
-+
-+/*
-+ * Boot Device : one of
-+ * spi/sd/nand/onenand, qspi/nor
-+ */
-+
-+#ifdef CONFIG_QSPI_BOOT
-+BOOT_FROM	qspi
-+#elif defined(CONFIG_NOR_BOOT)
-+BOOT_FROM	nor
-+#else
-+BOOT_FROM	sd
-+#endif
-+
-+#ifdef CONFIG_USE_IMXIMG_PLUGIN
-+/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
-+PLUGIN	board/lingyun/igkboard-6ull/plugin.bin 0x00907000
-+#else
-+
-+#ifdef CONFIG_IMX_HAB
-+CSF CONFIG_CSF_SIZE
-+#endif
-+
-+/*
-+ * Device Configuration Data (DCD)
-+ *
-+ * Each entry must have the format:
-+ * Addr-type           Address        Value
-+ *
-+ * where:
-+ *	Addr-type register length (1,2 or 4 bytes)
-+ *	Address	  absolute address of the register
-+ *	value	  value to be stored in the register
-+ */
-+
-+DATA 4 0x020c4068 0xffffffff
-+DATA 4 0x020c406c 0xffffffff
-+DATA 4 0x020c4070 0xffffffff
-+DATA 4 0x020c4074 0xffffffff
-+DATA 4 0x020c4078 0xffffffff
-+DATA 4 0x020c407c 0xffffffff
-+DATA 4 0x020c4080 0xffffffff
-+
-+#ifdef CONFIG_IMX_OPTEE
-+DATA 4 0x20e4024 0x00000001
-+CHECK_BITS_SET 4 0x20e4024 0x1
-+#endif
-+
-+DATA 4 0x020E04B4 0x00080000
-+DATA 4 0x020E04AC 0x00000000
-+DATA 4 0x020E027C 0x00000030
-+DATA 4 0x020E0250 0x00000030
-+DATA 4 0x020E024C 0x00000030
-+DATA 4 0x020E0490 0x00000030
-+DATA 4 0x020E0288 0x00000030
-+DATA 4 0x020E0270 0x00000000
-+DATA 4 0x020E0260 0x00000000
-+DATA 4 0x020E0264 0x00000000
-+DATA 4 0x020E04A0 0x00000030
-+DATA 4 0x020E0494 0x00020000
-+DATA 4 0x020E0280 0x00003030
-+DATA 4 0x020E0284 0x00003030
-+DATA 4 0x020E04B0 0x00020000
-+DATA 4 0x020E0498 0x00000030
-+DATA 4 0x020E04A4 0x00000030
-+DATA 4 0x020E0244 0x00000030
-+DATA 4 0x020E0248 0x00000030
-+
-+DATA 4 0x021B001C 0x00008000
-+DATA 4 0x021B085C 0x1b4700c7
-+DATA 4 0x021B0800 0xA1390003
-+DATA 4 0x021B0890 0x23400A38
-+DATA 4 0x021B08b8 0x00000800
-+
-+DATA 4 0x021B081C 0x33333333
-+DATA 4 0x021B0820 0x33333333
-+DATA 4 0x021B082C 0xf3333333
-+DATA 4 0x021B0830 0xf3333333
-+DATA 4 0x021B083C 0x20000000
-+DATA 4 0x021B0848 0x40403439
-+DATA 4 0x021B0850 0x4040342D
-+DATA 4 0x021B08C0 0x00921012
-+DATA 4 0x021B08b8 0x00000800
-+
-+DATA 4 0x021B0004 0x00020052
-+DATA 4 0x021B0008 0x00000000
-+DATA 4 0x021B000C 0x33374133
-+DATA 4 0x021B0010 0x00100A82
-+DATA 4 0x021B0038 0x00170557
-+DATA 4 0x021B0014 0x00000093
-+DATA 4 0x021B0018 0x00201748
-+DATA 4 0x021B002C 0x0F9F26D2
-+DATA 4 0x021B0030 0x009F0010
-+DATA 4 0x021B0040 0x00000047
-+DATA 4 0x021B0000 0x83100000
-+DATA 4 0x021B001C 0x00008010
-+DATA 4 0x021B001C 0x003F8030
-+DATA 4 0x021B001C 0xFF0A8030
-+DATA 4 0x021B001C 0x82018030
-+DATA 4 0x021B001C 0x04028030
-+DATA 4 0x021B001C 0x01038030
-+DATA 4 0x021B0020 0x00001800
-+DATA 4 0x021B0818 0x00000000
-+DATA 4 0x021B0800 0xA1310003
-+DATA 4 0x021B0004 0x00025552
-+DATA 4 0x021B0404 0x00011006
-+DATA 4 0x021B001C 0x00000000
-+#endif
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/Kconfig uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/Kconfig
---- uboot-imx/board/lingyun/igkboard-6ull/Kconfig	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/Kconfig	2023-07-27 17:55:20.246989410 +0800
-@@ -0,0 +1,14 @@
-+if TARGET_LINGYUN_IGKBOARD_6ULL
-+
-+config SYS_BOARD
-+	default "igkboard-6ull"
-+
-+config SYS_VENDOR
-+	default "lingyun"
-+
-+config SYS_CONFIG_NAME
-+	default "igkboard-6ull"
-+
-+config TEXT_BASE
-+	default 0x87800000
-+endif
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/MAINTAINERS uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/MAINTAINERS
---- uboot-imx/board/lingyun/igkboard-6ull/MAINTAINERS	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/MAINTAINERS	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,7 @@
-+LingYun i.MX6ULL IoT Gateway Board(IGKBoard-6ULL)
-+M:	Guo Wenxue <guowenxue@gmail.com>
-+S:	Maintained
-+F:	board/lingyun/igkboard-6ull/
-+F:	include/configs/igkboard-6ull.h
-+F:	configs/igkboard-6ull_defconfig
-+
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/Makefile uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/Makefile
---- uboot-imx/board/lingyun/igkboard-6ull/Makefile	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/Makefile	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,5 @@
-+# SPDX-License-Identifier: GPL-2.0+
-+# (C) Copyright 2016 Freescale Semiconductor, Inc.
-+
-+obj-y  := igkboard-6ull.o
-+obj-y  += ../../freescale/common/mmc.o
-diff -Nuar -x tools uboot-imx/board/lingyun/igkboard-6ull/plugin.S uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/plugin.S
---- uboot-imx/board/lingyun/igkboard-6ull/plugin.S	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/board/lingyun/igkboard-6ull/plugin.S	2023-07-27 17:48:04.336816243 +0800
-@@ -0,0 +1,263 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <config.h>
-+
-+/* DDR script */
-+.macro imx6ull_ddr3_evk_setting
-+	ldr r0, =IOMUXC_BASE_ADDR
-+	ldr r1, =0x000C0000
-+	str r1, [r0, #0x4B4]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x4AC]
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x27C]
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x250]
-+	str r1, [r0, #0x24C]
-+	str r1, [r0, #0x490]
-+	ldr r1, =0x000C0030
-+	str r1, [r0, #0x288]
-+
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x270]
-+
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x260]
-+	str r1, [r0, #0x264]
-+	str r1, [r0, #0x4A0]
-+
-+	ldr r1, =0x00020000
-+	str r1, [r0, #0x494]
-+
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x280]
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x284]
-+
-+	ldr r1, =0x00020000
-+	str r1, [r0, #0x4B0]
-+
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x498]
-+	str r1, [r0, #0x4A4]
-+	str r1, [r0, #0x244]
-+	str r1, [r0, #0x248]
-+
-+	ldr r0, =MMDC_P0_BASE_ADDR
-+	ldr r1, =0x00008000
-+	str r1, [r0, #0x1C]
-+	ldr r1, =0xA1390003
-+	str r1, [r0, #0x800]
-+	ldr r1, =0x00000004
-+	str r1, [r0, #0x80C]
-+	ldr r1, =0x41640158
-+	str r1, [r0, #0x83C]
-+	ldr r1, =0x40403237
-+	str r1, [r0, #0x848]
-+	ldr r1, =0x40403C33
-+	str r1, [r0, #0x850]
-+	ldr r1, =0x33333333
-+	str r1, [r0, #0x81C]
-+	str r1, [r0, #0x820]
-+	ldr r1, =0xF3333333
-+	str r1, [r0, #0x82C]
-+	str r1, [r0, #0x830]
-+	ldr r1, =0x00944009
-+	str r1, [r0, #0x8C0]
-+	ldr r1, =0x00000800
-+	str r1, [r0, #0x8B8]
-+	ldr r1, =0x0002002D
-+	str r1, [r0, #0x004]
-+	ldr r1, =0x1B333030
-+	str r1, [r0, #0x008]
-+	ldr r1, =0x676B52F3
-+	str r1, [r0, #0x00C]
-+	ldr r1, =0xB66D0B63
-+	str r1, [r0, #0x010]
-+	ldr r1, =0x01FF00DB
-+	str r1, [r0, #0x014]
-+	ldr r1, =0x00201740
-+	str r1, [r0, #0x018]
-+	ldr r1, =0x00008000
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x000026D2
-+	str r1, [r0, #0x02C]
-+	ldr r1, =0x006B1023
-+	str r1, [r0, #0x030]
-+	ldr r1, =0x0000004F
-+	str r1, [r0, #0x040]
-+	ldr r1, =0x84180000
-+	str r1, [r0, #0x000]
-+	ldr r1, =0x00400000
-+	str r1, [r0, #0x890]
-+	ldr r1, =0x02008032
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x00008033
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x00048031
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x15208030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x04008040
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x00000800
-+	str r1, [r0, #0x020]
-+	ldr r1, =0x00000227
-+	str r1, [r0, #0x818]
-+	ldr r1, =0x0002552D
-+	str r1, [r0, #0x004]
-+	ldr r1, =0x00011006
-+	str r1, [r0, #0x404]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x01C]
-+.endm
-+
-+.macro imx6ull_lpddr2_evk_setting
-+	ldr r0, =IOMUXC_BASE_ADDR
-+	ldr r1, =0x00080000
-+	str r1, [r0, #0x4B4]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x4AC]
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x27C]
-+	str r1, [r0, #0x250]
-+	str r1, [r0, #0x24C]
-+	str r1, [r0, #0x490]
-+	str r1, [r0, #0x288]
-+
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x270]
-+	str r1, [r0, #0x260]
-+	str r1, [r0, #0x264]
-+
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x4A0]
-+
-+	ldr r1, =0x00020000
-+	str r1, [r0, #0x494]
-+
-+	ldr r1, =0x00003030
-+	str r1, [r0, #0x280]
-+	ldr r1, =0x00003030
-+	str r1, [r0, #0x284]
-+
-+	ldr r1, =0x00020000
-+	str r1, [r0, #0x4B0]
-+
-+	ldr r1, =0x00000030
-+	str r1, [r0, #0x498]
-+	str r1, [r0, #0x4A4]
-+	str r1, [r0, #0x244]
-+	str r1, [r0, #0x248]
-+
-+	ldr r0, =MMDC_P0_BASE_ADDR
-+	ldr r1, =0x00008000
-+	str r1, [r0, #0x1C]
-+	ldr r1, =0x1b4700c7
-+	str r1, [r0, #0x85c]
-+	ldr r1, =0xA1390003
-+	str r1, [r0, #0x800]
-+	ldr r1, =0x23400A38
-+	str r1, [r0, #0x890]
-+	ldr r1, =0x00000800
-+	str r1, [r0, #0x8b8]
-+	ldr r1, =0x33333333
-+	str r1, [r0, #0x81C]
-+	str r1, [r0, #0x820]
-+	ldr r1, =0xF3333333
-+	str r1, [r0, #0x82C]
-+	str r1, [r0, #0x830]
-+	ldr r1, =0x20000000
-+	str r1, [r0, #0x83C]
-+	ldr r1, =0x40403439
-+	str r1, [r0, #0x848]
-+	ldr r1, =0x4040342D
-+	str r1, [r0, #0x850]
-+	ldr r1, =0x00921012
-+	str r1, [r0, #0x8C0]
-+	ldr r1, =0x00000800
-+	str r1, [r0, #0x8B8]
-+
-+	ldr r1, =0x00020052
-+	str r1, [r0, #0x004]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x008]
-+	ldr r1, =0x33374133
-+	str r1, [r0, #0x00C]
-+	ldr r1, =0x00100A82
-+	str r1, [r0, #0x010]
-+	ldr r1, =0x00170557
-+	str r1, [r0, #0x038]
-+	ldr r1, =0x00000093
-+	str r1, [r0, #0x014]
-+	ldr r1, =0x00201748
-+	str r1, [r0, #0x018]
-+	ldr r1, =0x0F9F26D2
-+	str r1, [r0, #0x02C]
-+	ldr r1, =0x009F0010
-+	str r1, [r0, #0x030]
-+	ldr r1, =0x00000047
-+	str r1, [r0, #0x040]
-+	ldr r1, =0x83100000
-+	str r1, [r0, #0x000]
-+	ldr r1, =0x00008010
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x003F8030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0xFF0A8030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x82018030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x04028030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x01038030
-+	str r1, [r0, #0x01C]
-+	ldr r1, =0x00001800
-+	str r1, [r0, #0x020]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x818]
-+	ldr r1, =0xA1310003
-+	str r1, [r0, #0x800]
-+	ldr r1, =0x00025552
-+	str r1, [r0, #0x004]
-+	ldr r1, =0x00011006
-+	str r1, [r0, #0x404]
-+	ldr r1, =0x00000000
-+	str r1, [r0, #0x01C]
-+.endm
-+
-+.macro imx6_clock_gating
-+	ldr r0, =CCM_BASE_ADDR
-+	ldr r1, =0xFFFFFFFF
-+	str r1, [r0, #0x68]
-+	str r1, [r0, #0x6C]
-+	str r1, [r0, #0x70]
-+	str r1, [r0, #0x74]
-+	str r1, [r0, #0x78]
-+	str r1, [r0, #0x7C]
-+	str r1, [r0, #0x80]
-+
-+#ifdef CONFIG_IMX_OPTEE
-+	ldr r0, =0x20e4024
-+	ldr r1, =0x1
-+	str r1, [r0]
-+#endif
-+.endm
-+
-+.macro imx6_qos_setting
-+.endm
-+
-+.macro imx6_ddr_setting
-+#if defined (CONFIG_TARGET_MX6ULL_9X9_EVK)
-+	imx6ull_lpddr2_evk_setting
-+#else
-+	imx6ull_ddr3_evk_setting
-+#endif
-+.endm
-+
-+/* include the common plugin code here */
-+#include <asm/arch/mx6_plugin.S>
-diff -Nuar -x tools uboot-imx/configs/igkboard-6ull_defconfig uboot-imx-lf-6.1.22-2.0.0/configs/igkboard-6ull_defconfig
---- uboot-imx/configs/igkboard-6ull_defconfig	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/configs/igkboard-6ull_defconfig	2023-07-27 20:14:55.310174376 +0800
-@@ -0,0 +1,86 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_MX6=y
-+CONFIG_SYS_MALLOC_LEN=0x1000000
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_ENV_SIZE=0x2000
-+CONFIG_ENV_OFFSET=0xE0000
-+CONFIG_IMX_CONFIG="board/lingyun/igkboard-6ull/imximage.cfg"
-+CONFIG_MX6ULL=y
-+CONFIG_TARGET_LINGYUN_IGKBOARD_6ULL=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DEFAULT_DEVICE_TREE="igkboard-6ull"
-+CONFIG_SYS_PROMPT="[u-boot@igkboard]# "
-+CONFIG_SYS_MEMTEST_START=0x80000000
-+CONFIG_SYS_MEMTEST_END=0x88000000
-+CONFIG_SUPPORT_RAW_INITRD=y
-+CONFIG_BOOTDELAY=3
-+CONFIG_USE_BOOTCOMMAND=y
-+CONFIG_ARCH_MISC_INIT=y
-+CONFIG_BOARD_EARLY_INIT_F=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_CMD_BOOTZ=y
-+CONFIG_CRC32_VERIFY=y
-+CONFIG_CMD_MEMTEST=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_USB_MASS_STORAGE=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_RNG=y
-+CONFIG_CMD_EXT2=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_EXT4_WRITE=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_OF_CONTROL=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SYS_MMC_ENV_DEV=1
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_BOUNCE_BUFFER=y
-+CONFIG_FSL_DCP_RNG=y
-+CONFIG_USB_FUNCTION_FASTBOOT=y
-+CONFIG_FASTBOOT_BUF_ADDR=0x83800000
-+CONFIG_FASTBOOT_BUF_SIZE=0x40000000
-+CONFIG_FASTBOOT_FLASH=y
-+CONFIG_DM_74X164=y
-+CONFIG_DM_I2C=y
-+CONFIG_SYS_I2C_MXC=y
-+CONFIG_FSL_USDHC=y
-+CONFIG_MTD=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SF_DEFAULT_SPEED=40000000
-+CONFIG_SPI_FLASH_STMICRO=y
-+CONFIG_PHYLIB=y
-+CONFIG_PHY_MICREL=y
-+CONFIG_PHY_MICREL_KSZ8XXX=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_FEC_MXC=y
-+CONFIG_MII=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCTRL_IMX6=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_RNG=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MXC_UART=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_FSL_QSPI=y
-+CONFIG_SOFT_SPI=y
-+CONFIG_IMX_THERMAL=y
-+CONFIG_USB=y
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB_HOST_ETHER=y
-+CONFIG_USB_ETHER_ASIX=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_MANUFACTURER="FSL"
-+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-+CONFIG_CI_UDC=y
-+CONFIG_OF_LIBFDT_OVERLAY=y
-diff -Nuar -x tools uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c uboot-imx-lf-6.1.22-2.0.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c
---- uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c	2023-07-27 16:38:39.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/drivers/fastboot/fb_fsl/fb_fsl_partitions.c	2023-07-27 17:49:17.732576670 +0800
-@@ -188,6 +188,12 @@
- 			user_partition = FASTBOOT_MMC_USER_PARTITION_ID;
- 			boot_loader_psize = mmc->capacity_boot;
- 		}
-+
-+		/* add by guowenxue to export mmc_no env */
-+		env_set_ulong("mmc_no", mmc_no);
-+		env_set_ulong("mmcdev", mmc_no);
-+		env_set_ulong("emmc_dev", mmc_no);
-+		env_set_ulong("emmc_ack", mmc_no);
- 	} else {
- 		printf("Can't setup partition table on this device %d\n",
- 			fastboot_devinfo.type);
-diff -Nuar -x tools uboot-imx/drivers/net/phy/phy.c uboot-imx-lf-6.1.22-2.0.0/drivers/net/phy/phy.c
---- uboot-imx/drivers/net/phy/phy.c	2023-07-27 16:38:39.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/drivers/net/phy/phy.c	2023-07-27 17:50:25.868324851 +0800
-@@ -182,6 +182,8 @@
- {
- 	int result;
- 
-+	phy_reset(phydev); /* Add by guowenxue to reset the ethernet phy */
-+
- 	if (phydev->autoneg != AUTONEG_ENABLE)
- 		return genphy_setup_forced(phydev);
- 
-diff -Nuar -x tools uboot-imx/include/configs/igkboard-6ull.h uboot-imx-lf-6.1.22-2.0.0/include/configs/igkboard-6ull.h
---- uboot-imx/include/configs/igkboard-6ull.h	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/include/configs/igkboard-6ull.h	2023-07-27 20:05:52.297648027 +0800
-@@ -0,0 +1,111 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright (C) 2023 LingYun IoT System Studio
-+ *
-+ * Configuration settings for LingYun IGKBoard(IoT Gateway Kits Board) based on i.MX6ULL
-+ */
-+#ifndef __IGKBOARD_6ULL_CONFIG_H
-+#define __IGKBOARD_6ULL_CONFIG_H
-+
-+#include <asm/arch/imx-regs.h>
-+#include <linux/sizes.h>
-+#include <linux/stringify.h>
-+#include "mx6_common.h"
-+#include <asm/mach-imx/gpio.h>
-+#include "imx_env.h"
-+#include "igkboard-dtoverlay.h"
-+
-+#define is_mx6ull_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6ULL_9X9_EVK)
-+
-+#ifdef CONFIG_TARGET_MX6ULL_9X9_EVK
-+#define PHYS_SDRAM_SIZE		SZ_256M
-+#define BOOTARGS_CMA_SIZE   "cma=96M "
-+#else
-+#define PHYS_SDRAM_SIZE		SZ_512M
-+#define BOOTARGS_CMA_SIZE   ""
-+/* DCDC used on 14x14 EVK, no PMIC */
-+#undef CONFIG_LDO_BYPASS_CHECK
-+#endif
-+
-+#define CFG_MXC_UART_BASE			UART1_BASE
-+
-+/* MMC Configs */
-+#ifdef CONFIG_FSL_USDHC
-+#define CFG_SYS_FSL_ESDHC_ADDR		USDHC2_BASE_ADDR
-+
-+/* NAND pin conflicts with usdhc2 */
-+#ifdef CONFIG_NAND_MXS
-+#define CONFIG_SYS_FSL_USDHC_NUM	1
-+#else
-+#define CONFIG_SYS_FSL_USDHC_NUM	2
-+#endif
-+
-+#endif
-+
-+
-+#ifdef CONFIG_NAND_BOOT
-+#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandkernel),16m(nanddtb),16m(nandtee),-(nandrootfs)"
-+#else
-+#define MFG_NAND_PARTITION ""
-+#endif
-+
-+#define CFG_MFG_ENV_SETTINGS \
-+	CFG_MFG_ENV_SETTINGS_DEFAULT \
-+	"initrd_addr=0x86800000\0" \
-+	"initrd_high=0xffffffff\0" \
-+	"emmc_dev=1\0"\
-+	"emmc_ack=1\0"\
-+	"sd_dev=1\0" \
-+	"mtdparts=" MFG_NAND_PARTITION \
-+	"\0"\
-+
-+#define CFG_EXTRA_ENV_SETTINGS \
-+	"console=ttymxc0\0" \
-+    "upmode=fastboot 0\0" \
-+	"envconf=config.txt\0" \
-+	"image=zImage\0" \
-+	"board=igkboard-6ull\0" \
-+	"fdt_file=igkboard-6ull.dtb\0" \
-+	"fdt_size=0x10000\0" \
-+	"fdt_addr=0x83000000\0" \
-+	"dtbo_addr=0x83010000\0" \
-+	"dtbo_dir=overlays\0" \
-+	"splashimage=0x8c000000\0" \
-+    "ipaddr=192.168.2.22\0" \
-+    "serverip=192.168.2.2\0" \
-+    "mmcpart=1\0" \
-+    "mmcargs=setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmc_no}p2 rootwait rw net.ifnames=0\0" \
-+    "loadenvconf=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${envconf};env import -t ${loadaddr} ${filesize}\0" \
-+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
-+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
-+    "bootos=bootz ${loadaddr} - ${fdt_addr}\0" \
-+	"mmcboot=mmc dev ${mmcdev};run mmcargs;run loadimage;run loadfdt;run bootos\0" \
-+    "netboot=tftp $loadaddr $image; tftp $fdt_addr ${fdt_file}; run mmcargs; run bootos\0" \
-+    "bbl=tftp ${loadaddr} u-boot-${board}.imx && mmc dev ${mmcdev} 1 && mmc write ${loadaddr} 2 0x800\0" \
-+    "bdtb=tftp $fdt_addr $fdt_file && fatwrite mmc 1:1 $fdt_addr $fdt_file $filesize\0" \
-+    "bker=tftp $loadaddr $image&& fatwrite mmc 1:1 $loadaddr $image $filesize\0" \
-+    "bsys=run bdtb && run bker\0"
-+
-+#ifdef IGKBOARD_DTOVERLAY_SUPPORT
-+#undef  CONFIG_BOOTCOMMAND
-+#define CONFIG_BOOTCOMMAND      MMC_BOOT_WITH_FDT_OVERLAY
-+#endif
-+
-+/* Miscellaneous configurable options */
-+
-+/* Physical Memory Map */
-+#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
-+
-+#define CFG_SYS_SDRAM_BASE		PHYS_SDRAM
-+#define CFG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
-+#define CFG_SYS_INIT_RAM_SIZE	IRAM_SIZE
-+
-+#define CONFIG_ETHPRIME			"eth1"
-+
-+#ifndef CONFIG_SPL_BUILD
-+#if defined(CONFIG_DM_VIDEO)
-+#define CONFIG_VIDEO_LINK
-+#endif
-+#endif
-+
-+#endif
-diff -Nuar -x tools uboot-imx/include/configs/igkboard-dtoverlay.h uboot-imx-lf-6.1.22-2.0.0/include/configs/igkboard-dtoverlay.h
---- uboot-imx/include/configs/igkboard-dtoverlay.h	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-lf-6.1.22-2.0.0/include/configs/igkboard-dtoverlay.h	2023-07-27 17:51:05.072168558 +0800
-@@ -0,0 +1,60 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright (C) 2023 LingYun IoT System Studio
-+ *
-+ */
-+#ifndef __IGKBOARD_DTOVERLAY_H
-+#define __IGKBOARD_DTOVERLAY_H
-+
-+#define IGKBOARD_DTOVERLAY_SUPPORT
-+
-+#define FDT_APPLY_OVERLAY()          \
-+    "echo Applying DT overlay => ${dtbo_file}; " \
-+    "fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file}; " \
-+    "fdt addr ${fdt_addr}; " \
-+    "fdt resize ${fdt_size}; " \
-+    "fdt apply ${dtbo_addr}; "
-+
-+#define CHECK_APPLY_OVERLAY( name )     \
-+    "if env exists dtoverlay_" name " && test ${dtoverlay_" name "} = 1 -o ${dtoverlay_" name "} = yes ; then " \
-+        "setenv dtbo_file " name ".dtbo; " \
-+        FDT_APPLY_OVERLAY() \
-+    "fi; "
-+
-+#define CHECK_APPLY_OVERLAYS_IDX( name )     \
-+    "if env exists dtoverlay_" name "; then " \
-+        "for i in ${dtoverlay_" name "}; do " \
-+            "setenv dtbo_file " name "$i.dtbo; " \
-+            FDT_APPLY_OVERLAY() \
-+        " done;" \
-+    "fi; "
-+
-+#define CHECK_APPLY_OVERLAYS_DTBO( name )     \
-+    "if env exists dtoverlay_" name "; then " \
-+        "for f in ${dtoverlay_" name "}; do " \
-+            "setenv dtbo_file $f.dtbo; " \
-+            FDT_APPLY_OVERLAY() \
-+        " done;" \
-+    "fi; "
-+
-+#define FDT_ENTRY_DEF_SETTINGS          \
-+                CHECK_APPLY_OVERLAY("lcd") \
-+                CHECK_APPLY_OVERLAY("cam") \
-+                CHECK_APPLY_OVERLAY("w1") \
-+                CHECK_APPLY_OVERLAY("adc") \
-+                CHECK_APPLY_OVERLAYS_IDX("i2c") \
-+                CHECK_APPLY_OVERLAYS_IDX("spi") \
-+                CHECK_APPLY_OVERLAYS_IDX("uart") \
-+                CHECK_APPLY_OVERLAYS_IDX("can") \
-+                CHECK_APPLY_OVERLAYS_IDX("pwm") \
-+                CHECK_APPLY_OVERLAYS_DTBO("extra") \
-+
-+
-+#define MMC_BOOT_WITH_FDT_OVERLAY   \
-+    "mmc dev ${mmcdev};"            \
-+    "run mmcargs; run loadenvconf;" \
-+    "run loadimage; run loadfdt; "  \
-+    FDT_ENTRY_DEF_SETTINGS          \
-+    "run bootos; "                 \
-+
-+#endif  /* __IGKBOARD_DTOVERLAY_H */
diff --git a/kernel/patches/igkboard-6ull/linux-imx-lf-5.10.52-2.1.0.patch b/kernel/patches/igkboard-6ull/linux-imx-lf-5.10.52-2.1.0.patch
deleted file mode 100644
index 8037445..0000000
--- a/kernel/patches/igkboard-6ull/linux-imx-lf-5.10.52-2.1.0.patch
+++ /dev/null
@@ -1,2002 +0,0 @@
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/igkboard.dts
---- linux-imx/arch/arm/boot/dts/igkboard.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/igkboard.dts	2022-10-09 13:19:22.622732242 +0800
-@@ -0,0 +1,608 @@
-+/*
-+ * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board)
-+ * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
-+ *
-+ * Copyright (C) 2022 LingYun IoT System Studio.
-+ * Author: Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "imx6ull.dtsi"
-+
-+/ {
-+	model = "LingYun IoT System Studio IoT Gateway Board";
-+	compatible = "lingyun,igkboard", "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
-+
-+	chosen {
-+		stdout-path = &uart1;
-+	};
-+
-+	memory@80000000 {
-+		device_type = "memory";
-+		reg = <0x80000000 0x20000000>;
-+	};
-+
-+	reserved-memory {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		linux,cma {
-+			compatible = "shared-dma-pool";
-+			reusable;
-+			size = <0xa000000>;
-+			linux,cma-default;
-+		};
-+	};
-+
-+	buzzer: pwm-buzzer {
-+		compatible = "pwm-beeper";
-+		pwms = <&pwm2 0 500000>;
-+		status = "okay";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_gpio_leds>;
-+		status = "okay";
-+
-+		sysled {
-+			lable = "sysled";
-+			gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "heartbeat";
-+			default-state = "off";
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_gpio_keys>;
-+		autorepeat;
-+		status = "okay";
-+
-+		key_user {
-+			lable = "key_user";
-+			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_ENTER>;
-+		};
-+	};
-+
-+	pxp_v4l2 {
-+		compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
-+		status = "okay";
-+	};
-+
-+	reg_sd1_vmmc: regulator-sd1-vmmc {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VSD_3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		off-on-delay-us = <20000>;
-+		enable-active-high;
-+	};
-+
-+	reg_peri_3v3: regulator-peri-3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VPERI_3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		/*
-+		 * If you want to want to make this dynamic please
-+		 * check schematics and test all affected peripherals:
-+		 *
-+		 * - sensors
-+		 * - ethernet phy
-+		 * - can
-+		 * - bluetooth
-+		 * - wm8960 audio codec
-+		 * - ov5640 camera
-+		 */
-+		regulator-always-on;
-+	};
-+
-+	reg_can_3v3: regulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "can-3v3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: 3p3v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "3P3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_1p8v: 1p8v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "1P8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	backlight_lcd: backlight-lcd {
-+		compatible = "pwm-backlight";
-+		pwms = <&pwm1 0 5000000>;
-+		brightness-levels = <0 4 8 16 32 64 128 255>;
-+		default-brightness-level = <7>;
-+		power-supply = <&reg_3p3v>;
-+		status = "disabled"; /* Enable in LCD overlay */
-+	};
-+
-+	/* 1-Wire sentinel for overlay */
-+	w1: w1 {
-+		compatible = "w1-gpio";
-+		status = "disabled";
-+	};
-+
-+	mqs: mqs {
-+		#sound-dai-cells = <0>;
-+		compatible = "fsl,imx6sx-mqs";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_mqs>;
-+		clocks = <&clks IMX6UL_CLK_SAI1>;
-+		clock-names = "mclk";
-+		gpr = <&gpr>;
-+		status = "okay";
-+	};
-+
-+	sound-mqs {
-+		compatible = "fsl,imx-audio-mqs";
-+		model = "mqs-audio";
-+		audio-cpu = <&sai1>;
-+		audio-asrc = <&asrc>;
-+		audio-codec = <&mqs>;
-+		status = "okay";
-+	};
-+};
-+
-+
-+/*+--------------+
-+  | Misc Modules |
-+  +--------------+*/
-+
-+&snvs_poweroff {
-+	status = "okay";
-+};
-+
-+&snvs_pwrkey {
-+	status = "okay";
-+};
-+
-+&uart1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart1>;
-+	status = "okay";
-+};
-+
-+&pwm1 { /* backlight */
-+	#pwm-cells = <2>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm1>;
-+	status = "okay";
-+};
-+
-+&pwm2 { /* buzzer */
-+	#pwm-cells = <2>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm2>;
-+	status = "okay";
-+};
-+
-+
-+/*+---------------+
-+  | Camera Module |
-+  +---------------+*/
-+
-+&i2c2 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_i2c2>;
-+	status = "okay";
-+
-+	gt9xx@5d {
-+		compatible = "goodix,gt9147";
-+		reg = <0x5d>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_ts_pins>;
-+
-+		irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
-+		reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
-+		interrupt-parent = <&gpio5>;
-+		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
-+
-+		status = "disabled"; /* Enable in LCD overlay */
-+	};
-+
-+	rtc@6f {
-+		compatible = "isil,isl1208";
-+		reg = <0x6f>;
-+		status = "okay";
-+	};
-+
-+	ov5640: ov5640@3c {
-+		compatible = "ovti,ov5640";
-+		reg = <0x3c>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_csi1>;
-+		clocks = <&clks IMX6UL_CLK_CSI>;
-+		clock-names = "csi_mclk";
-+
-+		DOVDD-supply = <&reg_3p3v>;
-+		VDD-supply = <&reg_1p8v>;
-+		AVDD-supply = <&reg_3p3v>;
-+		DVDD-supply = <&reg_3p3v>;
-+
-+		pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
-+		rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
-+		csi_id = <0>;
-+		mclk = <24000000>;
-+		mclk_source = <0>;
-+		/* rotation = <180>; */
-+		status = "disabled"; /* Enable in CAM overlay */
-+		port {
-+			ov5640_ep: endpoint {
-+				remote-endpoint = <&csi1_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi {
-+	status = "disabled"; /* Enable in CAM overlay */
-+	port {
-+		csi1_ep: endpoint {
-+			remote-endpoint = <&ov5640_ep>;
-+		};
-+	};
-+};
-+
-+
-+/*+--------------+
-+  | Audio Module |
-+  +--------------+*/
-+
-+/* Refrence: https://www.toradex.com/zh-cn/blog/colibri-imx6ull-kuo-zhan-yin-pin-jie-ma-qi-max98357a
-+ * +--------------------+--------------------+-----------------------+---------------------+
-+ * | Audio Sample Rates |      Bit Clock     |  PLL4_AUDIO_DIV(512)  |    CLK_SAI1(/16)    |
-+ * +--------------------+--------------------+-----------------------+---------------------+
-+ * | 16bit,2Ch,48KHz    | 16x2x48000=1536000 | 1536000x512=786432000 | 1536000x16=24576000 |
-+ * +--------------------+--------------------+-----------------------+---------------------+
-+ * | 16bit,2Ch,44.1KHz  | 16x2x44100=1411200 | 1411200x512=722534400 | 1411200x16=22579200 |
-+ * +--------------------+--------------------+-----------------------+---------------------+
-+ */
-+
-+&clks {
-+	assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-+	//assigned-clock-rates = <786432000>; // 16bit,2Ch,48KHz
-+	assigned-clock-rates = <722534400>; // 16bit,2Ch,44.1KHz
-+};
-+
-+&sai1 {
-+	assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>, <&clks IMX6UL_CLK_SAI1>;
-+	assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-+	//assigned-clock-rates = <0>, <24576000>; // 16bit,2Ch,48KHz
-+	assigned-clock-rates = <0>, <22579200>; // 16bit,2Ch,44.1KHz
-+	fsl,sai-mclk-direction-output;
-+	status = "okay";
-+};
-+
-+
-+/*+------------------+
-+  | Ethernet Modules |
-+  +------------------+*/
-+
-+&fec1 { /* eth0 */
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_enet1>;
-+	phy-mode = "rmii";
-+	phy-handle = <&ethphy0>;
-+	phy-supply = <&reg_peri_3v3>;
-+	phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
-+	phy-reset-duration = <50>;
-+	phy-reset-post-delay = <15>;
-+	status = "okay";
-+};
-+
-+&fec2 { /* eth1 */
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_enet2>;
-+	phy-mode = "rmii";
-+	phy-handle = <&ethphy1>;
-+	phy-supply = <&reg_peri_3v3>;
-+	phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
-+	phy-reset-duration = <50>;
-+	phy-reset-post-delay = <15>;
-+	status = "okay";
-+
-+	mdio {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		ethphy0: ethernet-phy@0 {
-+			reg = <0>;
-+			micrel,led-mode = <1>;
-+			clocks = <&clks IMX6UL_CLK_ENET_REF>;
-+			clock-names = "rmii-ref";
-+		};
-+
-+		ethphy1: ethernet-phy@1 {
-+			reg = <1>;
-+			micrel,led-mode = <1>;
-+			clocks = <&clks IMX6UL_CLK_ENET2_REF>;
-+			clock-names = "rmii-ref";
-+		};
-+	};
-+};
-+
-+
-+/*+---------------+
-+  | USB interface |
-+  +---------------+*/
-+
-+&usbotg1 {
-+	dr_mode = "otg";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_usb_otg1>;
-+	status = "okay";
-+};
-+
-+&usbotg2 {
-+	dr_mode = "host";
-+	disable-over-current;
-+	status = "okay";
-+};
-+
-+&usbphy1 {
-+	fsl,tx-d-cal = <106>;
-+};
-+
-+&usbphy2 {
-+	fsl,tx-d-cal = <106>;
-+};
-+
-+
-+/*+------------------+
-+  | USDCHC interface |
-+  +------------------+*/
-+
-+&usdhc1 { /* tf card slot */
-+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+	pinctrl-0 = <&pinctrl_usdhc1>;
-+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-+	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-+	no-1-8-v;
-+	keep-power-in-suspend;
-+	wakeup-source;
-+	vmmc-supply = <&reg_sd1_vmmc>;
-+	status = "okay";
-+};
-+
-+&usdhc2 { /* emmc */
-+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+	pinctrl-0 = <&pinctrl_usdhc2_8bit>;
-+	pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
-+	pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
-+
-+/*+----------------------+
-+  | Basic pinctrl iomuxc |
-+  +----------------------+*/
-+&iomuxc {
-+	pinctrl-names = "default";
-+
-+	pinctrl_gpio_leds: gpio-leds {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_DQS__GPIO4_IO16			0x17059 /* led run */
-+		>;
-+	};
-+
-+	pinctrl_gpio_keys: gpio-keys {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14		0x17059 /* gpio key */
-+		>;
-+	};
-+
-+	pinctrl_mqs: pinctrl-mqs-pins {
-+		fsl,pins = <
-+			MX6UL_PAD_JTAG_TDI__MQS_LEFT			0x11088 /* MQS Left  */
-+			MX6UL_PAD_JTAG_TDO__MQS_RIGHT			0x11088 /* MQS Right */
-+		>;
-+	};
-+
-+	pinctrl_ts_pins: pinctrl-ts-pins {
-+		fsl,pins = <
-+			MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02		0x17059 /* TouchScreen IRQ */
-+			MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03		0x17059 /* TouchScreen RST */
-+		>;
-+	};
-+
-+	pinctrl_csi1: csi1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05		0x17059 /* CSI_RST */
-+			MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06		0x17059 /* CSI_PWDN */
-+			MX6UL_PAD_CSI_MCLK__CSI_MCLK			0x1b088
-+			MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK		0x1b088
-+			MX6UL_PAD_CSI_VSYNC__CSI_VSYNC			0x1b088
-+			MX6UL_PAD_CSI_HSYNC__CSI_HSYNC			0x1b088
-+			MX6UL_PAD_CSI_DATA00__CSI_DATA02		0x1b088
-+			MX6UL_PAD_CSI_DATA01__CSI_DATA03		0x1b088
-+			MX6UL_PAD_CSI_DATA02__CSI_DATA04		0x1b088
-+			MX6UL_PAD_CSI_DATA03__CSI_DATA05		0x1b088
-+			MX6UL_PAD_CSI_DATA04__CSI_DATA06		0x1b088
-+			MX6UL_PAD_CSI_DATA05__CSI_DATA07		0x1b088
-+			MX6UL_PAD_CSI_DATA06__CSI_DATA08		0x1b088
-+			MX6UL_PAD_CSI_DATA07__CSI_DATA09		0x1b088
-+		>;
-+	};
-+
-+	pinctrl_enet1: enet1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN		0x1b0b0
-+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER		0x1b0b0
-+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
-+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
-+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN		0x1b0b0
-+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
-+			MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07		0x10B0
-+		>;
-+	};
-+
-+	pinctrl_enet2: enet2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO07__ENET2_MDC			0x1b0b0
-+			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO		0x1b0b0
-+			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN		0x1b0b0
-+			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER		0x1b0b0
-+			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-+			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-+			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN		0x1b0b0
-+			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-+			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
-+			MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04		0x10B0
-+		>;
-+	};
-+
-+	pinctrl_i2c2: i2c2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL		0x4001b8b0
-+			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA		0x4001b8b0
-+		>;
-+	};
-+
-+	pinctrl_pwm1: pwm1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO08__PWM1_OUT			0x110b0 /* LCD_BRIGHT in schematics */
-+		>;
-+	};
-+
-+	pinctrl_pwm2: pwm2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO09__PWM2_OUT			0x110b0
-+		>;
-+	};
-+
-+	pinctrl_uart1: uart1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
-+		>;
-+	};
-+
-+	pinctrl_usb_otg1: usbotg1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc1: usdhc1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x17059
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x10071
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x17059
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x17059
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x17059
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x17059
-+			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19		0x17059 /* SD1 CD */
-+		>;
-+	};
-+
-+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x170b9
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x100b9
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x170b9
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x170b9
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x170b9
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x170b9
-+
-+		>;
-+	};
-+
-+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x170f9
-+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x100f9
-+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x170f9
-+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x170f9
-+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x170f9
-+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x170f9
-+		>;
-+	};
-+
-+	pinctrl_usdhc2: usdhc2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK			0x17059
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD			0x17059
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0		0x17059
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1		0x17059
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2		0x17059
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3		0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit: usdhc2grp_8bit {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK			0x10069
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD			0x17059
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0		0x17059
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1		0x17059
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2		0x17059
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3		0x17059
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4		0x17059
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5		0x17059
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6		0x17059
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7		0x17059
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK			0x100b9
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD			0x170b9
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0		0x170b9
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1		0x170b9
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2		0x170b9
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3		0x170b9
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4		0x170b9
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5		0x170b9
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6		0x170b9
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7		0x170b9
-+		>;
-+	};
-+
-+	pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
-+		fsl,pins = <
-+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK			0x100f9
-+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD			0x170f9
-+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0		0x170f9
-+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1		0x170f9
-+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2		0x170f9
-+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3		0x170f9
-+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4		0x170f9
-+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5		0x170f9
-+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6		0x170f9
-+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7		0x170f9
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/Makefile
---- linux-imx/arch/arm/boot/dts/Makefile	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/Makefile	2022-10-09 13:19:22.622732242 +0800
-@@ -1490,3 +1490,6 @@
- 	aspeed-bmc-opp-zaius.dtb \
- 	aspeed-bmc-portwell-neptune.dtb \
- 	aspeed-bmc-quanta-q71l.dtb
-+DTC_FLAGS_igkboard := -@
-+dtb-$(CONFIG_SOC_IMX6UL) += igkboard.dtb
-+subdir-$(CONFIG_SOC_IMX6UL) += overlays
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/cam.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/cam.dts
---- linux-imx/arch/arm/boot/dts/overlays/cam.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/cam.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,24 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/* MIPI-DSI2 camera overlay */
-+
-+&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
-+	status = "okay";
-+};
-+
-+&csi {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	ov5640@3c {
-+		status = "okay";
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can1.dts
---- linux-imx/arch/arm/boot/dts/overlays/can1.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can1.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, CAN1 interfaces */
-+
-+&can1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_flexcan1>;
-+	xceiver-supply = <&reg_can_3v3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_flexcan1: flexcan1grp{
-+		fsl,pins = <
-+			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
-+			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
-+		>;
-+	};	
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can2.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can2.dts
---- linux-imx/arch/arm/boot/dts/overlays/can2.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can2.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, CAN2 interfaces */
-+
-+&can2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_flexcan2>;
-+	xceiver-supply = <&reg_can_3v3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_flexcan2: flexcan2grp{
-+		fsl,pins = <
-+			MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	0x1b020
-+			MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	0x1b020
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/i2c1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/i2c1.dts
---- linux-imx/arch/arm/boot/dts/overlays/i2c1.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/i2c1.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, I2C1 interfaces */
-+
-+&i2c1 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_i2c1>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_i2c1: i2c1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO02__I2C1_SCL	0x4001b8b0
-+			MX6UL_PAD_GPIO1_IO03__I2C1_SDA	0x4001b8b0
-+		>;
-+	};	
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/lcd.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd.dts
---- linux-imx/arch/arm/boot/dts/overlays/lcd.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,89 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* LCD display overlay */
-+
-+&backlight_lcd {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	gt9xx@5d {
-+		status = "okay";
-+	};
-+};
-+
-+&lcdif {
-+	assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
-+	assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
-+	display = <&display0>;
-+	status = "okay";
-+
-+	display0: display@0 {
-+		bits-per-pixel = <16>;
-+		bus-width = <16>;
-+
-+		display-timings {
-+			native-mode = <&timing0>;
-+
-+			timing0: timing0 {
-+				clock-frequency = <30000000>;
-+				hactive = <800>;
-+				vactive = <480>;
-+				hfront-porch = <40>;
-+				hback-porch = <88>;
-+				hsync-len = <48>;
-+				vback-porch = <32>;
-+				vfront-porch = <13>;
-+				vsync-len = <3>;
-+				hsync-active = <0>;
-+				vsync-active = <0>;
-+				de-active = <1>;
-+				pixelclk-active = <0>;
-+			};
-+		};
-+	};
-+};
-+
-+&iomuxc {
-+	pinctrl_lcdif_dat: lcdifdatgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79
-+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79
-+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79
-+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79
-+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79
-+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79
-+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79
-+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79
-+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79
-+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79
-+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79
-+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79
-+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79
-+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79
-+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79
-+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79
-+		>;
-+	};
-+
-+	pinctrl_lcdif_ctrl: lcdifctrlgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79
-+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79
-+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79
-+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79
-+			MX6UL_PAD_LCD_RESET__LCDIF_RESET	0x79
-+		>;
-+	};
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/Makefile linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/Makefile
---- linux-imx/arch/arm/boot/dts/overlays/Makefile	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/Makefile	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,20 @@
-+# SPDX-License-Identifier: GPL-2.0
-+
-+# required for overlay support
-+DTC_FLAGS += -@
-+
-+dtb-y += can1.dtbo
-+dtb-y += can2.dtbo
-+dtb-y += i2c1.dtbo
-+dtb-y += spi1.dtbo
-+dtb-y += uart2.dtbo
-+dtb-y += uart3.dtbo
-+dtb-y += uart4.dtbo
-+dtb-y += uart7.dtbo
-+dtb-y += pwm7.dtbo
-+dtb-y += pwm8.dtbo
-+dtb-y += w1.dtbo
-+dtb-y += lcd.dtbo
-+dtb-y += cam.dtbo
-+dtb-y += nbiot-4g.dtbo
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/nbiot-4g.dts
---- linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/nbiot-4g.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,34 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* NB-IoT/4G module use UART8 interfaces, conflict with SPI interface */
-+
-+&uart8 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_spi_uart8 &pinctrl_nbiot_ctrl>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_spi_uart8: spi_uart8_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA20__UART8_DCE_TX		0x1b0b1 /* MRXD */
-+			MX6UL_PAD_LCD_DATA21__UART8_DCE_RX		0x1b0b1 /* MTXD */
-+		>;
-+	};
-+
-+	pinctrl_nbiot_ctrl: nbiot_ctrl_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA22__GPIO3_IO27		0x17059 /* NB_PWREN/4G_RESET */
-+			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15		0x17059 /* NB_MRST/4G_POWER_KEY */
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm7.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm7.dts
---- linux-imx/arch/arm/boot/dts/overlays/pwm7.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm7.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, PWM7 interfaces */
-+
-+&pwm7 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm7>;
-+	clocks = <&clks IMX6UL_CLK_PWM7>, <&clks IMX6UL_CLK_PWM7>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_pwm7: pwm7grp {
-+		fsl,pins = <
-+			MX6UL_PAD_JTAG_TCK__PWM7_OUT	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm8.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm8.dts
---- linux-imx/arch/arm/boot/dts/overlays/pwm8.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm8.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, PWM8 interfaces, conflict with NB-IoT */
-+
-+&pwm8 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm8_nbiot>;
-+	clocks = <&clks IMX6UL_CLK_PWM8>, <&clks IMX6UL_CLK_PWM8>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_pwm8_nbiot: pwm8nbiotgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/spi1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/spi1.dts
---- linux-imx/arch/arm/boot/dts/overlays/spi1.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/spi1.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,39 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, SPI1 interfaces, conflict with UART8 */
-+
-+&ecspi1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_spi_uart8>;
-+	cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
-+	status = "okay";
-+
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	spidev0: spi@0 {
-+		reg = <0>;
-+		compatible = "semtech,sx1301";
-+		spi-max-frequency = <1000000>;
-+	};	
-+};
-+
-+&iomuxc {
-+	pinctrl_spi_uart8: spi_uart8_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x10b0
-+			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x10b0
-+			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x10b0
-+			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x10b0
-+		>;
-+	};	
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart2.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart2.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart2.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart2.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,26 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART2 interfaces */
-+
-+&uart2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart2>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart2: uart2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart3.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart3.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart3.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart3.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART3 interfaces */
-+
-+&uart3 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart3: uart3grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart4.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart4.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart4.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart4.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART4 interfaces */
-+
-+&uart4 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart4>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart4: uart4grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart7.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart7.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart7.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart7.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART7 interfaces, conflict with LCD display */
-+
-+&uart7 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart7>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart7: uart7grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA16__UART7_DCE_TX		0x1b0b1
-+			MX6UL_PAD_LCD_DATA17__UART7_DCE_RX		0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/w1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/w1.dts
---- linux-imx/arch/arm/boot/dts/overlays/w1.dts	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/w1.dts	2022-10-09 13:19:22.626732206 +0800
-@@ -0,0 +1,31 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* W1(DS18B20) on 40Pin Header Pin#7 (GPIO1_IO18) */
-+
-+&w1 {
-+    compatible = "w1-gpio";
-+    status = "okay";
-+
-+    pinctrl-names = "default";
-+    pinctrl-0 = <&pinctrl_w1>;
-+    gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
-+};
-+
-+
-+&iomuxc {
-+	pinctrl_w1: w1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-lf-5.10.52-2.1.0/arch/arm/configs/igkboard_defconfig
---- linux-imx/arch/arm/configs/igkboard_defconfig	1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/configs/igkboard_defconfig	2022-10-09 13:20:51.349955648 +0800
-@@ -0,0 +1,726 @@
-+CONFIG_KERNEL_LZO=y
-+CONFIG_SYSVIPC=y
-+CONFIG_POSIX_MQUEUE=y
-+CONFIG_NO_HZ=y
-+CONFIG_HIGH_RES_TIMERS=y
-+CONFIG_PREEMPT=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=18
-+CONFIG_CGROUPS=y
-+CONFIG_MEMCG=y
-+CONFIG_CGROUP_PIDS=y
-+CONFIG_CGROUP_FREEZER=y
-+CONFIG_CGROUP_DEVICE=y
-+CONFIG_NAMESPACES=y
-+CONFIG_USER_NS=y
-+CONFIG_RELAY=y
-+CONFIG_BLK_DEV_INITRD=y
-+CONFIG_EXPERT=y
-+CONFIG_PERF_EVENTS=y
-+# CONFIG_SLUB_DEBUG is not set
-+# CONFIG_COMPAT_BRK is not set
-+CONFIG_ARCH_MXC=y
-+CONFIG_SOC_IMX6Q=y
-+CONFIG_SOC_IMX6SL=y
-+CONFIG_SOC_IMX6SLL=y
-+CONFIG_SOC_IMX6SX=y
-+CONFIG_SOC_IMX6UL=y
-+CONFIG_SOC_IMX7D=y
-+CONFIG_SOC_IMX7ULP=y
-+CONFIG_SMP=y
-+CONFIG_VMSPLIT_2G=y
-+CONFIG_ARM_PSCI=y
-+CONFIG_HIGHMEM=y
-+CONFIG_FORCE_MAX_ZONEORDER=14
-+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
-+CONFIG_KEXEC=y
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_STAT=y
-+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-+CONFIG_CPUFREQ_DT=y
-+CONFIG_ARM_IMX6Q_CPUFREQ=y
-+CONFIG_ARM_IMX_CPUFREQ_DT=y
-+CONFIG_CPU_IDLE=y
-+CONFIG_ARM_CPUIDLE=y
-+CONFIG_ARM_PSCI_CPUIDLE=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+CONFIG_PM_DEBUG=y
-+CONFIG_PM_TEST_SUSPEND=y
-+CONFIG_MODULES=y
-+CONFIG_MODULE_UNLOAD=y
-+CONFIG_MODVERSIONS=y
-+CONFIG_MODULE_SRCVERSION_ALL=y
-+# CONFIG_BLK_DEV_BSG is not set
-+CONFIG_CMA=y
-+CONFIG_NET=y
-+CONFIG_PACKET=y
-+CONFIG_UNIX=y
-+CONFIG_INET=y
-+CONFIG_IP_MULTICAST=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+CONFIG_NETFILTER=y
-+CONFIG_VLAN_8021Q=m
-+CONFIG_LLC2=y
-+CONFIG_CAN=y
-+CONFIG_CAN_FLEXCAN=y
-+CONFIG_BT=y
-+CONFIG_BT_RFCOMM=y
-+CONFIG_BT_RFCOMM_TTY=y
-+CONFIG_BT_BNEP=y
-+CONFIG_BT_BNEP_MC_FILTER=y
-+CONFIG_BT_BNEP_PROTO_FILTER=y
-+CONFIG_BT_HIDP=y
-+CONFIG_BT_HCIBTUSB=y
-+CONFIG_BT_HCIUART=y
-+CONFIG_BT_HCIUART_BCSP=y
-+CONFIG_BT_HCIUART_LL=y
-+CONFIG_BT_HCIUART_3WIRE=y
-+CONFIG_BT_HCIUART_MRVL=y
-+CONFIG_BT_HCIVHCI=y
-+CONFIG_BT_MRVL=y
-+CONFIG_BT_MRVL_SDIO=y
-+CONFIG_CFG80211=y
-+CONFIG_NL80211_TESTMODE=y
-+CONFIG_CFG80211_WEXT=y
-+CONFIG_MAC80211=y
-+CONFIG_PCI=y
-+CONFIG_PCI_MSI=y
-+CONFIG_PCI_IMX6_HOST=y
-+CONFIG_PCI_IMX6_EP=y
-+CONFIG_PCI_ENDPOINT=y
-+CONFIG_PCI_ENDPOINT_CONFIGFS=y
-+CONFIG_PCI_EPF_TEST=y
-+CONFIG_DEVTMPFS=y
-+CONFIG_DEVTMPFS_MOUNT=y
-+# CONFIG_STANDALONE is not set
-+CONFIG_FW_LOADER_USER_HELPER=y
-+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
-+CONFIG_IMX_WEIM=y
-+CONFIG_CONNECTOR=y
-+CONFIG_MTD=y
-+CONFIG_MTD_CMDLINE_PARTS=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_CFI=y
-+CONFIG_MTD_JEDECPROBE=y
-+CONFIG_MTD_CFI_INTELEXT=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+CONFIG_MTD_CFI_STAA=y
-+CONFIG_MTD_PHYSMAP=y
-+CONFIG_MTD_PHYSMAP_OF=y
-+CONFIG_MTD_DATAFLASH=y
-+CONFIG_MTD_SST25L=y
-+CONFIG_MTD_RAW_NAND=y
-+CONFIG_MTD_NAND_GPMI_NAND=y
-+CONFIG_MTD_NAND_MXC=y
-+CONFIG_MTD_SPI_NOR=y
-+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
-+CONFIG_MTD_UBI=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_MTD_UBI_BLOCK=y
-+CONFIG_OF_OVERLAY=y
-+CONFIG_BLK_DEV_LOOP=y
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_SIZE=65536
-+CONFIG_SENSORS_FXOS8700=y
-+CONFIG_SENSORS_FXAS2100X=y
-+CONFIG_PCI_ENDPOINT_TEST=y
-+CONFIG_EEPROM_AT24=y
-+CONFIG_EEPROM_AT25=y
-+# CONFIG_SCSI_PROC_FS is not set
-+CONFIG_BLK_DEV_SD=y
-+CONFIG_SCSI_CONSTANTS=y
-+CONFIG_SCSI_LOGGING=y
-+CONFIG_SCSI_SCAN_ASYNC=y
-+# CONFIG_SCSI_LOWLEVEL is not set
-+CONFIG_ATA=y
-+CONFIG_SATA_AHCI_PLATFORM=y
-+CONFIG_AHCI_IMX=y
-+CONFIG_PATA_IMX=y
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_VENDOR_BROADCOM is not set
-+CONFIG_CS89x0=y
-+CONFIG_CS89x0_PLATFORM=y
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+# CONFIG_NET_VENDOR_INTEL is not set
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_MICROCHIP is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+CONFIG_SMC91X=y
-+CONFIG_SMC911X=y
-+CONFIG_SMSC911X=y
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+CONFIG_MICREL_PHY=y
-+CONFIG_AT803X_PHY=y
-+CONFIG_USB_RTL8150=y
-+CONFIG_USB_RTL8152=y
-+CONFIG_USB_LAN78XX=y
-+CONFIG_USB_USBNET=y
-+# CONFIG_USB_NET_AX8817X is not set
-+# CONFIG_USB_NET_AX88179_178A is not set
-+CONFIG_USB_NET_CDC_EEM=y
-+CONFIG_USB_NET_DM9601=y
-+CONFIG_USB_NET_SMSC75XX=y
-+CONFIG_USB_NET_SMSC95XX=y
-+# CONFIG_USB_NET_NET1080 is not set
-+CONFIG_USB_NET_MCS7830=y
-+# CONFIG_USB_NET_ZAURUS is not set
-+CONFIG_USB_IPHETH=y
-+# CONFIG_WLAN_VENDOR_ADMTEK is not set
-+# CONFIG_WLAN_VENDOR_ATH is not set
-+# CONFIG_WLAN_VENDOR_ATMEL is not set
-+# CONFIG_WLAN_VENDOR_BROADCOM is not set
-+# CONFIG_WLAN_VENDOR_CISCO is not set
-+# CONFIG_WLAN_VENDOR_INTEL is not set
-+# CONFIG_WLAN_VENDOR_INTERSIL is not set
-+# CONFIG_WLAN_VENDOR_MARVELL is not set
-+CONFIG_MT7601U=y
-+CONFIG_MT76x0U=y
-+CONFIG_MT76x2U=y
-+CONFIG_MT7663U=y
-+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
-+# CONFIG_WLAN_VENDOR_RALINK is not set
-+CONFIG_RTL8187=y
-+CONFIG_RTL8192CE=y
-+CONFIG_RTL8188EE=y
-+CONFIG_RTL8192EE=y
-+CONFIG_RTL8821AE=y
-+CONFIG_RTL8192CU=y
-+CONFIG_RTL8XXXU=y
-+CONFIG_RTL8XXXU_UNTESTED=y
-+# CONFIG_WLAN_VENDOR_RSI is not set
-+# CONFIG_WLAN_VENDOR_ST is not set
-+# CONFIG_WLAN_VENDOR_TI is not set
-+# CONFIG_WLAN_VENDOR_ZYDAS is not set
-+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
-+CONFIG_INPUT_MOUSEDEV=y
-+CONFIG_INPUT_MOUSEDEV_PSAUX=y
-+CONFIG_INPUT_EVDEV=y
-+CONFIG_KEYBOARD_GPIO=y
-+CONFIG_KEYBOARD_RPMSG=y
-+CONFIG_KEYBOARD_IMX=y
-+# CONFIG_INPUT_MOUSE is not set
-+CONFIG_INPUT_TOUCHSCREEN=y
-+# CONFIG_TOUCHSCREEN_CT36X_WLD is not set
-+CONFIG_TOUCHSCREEN_GOODIX=y
-+# CONFIG_TOUCHSCREEN_SYNAPTICS_DSX is not set
-+# CONFIG_SERIO_SERPORT is not set
-+# CONFIG_LEGACY_PTYS is not set
-+CONFIG_SERIAL_IMX=y
-+CONFIG_SERIAL_IMX_CONSOLE=y
-+CONFIG_SERIAL_FSL_LPUART=y
-+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
-+CONFIG_SERIAL_DEV_BUS=y
-+# CONFIG_I2C_COMPAT is not set
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_MUX=y
-+CONFIG_I2C_MUX_GPIO=y
-+# CONFIG_I2C_HELPER_AUTO is not set
-+CONFIG_I2C_ALGOPCF=m
-+CONFIG_I2C_ALGOPCA=m
-+CONFIG_I2C_GPIO=y
-+CONFIG_I2C_IMX=y
-+CONFIG_I2C_IMX_LPI2C=y
-+CONFIG_SPI=y
-+CONFIG_SPI_FSL_LPSPI=y
-+CONFIG_SPI_FSL_QUADSPI=y
-+CONFIG_SPI_GPIO=y
-+CONFIG_SPI_IMX=y
-+CONFIG_SPI_SPIDEV=y
-+CONFIG_SPI_SLAVE=y
-+CONFIG_SPI_SLAVE_TIME=y
-+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
-+CONFIG_GPIO_SYSFS=y
-+CONFIG_GPIO_MXC=y
-+CONFIG_GPIO_SIOX=m
-+CONFIG_GPIO_IMX_RPMSG=y
-+CONFIG_GPIO_MAX732X=y
-+CONFIG_GPIO_PCA953X=y
-+CONFIG_GPIO_PCF857X=y
-+CONFIG_GPIO_STMPE=y
-+CONFIG_GPIO_74X164=y
-+CONFIG_W1=y
-+CONFIG_W1_MASTER_GPIO=y
-+CONFIG_W1_SLAVE_THERM=y
-+CONFIG_POWER_RESET=y
-+CONFIG_POWER_RESET_SYSCON=y
-+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-+CONFIG_POWER_SUPPLY=y
-+CONFIG_SENSORS_MC13783_ADC=y
-+CONFIG_SENSORS_GPIO_FAN=y
-+CONFIG_SENSORS_IIO_HWMON=y
-+CONFIG_SENSORS_MAX17135=y
-+CONFIG_SENSORS_MAG3110=y
-+CONFIG_THERMAL=y
-+CONFIG_THERMAL_STATISTICS=y
-+CONFIG_THERMAL_WRITABLE_TRIPS=y
-+CONFIG_CPU_THERMAL=y
-+CONFIG_IMX_THERMAL=y
-+CONFIG_DEVICE_THERMAL=y
-+CONFIG_WATCHDOG=y
-+CONFIG_DA9062_WATCHDOG=y
-+CONFIG_RN5T618_WATCHDOG=y
-+CONFIG_IMX2_WDT=y
-+CONFIG_IMX7ULP_WDT=y
-+CONFIG_MFD_DA9052_I2C=y
-+CONFIG_MFD_DA9062=y
-+CONFIG_MFD_DA9063=y
-+CONFIG_MFD_MC13XXX_SPI=y
-+CONFIG_MFD_MC13XXX_I2C=y
-+CONFIG_MFD_MAX17135=y
-+CONFIG_MFD_RN5T618=y
-+CONFIG_MFD_SI476X_CORE=y
-+CONFIG_MFD_STMPE=y
-+CONFIG_MFD_WM8994=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_REGULATOR_ANATOP=y
-+CONFIG_REGULATOR_DA9052=y
-+CONFIG_REGULATOR_DA9062=y
-+CONFIG_REGULATOR_DA9063=y
-+CONFIG_REGULATOR_GPIO=y
-+CONFIG_REGULATOR_MAX17135=y
-+CONFIG_REGULATOR_MC13783=y
-+CONFIG_REGULATOR_MC13892=y
-+CONFIG_REGULATOR_PF1550_RPMSG=y
-+CONFIG_REGULATOR_PFUZE100=y
-+CONFIG_REGULATOR_RN5T618=y
-+CONFIG_RC_CORE=y
-+CONFIG_RC_DEVICES=y
-+CONFIG_IR_GPIO_CIR=y
-+CONFIG_MEDIA_SUPPORT=y
-+CONFIG_MEDIA_USB_SUPPORT=y
-+CONFIG_USB_VIDEO_CLASS=y
-+CONFIG_USB_GSPCA=y
-+# CONFIG_RADIO_ADAPTERS is not set
-+CONFIG_V4L_PLATFORM_DRIVERS=y
-+CONFIG_VIDEO_MUX=y
-+CONFIG_VIDEO_MXC_CAPTURE=y
-+CONFIG_VIDEO_MXC_OUTPUT=y
-+CONFIG_VIDEO_MXC_CSI_CAMERA=y
-+CONFIG_MXC_VADC=y
-+CONFIG_MXC_MIPI_CSI=y
-+CONFIG_MXC_CAMERA_OV5640_V2=y
-+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
-+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=y
-+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
-+CONFIG_VIDEO_MXC_PXP_V4L2=y
-+CONFIG_V4L_MEM2MEM_DRIVERS=y
-+CONFIG_VIDEO_CODA=m
-+CONFIG_VIDEO_IMX_PXP=y
-+# CONFIG_VIDEO_IR_I2C is not set
-+# CONFIG_CXD2880_SPI_DRV is not set
-+# CONFIG_MEDIA_TUNER_SIMPLE is not set
-+# CONFIG_MEDIA_TUNER_TDA18250 is not set
-+# CONFIG_MEDIA_TUNER_TDA8290 is not set
-+# CONFIG_MEDIA_TUNER_TDA827X is not set
-+# CONFIG_MEDIA_TUNER_TDA18271 is not set
-+# CONFIG_MEDIA_TUNER_TDA9887 is not set
-+# CONFIG_MEDIA_TUNER_TEA5761 is not set
-+# CONFIG_MEDIA_TUNER_TEA5767 is not set
-+# CONFIG_MEDIA_TUNER_MSI001 is not set
-+# CONFIG_MEDIA_TUNER_MT20XX is not set
-+# CONFIG_MEDIA_TUNER_MT2060 is not set
-+# CONFIG_MEDIA_TUNER_MT2063 is not set
-+# CONFIG_MEDIA_TUNER_MT2266 is not set
-+# CONFIG_MEDIA_TUNER_MT2131 is not set
-+# CONFIG_MEDIA_TUNER_QT1010 is not set
-+# CONFIG_MEDIA_TUNER_XC2028 is not set
-+# CONFIG_MEDIA_TUNER_XC5000 is not set
-+# CONFIG_MEDIA_TUNER_XC4000 is not set
-+# CONFIG_MEDIA_TUNER_MXL5005S is not set
-+# CONFIG_MEDIA_TUNER_MXL5007T is not set
-+# CONFIG_MEDIA_TUNER_MC44S803 is not set
-+# CONFIG_MEDIA_TUNER_MAX2165 is not set
-+# CONFIG_MEDIA_TUNER_TDA18218 is not set
-+# CONFIG_MEDIA_TUNER_FC0011 is not set
-+# CONFIG_MEDIA_TUNER_FC0012 is not set
-+# CONFIG_MEDIA_TUNER_FC0013 is not set
-+# CONFIG_MEDIA_TUNER_TDA18212 is not set
-+# CONFIG_MEDIA_TUNER_E4000 is not set
-+# CONFIG_MEDIA_TUNER_FC2580 is not set
-+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
-+# CONFIG_MEDIA_TUNER_TUA9001 is not set
-+# CONFIG_MEDIA_TUNER_SI2157 is not set
-+# CONFIG_MEDIA_TUNER_IT913X is not set
-+# CONFIG_MEDIA_TUNER_R820T is not set
-+# CONFIG_MEDIA_TUNER_MXL301RF is not set
-+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
-+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
-+# CONFIG_DVB_STB0899 is not set
-+# CONFIG_DVB_STB6100 is not set
-+# CONFIG_DVB_STV090x is not set
-+# CONFIG_DVB_STV0910 is not set
-+# CONFIG_DVB_STV6110x is not set
-+# CONFIG_DVB_STV6111 is not set
-+# CONFIG_DVB_MXL5XX is not set
-+# CONFIG_DVB_M88DS3103 is not set
-+# CONFIG_DVB_DRXK is not set
-+# CONFIG_DVB_TDA18271C2DD is not set
-+# CONFIG_DVB_SI2165 is not set
-+# CONFIG_DVB_MN88472 is not set
-+# CONFIG_DVB_MN88473 is not set
-+# CONFIG_DVB_CX24110 is not set
-+# CONFIG_DVB_CX24123 is not set
-+# CONFIG_DVB_MT312 is not set
-+# CONFIG_DVB_ZL10036 is not set
-+# CONFIG_DVB_ZL10039 is not set
-+# CONFIG_DVB_S5H1420 is not set
-+# CONFIG_DVB_STV0288 is not set
-+# CONFIG_DVB_STB6000 is not set
-+# CONFIG_DVB_STV0299 is not set
-+# CONFIG_DVB_STV6110 is not set
-+# CONFIG_DVB_STV0900 is not set
-+# CONFIG_DVB_TDA8083 is not set
-+# CONFIG_DVB_TDA10086 is not set
-+# CONFIG_DVB_TDA8261 is not set
-+# CONFIG_DVB_VES1X93 is not set
-+# CONFIG_DVB_TUNER_ITD1000 is not set
-+# CONFIG_DVB_TUNER_CX24113 is not set
-+# CONFIG_DVB_TDA826X is not set
-+# CONFIG_DVB_TUA6100 is not set
-+# CONFIG_DVB_CX24116 is not set
-+# CONFIG_DVB_CX24117 is not set
-+# CONFIG_DVB_CX24120 is not set
-+# CONFIG_DVB_SI21XX is not set
-+# CONFIG_DVB_TS2020 is not set
-+# CONFIG_DVB_DS3000 is not set
-+# CONFIG_DVB_MB86A16 is not set
-+# CONFIG_DVB_TDA10071 is not set
-+# CONFIG_DVB_SP8870 is not set
-+# CONFIG_DVB_SP887X is not set
-+# CONFIG_DVB_CX22700 is not set
-+# CONFIG_DVB_CX22702 is not set
-+# CONFIG_DVB_S5H1432 is not set
-+# CONFIG_DVB_DRXD is not set
-+# CONFIG_DVB_L64781 is not set
-+# CONFIG_DVB_TDA1004X is not set
-+# CONFIG_DVB_NXT6000 is not set
-+# CONFIG_DVB_MT352 is not set
-+# CONFIG_DVB_ZL10353 is not set
-+# CONFIG_DVB_DIB3000MB is not set
-+# CONFIG_DVB_DIB3000MC is not set
-+# CONFIG_DVB_DIB7000M is not set
-+# CONFIG_DVB_DIB7000P is not set
-+# CONFIG_DVB_DIB9000 is not set
-+# CONFIG_DVB_TDA10048 is not set
-+# CONFIG_DVB_AF9013 is not set
-+# CONFIG_DVB_EC100 is not set
-+# CONFIG_DVB_STV0367 is not set
-+# CONFIG_DVB_CXD2820R is not set
-+# CONFIG_DVB_CXD2841ER is not set
-+# CONFIG_DVB_RTL2830 is not set
-+# CONFIG_DVB_RTL2832 is not set
-+# CONFIG_DVB_RTL2832_SDR is not set
-+# CONFIG_DVB_SI2168 is not set
-+# CONFIG_DVB_ZD1301_DEMOD is not set
-+# CONFIG_DVB_CXD2880 is not set
-+# CONFIG_DVB_VES1820 is not set
-+# CONFIG_DVB_TDA10021 is not set
-+# CONFIG_DVB_TDA10023 is not set
-+# CONFIG_DVB_STV0297 is not set
-+# CONFIG_DVB_NXT200X is not set
-+# CONFIG_DVB_OR51211 is not set
-+# CONFIG_DVB_OR51132 is not set
-+# CONFIG_DVB_BCM3510 is not set
-+# CONFIG_DVB_LGDT330X is not set
-+# CONFIG_DVB_LGDT3305 is not set
-+# CONFIG_DVB_LGDT3306A is not set
-+# CONFIG_DVB_LG2160 is not set
-+# CONFIG_DVB_S5H1409 is not set
-+# CONFIG_DVB_AU8522_DTV is not set
-+# CONFIG_DVB_AU8522_V4L is not set
-+# CONFIG_DVB_S5H1411 is not set
-+# CONFIG_DVB_S921 is not set
-+# CONFIG_DVB_DIB8000 is not set
-+# CONFIG_DVB_MB86A20S is not set
-+# CONFIG_DVB_TC90522 is not set
-+# CONFIG_DVB_MN88443X is not set
-+# CONFIG_DVB_PLL is not set
-+# CONFIG_DVB_TUNER_DIB0070 is not set
-+# CONFIG_DVB_TUNER_DIB0090 is not set
-+# CONFIG_DVB_DRX39XYJ is not set
-+# CONFIG_DVB_LNBH25 is not set
-+# CONFIG_DVB_LNBH29 is not set
-+# CONFIG_DVB_LNBP21 is not set
-+# CONFIG_DVB_LNBP22 is not set
-+# CONFIG_DVB_ISL6405 is not set
-+# CONFIG_DVB_ISL6421 is not set
-+# CONFIG_DVB_ISL6423 is not set
-+# CONFIG_DVB_A8293 is not set
-+# CONFIG_DVB_LGS8GL5 is not set
-+# CONFIG_DVB_LGS8GXX is not set
-+# CONFIG_DVB_ATBM8830 is not set
-+# CONFIG_DVB_TDA665x is not set
-+# CONFIG_DVB_IX2505V is not set
-+# CONFIG_DVB_M88RS2000 is not set
-+# CONFIG_DVB_AF9033 is not set
-+# CONFIG_DVB_HORUS3A is not set
-+# CONFIG_DVB_ASCOT2E is not set
-+# CONFIG_DVB_HELENE is not set
-+# CONFIG_DVB_CXD2099 is not set
-+# CONFIG_DVB_SP2 is not set
-+CONFIG_DRM=y
-+CONFIG_DRM_PANEL_LVDS=y
-+CONFIG_DRM_PANEL_SIMPLE=y
-+CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
-+CONFIG_DRM_TI_TFP410=y
-+CONFIG_FB_MXS=y
-+CONFIG_FB_MXC_SYNC_PANEL=y
-+CONFIG_FB_MXC_OVERLAY=y
-+CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y
-+CONFIG_FB_MXC_ADV7535=y
-+CONFIG_FB_MXC_TRULY_PANEL_TFT3P5581E=y
-+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
-+CONFIG_FB_MXC_RK_PANEL_RK055AHD042=y
-+CONFIG_FB_MXC_RK_PANEL_RK055IQH042=y
-+CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y
-+CONFIG_FB_MXC_MIPI_DSI=y
-+CONFIG_FB_MXC_LDB=y
-+CONFIG_FB_MXC_EINK_PANEL=y
-+CONFIG_FB_MXC_EINK_V2_PANEL=y
-+CONFIG_FB_MXC_HDMI=y
-+CONFIG_FB_MXS_SII902X=y
-+CONFIG_FB_MXC_DCIC=y
-+CONFIG_LCD_CLASS_DEVICE=y
-+CONFIG_LCD_L4F00242T03=y
-+CONFIG_LCD_PLATFORM=y
-+CONFIG_BACKLIGHT_PWM=y
-+CONFIG_BACKLIGHT_GPIO=y
-+CONFIG_FRAMEBUFFER_CONSOLE=y
-+CONFIG_LOGO=y
-+CONFIG_SOUND=y
-+CONFIG_SND=y
-+# CONFIG_SND_DRIVERS is not set
-+# CONFIG_SND_PCI is not set
-+# CONFIG_SND_ARM is not set
-+# CONFIG_SND_SPI is not set
-+# CONFIG_SND_USB is not set
-+CONFIG_SND_SOC=y
-+CONFIG_SND_SOC_FSL_ASRC=y
-+CONFIG_SND_SOC_FSL_MQS=y
-+CONFIG_SND_SOC_FSL_RPMSG=y
-+CONFIG_SND_IMX_SOC=y
-+CONFIG_SND_SOC_FSL_ASOC_CARD=y
-+CONFIG_SND_SOC_AC97_CODEC=y
-+CONFIG_SND_SIMPLE_CARD=y
-+CONFIG_HID_MULTITOUCH=y
-+CONFIG_USB=y
-+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_MXC=y
-+CONFIG_USB_HCD_TEST_MODE=y
-+CONFIG_USB_ACM=m
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB_CHIPIDEA=y
-+CONFIG_USB_CHIPIDEA_UDC=y
-+CONFIG_USB_CHIPIDEA_HOST=y
-+CONFIG_USB_SERIAL=m
-+CONFIG_USB_SERIAL_GENERIC=y
-+CONFIG_USB_SERIAL_FTDI_SIO=m
-+CONFIG_USB_SERIAL_OPTION=m
-+CONFIG_USB_TEST=m
-+CONFIG_USB_EHSET_TEST_FIXTURE=m
-+CONFIG_NOP_USB_XCEIV=y
-+CONFIG_USB_MXS_PHY=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_FSL_USB2=y
-+CONFIG_USB_CONFIGFS=y
-+CONFIG_USB_CONFIGFS_SERIAL=y
-+CONFIG_USB_CONFIGFS_ACM=y
-+CONFIG_USB_CONFIGFS_OBEX=y
-+CONFIG_USB_CONFIGFS_NCM=y
-+CONFIG_USB_CONFIGFS_ECM=y
-+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
-+CONFIG_USB_CONFIGFS_RNDIS=y
-+CONFIG_USB_CONFIGFS_EEM=y
-+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-+CONFIG_USB_CONFIGFS_F_LB_SS=y
-+CONFIG_USB_CONFIGFS_F_FS=y
-+CONFIG_USB_CONFIGFS_F_UAC1=y
-+CONFIG_USB_CONFIGFS_F_UAC2=y
-+CONFIG_USB_CONFIGFS_F_MIDI=y
-+CONFIG_USB_CONFIGFS_F_HID=y
-+CONFIG_USB_CONFIGFS_F_UVC=y
-+CONFIG_USB_CONFIGFS_F_PRINTER=y
-+CONFIG_USB_ZERO=m
-+CONFIG_USB_AUDIO=m
-+CONFIG_USB_ETH=m
-+CONFIG_USB_G_NCM=m
-+CONFIG_USB_GADGETFS=m
-+CONFIG_USB_FUNCTIONFS=m
-+CONFIG_USB_MASS_STORAGE=m
-+CONFIG_USB_G_SERIAL=m
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_PLTFM=y
-+CONFIG_MMC_SDHCI_ESDHC_IMX=y
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_LEDS_GPIO=y
-+CONFIG_LEDS_PWM=y
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+CONFIG_LEDS_TRIGGER_ONESHOT=y
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-+CONFIG_LEDS_TRIGGER_GPIO=y
-+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-+CONFIG_RTC_DRV_DS1307=y
-+CONFIG_RTC_DRV_ISL1208=y
-+CONFIG_RTC_DRV_PCF8523=y
-+CONFIG_RTC_DRV_PCF8563=y
-+CONFIG_RTC_DRV_M41T80=y
-+CONFIG_RTC_DRV_RC5T619=y
-+CONFIG_RTC_DRV_DA9063=y
-+CONFIG_RTC_DRV_MC13XXX=y
-+CONFIG_RTC_DRV_MXC=y
-+CONFIG_RTC_DRV_MXC_V2=y
-+CONFIG_RTC_DRV_SNVS=y
-+CONFIG_RTC_DRV_IMX_RPMSG=y
-+CONFIG_DMADEVICES=y
-+CONFIG_FSL_EDMA=y
-+CONFIG_IMX_SDMA=y
-+CONFIG_MXS_DMA=y
-+CONFIG_MXC_PXP_V2=y
-+CONFIG_MXC_PXP_V3=y
-+CONFIG_DMATEST=m
-+CONFIG_STAGING=y
-+CONFIG_STAGING_MEDIA=y
-+CONFIG_COMMON_CLK_PWM=y
-+CONFIG_MAILBOX=y
-+CONFIG_REMOTEPROC=y
-+CONFIG_IMX_REMOTEPROC=y
-+CONFIG_EXTCON_USB_GPIO=y
-+CONFIG_IIO=y
-+CONFIG_IMX7D_ADC=y
-+CONFIG_RN5T618_ADC=y
-+CONFIG_VF610_ADC=y
-+CONFIG_PWM=y
-+CONFIG_PWM_FSL_FTM=y
-+CONFIG_PWM_IMX27=y
-+CONFIG_PWM_IMX_TPM=y
-+CONFIG_PHY_MIXEL_LVDS=y
-+CONFIG_PHY_MIXEL_LVDS_COMBO=y
-+CONFIG_NVMEM_IMX_OCOTP=y
-+CONFIG_NVMEM_SNVS_LPGPR=y
-+CONFIG_TEE=y
-+CONFIG_OPTEE=y
-+CONFIG_MUX_MMIO=y
-+CONFIG_SIOX=m
-+CONFIG_SIOX_BUS_GPIO=m
-+CONFIG_MXC_SIM=y
-+CONFIG_MXC_IPU=y
-+CONFIG_MXC_SIMv2=y
-+CONFIG_MXC_MLB150=y
-+CONFIG_MXC_IPU_V3_PRE=y
-+CONFIG_MXC_HDMI_CEC=y
-+CONFIG_MXC_MIPI_CSI2=y
-+CONFIG_EXT2_FS=y
-+CONFIG_EXT2_FS_XATTR=y
-+CONFIG_EXT2_FS_POSIX_ACL=y
-+CONFIG_EXT2_FS_SECURITY=y
-+CONFIG_EXT3_FS=y
-+CONFIG_EXT3_FS_POSIX_ACL=y
-+CONFIG_EXT3_FS_SECURITY=y
-+CONFIG_QUOTA=y
-+CONFIG_QUOTA_NETLINK_INTERFACE=y
-+# CONFIG_PRINT_QUOTA_WARNING is not set
-+CONFIG_AUTOFS4_FS=y
-+CONFIG_FUSE_FS=y
-+CONFIG_OVERLAY_FS=y
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_EXFAT_FS=y
-+CONFIG_NTFS_FS=y
-+CONFIG_NTFS_RW=y
-+CONFIG_TMPFS=y
-+CONFIG_TMPFS_POSIX_ACL=y
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
-+CONFIG_NFS_V4_1=y
-+CONFIG_NFS_V4_2=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_NLS_DEFAULT="cp437"
-+CONFIG_NLS_CODEPAGE_437=y
-+CONFIG_NLS_ASCII=y
-+CONFIG_NLS_ISO8859_1=y
-+CONFIG_NLS_ISO8859_15=m
-+CONFIG_NLS_UTF8=y
-+CONFIG_SECURITYFS=y
-+CONFIG_CRYPTO_USER=y
-+CONFIG_CRYPTO_TEST=m
-+CONFIG_CRYPTO_ECHAINIV=m
-+CONFIG_CRYPTO_TLS=m
-+CONFIG_CRYPTO_CFB=m
-+CONFIG_CRYPTO_CTS=m
-+CONFIG_CRYPTO_LRW=m
-+CONFIG_CRYPTO_OFB=m
-+CONFIG_CRYPTO_PCBC=m
-+CONFIG_CRYPTO_ESSIV=m
-+CONFIG_CRYPTO_XCBC=m
-+CONFIG_CRYPTO_VMAC=m
-+CONFIG_CRYPTO_MD4=m
-+CONFIG_CRYPTO_MD5=m
-+CONFIG_CRYPTO_MICHAEL_MIC=y
-+CONFIG_CRYPTO_RMD128=m
-+CONFIG_CRYPTO_RMD160=m
-+CONFIG_CRYPTO_RMD256=m
-+CONFIG_CRYPTO_RMD320=m
-+CONFIG_CRYPTO_SHA512=m
-+CONFIG_CRYPTO_SHA3=m
-+CONFIG_CRYPTO_SM3=m
-+CONFIG_CRYPTO_STREEBOG=m
-+CONFIG_CRYPTO_TGR192=m
-+CONFIG_CRYPTO_WP512=m
-+CONFIG_CRYPTO_ANUBIS=m
-+CONFIG_CRYPTO_ARC4=m
-+CONFIG_CRYPTO_BLOWFISH=m
-+CONFIG_CRYPTO_CAMELLIA=m
-+CONFIG_CRYPTO_CAST5=m
-+CONFIG_CRYPTO_CAST6=m
-+CONFIG_CRYPTO_DES=m
-+CONFIG_CRYPTO_FCRYPT=m
-+CONFIG_CRYPTO_KHAZAD=m
-+CONFIG_CRYPTO_SALSA20=m
-+CONFIG_CRYPTO_SEED=m
-+CONFIG_CRYPTO_SERPENT=m
-+CONFIG_CRYPTO_SM4=m
-+CONFIG_CRYPTO_TEA=m
-+CONFIG_CRYPTO_TWOFISH=m
-+CONFIG_CRYPTO_DEFLATE=y
-+CONFIG_CRYPTO_LZO=y
-+CONFIG_CRYPTO_ZSTD=y
-+CONFIG_CRYPTO_ANSI_CPRNG=m
-+CONFIG_CRYPTO_USER_API_RNG=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
-+CONFIG_CRYPTO_DEV_SAHARA=y
-+CONFIG_CRYPTO_DEV_MXS_DCP=y
-+CONFIG_CRC_CCITT=m
-+CONFIG_CRC_T10DIF=y
-+CONFIG_CRC_ITU_T=m
-+CONFIG_CRC7=m
-+CONFIG_LIBCRC32C=m
-+CONFIG_DMA_CMA=y
-+CONFIG_FONTS=y
-+CONFIG_FONT_8x8=y
-+CONFIG_FONT_8x16=y
-+CONFIG_PRINTK_TIME=y
-+# CONFIG_DEBUG_BUGVERBOSE is not set
-+CONFIG_MAGIC_SYSRQ=y
-+CONFIG_DEBUG_FS=y
-+# CONFIG_SCHED_DEBUG is not set
-+# CONFIG_DEBUG_PREEMPT is not set
-+# CONFIG_FTRACE is not set
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/bluetooth/btrtl.c linux-imx-lf-5.10.52-2.1.0/drivers/bluetooth/btrtl.c
---- linux-imx/drivers/bluetooth/btrtl.c	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/bluetooth/btrtl.c	2022-10-09 13:19:22.626732206 +0800
-@@ -136,12 +136,12 @@
- 	  .fw_name  = "rtl_bt/rtl8761a_fw.bin",
- 	  .cfg_name = "rtl_bt/rtl8761a_config" },
-
--	/* 8761B */
-+	/* 8761BU */
- 	{ IC_INFO(RTL_ROM_LMP_8761A, 0xb),
- 	  .config_needed = false,
- 	  .has_rom_version = true,
--	  .fw_name  = "rtl_bt/rtl8761b_fw.bin",
--	  .cfg_name = "rtl_bt/rtl8761b_config" },
-+	  .fw_name  = "rtl_bt/rtl8761bu_fw.bin",
-+	  .cfg_name = "rtl_bt/rtl8761bu_config" },
-
- 	/* 8822C with UART interface */
- 	{ .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_HCIREV |
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/bluetooth/btusb.c linux-imx-lf-5.10.52-2.1.0/drivers/bluetooth/btusb.c
---- linux-imx/drivers/bluetooth/btusb.c	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/bluetooth/btusb.c	2022-10-09 13:19:22.626732206 +0800
-@@ -419,6 +419,9 @@
- 	{ USB_DEVICE(0x0bda, 0xb009), .driver_info = BTUSB_REALTEK },
- 	{ USB_DEVICE(0x2ff8, 0xb011), .driver_info = BTUSB_REALTEK },
-
-+	/*  Additional Realtek 8761B Bluetooth devices */
-+	{ USB_DEVICE(0x2357, 0x0604), .driver_info = BTUSB_REALTEK },
-+
- 	/* Additional Realtek 8821AE Bluetooth devices */
- 	{ USB_DEVICE(0x0b05, 0x17dc), .driver_info = BTUSB_REALTEK },
- 	{ USB_DEVICE(0x13d3, 0x3414), .driver_info = BTUSB_REALTEK },
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/video/backlight/pwm_bl.c linux-imx-lf-5.10.52-2.1.0/drivers/video/backlight/pwm_bl.c
---- linux-imx/drivers/video/backlight/pwm_bl.c	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/video/backlight/pwm_bl.c	2022-10-09 13:19:22.626732206 +0800
-@@ -558,6 +558,7 @@
- 	if (!state.period && (data->pwm_period_ns > 0))
- 		state.period = data->pwm_period_ns;
-
-+	state.enabled = true; /* Add by guowenxue to enalbe backlight as default */
- 	ret = pwm_apply_state(pb->pwm, &state);
- 	if (ret) {
- 		dev_err(&pdev->dev, "failed to apply initial PWM state: %d\n",
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-lf-5.10.52-2.1.0/Makefile
---- linux-imx/Makefile	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/Makefile	2022-10-09 13:20:41.118045212 +0800
-@@ -367,7 +367,8 @@
- # Alternatively CROSS_COMPILE can be set in the environment.
- # Default value for CROSS_COMPILE is not to prefix executables
- # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
--ARCH		?= $(SUBARCH)
-+ARCH		?= arm
-+CROSS_COMPILE ?= arm-linux-gnueabihf-
-
- # Architecture as present in compile.h
- UTS_MACHINE 	:= $(ARCH)
-@@ -1353,6 +1354,9 @@
- %.dtb: include/config/kernel.release scripts_dtc
- 	$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
-
-+%.dtbo: include/config/kernel.release scripts_dtc
-+	$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
-+
- PHONY += dtbs dtbs_install dtbs_check
- dtbs: include/config/kernel.release scripts_dtc
- 	$(Q)$(MAKE) $(build)=$(dtstree)
-@@ -1833,6 +1837,7 @@
- 		\( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \
- 		-o -name '*.ko.*' \
- 		-o -name '*.dtb' -o -name '*.dtb.S' -o -name '*.dt.yaml' \
-+		-o -name '*.dtbo' \
- 		-o -name '*.dwo' -o -name '*.lst' \
- 		-o -name '*.su' -o -name '*.mod' \
- 		-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/scripts/Makefile.lib linux-imx-lf-5.10.52-2.1.0/scripts/Makefile.lib
---- linux-imx/scripts/Makefile.lib	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/scripts/Makefile.lib	2022-10-09 13:19:22.630732171 +0800
-@@ -325,6 +325,16 @@
- $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
- 	$(call if_changed_dep,dtc)
-
-+quiet_cmd_dtco = DTCO     $@
-+cmd_dtco = $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
-+	$(DTC) -O dtb -o $@ -b 0 \
-+		$(addprefix -i,$(dir $<) $(DTC_INCLUDE)) $(DTC_FLAGS) \
-+		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
-+	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
-+
-+$(obj)/%.dtbo: $(src)/%.dts $(DTC) FORCE
-+	$(call if_changed_dep,dtco)
-+
- DT_CHECKER ?= dt-validate
- DT_BINDING_DIR := Documentation/devicetree/bindings
- # DT_TMP_SCHEMA may be overridden from Documentation/devicetree/bindings/Makefile
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/sound/soc/fsl/fsl_sai.c linux-imx-lf-5.10.52-2.1.0/sound/soc/fsl/fsl_sai.c
---- linux-imx/sound/soc/fsl/fsl_sai.c	2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-lf-5.10.52-2.1.0/sound/soc/fsl/fsl_sai.c	2022-10-09 13:19:22.630732171 +0800
-@@ -1349,7 +1349,7 @@
- 		sai->bus_clk = NULL;
- 	}
-
--	for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
-+	for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {
- 		sprintf(tmp, "mclk%d", i);
- 		sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
- 		if (IS_ERR(sai->mclk_clk[i])) {
diff --git a/kernel/patches/igkboard-6ull/linux-imx-lf-5.15.32-2.0.0.patch b/kernel/patches/igkboard-6ull/linux-imx-lf-6.1.36-2.1.0.patch
similarity index 75%
rename from kernel/patches/igkboard-6ull/linux-imx-lf-5.15.32-2.0.0.patch
rename to kernel/patches/igkboard-6ull/linux-imx-lf-6.1.36-2.1.0.patch
index a5a8521..01d5f68 100644
--- a/kernel/patches/igkboard-6ull/linux-imx-lf-5.15.32-2.0.0.patch
+++ b/kernel/patches/igkboard-6ull/linux-imx-lf-6.1.36-2.1.0.patch
@@ -1,9 +1,577 @@
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/igkboard.dts
---- linux-imx/arch/arm/boot/dts/igkboard.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/igkboard.dts	2022-11-28 06:04:24.463613926 -0800
-@@ -0,0 +1,609 @@
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/adc.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/adc.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/adc.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/adc.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,27 @@
 +/*
-+ * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board)
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, ADC interfaces */
++
++&adc1 {
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_adc1>;
++    num-channels = <5>;
++    vref-supply = <&reg_peri_3v3>;
++    status = "okay";
++};
++
++&iomuxc {
++    pinctrl_adc1: adc1grp {
++        fsl,pins = <
++            MX6UL_PAD_GPIO1_IO01__GPIO1_IO01        0xb0 /* ADC1_1 --->TS_YN */
++            MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0xb0 /* ADC1_4 --->TS_XP */
++        >;
++    };
++};
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/cam.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/cam.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/cam.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/cam.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,24 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++/* MIPI-DSI2 camera overlay */
++
++&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
++	status = "okay";
++};
++
++&csi {
++	status = "okay";
++};
++
++&i2c2 {
++	ov5640@3c {
++		status = "okay";
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/can1.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/can1.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/can1.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/can1.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, CAN1 interfaces */
++
++&can1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_flexcan1>;
++	xceiver-supply = <&reg_can_3v3>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_flexcan1: flexcan1grp{
++		fsl,pins = <
++			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
++			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
++		>;
++	};	
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/can2.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/can2.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/can2.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/can2.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, CAN2 interfaces */
++
++&can2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_flexcan2>;
++	xceiver-supply = <&reg_can_3v3>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_flexcan2: flexcan2grp{
++		fsl,pins = <
++			MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	0x1b020
++			MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	0x1b020
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/i2c1.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/i2c1.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/i2c1.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/i2c1.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, I2C1 interfaces */
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_i2c1: i2c1grp {
++		fsl,pins = <
++			MX6UL_PAD_GPIO1_IO02__I2C1_SCL	0x4001b8b0
++			MX6UL_PAD_GPIO1_IO03__I2C1_SDA	0x4001b8b0
++		>;
++	};	
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/lcd.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/lcd.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/lcd.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/lcd.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* LCD DRM display overlay */
++
++&backlight_lcd {
++	status = "okay";
++};
++
++&i2c2 {
++	gt9xx@5d {
++		status = "okay";
++	};
++};
++
++&lcdif {
++	assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
++	assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
++	status = "okay";
++
++	port {
++		display_output: endpoint {
++			remote-endpoint = <&panel_input>;
++		};
++	};
++};
++
++&panel {
++	compatible = "lingyun,igkboard-6ull-panel", "panel-simple";
++	backlight = <&backlight_lcd>;
++	power-supply = <&reg_3p3v>;
++    status = "okay";
++
++    port {
++        panel_input: endpoint {
++            remote-endpoint = <&display_output>;
++        };
++    };
++};
++
++&iomuxc {
++	pinctrl_lcdif_dat: lcdifdatgrp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79
++			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79
++			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79
++			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79
++			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79
++			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79
++			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79
++			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79
++			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79
++			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79
++			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79
++			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79
++			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79
++			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79
++			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79
++			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79
++		>;
++	};
++
++	pinctrl_lcdif_ctrl: lcdifctrlgrp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79
++			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79
++			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79
++			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79
++			MX6UL_PAD_LCD_RESET__LCDIF_RESET	0x79
++		>;
++	};
++};
+\ No newline at end of file
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/Makefile linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/Makefile
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/Makefile	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/Makefile	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,19 @@
++# SPDX-License-Identifier: GPL-2.0
++# required for overlay support
++
++DTC_FLAGS += -@
++dtb-y += can1.dtbo
++dtb-y += can2.dtbo
++dtb-y += i2c1.dtbo
++dtb-y += spi1.dtbo
++dtb-y += uart2.dtbo
++dtb-y += uart3.dtbo
++dtb-y += uart4.dtbo
++dtb-y += uart7.dtbo
++dtb-y += pwm7.dtbo
++dtb-y += pwm8.dtbo
++dtb-y += w1.dtbo
++dtb-y += lcd.dtbo
++dtb-y += cam.dtbo
++dtb-y += nbiot-4g.dtbo
++dtb-y += adc.dtbo
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/nbiot-4g.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/nbiot-4g.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/nbiot-4g.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/nbiot-4g.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,34 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* NB-IoT/4G module use UART8 interfaces, conflict with SPI interface */
++
++&uart8 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi_uart8 &pinctrl_nbiot_ctrl>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_spi_uart8: spi_uart8_grp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_DATA20__UART8_DCE_TX		0x1b0b1 /* MRXD */
++			MX6UL_PAD_LCD_DATA21__UART8_DCE_RX		0x1b0b1 /* MTXD */
++		>;
++	};
++
++	pinctrl_nbiot_ctrl: nbiot_ctrl_grp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_DATA22__GPIO3_IO27		0x17059 /* NB_PWREN/4G_RESET */
++			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15		0x17059 /* NB_MRST/4G_POWER_KEY */
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/pwm7.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/pwm7.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/pwm7.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/pwm7.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, PWM7 interfaces */
++
++&pwm7 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pwm7>;
++	clocks = <&clks IMX6UL_CLK_PWM7>, <&clks IMX6UL_CLK_PWM7>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_pwm7: pwm7grp {
++		fsl,pins = <
++			MX6UL_PAD_JTAG_TCK__PWM7_OUT	0x110b0
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/pwm8.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/pwm8.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/pwm8.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/pwm8.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, PWM8 interfaces, conflict with NB-IoT */
++
++&pwm8 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pwm8_nbiot>;
++	clocks = <&clks IMX6UL_CLK_PWM8>, <&clks IMX6UL_CLK_PWM8>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_pwm8_nbiot: pwm8nbiotgrp {
++		fsl,pins = <
++			MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	0x110b0
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/spi1.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/spi1.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/spi1.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/spi1.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,39 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, SPI1 interfaces, conflict with UART8 */
++
++&ecspi1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi_uart8>;
++	cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
++	status = "okay";
++
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	spidev0: spi@0 {
++		reg = <0>;
++		compatible = "semtech,sx1301";
++		spi-max-frequency = <1000000>;
++	};	
++};
++
++&iomuxc {
++	pinctrl_spi_uart8: spi_uart8_grp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x10b0
++			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x10b0
++			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x10b0
++			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x10b0
++		>;
++	};	
++};
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/uart2.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart2.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/uart2.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart2.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART2 interfaces */
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_uart2: uart2grp {
++		fsl,pins = <
++			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1
++			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1
++		>;
++	};
++};
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/uart3.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart3.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/uart3.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart3.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART3 interfaces */
++
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart3>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_uart3: uart3grp {
++		fsl,pins = <
++			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b1
++			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b1
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/uart4.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart4.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/uart4.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart4.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART4 interfaces */
++
++&uart4 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart4>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_uart4: uart4grp {
++		fsl,pins = <
++			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x1b0b1
++			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x1b0b1
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/uart7.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart7.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/uart7.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/uart7.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART7 interfaces, conflict with LCD display */
++
++&uart7 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart7>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl_uart7: uart7grp {
++		fsl,pins = <
++			MX6UL_PAD_LCD_DATA16__UART7_DCE_TX		0x1b0b1
++			MX6UL_PAD_LCD_DATA17__UART7_DCE_RX		0x1b0b1
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull/w1.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/w1.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull/w1.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull/w1.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,31 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author:  Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "../imx6ul-pinfunc.h"
++
++/* W1(DS18B20) on 40Pin Header Pin#7 (GPIO1_IO18) */
++
++&w1 {
++    compatible = "w1-gpio";
++    status = "okay";
++
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_w1>;
++    gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
++};
++
++
++&iomuxc {
++	pinctrl_w1: w1grp {
++		fsl,pins = <
++			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x110b0
++		>;
++	};
++};
++
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/igkboard-6ull.dts linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull.dts
+--- linux-imx/arch/arm/boot/dts/igkboard-6ull.dts	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/igkboard-6ull.dts	2023-11-06 15:16:50.916823305 +0800
+@@ -0,0 +1,604 @@
++/*
++ * Device Tree Source for LingYun IGKBoard-6ULL(IoT Gateway Kit Board based on i.MX6ULL)
 + * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
 + *
 + * Copyright (C) 2022 LingYun IoT System Studio.
@@ -16,7 +584,7 @@
 +
 +/ {
 +    model = "LingYun IoT System Studio IoT Gateway Board";
-+	compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
++	compatible = "lingyun,igkboard-6ull", "fsl,imx6ull";
 +
 +	chosen {
 +		stdout-path = &uart1;
@@ -406,12 +974,6 @@
 +&iomuxc {
 +	pinctrl-names = "default";
 +
-+	pinctrl_camera_clock: cameraclockgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_CSI_MCLK__CSI_MCLK		0x1b088
-+		>;
-+	};
-+
 +    pinctrl_gpio_leds: gpio-leds {
 +		fsl,pins = <
 +			MX6UL_PAD_NAND_DQS__GPIO4_IO16			0x17059 /* led run */
@@ -442,6 +1004,7 @@
 +		fsl,pins = <
 +        	MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05		0x17059 /* CSI_RST */
 +			MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06		0x17059 /* CSI_PWDN */
++			MX6UL_PAD_CSI_MCLK__CSI_MCLK		0x1b088
 +			MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK	0x1b088
 +			MX6UL_PAD_CSI_VSYNC__CSI_VSYNC		0x1b088
 +			MX6UL_PAD_CSI_HSYNC__CSI_HSYNC		0x1b088
@@ -611,682 +1174,22 @@
 +
 +};
 +
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/Makefile
---- linux-imx/arch/arm/boot/dts/Makefile	2022-11-28 06:08:27.847623408 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/Makefile	2022-11-28 06:04:23.919613905 -0800
-@@ -1586,3 +1586,6 @@
- 	aspeed-bmc-portwell-neptune.dtb \
- 	aspeed-bmc-quanta-q71l.dtb \
- 	aspeed-bmc-supermicro-x11spi.dtb
-+DTC_FLAGS_igkboard := -@
-+dtb-$(CONFIG_SOC_IMX6UL) += igkboard.dtb
-+subdir-$(CONFIG_SOC_IMX6UL) += overlays
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/adc.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/adc.dts
---- linux-imx/arch/arm/boot/dts/overlays/adc.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/adc.dts	2022-11-28 06:04:26.879614021 -0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+/dts-v1/;
-+/plugin/;
+diff -Nuar --no-dereference linux-imx/arch/arm/boot/dts/Makefile linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/Makefile
+--- linux-imx/arch/arm/boot/dts/Makefile	2023-11-02 19:16:16.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/boot/dts/Makefile	2023-11-06 15:18:03.133120462 +0800
+@@ -1749,3 +1749,8 @@
+ 	aspeed-bmc-vegman-n110.dtb \
+ 	aspeed-bmc-vegman-rx20.dtb \
+ 	aspeed-bmc-vegman-sx20.dtb
 +
-+#include "../imx6ul-pinfunc.h"
++DTC_FLAGS_igkboard-6ull := -@
++dtb-$(CONFIG_SOC_IMX6UL) += igkboard-6ull.dtb
++subdir-$(CONFIG_SOC_IMX6UL) += igkboard-6ull
 +
-+/* 40-pin extended GPIO, ADC interfaces */
-+
-+&adc1 {
-+    pinctrl-names = "default";
-+    pinctrl-0 = <&pinctrl_adc1>;
-+    num-channels = <5>;
-+    vref-supply = <&reg_peri_3v3>;
-+    status = "okay";
-+};
-+
-+&iomuxc {
-+    pinctrl_adc1: adc1grp {
-+        fsl,pins = <
-+            MX6UL_PAD_GPIO1_IO01__GPIO1_IO01        0xb0 /* ADC1_1 --->TS_YN */
-+            MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0xb0 /* ADC1_4 --->TS_XP */
-+        >;
-+    };
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/cam.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/cam.dts
---- linux-imx/arch/arm/boot/dts/overlays/cam.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/cam.dts	2022-11-28 06:04:26.883614021 -0800
-@@ -0,0 +1,24 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/* MIPI-DSI2 camera overlay */
-+
-+&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
-+	status = "okay";
-+};
-+
-+&csi {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	ov5640@3c {
-+		status = "okay";
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can1.dts
---- linux-imx/arch/arm/boot/dts/overlays/can1.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can1.dts	2022-11-28 06:04:26.883614021 -0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, CAN1 interfaces */
-+
-+&can1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_flexcan1>;
-+	xceiver-supply = <&reg_can_3v3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_flexcan1: flexcan1grp{
-+		fsl,pins = <
-+			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
-+			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
-+		>;
-+	};	
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can2.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can2.dts
---- linux-imx/arch/arm/boot/dts/overlays/can2.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/can2.dts	2022-11-28 06:04:26.883614021 -0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, CAN2 interfaces */
-+
-+&can2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_flexcan2>;
-+	xceiver-supply = <&reg_can_3v3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_flexcan2: flexcan2grp{
-+		fsl,pins = <
-+			MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	0x1b020
-+			MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	0x1b020
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/i2c1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/i2c1.dts
---- linux-imx/arch/arm/boot/dts/overlays/i2c1.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/i2c1.dts	2022-11-28 06:04:26.887614021 -0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, I2C1 interfaces */
-+
-+&i2c1 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_i2c1>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_i2c1: i2c1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_GPIO1_IO02__I2C1_SCL	0x4001b8b0
-+			MX6UL_PAD_GPIO1_IO03__I2C1_SDA	0x4001b8b0
-+		>;
-+	};	
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/lcd_drm.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd_drm.dts
---- linux-imx/arch/arm/boot/dts/overlays/lcd_drm.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd_drm.dts	2022-11-28 06:04:26.887614021 -0800
-@@ -0,0 +1,82 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* LCD DRM display overlay */
-+
-+&backlight_lcd {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	gt9xx@5d {
-+		status = "okay";
-+	};
-+};
-+
-+&lcdif {
-+	assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
-+	assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
-+	status = "okay";
-+
-+	port {
-+		display_output: endpoint {
-+			remote-endpoint = <&panel_input>;
-+		};
-+	};
-+};
-+
-+&panel {
-+	compatible = "fsl,imx6ull-panel", "panel-simple";
-+	backlight = <&backlight_lcd>;
-+	power-supply = <&reg_3p3v>;
-+	status = "okay";
-+
-+    port {
-+        panel_input: endpoint {
-+            remote-endpoint = <&display_output>;
-+        };
-+    };
-+};
-+
-+&iomuxc {
-+	pinctrl_lcdif_dat: lcdifdatgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79
-+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79
-+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79
-+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79
-+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79
-+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79
-+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79
-+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79
-+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79
-+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79
-+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79
-+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79
-+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79
-+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79
-+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79
-+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79
-+		>;
-+	};
-+
-+	pinctrl_lcdif_ctrl: lcdifctrlgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79
-+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79
-+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79
-+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79
-+			MX6UL_PAD_LCD_RESET__LCDIF_RESET	0x79
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/lcd.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd.dts
---- linux-imx/arch/arm/boot/dts/overlays/lcd.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/lcd.dts	2022-11-28 06:04:26.887614021 -0800
-@@ -0,0 +1,89 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* LCD display overlay */
-+
-+&backlight_lcd {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	gt9xx@5d {
-+		status = "okay";
-+	};
-+};
-+
-+&lcdif {
-+	assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
-+	assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
-+	display = <&display0>;
-+	status = "okay";
-+
-+	display0: display@0 {
-+		bits-per-pixel = <16>;
-+		bus-width = <16>;
-+
-+		display-timings {
-+			native-mode = <&timing0>;
-+
-+			timing0: timing0 {
-+				clock-frequency = <30000000>;
-+				hactive = <800>;
-+				vactive = <480>;
-+				hfront-porch = <40>;
-+				hback-porch = <88>;
-+				hsync-len = <48>;
-+				vback-porch = <32>;
-+				vfront-porch = <13>;
-+				vsync-len = <3>;
-+				hsync-active = <0>;
-+				vsync-active = <0>;
-+				de-active = <1>;
-+				pixelclk-active = <0>;
-+			};
-+		};
-+	};
-+};
-+
-+&iomuxc {
-+	pinctrl_lcdif_dat: lcdifdatgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79
-+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79
-+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79
-+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79
-+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79
-+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79
-+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79
-+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79
-+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79
-+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79
-+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79
-+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79
-+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79
-+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79
-+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79
-+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79
-+		>;
-+	};
-+
-+	pinctrl_lcdif_ctrl: lcdifctrlgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79
-+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79
-+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79
-+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79
-+			MX6UL_PAD_LCD_RESET__LCDIF_RESET	0x79
-+		>;
-+	};
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/Makefile linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/Makefile
---- linux-imx/arch/arm/boot/dts/overlays/Makefile	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/Makefile	2022-11-28 06:04:26.879614021 -0800
-@@ -0,0 +1,20 @@
-+# SPDX-License-Identifier: GPL-2.0
-+# required for overlay support
-+
-+DTC_FLAGS += -@
-+dtb-y += can1.dtbo
-+dtb-y += can2.dtbo
-+dtb-y += i2c1.dtbo
-+dtb-y += spi1.dtbo
-+dtb-y += uart2.dtbo
-+dtb-y += uart3.dtbo
-+dtb-y += uart4.dtbo
-+dtb-y += uart7.dtbo
-+dtb-y += pwm7.dtbo
-+dtb-y += pwm8.dtbo
-+dtb-y += w1.dtbo
-+dtb-y += lcd.dtbo
-+dtb-y += cam.dtbo
-+dtb-y += nbiot-4g.dtbo
-+dtb-y += adc.dtbo
-+dtb-y += lcd_drm.dtbo
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/nbiot-4g.dts
---- linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/nbiot-4g.dts	2022-11-28 06:04:26.891614021 -0800
-@@ -0,0 +1,34 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* NB-IoT/4G module use UART8 interfaces, conflict with SPI interface */
-+
-+&uart8 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_spi_uart8 &pinctrl_nbiot_ctrl>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_spi_uart8: spi_uart8_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA20__UART8_DCE_TX		0x1b0b1 /* MRXD */
-+			MX6UL_PAD_LCD_DATA21__UART8_DCE_RX		0x1b0b1 /* MTXD */
-+		>;
-+	};
-+
-+	pinctrl_nbiot_ctrl: nbiot_ctrl_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA22__GPIO3_IO27		0x17059 /* NB_PWREN/4G_RESET */
-+			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15		0x17059 /* NB_MRST/4G_POWER_KEY */
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm7.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm7.dts
---- linux-imx/arch/arm/boot/dts/overlays/pwm7.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm7.dts	2022-11-28 06:04:26.891614021 -0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, PWM7 interfaces */
-+
-+&pwm7 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm7>;
-+	clocks = <&clks IMX6UL_CLK_PWM7>, <&clks IMX6UL_CLK_PWM7>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_pwm7: pwm7grp {
-+		fsl,pins = <
-+			MX6UL_PAD_JTAG_TCK__PWM7_OUT	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm8.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm8.dts
---- linux-imx/arch/arm/boot/dts/overlays/pwm8.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/pwm8.dts	2022-11-28 06:04:26.895614021 -0800
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/clock/imx6ul-clock.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, PWM8 interfaces, conflict with NB-IoT */
-+
-+&pwm8 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm8_nbiot>;
-+	clocks = <&clks IMX6UL_CLK_PWM8>, <&clks IMX6UL_CLK_PWM8>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_pwm8_nbiot: pwm8nbiotgrp {
-+		fsl,pins = <
-+			MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/spi1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/spi1.dts
---- linux-imx/arch/arm/boot/dts/overlays/spi1.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/spi1.dts	2022-11-28 06:04:26.895614021 -0800
-@@ -0,0 +1,39 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, SPI1 interfaces, conflict with UART8 */
-+
-+&ecspi1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_spi_uart8>;
-+	cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
-+	status = "okay";
-+
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	spidev0: spi@0 {
-+		reg = <0>;
-+		compatible = "semtech,sx1301";
-+		spi-max-frequency = <1000000>;
-+	};	
-+};
-+
-+&iomuxc {
-+	pinctrl_spi_uart8: spi_uart8_grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x10b0
-+			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x10b0
-+			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x10b0
-+			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x10b0
-+		>;
-+	};	
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart2.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart2.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart2.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart2.dts	2022-11-28 06:04:26.895614021 -0800
-@@ -0,0 +1,26 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART2 interfaces */
-+
-+&uart2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart2>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart2: uart2grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart3.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart3.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart3.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart3.dts	2022-11-28 06:04:26.899614021 -0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART3 interfaces */
-+
-+&uart3 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart3: uart3grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart4.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart4.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart4.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart4.dts	2022-11-28 06:04:26.899614021 -0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART4 interfaces */
-+
-+&uart4 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart4>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart4: uart4grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x1b0b1
-+			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart7.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart7.dts
---- linux-imx/arch/arm/boot/dts/overlays/uart7.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/uart7.dts	2022-11-28 06:04:26.899614021 -0800
-@@ -0,0 +1,27 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include "../imx6ul-pinfunc.h"
-+
-+/* 40-pin extended GPIO, UART7 interfaces, conflict with LCD display */
-+
-+&uart7 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart7>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl_uart7: uart7grp {
-+		fsl,pins = <
-+			MX6UL_PAD_LCD_DATA16__UART7_DCE_TX		0x1b0b1
-+			MX6UL_PAD_LCD_DATA17__UART7_DCE_RX		0x1b0b1
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/w1.dts linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/w1.dts
---- linux-imx/arch/arm/boot/dts/overlays/w1.dts	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/boot/dts/overlays/w1.dts	2022-11-28 06:04:26.903614021 -0800
-@@ -0,0 +1,31 @@
-+/*
-+ * Copyright (C) 2022 LingYun IoT System Studio
-+ * Author:  Guo Wenxue<guowenxue@gmail.com>
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include "../imx6ul-pinfunc.h"
-+
-+/* W1(DS18B20) on 40Pin Header Pin#7 (GPIO1_IO18) */
-+
-+&w1 {
-+    compatible = "w1-gpio";
-+    status = "okay";
-+
-+    pinctrl-names = "default";
-+    pinctrl-0 = <&pinctrl_w1>;
-+    gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
-+};
-+
-+
-+&iomuxc {
-+	pinctrl_w1: w1grp {
-+		fsl,pins = <
-+			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x110b0
-+		>;
-+	};
-+};
-+
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-lf-5.10.52-2.1.0/arch/arm/configs/igkboard_defconfig
---- linux-imx/arch/arm/configs/igkboard_defconfig	1969-12-31 16:00:00.000000000 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/arch/arm/configs/igkboard_defconfig	2022-11-28 06:04:27.851614058 -0800
-@@ -0,0 +1,587 @@
+diff -Nuar --no-dereference linux-imx/arch/arm/configs/igkboard-6ull_defconfig linux-imx-lf-6.1.36-2.1.0/arch/arm/configs/igkboard-6ull_defconfig
+--- linux-imx/arch/arm/configs/igkboard-6ull_defconfig	1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/arch/arm/configs/igkboard-6ull_defconfig	2023-11-06 15:27:28.409402087 +0800
+@@ -0,0 +1,604 @@
 +CONFIG_KERNEL_LZO=y
 +CONFIG_SYSVIPC=y
 +CONFIG_POSIX_MQUEUE=y
@@ -1351,8 +1254,6 @@
 +CONFIG_NET=y
 +CONFIG_PACKET=y
 +CONFIG_UNIX=y
-+CONFIG_TLS=y
-+CONFIG_TLS_DEVICE=y
 +CONFIG_INET=y
 +CONFIG_IP_MULTICAST=y
 +CONFIG_IP_PNP=y
@@ -1533,9 +1434,6 @@
 +CONFIG_GPIO_PCF857X=y
 +CONFIG_GPIO_STMPE=y
 +CONFIG_GPIO_74X164=y
-+CONFIG_W1=y
-+CONFIG_W1_MASTER_GPIO=y
-+CONFIG_W1_SLAVE_THERM=y
 +CONFIG_POWER_RESET=y
 +CONFIG_POWER_RESET_SYSCON=y
 +CONFIG_POWER_RESET_SYSCON_POWEROFF=y
@@ -1850,10 +1748,7 @@
 +CONFIG_CRYPTO_TEA=m
 +CONFIG_CRYPTO_TWOFISH=m
 +CONFIG_CRYPTO_ANSI_CPRNG=m
-+CONFIG_CRYPTO_USER_API_HASH=m
-+CONFIG_CRYPTO_USER_API_SKCIPHER=m
 +CONFIG_CRYPTO_USER_API_RNG=m
-+CONFIG_CRYPTO_USER_API_AEAD=m
 +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
 +CONFIG_CRYPTO_DEV_FSL_CAAM=m
 +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
@@ -1874,99 +1769,149 @@
 +# CONFIG_SCHED_DEBUG is not set
 +# CONFIG_DEBUG_PREEMPT is not set
 +# CONFIG_FTRACE is not set
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/gpu/drm/mxsfb/mxsfb_drv.c linux-imx-lf-5.10.52-2.1.0/drivers/gpu/drm/mxsfb/mxsfb_drv.c
---- linux-imx/drivers/gpu/drm/mxsfb/mxsfb_drv.c	2022-11-28 06:08:47.387624169 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/gpu/drm/mxsfb/mxsfb_drv.c	2022-11-28 06:04:49.967614920 -0800
-@@ -407,7 +407,7 @@
- 	.probe		= mxsfb_probe,
++
++# enable AF_ALG
++CONFIG_CRYPTO_USER_API_HASH=m
++CONFIG_CRYPTO_USER_API_SKCIPHER=m
++CONFIG_CRYPTO_USER_API_AEAD=m
++
++# enable KTLS
++CONFIG_TLS=y
++CONFIG_TLS_DEVICE=y
++
++#enable trust based hardware key
++CONFIG_TRUSTED_KEYS=m
++CONFIG_TRUSTED_KEYS_TPM=n
++CONFIG_TRUSTED_KEYS_TEE=n
++CONFIG_TRUSTED_KEYS_CAAM=n
++CONFIG_TRUSTED_KEYS_DCP=y
++
++# Custom Addition of Linke
++# enable one wire device driver
++CONFIG_W1=y
++CONFIG_W1_MASTER_GPIO=y
++CONFIG_W1_SLAVE_THERM=y
++
++# enable drm to realize fb
++CONFIG_DRM_MXSFB=y
+diff -Nuar --no-dereference linux-imx/drivers/gpu/drm/mxsfb/mxsfb_drv.c linux-imx-lf-6.1.36-2.1.0/drivers/gpu/drm/mxsfb/mxsfb_drv.c
+--- linux-imx/drivers/gpu/drm/mxsfb/mxsfb_drv.c	2023-11-02 19:16:20.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/drivers/gpu/drm/mxsfb/mxsfb_drv.c	2023-11-06 15:53:47.190930928 +0800
+@@ -370,7 +370,7 @@
+ 	if (ret)
+ 		goto err_unload;
+ 
+-	drm_fbdev_generic_setup(drm, 32);
++	drm_fbdev_generic_setup(drm, 16); /* modify color depth to support RGB565 LCD by guowenxue */
+ 
+ 	return 0;
+ 
+@@ -426,7 +426,7 @@
  	.remove		= mxsfb_remove,
+ 	.shutdown	= mxsfb_shutdown,
  	.driver	= {
 -		.name		= "mxsfb",
 +		.name		= "mxsfb-drm",
  		.of_match_table	= mxsfb_dt_ids,
  		.pm		= &mxsfb_pm_ops,
  	},
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/gpu/drm/panel/panel-simple.c linux-imx-lf-5.10.52-2.1.0/drivers/gpu/drm/panel/panel-simple.c
---- linux-imx/drivers/gpu/drm/panel/panel-simple.c	2022-11-28 06:08:48.747624222 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/gpu/drm/panel/panel-simple.c	2022-11-28 06:04:51.015614961 -0800
-@@ -4502,8 +4502,37 @@
+diff -Nuar --no-dereference linux-imx/drivers/gpu/drm/panel/panel-simple.c linux-imx-lf-6.1.36-2.1.0/drivers/gpu/drm/panel/panel-simple.c
+--- linux-imx/drivers/gpu/drm/panel/panel-simple.c	2023-11-02 19:16:20.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/drivers/gpu/drm/panel/panel-simple.c	2023-11-06 15:22:10.121834728 +0800
+@@ -4024,8 +4024,33 @@
  	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
  };
  
-+static const struct drm_display_mode fsl_imx6ull_panel_mode[] = {
-+	{
-+		.clock = 30000,
-+		.hdisplay = 800,
-+		.hsync_start = 800 + 40,
-+		.hsync_end = 800 + 40 + 48,
-+		.htotal = 800 + 40 + 48 + 88,
-+		.vdisplay = 480,
-+		.vsync_start = 480 + 13,
-+		.vsync_end = 480 + 13 + 3,
-+		.vtotal = 480 + 13 + 3 + 32,
-+		.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-+	},
++static const struct drm_display_mode igkboard_6ull_panel_mode[] = {
++    {    
++        .clock = 30000,
++        .hdisplay = 800, 
++        .hsync_start = 800 + 40,
++        .hsync_end = 800 + 40 + 48,
++        .htotal = 800 + 40 + 48 + 88,
++        .vdisplay = 480, 
++        .vsync_start = 480 + 13,
++        .vsync_end = 480 + 13 + 3, 
++        .vtotal = 480 + 13 + 3 + 32,
++        .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
++    },   
 +};
 +
-+static const struct panel_desc fsl_imx6ull_panel = {
-+	.modes = fsl_imx6ull_panel_mode,
-+	.num_modes = 1,
-+	.bpc = 8,
-+	.size = {
-+		.width = 110,
-+		.height = 60,
-+	},
-+	.bus_format = MEDIA_BUS_FMT_RGB565_1X16,
++static const struct panel_desc igkboard_6ull_panel = {
++    .modes = igkboard_6ull_panel_mode,
++    .num_modes = 1, 
++    .bpc = 8, 
++    .bus_format = MEDIA_BUS_FMT_RGB565_1X16,
 +};
 +
  static const struct of_device_id platform_of_match[] = {
  	{
-+		.compatible = "fsl,imx6ull-panel",
-+		.data = &fsl_imx6ull_panel,
++		.compatible = "lingyun,igkboard-6ull-panel",
++		.data = &igkboard_6ull_panel,
 +	}, {
  		.compatible = "ampire,am-1280800n3tzqw-t00h",
  		.data = &ampire_am_1280800n3tzqw_t00h,
  	}, {
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/video/backlight/pwm_bl.c linux-imx-lf-5.10.52-2.1.0/drivers/video/backlight/pwm_bl.c
---- linux-imx/drivers/video/backlight/pwm_bl.c	2022-11-28 06:09:10.931625086 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/video/backlight/pwm_bl.c	2022-11-28 06:05:23.943616244 -0800
-@@ -552,6 +552,7 @@
- 	if (!state.period && (data->pwm_period_ns > 0))
- 		state.period = data->pwm_period_ns;
+diff -Nuar --no-dereference linux-imx/drivers/video/backlight/pwm_bl.c linux-imx-lf-6.1.36-2.1.0/drivers/video/backlight/pwm_bl.c
+--- linux-imx/drivers/video/backlight/pwm_bl.c	2023-11-02 19:16:23.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/drivers/video/backlight/pwm_bl.c	2023-11-06 15:23:41.654067332 +0800
+@@ -53,7 +53,7 @@
+ 	if (err < 0)
+ 		dev_err(pb->dev, "failed to enable power supply\n");
  
-+	state.enabled = true; /*  Add by guowenxue to enalbe backlight as default */
- 	ret = pwm_apply_state(pb->pwm, &state);
- 	if (ret) {
- 		dev_err(&pdev->dev, "failed to apply initial PWM state: %d\n",
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/video/fbdev/mxsfb.c linux-imx-lf-5.10.52-2.1.0/drivers/video/fbdev/mxsfb.c
---- linux-imx/drivers/video/fbdev/mxsfb.c	2022-11-28 06:09:11.115625093 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/drivers/video/fbdev/mxsfb.c	2022-11-28 06:05:24.299616257 -0800
+-	state.enabled = true;
++	state.enabled = true; /* enalbe backlight as default */
+ 	pwm_apply_state(pb->pwm, &state);
+ 
+ 	if (pb->post_pwm_on_delay)
+diff -Nuar --no-dereference linux-imx/drivers/video/fbdev/core/fbcon.c linux-imx-lf-6.1.36-2.1.0/drivers/video/fbdev/core/fbcon.c
+--- linux-imx/drivers/video/fbdev/core/fbcon.c	2023-11-02 19:16:23.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/drivers/video/fbdev/core/fbcon.c	2023-11-06 15:25:02.898865305 +0800
+@@ -345,6 +345,7 @@
+ 	return color;
+ }
+ 
++#if 0 /* comment by guowenxue */
+ static void fb_flashcursor(struct work_struct *work)
+ {
+ 	struct fbcon_ops *ops = container_of(work, struct fbcon_ops, cursor_work.work);
+@@ -384,6 +385,9 @@
+ 	queue_delayed_work(system_power_efficient_wq, &ops->cursor_work,
+ 			   ops->cur_blink_jiffies);
+ }
++#else
++static void fb_flashcursor(struct work_struct *work) {}
++#endif
+ 
+ static void fbcon_add_cursor_work(struct fb_info *info)
+ {
+@@ -1301,6 +1305,7 @@
+ 		ops->clear_margins(vc, info, margin_color, bottom_only);
+ }
+ 
++#if 0 /* comment by guowenxue */
+ static void fbcon_cursor(struct vc_data *vc, int mode)
+ {
+ 	struct fb_info *info = fbcon_info_from_console(vc->vc_num);
+@@ -1325,6 +1330,9 @@
+ 	ops->cursor(vc, info, mode, get_color(vc, info, c, 1),
+ 		    get_color(vc, info, c, 0));
+ }
++#else
++static void fbcon_cursor(struct vc_data *vc, int mode) {}
++#endif
+ 
+ static int scrollback_phys_max = 0;
+ static int scrollback_max = 0;
+diff -Nuar --no-dereference linux-imx/drivers/video/fbdev/mxsfb.c linux-imx-lf-6.1.36-2.1.0/drivers/video/fbdev/mxsfb.c
+--- linux-imx/drivers/video/fbdev/mxsfb.c	2023-11-02 19:16:23.000000000 +0800
++++ linux-imx-lf-6.1.36-2.1.0/drivers/video/fbdev/mxsfb.c	2023-11-06 15:25:54.296899119 +0800
 @@ -1586,7 +1586,7 @@
  
  static const struct of_device_id mxsfb_dt_ids[] = {
  	{ .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], },
 -	{ .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
-+	// { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
++	//{ .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], }, /* Use DRM driver as default */
  	{ .compatible = "fsl,imx7ulp-lcdif", .data = &mxsfb_devtype[2], },
  	{ /* sentinel */ }
  };
-diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-lf-5.10.52-2.1.0/Makefile
---- linux-imx/Makefile	2022-11-28 06:08:27.447623392 -0800
-+++ linux-imx-lf-5.10.52-2.1.0/Makefile	2022-11-28 06:04:21.247613801 -0800
-@@ -382,6 +382,8 @@
- # Default value for CROSS_COMPILE is not to prefix executables
- # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
- ARCH		?= $(SUBARCH)
-+ARCH = arm
-+CROSS_COMPILE ?= /opt/gcc-arm-10.3-2021.07/bin/arm-none-linux-gnueabihf-
- 
- # Architecture as present in compile.h
- UTS_MACHINE 	:= $(ARCH)
-@@ -1880,6 +1882,7 @@
- 		\( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \
- 		-o -name '*.ko.*' \
- 		-o -name '*.dtb' -o -name '*.dtbo' -o -name '*.dtb.S' -o -name '*.dt.yaml' \
-+		-o -name '*.dtbo' \
- 		-o -name '*.dwo' -o -name '*.lst' \
- 		-o -name '*.su' -o -name '*.mod' \
- 		-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \

--
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