From a50ad157870589b3919d9e375f976fff39347cbe Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Thu, 06 Oct 2022 10:16:25 +0800
Subject: [PATCH] remove unused patch file
---
/dev/null | 1536 -----------------------------------------------------------
1 files changed, 0 insertions(+), 1,536 deletions(-)
diff --git a/bsp/bootloader/patch/uboot-imx-igkboard.patch b/bsp/bootloader/patch/uboot-imx-igkboard.patch
deleted file mode 100644
index 77c1ea8..0000000
--- a/bsp/bootloader/patch/uboot-imx-igkboard.patch
+++ /dev/null
@@ -1,418 +0,0 @@
-diff -Nuar uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi uboot-imx-igkboard/arch/arm/dts/imx6ul-14x14-evk.dtsi
---- uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi 2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-igkboard/arch/arm/dts/imx6ul-14x14-evk.dtsi 2022-01-17 11:43:49.571146566 +0800
-@@ -21,7 +21,6 @@
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-- gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- off-on-delay-us = <20000>;
- enable-active-high;
- };
-@@ -83,6 +82,9 @@
- pinctrl-0 = <&pinctrl_enet1>;
- phy-mode = "rmii";
- phy-handle = <ðphy0>;
-+ phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
- status = "okay";
- };
-
-@@ -91,14 +93,17 @@
- pinctrl-0 = <&pinctrl_enet2>;
- phy-mode = "rmii";
- phy-handle = <ðphy1>;
-+ phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
-- ethphy0: ethernet-phy@2 {
-- reg = <2>;
-+ ethphy0: ethernet-phy@0 {
-+ reg = <0>;
- micrel,led-mode = <1>;
- clocks = <&clks IMX6UL_CLK_ENET_REF>;
- clock-names = "rmii-ref";
-@@ -151,21 +156,21 @@
- status = "okay";
-
- display0: display@0 {
-- bits-per-pixel = <24>;
-- bus-width = <24>;
-+ bits-per-pixel = <16>;
-+ bus-width = <16>;
-
- display-timings {
- native-mode = <&timing0>;
- timing0: timing0 {
-- clock-frequency = <9200000>;
-- hactive = <480>;
-- vactive = <272>;
-- hfront-porch = <8>;
-- hback-porch = <4>;
-- hsync-len = <41>;
-- vback-porch = <2>;
-- vfront-porch = <4>;
-- vsync-len = <10>;
-+ clock-frequency = <30000000>;
-+ hactive = <800>;
-+ vactive = <480>;
-+ hfront-porch = <40>;
-+ hback-porch = <88>;
-+ hsync-len = <48>;
-+ vback-porch = <32>;
-+ vfront-porch = <13>;
-+ vsync-len = <3>;
-
- hsync-active = <0>;
- vsync-active = <0>;
-@@ -312,6 +317,7 @@
- MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
- MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
- MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0 /* ENET1 RESET */
- >;
- };
-
-@@ -327,6 +333,7 @@
- MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x10B0 /* ENET2 RESET */
- >;
- };
-
-@@ -423,7 +430,6 @@
- MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
- MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
- MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
-- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
- >;
- };
-
-@@ -448,7 +454,6 @@
- fsl,pins = <
- MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
- MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
-- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
- >;
- };
-@@ -492,9 +497,7 @@
- MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
- MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
- MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
-- MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
-- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
-+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
- >;
- };
-
-diff -Nuar uboot-imx/configs/igkboard_defconfig uboot-imx-igkboard/configs/igkboard_defconfig
---- uboot-imx/configs/igkboard_defconfig 1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-igkboard/configs/igkboard_defconfig 2022-03-27 21:51:34.908762785 +0800
-@@ -0,0 +1,96 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_MX6=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_MEMTEST_START=0x80000000
-+CONFIG_SYS_MEMTEST_END=0x88000000
-+CONFIG_ENV_SIZE=0x2000
-+CONFIG_ENV_OFFSET=0xE0000
-+CONFIG_MX6ULL=y
-+CONFIG_TARGET_MX6ULL_14X14_EVK=y
-+CONFIG_DM_GPIO=y
-+# CONFIG_CMD_QSPIHDR is not set
-+CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
-+# CONFIG_LOCALVERSION_AUTO is not set
-+CONFIG_SUPPORT_RAW_INITRD=y
-+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
-+CONFIG_BOOTDELAY=3
-+CONFIG_BOARD_EARLY_INIT_F=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_PROMPT="[u-boot@igkboard]# "
-+CONFIG_CMD_BOOTZ=y
-+# CONFIG_BOOTM_NETBSD is not set
-+# CONFIG_BOOTM_PLAN9 is not set
-+# CONFIG_BOOTM_RTEMS is not set
-+# CONFIG_BOOTM_VXWORKS is not set
-+# CONFIG_CMD_BOOTEFI is not set
-+# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_XIMG is not set
-+# CONFIG_CMD_EDITENV is not set
-+CONFIG_CMD_MEMTEST=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_USB_MASS_STORAGE=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_BMP=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_EXT2=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_EXT4_WRITE=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_OF_CONTROL=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SYS_MMC_ENV_DEV=1
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_BOUNCE_BUFFER=y
-+CONFIG_USB_FUNCTION_FASTBOOT=y
-+CONFIG_FASTBOOT_BUF_ADDR=0x83800000
-+CONFIG_FASTBOOT_BUF_SIZE=0x40000000
-+CONFIG_FASTBOOT_FLASH=y
-+CONFIG_DM_74X164=y
-+CONFIG_DM_I2C=y
-+CONFIG_DM_MMC=y
-+CONFIG_FSL_USDHC=y
-+CONFIG_MTD=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SF_DEFAULT_MODE=0
-+CONFIG_SF_DEFAULT_SPEED=40000000
-+CONFIG_SPI_FLASH_STMICRO=y
-+CONFIG_PHYLIB=y
-+CONFIG_PHY_MICREL=y
-+CONFIG_PHY_MICREL_KSZ8XXX=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_FEC_MXC=y
-+CONFIG_MII=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCTRL_IMX6=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_MXC_UART=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_FSL_QSPI=y
-+CONFIG_SOFT_SPI=y
-+CONFIG_IMX_THERMAL=y
-+CONFIG_USB=y
-+CONFIG_DM_USB=y
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_MANUFACTURER="FSL"
-+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-+CONFIG_CI_UDC=y
-+CONFIG_USB_HOST_ETHER=y
-+CONFIG_USB_ETHER_ASIX=y
-+CONFIG_DM_VIDEO=y
-+CONFIG_SYS_WHITE_ON_BLACK=y
-+CONFIG_SPLASH_SCREEN=y
-+CONFIG_SPLASH_SCREEN_ALIGN=y
-diff -Nuar uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c uboot-imx-igkboard/drivers/fastboot/fb_fsl/fb_fsl_partitions.c
---- uboot-imx/drivers/fastboot/fb_fsl/fb_fsl_partitions.c 2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-igkboard/drivers/fastboot/fb_fsl/fb_fsl_partitions.c 2022-01-17 11:43:49.571146566 +0800
-@@ -185,6 +185,12 @@
- boot_partition = FASTBOOT_MMC_BOOT_PARTITION_ID;
- user_partition = FASTBOOT_MMC_USER_PARTITION_ID;
- }
-+
-+ /* add by guowenxue to export mmc_no env */
-+ env_set_ulong("mmc_no", mmc_no);
-+ env_set_ulong("mmcdev", mmc_no);
-+ env_set_ulong("emmc_dev", mmc_no);
-+ env_set_ulong("emmc_ack", mmc_no);
- } else {
- printf("Can't setup partition table on this device %d\n",
- fastboot_devinfo.type);
-diff -Nuar uboot-imx/drivers/net/phy/phy.c uboot-imx-igkboard/drivers/net/phy/phy.c
---- uboot-imx/drivers/net/phy/phy.c 2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-igkboard/drivers/net/phy/phy.c 2022-01-17 11:43:49.575146507 +0800
-@@ -182,6 +182,9 @@
- {
- int result;
-
-+ /* add Soft Reset the PHY by guowenxue, 2021.11.14 */
-+ phy_reset(phydev);
-+
- if (phydev->autoneg != AUTONEG_ENABLE)
- return genphy_setup_forced(phydev);
-
-diff -Nuar uboot-imx/include/configs/mx6ullevk.h uboot-imx-igkboard/include/configs/mx6ullevk.h
---- uboot-imx/include/configs/mx6ullevk.h 2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-igkboard/include/configs/mx6ullevk.h 2022-03-27 20:50:01.809573426 +0800
-@@ -100,124 +100,36 @@
-
- #else
- #define CONFIG_EXTRA_ENV_SETTINGS \
-- CONFIG_MFG_ENV_SETTINGS \
-- TEE_ENV \
- "script=boot.scr\0" \
- "image=zImage\0" \
- "console=ttymxc0\0" \
-- "fdt_high=0xffffffff\0" \
-- "initrd_high=0xffffffff\0" \
-- "fdt_file=undefined\0" \
-+ "fdt_file=igkboard.dtb\0" \
- "fdt_addr=0x83000000\0" \
-- "tee_addr=0x84000000\0" \
-- "tee_file=undefined\0" \
-- "boot_fdt=try\0" \
-- "ip_dyn=yes\0" \
- "splashimage=0x8c000000\0" \
-- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
-- "mmcautodetect=yes\0" \
-- "mmcargs=setenv bootargs console=${console},${baudrate} " \
-- BOOTARGS_CMA_SIZE \
-- "root=${mmcroot}\0" \
-- "loadbootscript=" \
-- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
-- "bootscript=echo Running bootscript from mmc ...; " \
-- "source\0" \
-+ "ipaddr=192.168.2.22\0" \
-+ "serverip=192.168.2.2\0" \
-+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-+ "mmcargs=setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmc_no}p2 rootwait rw net.ifnames=0\0" \
-+ "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
-+ "bootscript=echo Running bootscript from mmc ...; source\0" \
- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
-- "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \
-+ "bdtb=tftp $fdt_addr $fdt_file && fatwrite mmc 1:1 $fdt_addr $fdt_file $filesize\0" \
-+ "bker=tftp $loadaddr $image&& fatwrite mmc 1:1 $loadaddr $image $filesize\0" \
-+ "bsys=run bdtb && run bker\0" \
- "mmcboot=echo Booting from mmc ...; " \
-+ "mmc dev ${mmcdev}; " \
-+ "run loadimage; run loadfdt; " \
- "run mmcargs; " \
-- "if test ${tee} = yes; then " \
-- "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \
-- "else " \
-- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
-- "if run loadfdt; then " \
-- "bootz ${loadaddr} - ${fdt_addr}; " \
-- "else " \
-- "if test ${boot_fdt} = try; then " \
-- "bootz; " \
-- "else " \
-- "echo WARN: Cannot load the DT; " \
-- "fi; " \
-- "fi; " \
-- "else " \
-- "bootz; " \
-- "fi; " \
-- "fi;\0" \
-- "netargs=setenv bootargs console=${console},${baudrate} " \
-- BOOTARGS_CMA_SIZE \
-- "root=/dev/nfs " \
-- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
-- "netboot=echo Booting from net ...; " \
-- "${usb_net_cmd}; " \
-- "run netargs; " \
-- "if test ${ip_dyn} = yes; then " \
-- "setenv get_cmd dhcp; " \
-- "else " \
-- "setenv get_cmd tftp; " \
-- "fi; " \
-- "${get_cmd} ${image}; " \
-- "if test ${tee} = yes; then " \
-- "${get_cmd} ${tee_addr} ${tee_file}; " \
-- "${get_cmd} ${fdt_addr} ${fdt_file}; " \
-- "bootm ${tee_addr} - ${fdt_addr}; " \
-- "else " \
-- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
-- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
-- "bootz ${loadaddr} - ${fdt_addr}; " \
-- "else " \
-- "if test ${boot_fdt} = try; then " \
-- "bootz; " \
-- "else " \
-- "echo WARN: Cannot load the DT; " \
-- "fi; " \
-- "fi; " \
-- "else " \
-- "bootz; " \
-- "fi; " \
-- "fi;\0" \
-- "findfdt="\
-- "if test $fdt_file = undefined; then " \
-- "if test $board_name = ULZ-EVK && test $board_rev = 14X14; then " \
-- "setenv fdt_file imx6ulz-14x14-evk.dtb; fi; " \
-- "if test $board_name = EVK && test $board_rev = 9X9; then " \
-- "setenv fdt_file imx6ull-9x9-evk.dtb; fi; " \
-- "if test $board_name = EVK && test $board_rev = 14X14; then " \
-- "setenv fdt_file imx6ull-14x14-evk.dtb; fi; " \
-- "if test $fdt_file = undefined; then " \
-- "echo WARNING: Could not determine dtb to use; " \
-- "fi; " \
-- "fi;\0" \
-- "findtee="\
-- "if test $tee_file = undefined; then " \
-- "if test $board_name = ULZ-EVK && test $board_rev = 14X14; then " \
-- "setenv tee_file uTee-6ulzevk; fi; " \
-- "if test $board_name = EVK && test $board_rev = 9X9; then " \
-- "setenv tee_file uTee-6ullevk; fi; " \
-- "if test $board_name = EVK && test $board_rev = 14X14; then " \
-- "setenv tee_file uTee-6ullevk; fi; " \
-- "if test $tee_file = undefined; then " \
-- "echo WARNING: Could not determine tee to use; " \
-- "fi; " \
-- "fi;\0" \
--
--#define CONFIG_BOOTCOMMAND \
-- "run findfdt;" \
-- "run findtee;" \
-- "mmc dev ${mmcdev};" \
-- "mmc dev ${mmcdev}; if mmc rescan; then " \
-- "if run loadbootscript; then " \
-- "run bootscript; " \
-- "else " \
-- "if run loadimage; then " \
-- "run mmcboot; " \
-- "else run netboot; " \
-- "fi; " \
-- "fi; " \
-- "else run netboot; fi"
-+ "run loadbootscript; run bootscript; " \
-+ "bootz ${loadaddr} - ${fdt_addr}\0" \
-+ "netboot=echo Booting from net ...; " \
-+ "tftp $loadaddr $image; tftp $fdt_addr ${fdt_file};" \
-+ "run mmcargs; " \
-+ "bootz ${loadaddr} - ${fdt_addr}\0" \
-+ "bootcmd=run mmcboot\0" \
-+ "upmode=fastboot 0\0" \
-+ "bbl=tftp ${loadaddr} u-boot-igkboard-emmc.imx && mmc dev ${mmcdev} 1 && mmc write ${loadaddr} 2 0x500\0"
- #endif
-
- /* Miscellaneous configurable options */
-@@ -238,7 +150,9 @@
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
- /* environment organization */
-+#ifndef CONFIG_SYS_MMC_ENV_DEV
- #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
-+#endif
- #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-
- #define CONFIG_IOMUX_LPSR
-diff -Nuar uboot-imx/Makefile uboot-imx-igkboard/Makefile
---- uboot-imx/Makefile 2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-igkboard/Makefile 2022-03-27 20:50:05.745527305 +0800
-@@ -263,6 +263,9 @@
- CROSS_COMPILE ?=
- endif
-
-+ARCH=arm
-+CROSS_COMPILE?=/opt/buildroot/cortexA7/bin/arm-linux-
-+
- KCONFIG_CONFIG ?= .config
- export KCONFIG_CONFIG
-
diff --git a/bsp/kernel/patch/linux-imx-igkboard.patch b/bsp/kernel/patch/linux-imx-igkboard.patch
deleted file mode 100644
index 9a79a69..0000000
--- a/bsp/kernel/patch/linux-imx-igkboard.patch
+++ /dev/null
@@ -1,1536 +0,0 @@
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts
---- linux-imx/arch/arm/boot/dts/igkboard.dts 1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/igkboard.dts 2022-03-27 22:09:19.799996369 +0800
-@@ -0,0 +1,782 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board)
-+ * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
-+ *
-+ * Copyright (C) 2022 LingYun IoT System Studio.
-+ */
-+
-+/dts-v1/;
-+
-+#include "imx6ul.dtsi"
-+
-+/ {
-+ model = "LingYun IoT System Studio IoT Gateway Board";
-+ compatible = "lingyun,igkboard", "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
-+
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
-+ memory@80000000 {
-+ device_type = "memory";
-+ reg = <0x80000000 0x20000000>;
-+ };
-+
-+ reserved-memory {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+
-+ linux,cma {
-+ compatible = "shared-dma-pool";
-+ reusable;
-+ size = <0xa000000>;
-+ linux,cma-default;
-+ };
-+ };
-+
-+ backlight_display: backlight-display {
-+ compatible = "pwm-backlight";
-+ pwms = <&pwm1 0 5000000>;
-+ brightness-levels = <0 4 8 16 32 64 128 255>;
-+ default-brightness-level = <6>;
-+ status = "okay";
-+ };
-+
-+ buzzer: pwm-buzzer {
-+ compatible = "pwm-beeper";
-+ pwms = <&pwm2 0 500000>;
-+ status = "okay";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_leds>;
-+ status = "okay";
-+
-+ sysled {
-+ lable = "sysled";
-+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ default-state = "off";
-+ };
-+ };
-+
-+ keys {
-+ compatible = "gpio-keys";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_keys>;
-+ autorepeat;
-+ status = "okay";
-+
-+ key_user {
-+ lable = "key_user";
-+ gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
-+ linux,code = <KEY_ENTER>;
-+ };
-+ };
-+
-+ pxp_v4l2 {
-+ compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
-+ status = "okay";
-+ };
-+
-+ reg_sd1_vmmc: regulator-sd1-vmmc {
-+ compatible = "regulator-fixed";
-+ regulator-name = "VSD_3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ off-on-delay-us = <20000>;
-+ enable-active-high;
-+ };
-+
-+ reg_peri_3v3: regulator-peri-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "VPERI_3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ /*
-+ * If you want to want to make this dynamic please
-+ * check schematics and test all affected peripherals:
-+ *
-+ * - sensors
-+ * - ethernet phy
-+ * - can
-+ * - bluetooth
-+ * - wm8960 audio codec
-+ * - ov5640 camera
-+ */
-+ regulator-always-on;
-+ };
-+
-+ reg_can_3v3: regulator-can-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "can-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ reg_3p3v: 3p3v {
-+ compatible = "regulator-fixed";
-+ regulator-name = "3P3V";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ reg_1p8v: 1p8v {
-+ compatible = "regulator-fixed";
-+ regulator-name = "1P8V";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+/*
-+ sound-mqs {
-+ compatible = "fsl,imx-audio-mqs";
-+ model = "mqs-audio";
-+ cpu-dai = <&sai1>;
-+ asrc-controller = <&asrc>;
-+ audio-codec = <&mqs>;
-+ status = "okay";
-+ };
-+*/
-+
-+ spi4 {
-+ compatible = "spi-gpio";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_spi4>;
-+ status = "disabled"; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with fec1 reset pin */
-+ pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
-+ gpio-sck = <&gpio5 11 0>;
-+ gpio-mosi = <&gpio5 10 0>;
-+ cs-gpios = <&gpio5 7 0>;
-+ num-chipselects = <1>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ gpio_spi: gpio@0 {
-+ compatible = "fairchild,74hc595";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ reg = <0>;
-+ registers-number = <1>;
-+ registers-default = /bits/ 8 <0x57>;
-+ spi-max-frequency = <100000>;
-+ };
-+ };
-+};
-+
-+
-+&clks {
-+ assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-+ assigned-clock-rates = <786432000>;
-+};
-+
-+&snvs_poweroff {
-+ status = "okay";
-+};
-+
-+&snvs_pwrkey {
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart1>;
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart2>;
-+ uart-has-rtscts;
-+ /* for DTE mode, add below change */
-+ /* fsl,dte-mode; */
-+ /* pinctrl-0 = <&pinctrl_uart2dte>; */
-+ status = "okay";
-+};
-+
-+&pwm1 { /* backlight */
-+ #pwm-cells = <2>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pwm1>;
-+ status = "okay";
-+};
-+
-+&pwm2 { /* buzzer */
-+ #pwm-cells = <2>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pwm2>;
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
-+ status = "okay";
-+
-+ gt9xx@5d {
-+ compatible = "goodix,gt9147";
-+ reg = <0x5d>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ts_pins>;
-+
-+ irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
-+ reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
-+ interrupt-parent = <&gpio5>;
-+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
-+
-+ status = "okay";
-+ };
-+
-+ rtc@6f {
-+ compatible = "isil,isl1208";
-+ reg = <0x6f>;
-+ status = "okay";
-+ };
-+
-+ ov5640: ov5640@3c {
-+ compatible = "ovti,ov5640";
-+ reg = <0x3c>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_csi1>;
-+ clocks = <&clks IMX6UL_CLK_CSI>;
-+ clock-names = "csi_mclk";
-+
-+ DOVDD-supply = <®_3p3v>;
-+ VDD-supply = <®_1p8v>;
-+ AVDD-supply = <®_3p3v>;
-+ DVDD-supply = <®_3p3v>;
-+
-+ pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
-+ rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
-+ /* rotation = <180>; */
-+ status = "okay";
-+ port {
-+ ov5640_ep: endpoint {
-+ remote-endpoint = <&csi1_ep>;
-+ };
-+ };
-+ };
-+};
-+
-+&csi { /* camera ov5640 */
-+ status = "okay";
-+ port {
-+ csi1_ep: endpoint {
-+ remote-endpoint = <&ov5640_ep>;
-+ };
-+ };
-+};
-+
-+&fec1 { /* eth0 */
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet1>;
-+ phy-mode = "rmii";
-+ phy-handle = <ðphy0>;
-+ phy-supply = <®_peri_3v3>;
-+ phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with spi4 */
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
-+ status = "okay";
-+};
-+
-+&fec2 { /* eth1 */
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet2>;
-+ phy-mode = "rmii";
-+ phy-handle = <ðphy1>;
-+ phy-supply = <®_peri_3v3>;
-+ phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with sai2 */
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
-+ status = "okay";
-+
-+ mdio {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ ethphy0: ethernet-phy@0 {
-+ reg = <0>;
-+ micrel,led-mode = <1>;
-+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
-+ clock-names = "rmii-ref";
-+ };
-+
-+ ethphy1: ethernet-phy@1 {
-+ reg = <1>;
-+ micrel,led-mode = <1>;
-+ clocks = <&clks IMX6UL_CLK_ENET2_REF>;
-+ clock-names = "rmii-ref";
-+ };
-+ };
-+};
-+
-+&lcdif {
-+ assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
-+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_lcdif_dat
-+ &pinctrl_lcdif_ctrl>;
-+ display = <&display0>;
-+ status = "okay";
-+
-+ display0: display@0 {
-+ bits-per-pixel = <16>;
-+ bus-width = <16>;
-+
-+ display-timings {
-+ native-mode = <&timing0>;
-+
-+ timing0: timing0 {
-+ clock-frequency = <30000000>;
-+ hactive = <800>;
-+ vactive = <480>;
-+ hfront-porch = <40>;
-+ hback-porch = <88>;
-+ hsync-len = <48>;
-+ vback-porch = <32>;
-+ vfront-porch = <13>;
-+ vsync-len = <3>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
-+ de-active = <1>;
-+ pixelclk-active = <0>;
-+ };
-+ };
-+ };
-+};
-+
-+&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
-+ status = "okay";
-+};
-+
-+/*
-+&mqs {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_mqs>;
-+ clocks = <&clks IMX6UL_CLK_SAI1>;
-+ clock-names = "mclk";
-+ status = "okay";
-+};
-+*/
-+
-+&sai1 {
-+ assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
-+ <&clks IMX6UL_CLK_SAI1>;
-+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-+ assigned-clock-rates = <0>, <24576000>;
-+ fsl,sai-mclk-direction-output;
-+ status = "okay";
-+};
-+
-+&sim2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_sim2>;
-+ assigned-clocks = <&clks IMX6UL_CLK_SIM_SEL>;
-+ assigned-clock-parents = <&clks IMX6UL_CLK_SIM_PODF>;
-+ assigned-clock-rates = <240000000>;
-+ /* GPIO_ACTIVE_HIGH/LOW:sim card voltage control
-+ * NCN8025:Vcc = ACTIVE_HIGH?5V:3V
-+ * TDA8035:Vcc = ACTIVE_HIGH?5V:1.8V
-+ */
-+ pinctrl-assert-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
-+ port = <1>;
-+ sven_low_active;
-+ status = "disabled";
-+};
-+
-+&tsc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_tsc>;
-+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-+ measure-delay-time = <0xffff>;
-+ pre-charge-time = <0xfff>;
-+ status = "okay";
-+};
-+
-+&usbotg1 {
-+ dr_mode = "otg";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usb_otg1>;
-+ status = "okay";
-+};
-+
-+&usbotg2 {
-+ dr_mode = "host";
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+&usbphy1 {
-+ fsl,tx-d-cal = <106>;
-+};
-+
-+&usbphy2 {
-+ fsl,tx-d-cal = <106>;
-+};
-+
-+&usdhc1 { /* tf card slot */
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+ pinctrl-0 = <&pinctrl_usdhc1>;
-+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-+ no-1-8-v;
-+ keep-power-in-suspend;
-+ wakeup-source;
-+ vmmc-supply = <®_sd1_vmmc>;
-+ status = "okay";
-+};
-+
-+&usdhc2 { /* emmc */
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+ pinctrl-0 = <&pinctrl_usdhc2_8bit>;
-+ pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
-+ bus-width = <8>;
-+ non-removable;
-+ status = "okay";
-+};
-+
-+&wdog1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_wdog>;
-+ fsl,ext-reset-output;
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+
-+ pinctrl_gpio_leds: gpio-leds {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17059 /* led run */
-+ >;
-+ };
-+
-+ pinctrl_gpio_keys: gpio-keys {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 /* gpio key */
-+ >;
-+ };
-+
-+ pinctrl_mqs: pinctrl-mqs-pins {
-+ fsl,pins = <
-+ MX6UL_PAD_JTAG_TDI__MQS_LEFT 0x11088 /* MQS Left */
-+ MX6UL_PAD_JTAG_TDO__MQS_RIGHT 0x11088 /* MQS Right */
-+ >;
-+ };
-+
-+ pinctrl_ts_pins: pinctrl-ts-pins {
-+ fsl,pins = <
-+ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 /* TouchScreen IRQ */
-+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 /* TouchScreen RST */
-+ >;
-+ };
-+
-+ pinctrl_csi1: csi1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
-+ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
-+ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
-+ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
-+ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
-+ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
-+ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
-+ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
-+ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
-+ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
-+ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
-+ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
-+ >;
-+ };
-+
-+ pinctrl_enet1: enet1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
-+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
-+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
-+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0 /* ENET1 RESET conflict with pinctrl_spi4 */
-+ >;
-+ };
-+
-+ pinctrl_enet2: enet2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
-+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x10B0 /* ENET2 RESET conflict with pinctrl_sai2 */
-+ >;
-+ };
-+
-+ pinctrl_flexcan1: flexcan1grp{
-+ fsl,pins = <
-+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
-+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
-+ >;
-+ };
-+
-+ pinctrl_flexcan2: flexcan2grp{
-+ fsl,pins = <
-+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
-+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
-+ >;
-+ };
-+
-+ pinctrl_i2c1: i2c1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
-+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
-+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
-+ >;
-+ };
-+
-+ pinctrl_lcdif_dat: lcdifdatgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
-+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
-+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
-+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
-+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
-+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
-+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
-+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
-+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
-+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
-+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
-+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
-+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
-+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
-+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
-+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
-+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
-+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
-+ MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
-+ MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
-+ MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
-+ MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
-+ MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
-+ MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
-+ >;
-+ };
-+
-+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
-+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
-+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
-+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
-+ /* used for lcd reset */
-+ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
-+ >;
-+ };
-+
-+ pinctrl_sai2: sai2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
-+ MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
-+ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
-+ MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
-+ MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
-+ >;
-+ };
-+
-+ pinctrl_pwm1: pwm1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
-+ >;
-+ };
-+
-+ pinctrl_pwm2: pwm2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x110b0
-+ >;
-+ };
-+
-+ pinctrl_sim2: sim2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD 0xb808
-+ MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK 0x31
-+ MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B 0xb808
-+ MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN 0xb808
-+ MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD 0xb809
-+ MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x3008
-+ >;
-+ };
-+
-+ pinctrl_spi4: spi4grp {
-+ fsl,pins = <
-+ MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
-+ MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
-+ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_tsc: tscgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
-+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
-+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
-+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
-+ >;
-+ };
-+
-+ pinctrl_uart1: uart1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
-+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
-+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
-+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_uart2dte: uart2dtegrp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1
-+ MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1
-+ MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS 0x1b0b1
-+ MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usb_otg1: usbotg1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc1: usdhc1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
-+ >;
-+ };
-+
-+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-+ fsl,pins = <
-+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
-+
-+ >;
-+ };
-+
-+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-+ fsl,pins = <
-+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
-+ >;
-+ };
-+
-+ pinctrl_usdhc2: usdhc2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
-+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
-+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc2_8bit: usdhc2grp_8bit {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
-+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
-+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
-+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
-+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
-+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
-+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
-+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
-+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
-+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
-+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
-+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
-+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
-+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
-+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
-+ >;
-+ };
-+
-+ pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
-+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
-+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
-+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
-+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
-+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
-+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
-+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
-+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
-+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
-+ >;
-+ };
-+
-+ pinctrl_wdog: wdoggrp {
-+ fsl,pins = <
-+ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
-+ >;
-+ };
-+};
-+
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-igkboard/arch/arm/boot/dts/Makefile
---- linux-imx/arch/arm/boot/dts/Makefile 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/Makefile 2022-03-27 22:09:19.799996369 +0800
-@@ -678,6 +678,7 @@
- imx6ul-tx6ul-0010.dtb \
- imx6ul-tx6ul-0011.dtb \
- imx6ul-tx6ul-mainboard.dtb \
-+ igkboard.dtb \
- imx6ull-14x14-evk.dtb \
- imx6ull-14x14-evk-emmc.dtb \
- imx6ull-14x14-evk-btwifi.dtb \
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-igkboard/arch/arm/configs/igkboard_defconfig
---- linux-imx/arch/arm/configs/igkboard_defconfig 1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig 2022-03-27 22:20:23.534446767 +0800
-@@ -0,0 +1,722 @@
-+CONFIG_KERNEL_LZO=y
-+CONFIG_SYSVIPC=y
-+CONFIG_POSIX_MQUEUE=y
-+CONFIG_NO_HZ=y
-+CONFIG_HIGH_RES_TIMERS=y
-+CONFIG_PREEMPT=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=18
-+CONFIG_CGROUPS=y
-+CONFIG_MEMCG=y
-+CONFIG_CGROUP_PIDS=y
-+CONFIG_CGROUP_FREEZER=y
-+CONFIG_CGROUP_DEVICE=y
-+CONFIG_NAMESPACES=y
-+CONFIG_USER_NS=y
-+CONFIG_RELAY=y
-+CONFIG_BLK_DEV_INITRD=y
-+CONFIG_EXPERT=y
-+CONFIG_PERF_EVENTS=y
-+# CONFIG_SLUB_DEBUG is not set
-+# CONFIG_COMPAT_BRK is not set
-+CONFIG_ARCH_MXC=y
-+CONFIG_SOC_IMX6Q=y
-+CONFIG_SOC_IMX6SL=y
-+CONFIG_SOC_IMX6SLL=y
-+CONFIG_SOC_IMX6SX=y
-+CONFIG_SOC_IMX6UL=y
-+CONFIG_SOC_IMX7D=y
-+CONFIG_SOC_IMX7ULP=y
-+CONFIG_SMP=y
-+CONFIG_VMSPLIT_2G=y
-+CONFIG_ARM_PSCI=y
-+CONFIG_HIGHMEM=y
-+CONFIG_FORCE_MAX_ZONEORDER=14
-+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
-+CONFIG_KEXEC=y
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_STAT=y
-+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-+CONFIG_CPUFREQ_DT=y
-+CONFIG_ARM_IMX6Q_CPUFREQ=y
-+CONFIG_ARM_IMX_CPUFREQ_DT=y
-+CONFIG_CPU_IDLE=y
-+CONFIG_ARM_CPUIDLE=y
-+CONFIG_ARM_PSCI_CPUIDLE=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+CONFIG_PM_DEBUG=y
-+CONFIG_PM_TEST_SUSPEND=y
-+CONFIG_MODULES=y
-+CONFIG_MODULE_UNLOAD=y
-+CONFIG_MODVERSIONS=y
-+CONFIG_MODULE_SRCVERSION_ALL=y
-+# CONFIG_BLK_DEV_BSG is not set
-+CONFIG_CMA=y
-+CONFIG_NET=y
-+CONFIG_PACKET=y
-+CONFIG_UNIX=y
-+CONFIG_INET=y
-+CONFIG_IP_MULTICAST=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+CONFIG_NETFILTER=y
-+CONFIG_VLAN_8021Q=m
-+CONFIG_LLC2=y
-+CONFIG_CAN=y
-+CONFIG_CAN_FLEXCAN=y
-+CONFIG_BT=y
-+CONFIG_BT_RFCOMM=y
-+CONFIG_BT_RFCOMM_TTY=y
-+CONFIG_BT_BNEP=y
-+CONFIG_BT_BNEP_MC_FILTER=y
-+CONFIG_BT_BNEP_PROTO_FILTER=y
-+CONFIG_BT_HIDP=y
-+CONFIG_BT_HCIBTUSB=y
-+CONFIG_BT_HCIUART=y
-+CONFIG_BT_HCIUART_BCSP=y
-+CONFIG_BT_HCIUART_LL=y
-+CONFIG_BT_HCIUART_3WIRE=y
-+CONFIG_BT_HCIUART_MRVL=y
-+CONFIG_BT_HCIVHCI=y
-+CONFIG_BT_MRVL=y
-+CONFIG_BT_MRVL_SDIO=y
-+CONFIG_CFG80211=y
-+CONFIG_NL80211_TESTMODE=y
-+CONFIG_CFG80211_WEXT=y
-+CONFIG_MAC80211=y
-+CONFIG_PCI=y
-+CONFIG_PCI_MSI=y
-+CONFIG_PCI_IMX6_HOST=y
-+CONFIG_PCI_IMX6_EP=y
-+CONFIG_PCI_ENDPOINT=y
-+CONFIG_PCI_ENDPOINT_CONFIGFS=y
-+CONFIG_PCI_EPF_TEST=y
-+CONFIG_DEVTMPFS=y
-+CONFIG_DEVTMPFS_MOUNT=y
-+# CONFIG_STANDALONE is not set
-+CONFIG_FW_LOADER_USER_HELPER=y
-+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
-+CONFIG_IMX_WEIM=y
-+CONFIG_CONNECTOR=y
-+CONFIG_MTD=y
-+CONFIG_MTD_CMDLINE_PARTS=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_CFI=y
-+CONFIG_MTD_JEDECPROBE=y
-+CONFIG_MTD_CFI_INTELEXT=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+CONFIG_MTD_CFI_STAA=y
-+CONFIG_MTD_PHYSMAP=y
-+CONFIG_MTD_PHYSMAP_OF=y
-+CONFIG_MTD_DATAFLASH=y
-+CONFIG_MTD_SST25L=y
-+CONFIG_MTD_RAW_NAND=y
-+CONFIG_MTD_NAND_GPMI_NAND=y
-+CONFIG_MTD_NAND_MXC=y
-+CONFIG_MTD_SPI_NOR=y
-+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
-+CONFIG_MTD_UBI=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_MTD_UBI_BLOCK=y
-+CONFIG_OF_OVERLAY=y
-+CONFIG_BLK_DEV_LOOP=y
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_SIZE=65536
-+CONFIG_SENSORS_FXOS8700=y
-+CONFIG_SENSORS_FXAS2100X=y
-+CONFIG_PCI_ENDPOINT_TEST=y
-+CONFIG_EEPROM_AT24=y
-+CONFIG_EEPROM_AT25=y
-+# CONFIG_SCSI_PROC_FS is not set
-+CONFIG_BLK_DEV_SD=y
-+CONFIG_SCSI_CONSTANTS=y
-+CONFIG_SCSI_LOGGING=y
-+CONFIG_SCSI_SCAN_ASYNC=y
-+# CONFIG_SCSI_LOWLEVEL is not set
-+CONFIG_ATA=y
-+CONFIG_SATA_AHCI_PLATFORM=y
-+CONFIG_AHCI_IMX=y
-+CONFIG_PATA_IMX=y
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_VENDOR_BROADCOM is not set
-+CONFIG_CS89x0=y
-+CONFIG_CS89x0_PLATFORM=y
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+# CONFIG_NET_VENDOR_INTEL is not set
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_MICROCHIP is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+CONFIG_SMC91X=y
-+CONFIG_SMC911X=y
-+CONFIG_SMSC911X=y
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+CONFIG_MICREL_PHY=y
-+CONFIG_AT803X_PHY=y
-+CONFIG_USB_RTL8150=y
-+CONFIG_USB_RTL8152=y
-+CONFIG_USB_LAN78XX=y
-+CONFIG_USB_USBNET=y
-+# CONFIG_USB_NET_AX8817X is not set
-+# CONFIG_USB_NET_AX88179_178A is not set
-+CONFIG_USB_NET_CDC_EEM=y
-+CONFIG_USB_NET_DM9601=y
-+CONFIG_USB_NET_SMSC75XX=y
-+CONFIG_USB_NET_SMSC95XX=y
-+# CONFIG_USB_NET_NET1080 is not set
-+CONFIG_USB_NET_MCS7830=y
-+# CONFIG_USB_NET_ZAURUS is not set
-+CONFIG_USB_IPHETH=y
-+# CONFIG_WLAN_VENDOR_ADMTEK is not set
-+# CONFIG_WLAN_VENDOR_ATH is not set
-+# CONFIG_WLAN_VENDOR_ATMEL is not set
-+# CONFIG_WLAN_VENDOR_BROADCOM is not set
-+# CONFIG_WLAN_VENDOR_CISCO is not set
-+# CONFIG_WLAN_VENDOR_INTEL is not set
-+# CONFIG_WLAN_VENDOR_INTERSIL is not set
-+# CONFIG_WLAN_VENDOR_MARVELL is not set
-+CONFIG_MT7601U=y
-+CONFIG_MT76x0U=y
-+CONFIG_MT76x2U=y
-+CONFIG_MT7663U=y
-+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
-+# CONFIG_WLAN_VENDOR_RALINK is not set
-+CONFIG_RTL8187=y
-+CONFIG_RTL8192CE=y
-+CONFIG_RTL8188EE=y
-+CONFIG_RTL8192EE=y
-+CONFIG_RTL8821AE=y
-+CONFIG_RTL8192CU=y
-+CONFIG_RTL8XXXU=y
-+CONFIG_RTL8XXXU_UNTESTED=y
-+# CONFIG_WLAN_VENDOR_RSI is not set
-+# CONFIG_WLAN_VENDOR_ST is not set
-+# CONFIG_WLAN_VENDOR_TI is not set
-+# CONFIG_WLAN_VENDOR_ZYDAS is not set
-+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
-+CONFIG_INPUT_MOUSEDEV=y
-+CONFIG_INPUT_MOUSEDEV_PSAUX=y
-+CONFIG_INPUT_EVDEV=y
-+CONFIG_KEYBOARD_GPIO=y
-+CONFIG_KEYBOARD_RPMSG=y
-+CONFIG_KEYBOARD_IMX=y
-+# CONFIG_INPUT_MOUSE is not set
-+CONFIG_INPUT_TOUCHSCREEN=y
-+# CONFIG_TOUCHSCREEN_CT36X_WLD is not set
-+CONFIG_TOUCHSCREEN_GOODIX=y
-+# CONFIG_TOUCHSCREEN_SYNAPTICS_DSX is not set
-+# CONFIG_SERIO_SERPORT is not set
-+# CONFIG_LEGACY_PTYS is not set
-+CONFIG_SERIAL_IMX=y
-+CONFIG_SERIAL_IMX_CONSOLE=y
-+CONFIG_SERIAL_FSL_LPUART=y
-+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
-+CONFIG_SERIAL_DEV_BUS=y
-+# CONFIG_I2C_COMPAT is not set
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_MUX=y
-+CONFIG_I2C_MUX_GPIO=y
-+# CONFIG_I2C_HELPER_AUTO is not set
-+CONFIG_I2C_ALGOPCF=m
-+CONFIG_I2C_ALGOPCA=m
-+CONFIG_I2C_GPIO=y
-+CONFIG_I2C_IMX=y
-+CONFIG_I2C_IMX_LPI2C=y
-+CONFIG_SPI=y
-+CONFIG_SPI_FSL_LPSPI=y
-+CONFIG_SPI_FSL_QUADSPI=y
-+CONFIG_SPI_GPIO=y
-+CONFIG_SPI_IMX=y
-+CONFIG_SPI_SPIDEV=y
-+CONFIG_SPI_SLAVE=y
-+CONFIG_SPI_SLAVE_TIME=y
-+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
-+CONFIG_GPIO_SYSFS=y
-+CONFIG_GPIO_MXC=y
-+CONFIG_GPIO_SIOX=m
-+CONFIG_GPIO_IMX_RPMSG=y
-+CONFIG_GPIO_MAX732X=y
-+CONFIG_GPIO_PCA953X=y
-+CONFIG_GPIO_PCF857X=y
-+CONFIG_GPIO_STMPE=y
-+CONFIG_GPIO_74X164=y
-+CONFIG_POWER_RESET=y
-+CONFIG_POWER_RESET_SYSCON=y
-+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-+CONFIG_POWER_SUPPLY=y
-+CONFIG_SENSORS_MC13783_ADC=y
-+CONFIG_SENSORS_GPIO_FAN=y
-+CONFIG_SENSORS_IIO_HWMON=y
-+CONFIG_SENSORS_MAX17135=y
-+CONFIG_SENSORS_MAG3110=y
-+CONFIG_THERMAL=y
-+CONFIG_THERMAL_STATISTICS=y
-+CONFIG_THERMAL_WRITABLE_TRIPS=y
-+CONFIG_CPU_THERMAL=y
-+CONFIG_IMX_THERMAL=y
-+CONFIG_DEVICE_THERMAL=y
-+CONFIG_WATCHDOG=y
-+CONFIG_DA9062_WATCHDOG=y
-+CONFIG_RN5T618_WATCHDOG=y
-+CONFIG_IMX2_WDT=y
-+CONFIG_IMX7ULP_WDT=y
-+CONFIG_MFD_DA9052_I2C=y
-+CONFIG_MFD_DA9062=y
-+CONFIG_MFD_DA9063=y
-+CONFIG_MFD_MC13XXX_SPI=y
-+CONFIG_MFD_MC13XXX_I2C=y
-+CONFIG_MFD_MAX17135=y
-+CONFIG_MFD_RN5T618=y
-+CONFIG_MFD_SI476X_CORE=y
-+CONFIG_MFD_STMPE=y
-+CONFIG_MFD_WM8994=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_REGULATOR_ANATOP=y
-+CONFIG_REGULATOR_DA9052=y
-+CONFIG_REGULATOR_DA9062=y
-+CONFIG_REGULATOR_DA9063=y
-+CONFIG_REGULATOR_GPIO=y
-+CONFIG_REGULATOR_MAX17135=y
-+CONFIG_REGULATOR_MC13783=y
-+CONFIG_REGULATOR_MC13892=y
-+CONFIG_REGULATOR_PF1550_RPMSG=y
-+CONFIG_REGULATOR_PFUZE100=y
-+CONFIG_REGULATOR_RN5T618=y
-+CONFIG_RC_CORE=y
-+CONFIG_RC_DEVICES=y
-+CONFIG_IR_GPIO_CIR=y
-+CONFIG_MEDIA_SUPPORT=y
-+CONFIG_MEDIA_USB_SUPPORT=y
-+CONFIG_USB_VIDEO_CLASS=y
-+CONFIG_USB_GSPCA=y
-+# CONFIG_RADIO_ADAPTERS is not set
-+CONFIG_V4L_PLATFORM_DRIVERS=y
-+CONFIG_VIDEO_MUX=y
-+CONFIG_VIDEO_MXC_CAPTURE=y
-+CONFIG_VIDEO_MXC_OUTPUT=y
-+CONFIG_VIDEO_MXC_CSI_CAMERA=y
-+CONFIG_MXC_VADC=y
-+CONFIG_MXC_MIPI_CSI=y
-+CONFIG_MXC_CAMERA_OV5640_V2=y
-+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
-+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=y
-+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
-+CONFIG_VIDEO_MXC_PXP_V4L2=y
-+CONFIG_V4L_MEM2MEM_DRIVERS=y
-+CONFIG_VIDEO_CODA=m
-+CONFIG_VIDEO_IMX_PXP=y
-+# CONFIG_VIDEO_IR_I2C is not set
-+# CONFIG_CXD2880_SPI_DRV is not set
-+# CONFIG_MEDIA_TUNER_SIMPLE is not set
-+# CONFIG_MEDIA_TUNER_TDA18250 is not set
-+# CONFIG_MEDIA_TUNER_TDA8290 is not set
-+# CONFIG_MEDIA_TUNER_TDA827X is not set
-+# CONFIG_MEDIA_TUNER_TDA18271 is not set
-+# CONFIG_MEDIA_TUNER_TDA9887 is not set
-+# CONFIG_MEDIA_TUNER_TEA5761 is not set
-+# CONFIG_MEDIA_TUNER_TEA5767 is not set
-+# CONFIG_MEDIA_TUNER_MSI001 is not set
-+# CONFIG_MEDIA_TUNER_MT20XX is not set
-+# CONFIG_MEDIA_TUNER_MT2060 is not set
-+# CONFIG_MEDIA_TUNER_MT2063 is not set
-+# CONFIG_MEDIA_TUNER_MT2266 is not set
-+# CONFIG_MEDIA_TUNER_MT2131 is not set
-+# CONFIG_MEDIA_TUNER_QT1010 is not set
-+# CONFIG_MEDIA_TUNER_XC2028 is not set
-+# CONFIG_MEDIA_TUNER_XC5000 is not set
-+# CONFIG_MEDIA_TUNER_XC4000 is not set
-+# CONFIG_MEDIA_TUNER_MXL5005S is not set
-+# CONFIG_MEDIA_TUNER_MXL5007T is not set
-+# CONFIG_MEDIA_TUNER_MC44S803 is not set
-+# CONFIG_MEDIA_TUNER_MAX2165 is not set
-+# CONFIG_MEDIA_TUNER_TDA18218 is not set
-+# CONFIG_MEDIA_TUNER_FC0011 is not set
-+# CONFIG_MEDIA_TUNER_FC0012 is not set
-+# CONFIG_MEDIA_TUNER_FC0013 is not set
-+# CONFIG_MEDIA_TUNER_TDA18212 is not set
-+# CONFIG_MEDIA_TUNER_E4000 is not set
-+# CONFIG_MEDIA_TUNER_FC2580 is not set
-+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
-+# CONFIG_MEDIA_TUNER_TUA9001 is not set
-+# CONFIG_MEDIA_TUNER_SI2157 is not set
-+# CONFIG_MEDIA_TUNER_IT913X is not set
-+# CONFIG_MEDIA_TUNER_R820T is not set
-+# CONFIG_MEDIA_TUNER_MXL301RF is not set
-+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
-+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
-+# CONFIG_DVB_STB0899 is not set
-+# CONFIG_DVB_STB6100 is not set
-+# CONFIG_DVB_STV090x is not set
-+# CONFIG_DVB_STV0910 is not set
-+# CONFIG_DVB_STV6110x is not set
-+# CONFIG_DVB_STV6111 is not set
-+# CONFIG_DVB_MXL5XX is not set
-+# CONFIG_DVB_M88DS3103 is not set
-+# CONFIG_DVB_DRXK is not set
-+# CONFIG_DVB_TDA18271C2DD is not set
-+# CONFIG_DVB_SI2165 is not set
-+# CONFIG_DVB_MN88472 is not set
-+# CONFIG_DVB_MN88473 is not set
-+# CONFIG_DVB_CX24110 is not set
-+# CONFIG_DVB_CX24123 is not set
-+# CONFIG_DVB_MT312 is not set
-+# CONFIG_DVB_ZL10036 is not set
-+# CONFIG_DVB_ZL10039 is not set
-+# CONFIG_DVB_S5H1420 is not set
-+# CONFIG_DVB_STV0288 is not set
-+# CONFIG_DVB_STB6000 is not set
-+# CONFIG_DVB_STV0299 is not set
-+# CONFIG_DVB_STV6110 is not set
-+# CONFIG_DVB_STV0900 is not set
-+# CONFIG_DVB_TDA8083 is not set
-+# CONFIG_DVB_TDA10086 is not set
-+# CONFIG_DVB_TDA8261 is not set
-+# CONFIG_DVB_VES1X93 is not set
-+# CONFIG_DVB_TUNER_ITD1000 is not set
-+# CONFIG_DVB_TUNER_CX24113 is not set
-+# CONFIG_DVB_TDA826X is not set
-+# CONFIG_DVB_TUA6100 is not set
-+# CONFIG_DVB_CX24116 is not set
-+# CONFIG_DVB_CX24117 is not set
-+# CONFIG_DVB_CX24120 is not set
-+# CONFIG_DVB_SI21XX is not set
-+# CONFIG_DVB_TS2020 is not set
-+# CONFIG_DVB_DS3000 is not set
-+# CONFIG_DVB_MB86A16 is not set
-+# CONFIG_DVB_TDA10071 is not set
-+# CONFIG_DVB_SP8870 is not set
-+# CONFIG_DVB_SP887X is not set
-+# CONFIG_DVB_CX22700 is not set
-+# CONFIG_DVB_CX22702 is not set
-+# CONFIG_DVB_S5H1432 is not set
-+# CONFIG_DVB_DRXD is not set
-+# CONFIG_DVB_L64781 is not set
-+# CONFIG_DVB_TDA1004X is not set
-+# CONFIG_DVB_NXT6000 is not set
-+# CONFIG_DVB_MT352 is not set
-+# CONFIG_DVB_ZL10353 is not set
-+# CONFIG_DVB_DIB3000MB is not set
-+# CONFIG_DVB_DIB3000MC is not set
-+# CONFIG_DVB_DIB7000M is not set
-+# CONFIG_DVB_DIB7000P is not set
-+# CONFIG_DVB_DIB9000 is not set
-+# CONFIG_DVB_TDA10048 is not set
-+# CONFIG_DVB_AF9013 is not set
-+# CONFIG_DVB_EC100 is not set
-+# CONFIG_DVB_STV0367 is not set
-+# CONFIG_DVB_CXD2820R is not set
-+# CONFIG_DVB_CXD2841ER is not set
-+# CONFIG_DVB_RTL2830 is not set
-+# CONFIG_DVB_RTL2832 is not set
-+# CONFIG_DVB_RTL2832_SDR is not set
-+# CONFIG_DVB_SI2168 is not set
-+# CONFIG_DVB_ZD1301_DEMOD is not set
-+# CONFIG_DVB_CXD2880 is not set
-+# CONFIG_DVB_VES1820 is not set
-+# CONFIG_DVB_TDA10021 is not set
-+# CONFIG_DVB_TDA10023 is not set
-+# CONFIG_DVB_STV0297 is not set
-+# CONFIG_DVB_NXT200X is not set
-+# CONFIG_DVB_OR51211 is not set
-+# CONFIG_DVB_OR51132 is not set
-+# CONFIG_DVB_BCM3510 is not set
-+# CONFIG_DVB_LGDT330X is not set
-+# CONFIG_DVB_LGDT3305 is not set
-+# CONFIG_DVB_LGDT3306A is not set
-+# CONFIG_DVB_LG2160 is not set
-+# CONFIG_DVB_S5H1409 is not set
-+# CONFIG_DVB_AU8522_DTV is not set
-+# CONFIG_DVB_AU8522_V4L is not set
-+# CONFIG_DVB_S5H1411 is not set
-+# CONFIG_DVB_S921 is not set
-+# CONFIG_DVB_DIB8000 is not set
-+# CONFIG_DVB_MB86A20S is not set
-+# CONFIG_DVB_TC90522 is not set
-+# CONFIG_DVB_MN88443X is not set
-+# CONFIG_DVB_PLL is not set
-+# CONFIG_DVB_TUNER_DIB0070 is not set
-+# CONFIG_DVB_TUNER_DIB0090 is not set
-+# CONFIG_DVB_DRX39XYJ is not set
-+# CONFIG_DVB_LNBH25 is not set
-+# CONFIG_DVB_LNBH29 is not set
-+# CONFIG_DVB_LNBP21 is not set
-+# CONFIG_DVB_LNBP22 is not set
-+# CONFIG_DVB_ISL6405 is not set
-+# CONFIG_DVB_ISL6421 is not set
-+# CONFIG_DVB_ISL6423 is not set
-+# CONFIG_DVB_A8293 is not set
-+# CONFIG_DVB_LGS8GL5 is not set
-+# CONFIG_DVB_LGS8GXX is not set
-+# CONFIG_DVB_ATBM8830 is not set
-+# CONFIG_DVB_TDA665x is not set
-+# CONFIG_DVB_IX2505V is not set
-+# CONFIG_DVB_M88RS2000 is not set
-+# CONFIG_DVB_AF9033 is not set
-+# CONFIG_DVB_HORUS3A is not set
-+# CONFIG_DVB_ASCOT2E is not set
-+# CONFIG_DVB_HELENE is not set
-+# CONFIG_DVB_CXD2099 is not set
-+# CONFIG_DVB_SP2 is not set
-+CONFIG_DRM=y
-+CONFIG_DRM_PANEL_LVDS=y
-+CONFIG_DRM_PANEL_SIMPLE=y
-+CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
-+CONFIG_DRM_TI_TFP410=y
-+CONFIG_FB_MXS=y
-+CONFIG_FB_MXC_SYNC_PANEL=y
-+CONFIG_FB_MXC_OVERLAY=y
-+CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y
-+CONFIG_FB_MXC_ADV7535=y
-+CONFIG_FB_MXC_TRULY_PANEL_TFT3P5581E=y
-+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
-+CONFIG_FB_MXC_RK_PANEL_RK055AHD042=y
-+CONFIG_FB_MXC_RK_PANEL_RK055IQH042=y
-+CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y
-+CONFIG_FB_MXC_MIPI_DSI=y
-+CONFIG_FB_MXC_LDB=y
-+CONFIG_FB_MXC_EINK_PANEL=y
-+CONFIG_FB_MXC_EINK_V2_PANEL=y
-+CONFIG_FB_MXC_HDMI=y
-+CONFIG_FB_MXS_SII902X=y
-+CONFIG_FB_MXC_DCIC=y
-+CONFIG_LCD_CLASS_DEVICE=y
-+CONFIG_LCD_L4F00242T03=y
-+CONFIG_LCD_PLATFORM=y
-+CONFIG_BACKLIGHT_PWM=y
-+CONFIG_BACKLIGHT_GPIO=y
-+CONFIG_FRAMEBUFFER_CONSOLE=y
-+CONFIG_LOGO=y
-+CONFIG_SOUND=y
-+CONFIG_SND=y
-+# CONFIG_SND_DRIVERS is not set
-+# CONFIG_SND_PCI is not set
-+# CONFIG_SND_ARM is not set
-+# CONFIG_SND_SPI is not set
-+# CONFIG_SND_USB is not set
-+CONFIG_SND_SOC=y
-+CONFIG_SND_SOC_FSL_ASRC=y
-+CONFIG_SND_SOC_FSL_SAI=y
-+CONFIG_SND_SOC_FSL_MQS=y
-+CONFIG_SND_SOC_FSL_RPMSG=y
-+CONFIG_SND_IMX_SOC=y
-+CONFIG_SND_SIMPLE_CARD=y
-+CONFIG_HID_MULTITOUCH=y
-+CONFIG_USB=y
-+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_MXC=y
-+CONFIG_USB_HCD_TEST_MODE=y
-+CONFIG_USB_ACM=m
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB_CHIPIDEA=y
-+CONFIG_USB_CHIPIDEA_UDC=y
-+CONFIG_USB_CHIPIDEA_HOST=y
-+CONFIG_USB_SERIAL=m
-+CONFIG_USB_SERIAL_GENERIC=y
-+CONFIG_USB_SERIAL_FTDI_SIO=m
-+CONFIG_USB_SERIAL_OPTION=m
-+CONFIG_USB_TEST=m
-+CONFIG_USB_EHSET_TEST_FIXTURE=m
-+CONFIG_NOP_USB_XCEIV=y
-+CONFIG_USB_MXS_PHY=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_FSL_USB2=y
-+CONFIG_USB_CONFIGFS=y
-+CONFIG_USB_CONFIGFS_SERIAL=y
-+CONFIG_USB_CONFIGFS_ACM=y
-+CONFIG_USB_CONFIGFS_OBEX=y
-+CONFIG_USB_CONFIGFS_NCM=y
-+CONFIG_USB_CONFIGFS_ECM=y
-+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
-+CONFIG_USB_CONFIGFS_RNDIS=y
-+CONFIG_USB_CONFIGFS_EEM=y
-+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-+CONFIG_USB_CONFIGFS_F_LB_SS=y
-+CONFIG_USB_CONFIGFS_F_FS=y
-+CONFIG_USB_CONFIGFS_F_UAC1=y
-+CONFIG_USB_CONFIGFS_F_UAC2=y
-+CONFIG_USB_CONFIGFS_F_MIDI=y
-+CONFIG_USB_CONFIGFS_F_HID=y
-+CONFIG_USB_CONFIGFS_F_UVC=y
-+CONFIG_USB_CONFIGFS_F_PRINTER=y
-+CONFIG_USB_ZERO=m
-+CONFIG_USB_AUDIO=m
-+CONFIG_USB_ETH=m
-+CONFIG_USB_G_NCM=m
-+CONFIG_USB_GADGETFS=m
-+CONFIG_USB_FUNCTIONFS=m
-+CONFIG_USB_MASS_STORAGE=m
-+CONFIG_USB_G_SERIAL=m
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_PLTFM=y
-+CONFIG_MMC_SDHCI_ESDHC_IMX=y
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_LEDS_GPIO=y
-+CONFIG_LEDS_PWM=y
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+CONFIG_LEDS_TRIGGER_ONESHOT=y
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-+CONFIG_LEDS_TRIGGER_GPIO=y
-+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-+CONFIG_RTC_DRV_DS1307=y
-+CONFIG_RTC_DRV_ISL1208=y
-+CONFIG_RTC_DRV_PCF8523=y
-+CONFIG_RTC_DRV_PCF8563=y
-+CONFIG_RTC_DRV_M41T80=y
-+CONFIG_RTC_DRV_RC5T619=y
-+CONFIG_RTC_DRV_DA9063=y
-+CONFIG_RTC_DRV_MC13XXX=y
-+CONFIG_RTC_DRV_MXC=y
-+CONFIG_RTC_DRV_MXC_V2=y
-+CONFIG_RTC_DRV_SNVS=y
-+CONFIG_RTC_DRV_IMX_RPMSG=y
-+CONFIG_DMADEVICES=y
-+CONFIG_FSL_EDMA=y
-+CONFIG_IMX_SDMA=y
-+CONFIG_MXS_DMA=y
-+CONFIG_MXC_PXP_V2=y
-+CONFIG_MXC_PXP_V3=y
-+CONFIG_DMATEST=m
-+CONFIG_STAGING=y
-+CONFIG_STAGING_MEDIA=y
-+CONFIG_COMMON_CLK_PWM=y
-+CONFIG_MAILBOX=y
-+CONFIG_REMOTEPROC=y
-+CONFIG_IMX_REMOTEPROC=y
-+CONFIG_EXTCON_USB_GPIO=y
-+CONFIG_IIO=y
-+CONFIG_IMX7D_ADC=y
-+CONFIG_RN5T618_ADC=y
-+CONFIG_VF610_ADC=y
-+CONFIG_PWM=y
-+CONFIG_PWM_FSL_FTM=y
-+CONFIG_PWM_IMX27=y
-+CONFIG_PWM_IMX_TPM=y
-+CONFIG_PHY_MIXEL_LVDS=y
-+CONFIG_PHY_MIXEL_LVDS_COMBO=y
-+CONFIG_NVMEM_IMX_OCOTP=y
-+CONFIG_NVMEM_SNVS_LPGPR=y
-+CONFIG_TEE=y
-+CONFIG_OPTEE=y
-+CONFIG_MUX_MMIO=y
-+CONFIG_SIOX=m
-+CONFIG_SIOX_BUS_GPIO=m
-+CONFIG_MXC_SIM=y
-+CONFIG_MXC_IPU=y
-+CONFIG_MXC_SIMv2=y
-+CONFIG_MXC_MLB150=y
-+CONFIG_MXC_IPU_V3_PRE=y
-+CONFIG_MXC_HDMI_CEC=y
-+CONFIG_MXC_MIPI_CSI2=y
-+CONFIG_EXT2_FS=y
-+CONFIG_EXT2_FS_XATTR=y
-+CONFIG_EXT2_FS_POSIX_ACL=y
-+CONFIG_EXT2_FS_SECURITY=y
-+CONFIG_EXT3_FS=y
-+CONFIG_EXT3_FS_POSIX_ACL=y
-+CONFIG_EXT3_FS_SECURITY=y
-+CONFIG_QUOTA=y
-+CONFIG_QUOTA_NETLINK_INTERFACE=y
-+# CONFIG_PRINT_QUOTA_WARNING is not set
-+CONFIG_AUTOFS4_FS=y
-+CONFIG_FUSE_FS=y
-+CONFIG_OVERLAY_FS=y
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_EXFAT_FS=y
-+CONFIG_NTFS_FS=y
-+CONFIG_NTFS_RW=y
-+CONFIG_TMPFS=y
-+CONFIG_TMPFS_POSIX_ACL=y
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
-+CONFIG_NFS_V4_1=y
-+CONFIG_NFS_V4_2=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_NLS_DEFAULT="cp437"
-+CONFIG_NLS_CODEPAGE_437=y
-+CONFIG_NLS_ASCII=y
-+CONFIG_NLS_ISO8859_1=y
-+CONFIG_NLS_ISO8859_15=m
-+CONFIG_NLS_UTF8=y
-+CONFIG_SECURITYFS=y
-+CONFIG_CRYPTO_USER=y
-+CONFIG_CRYPTO_TEST=m
-+CONFIG_CRYPTO_ECHAINIV=m
-+CONFIG_CRYPTO_TLS=m
-+CONFIG_CRYPTO_CFB=m
-+CONFIG_CRYPTO_CTS=m
-+CONFIG_CRYPTO_LRW=m
-+CONFIG_CRYPTO_OFB=m
-+CONFIG_CRYPTO_PCBC=m
-+CONFIG_CRYPTO_ESSIV=m
-+CONFIG_CRYPTO_XCBC=m
-+CONFIG_CRYPTO_VMAC=m
-+CONFIG_CRYPTO_MD4=m
-+CONFIG_CRYPTO_MD5=m
-+CONFIG_CRYPTO_MICHAEL_MIC=y
-+CONFIG_CRYPTO_RMD128=m
-+CONFIG_CRYPTO_RMD160=m
-+CONFIG_CRYPTO_RMD256=m
-+CONFIG_CRYPTO_RMD320=m
-+CONFIG_CRYPTO_SHA512=m
-+CONFIG_CRYPTO_SHA3=m
-+CONFIG_CRYPTO_SM3=m
-+CONFIG_CRYPTO_STREEBOG=m
-+CONFIG_CRYPTO_TGR192=m
-+CONFIG_CRYPTO_WP512=m
-+CONFIG_CRYPTO_ANUBIS=m
-+CONFIG_CRYPTO_ARC4=m
-+CONFIG_CRYPTO_BLOWFISH=m
-+CONFIG_CRYPTO_CAMELLIA=m
-+CONFIG_CRYPTO_CAST5=m
-+CONFIG_CRYPTO_CAST6=m
-+CONFIG_CRYPTO_DES=m
-+CONFIG_CRYPTO_FCRYPT=m
-+CONFIG_CRYPTO_KHAZAD=m
-+CONFIG_CRYPTO_SALSA20=m
-+CONFIG_CRYPTO_SEED=m
-+CONFIG_CRYPTO_SERPENT=m
-+CONFIG_CRYPTO_SM4=m
-+CONFIG_CRYPTO_TEA=m
-+CONFIG_CRYPTO_TWOFISH=m
-+CONFIG_CRYPTO_DEFLATE=y
-+CONFIG_CRYPTO_LZO=y
-+CONFIG_CRYPTO_ZSTD=y
-+CONFIG_CRYPTO_ANSI_CPRNG=m
-+CONFIG_CRYPTO_USER_API_RNG=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM=m
-+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
-+CONFIG_CRYPTO_DEV_SAHARA=y
-+CONFIG_CRYPTO_DEV_MXS_DCP=y
-+CONFIG_CRC_CCITT=m
-+CONFIG_CRC_T10DIF=y
-+CONFIG_CRC_ITU_T=m
-+CONFIG_CRC7=m
-+CONFIG_LIBCRC32C=m
-+CONFIG_DMA_CMA=y
-+CONFIG_FONTS=y
-+CONFIG_FONT_8x8=y
-+CONFIG_FONT_8x16=y
-+CONFIG_PRINTK_TIME=y
-+# CONFIG_DEBUG_BUGVERBOSE is not set
-+CONFIG_MAGIC_SYSRQ=y
-+CONFIG_DEBUG_FS=y
-+# CONFIG_SCHED_DEBUG is not set
-+# CONFIG_DEBUG_PREEMPT is not set
-+# CONFIG_FTRACE is not set
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-igkboard/Makefile
---- linux-imx/Makefile 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/Makefile 2022-03-27 22:09:19.803996342 +0800
-@@ -367,7 +367,8 @@
- # Alternatively CROSS_COMPILE can be set in the environment.
- # Default value for CROSS_COMPILE is not to prefix executables
- # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
--ARCH ?= $(SUBARCH)
-+ARCH ?= arm
-+CROSS_COMPILE?=/opt/buildroot/cortexA7/bin/arm-linux-
-
- # Architecture as present in compile.h
- UTS_MACHINE := $(ARCH)
--
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