From c1800dc0e72a10d3279cda2af8c303c75ab1cbd7 Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Thu, 18 Nov 2021 22:37:52 +0800
Subject: [PATCH] update uboot patch, fix TF card reset/vselect pins bug

---
 bsp/bootloader/patch/uboot-imx-imx6ull.patch |   43 +++++++++++++++++++++++++++++++------------
 1 files changed, 31 insertions(+), 12 deletions(-)

diff --git a/bsp/bootloader/patch/uboot-imx-imx6ull.patch b/bsp/bootloader/patch/uboot-imx-imx6ull.patch
index 5a6438a..592944c 100644
--- a/bsp/bootloader/patch/uboot-imx-imx6ull.patch
+++ b/bsp/bootloader/patch/uboot-imx-imx6ull.patch
@@ -1,7 +1,15 @@
 diff -Nuar uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi uboot-imx-imx6ull/arch/arm/dts/imx6ul-14x14-evk.dtsi
 --- uboot-imx/arch/arm/dts/imx6ul-14x14-evk.dtsi	2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-imx6ull/arch/arm/dts/imx6ul-14x14-evk.dtsi	2021-11-16 12:55:12.665468988 +0800
-@@ -83,6 +83,9 @@
++++ uboot-imx-imx6ull/arch/arm/dts/imx6ul-14x14-evk.dtsi	2021-11-18 22:35:34.620799096 +0800
+@@ -21,7 +21,6 @@
+ 		regulator-name = "VSD_3V3";
+ 		regulator-min-microvolt = <3300000>;
+ 		regulator-max-microvolt = <3300000>;
+-		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ 		off-on-delay-us = <20000>;
+ 		enable-active-high;
+ 	};
+@@ -83,6 +82,9 @@
  	pinctrl-0 = <&pinctrl_enet1>;
  	phy-mode = "rmii";
  	phy-handle = <&ethphy0>;
@@ -11,7 +19,7 @@
  	status = "okay";
  };
  
-@@ -91,14 +94,17 @@
+@@ -91,14 +93,17 @@
  	pinctrl-0 = <&pinctrl_enet2>;
  	phy-mode = "rmii";
  	phy-handle = <&ethphy1>;
@@ -31,7 +39,7 @@
  			micrel,led-mode = <1>;
  			clocks = <&clks IMX6UL_CLK_ENET_REF>;
  			clock-names = "rmii-ref";
-@@ -151,21 +157,21 @@
+@@ -151,21 +156,21 @@
  	status = "okay";
  
  	display0: display@0 {
@@ -64,7 +72,7 @@
  
  			hsync-active = <0>;
  			vsync-active = <0>;
-@@ -312,6 +318,7 @@
+@@ -312,6 +317,7 @@
  			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
  			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
  			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
@@ -72,7 +80,7 @@
  		>;
  	};
  
-@@ -327,6 +334,7 @@
+@@ -327,6 +333,7 @@
  			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0
  			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0
  			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
@@ -80,7 +88,7 @@
  		>;
  	};
  
-@@ -423,7 +431,6 @@
+@@ -423,7 +430,6 @@
  			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x11088
  			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x11088
  			MX6UL_PAD_JTAG_TMS__SAI2_MCLK		0x17088
@@ -88,7 +96,7 @@
  		>;
  	};
  
-@@ -448,7 +455,6 @@
+@@ -448,7 +454,6 @@
  		fsl,pins = <
  			MX6UL_PAD_BOOT_MODE0__GPIO5_IO10	0x70a1
  			MX6UL_PAD_BOOT_MODE1__GPIO5_IO11	0x70a1
@@ -96,9 +104,20 @@
  			MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x80000000
  		>;
  	};
+@@ -492,9 +497,7 @@
+ 			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 	0x17059
+ 			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 	0x17059
+ 			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 	0x17059
+-			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
+-			MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
+-			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
++			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19   0x17059 /* SD1 CD */
+ 		>;
+ 	};
+ 
 diff -Nuar uboot-imx/.cfg-imx6ull uboot-imx-imx6ull/.cfg-imx6ull
 --- uboot-imx/.cfg-imx6ull	1970-01-01 08:00:00.000000000 +0800
-+++ uboot-imx-imx6ull/.cfg-imx6ull	2021-11-16 20:42:43.127648377 +0800
++++ uboot-imx-imx6ull/.cfg-imx6ull	2021-11-18 22:36:39.757531746 +0800
 @@ -0,0 +1,1644 @@
 +#
 +# Automatically generated file; DO NOT EDIT.
@@ -1746,7 +1765,7 @@
 +CONFIG_MKIMAGE_DTC_PATH="dtc"
 diff -Nuar uboot-imx/drivers/net/phy/phy.c uboot-imx-imx6ull/drivers/net/phy/phy.c
 --- uboot-imx/drivers/net/phy/phy.c	2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-imx6ull/drivers/net/phy/phy.c	2021-11-16 12:55:12.665468988 +0800
++++ uboot-imx-imx6ull/drivers/net/phy/phy.c	2021-11-18 22:30:18.524715432 +0800
 @@ -182,6 +182,9 @@
  {
  	int result;
@@ -1759,7 +1778,7 @@
  
 diff -Nuar uboot-imx/include/configs/mx6ullevk.h uboot-imx-imx6ull/include/configs/mx6ullevk.h
 --- uboot-imx/include/configs/mx6ullevk.h	2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-imx6ull/include/configs/mx6ullevk.h	2021-11-16 12:55:12.665468988 +0800
++++ uboot-imx-imx6ull/include/configs/mx6ullevk.h	2021-11-18 22:30:18.524715432 +0800
 @@ -100,124 +100,34 @@
  
  #else
@@ -1913,7 +1932,7 @@
  #define CONFIG_IOMUX_LPSR
 diff -Nuar uboot-imx/Makefile uboot-imx-imx6ull/Makefile
 --- uboot-imx/Makefile	2021-09-06 16:48:23.000000000 +0800
-+++ uboot-imx-imx6ull/Makefile	2021-11-16 20:40:25.974293682 +0800
++++ uboot-imx-imx6ull/Makefile	2021-11-18 22:35:40.404865360 +0800
 @@ -263,6 +263,9 @@
  CROSS_COMPILE ?=
  endif

--
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