From ddb843b28a032e43d7f88171ddbac30432022846 Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Thu, 06 Oct 2022 14:46:21 +0800
Subject: [PATCH] update meta-igkboard for honister and test okay
---
yocto/honister/meta-igkboard/recipes-kernel/linux/files/linux-imx-igkboard.patch | 1894 ++++++++++++++++++++++++++++++++++++++---------------------
1 files changed, 1,220 insertions(+), 674 deletions(-)
diff --git a/yocto/honister/meta-igkboard/recipes-kernel/linux/files/linux-imx-igkboard.patch b/yocto/honister/meta-igkboard/recipes-kernel/linux/files/linux-imx-igkboard.patch
index 2614c3a..375ce63 100644
--- a/yocto/honister/meta-igkboard/recipes-kernel/linux/files/linux-imx-igkboard.patch
+++ b/yocto/honister/meta-igkboard/recipes-kernel/linux/files/linux-imx-igkboard.patch
@@ -1,88 +1,122 @@
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard-emmc.dts linux-imx-igkboard/arch/arm/boot/dts/igkboard-emmc.dts
---- linux-imx/arch/arm/boot/dts/igkboard-emmc.dts 1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/igkboard-emmc.dts 2021-12-22 19:31:56.922407534 +0800
-@@ -0,0 +1,10 @@
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/igkboard.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/igkboard.dts
+--- linux-imx/arch/arm/boot/dts/igkboard.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/igkboard.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,603 @@
+/*
-+ * LingYun IoT System Studio IGK(IoT Gateway Kit) Board device tree
++ * Device Tree Source for LingYun IGKBoard(IoT Gateway Kit Board)
++ * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
++ * Copyright (C) 2022 LingYun IoT System Studio.
++ * Author: Guo Wenxue<guowenxue@gmail.com>
+ */
+
-+#include "imx6ul-14x14-evk-emmc.dts"
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi linux-imx-igkboard/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
---- linux-imx/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi 2021-12-18 21:41:22.474200827 +0800
-@@ -31,7 +31,41 @@
- brightness-levels = <0 4 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- status = "okay";
-- };
-+ };
++/dts-v1/;
++
++#include "imx6ull.dtsi"
++
++/ {
++ model = "LingYun IoT System Studio IoT Gateway Board";
++ compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
++
++ chosen {
++ stdout-path = &uart1;
++ };
++
++ memory@80000000 {
++ device_type = "memory";
++ reg = <0x80000000 0x20000000>;
++ };
++
++ reserved-memory {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++
++ linux,cma {
++ compatible = "shared-dma-pool";
++ reusable;
++ size = <0xa000000>;
++ linux,cma-default;
++ };
++ };
+
+ buzzer: pwm-buzzer {
-+ compatible = "pwm-beeper";
-+ pwms = <&pwm2 0 500000>;
-+ status = "okay";
++ compatible = "pwm-beeper";
++ pwms = <&pwm2 0 500000>;
++ status = "okay";
+ };
+
+ leds {
-+ compatible = "gpio-leds";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_leds>;
-+ status = "okay";
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpio_leds>;
++ status = "okay";
+
-+ sysled {
-+ lable = "sysled";
-+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ default-state = "off";
-+ };
-+ };
++ sysled {
++ lable = "sysled";
++ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++ };
+
-+ keys {
-+ compatible = "gpio-keys";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_keys>;
-+ autorepeat;
-+ status = "okay";
++ keys {
++ compatible = "gpio-keys";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpio_keys>;
++ autorepeat;
++ status = "okay";
+
-+ key_user {
-+ lable = "key_user";
-+ gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
-+ linux,code = <KEY_ENTER>;
-+ };
-+ };
-
- pxp_v4l2 {
- compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
-@@ -43,19 +77,16 @@
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-- gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- off-on-delay-us = <20000>;
- enable-active-high;
- };
-
- reg_peri_3v3: regulator-peri-3v3 {
- compatible = "regulator-fixed";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_peri_3v3>;
- regulator-name = "VPERI_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-- gpio = <&gpio5 2 GPIO_ACTIVE_LOW>;
++ key_user {
++ lable = "key_user";
++ gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_ENTER>;
++ };
++ };
+
- /*
- * If you want to want to make this dynamic please
- * check schematics and test all affected peripherals:
-@@ -78,6 +109,24 @@
- gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
- };
-
++ pxp_v4l2 {
++ compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
++ status = "okay";
++ };
++
++ reg_sd1_vmmc: regulator-sd1-vmmc {
++ compatible = "regulator-fixed";
++ regulator-name = "VSD_3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
++ off-on-delay-us = <20000>;
++ enable-active-high;
++ };
++
++ reg_peri_3v3: regulator-peri-3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "VPERI_3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ /*
++ * If you want to want to make this dynamic please
++ * check schematics and test all affected peripherals:
++ *
++ * - sensors
++ * - ethernet phy
++ * - can
++ * - bluetooth
++ * - wm8960 audio codec
++ * - ov5640 camera
++ */
++ regulator-always-on;
++ };
++
++ reg_can_3v3: regulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "can-3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
@@ -101,153 +135,654 @@
+ regulator-always-on;
+ };
+
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "mx6ul-wm8960";
-@@ -115,6 +164,15 @@
- };
- };
-
-+ sound-mqs {
++ backlight_lcd: backlight-lcd {
++ compatible = "pwm-backlight";
++ pwms = <&pwm1 0 5000000>;
++ brightness-levels = <0 4 8 16 32 64 128 255>;
++ default-brightness-level = <7>;
++ power-supply = <®_3p3v>;
++ status = "disabled"; /* Enable in LCD overlay */
++ };
++
++ /* 1-Wire sentinel for overlay */
++ w1: w1 {
++ compatible = "w1-gpio";
++ status = "disabled";
++ };
++
++ mqs: mqs {
++ #sound-dai-cells = <0>;
++ compatible = "fsl,imx6sx-mqs";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_mqs>;
++ clocks = <&clks IMX6UL_CLK_SAI1>;
++ clock-names = "mclk";
++ gpr = <&gpr>;
++ status = "okay";
++ };
++
++ sound-mqs {
+ compatible = "fsl,imx-audio-mqs";
+ model = "mqs-audio";
-+ cpu-dai = <&sai1>;
-+ asrc-controller = <&asrc>;
++ audio-cpu = <&sai1>;
++ audio-asrc = <&asrc>;
+ audio-codec = <&mqs>;
+ status = "okay";
+ };
+
- sound-wm8960 {
- compatible = "fsl,imx6ul-evk-wm8960",
- "fsl,imx-audio-wm8960";
-@@ -142,7 +200,7 @@
- compatible = "spi-gpio";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi4>;
-- status = "okay";
-+ status = "disabled"; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with fec1 reset pin */
- pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
- gpio-sck = <&gpio5 11 0>;
- gpio-mosi = <&gpio5 10 0>;
-@@ -169,7 +227,7 @@
- };
-
- &csi {
-- status = "disabled";
++};
++
++/*+--------------+
++ | Misc Modules |
++ +--------------+*/
++
++&snvs_poweroff {
+ status = "okay";
-
- port {
- csi1_ep: endpoint {
-@@ -184,6 +242,26 @@
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-
++};
++
++&snvs_pwrkey {
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
++&pwm1 { /* backlight */
++ #pwm-cells = <2>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1>;
++ status = "okay";
++};
++
++&pwm2 {
++ #pwm-cells = <2>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>;
++ status = "okay";
++};
++
++// /*+---------------+
++// | Camera Module |
++// +---------------+*/
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ status = "okay";
++
+ gt9xx@5d {
-+ compatible = "goodix,gt9147";
-+ reg = <0x5d>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ts_pins>;
++ compatible = "goodix,gt9147";
++ reg = <0x5d>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ts_pins>;
+
-+ irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
-+ reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
-+ interrupt-parent = <&gpio5>;
-+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
++ irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+
-+ status = "okay";
-+ };
++ status = "disabled"; /* Enable in LCD overlay */
++ };
+
-+ rtc@6f {
-+ compatible = "isil,isl1208";
-+ reg = <0x6f>;
-+ status = "okay";
-+ };
++ rtc@6f {
++ compatible = "isil,isl1208";
++ reg = <0x6f>;
++ status = "okay";
++ };
+
- codec: wm8960@1a {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8960";
-@@ -192,7 +270,8 @@
- wlf,hp-cfg = <3 2 3>;
- wlf,gpio-cfg = <1 3>;
- clocks = <&clks IMX6UL_CLK_SAI2>;
-- clock-names = "mclk";
-+ clock-names = "mclk";
-+ status = "disabled";
- };
-
- ov5640: ov5640@3c {
-@@ -202,12 +281,19 @@
- pinctrl-0 = <&pinctrl_csi1>;
- clocks = <&clks IMX6UL_CLK_CSI>;
- clock-names = "csi_mclk";
-- pwn-gpios = <&gpio_spi 6 1>;
-- rst-gpios = <&gpio_spi 5 0>;
++ ov5640: ov5640@3c {
++ compatible = "ovti,ov5640";
++ reg = <0x3c>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_csi1>;
++ clocks = <&clks IMX6UL_CLK_CSI>;
++ clock-names = "csi_mclk";
+
+ DOVDD-supply = <®_3p3v>;
+ VDD-supply = <®_1p8v>;
+ AVDD-supply = <®_3p3v>;
+ DVDD-supply = <®_3p3v>;
+
-+ pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
-+ rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
- csi_id = <0>;
- mclk = <24000000>;
- mclk_source = <0>;
-- status = "disabled";
-+ /* rotation = <180>; */
-+ status = "okay";
- port {
- ov5640_ep: endpoint {
- remote-endpoint = <&csi1_ep>;
-@@ -222,6 +308,9 @@
- phy-mode = "rmii";
- phy-handle = <ðphy0>;
- phy-supply = <®_peri_3v3>;
-+ phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 conflict with spi4 */
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
- status = "okay";
- };
-
-@@ -231,14 +320,17 @@
- phy-mode = "rmii";
- phy-handle = <ðphy1>;
- phy-supply = <®_peri_3v3>;
-+ phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with sai2 */
-+ phy-reset-duration = <50>;
-+ phy-reset-post-delay = <15>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
-- ethphy0: ethernet-phy@2 {
-- reg = <2>;
++ pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
++ rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
++ csi_id = <0>;
++ mclk = <24000000>;
++ mclk_source = <0>;
++ /* rotation = <180>; */
++ status = "disabled"; /* Enable in CAM overlay */
++ port {
++ ov5640_ep: endpoint {
++ remote-endpoint = <&csi1_ep>;
++ };
++ };
++ };
++
++};
++
++&csi {
++ status = "disabled";
++ port {
++ csi1_ep: endpoint {
++ remote-endpoint = <&ov5640_ep>;
++ };
++ };
++};
++
++/*+--------------+
++ | Audio Module |
++ +--------------+*/
++
++&clks {
++ assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
++ //assigned-clock-rates = <786432000>; // 16bit,2Ch,48KHz
++ assigned-clock-rates = <722534400>; // 16bit,2Ch,44.1KHz
++};
++
++&sai1 {
++ assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>, <&clks IMX6UL_CLK_SAI1>;
++ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
++ //assigned-clock-rates = <0>, <24576000>; // 16bit,2Ch,48KHz
++ assigned-clock-rates = <0>, <22579200>; // 16bit,2Ch,44.1KHz
++ fsl,sai-mclk-direction-output;
++ status = "okay";
++};
++
++/*+------------------+
++ | Ethernet Modules |
++ +------------------+*/
++
++&fec1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet1>;
++ phy-mode = "rmii";
++ phy-handle = <ðphy0>;
++ phy-supply = <®_peri_3v3>;
++ phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
++ phy-reset-duration = <50>;
++ phy-reset-post-delay = <15>;
++ status = "okay";
++};
++
++&fec2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet2>;
++ phy-mode = "rmii";
++ phy-handle = <ðphy1>;
++ phy-supply = <®_peri_3v3>;
++ phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
++ phy-reset-duration = <50>;
++ phy-reset-post-delay = <15>;
++ status = "okay";
++
++ mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
+ ethphy0: ethernet-phy@0 {
++ compatible = "ethernet-phy-id0022.1560";
+ reg = <0>;
- micrel,led-mode = <1>;
- clocks = <&clks IMX6UL_CLK_ENET_REF>;
- clock-names = "rmii-ref";
-@@ -301,21 +393,21 @@
-
- display0: display@0 {
- bits-per-pixel = <16>;
-- bus-width = <24>;
++ micrel,led-mode = <1>;
++ clocks = <&clks IMX6UL_CLK_ENET_REF>;
++ clock-names = "rmii-ref";
++
++ };
++
++ ethphy1: ethernet-phy@1 {
++ compatible = "ethernet-phy-id0022.1560";
++ reg = <1>;
++ micrel,led-mode = <1>;
++ clocks = <&clks IMX6UL_CLK_ENET2_REF>;
++ clock-names = "rmii-ref";
++ };
++ };
++};
++
++/*+---------------+
++ | USB interface |
++ +---------------+*/
++
++&usbotg1 {
++ dr_mode = "otg";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usb_otg1>;
++ status = "okay";
++};
++
++&usbotg2 {
++ dr_mode = "host";
++ disable-over-current;
++ status = "okay";
++};
++
++&usbphy1 {
++ fsl,tx-d-cal = <106>;
++};
++
++&usbphy2 {
++ fsl,tx-d-cal = <106>;
++};
++
++/*+------------------+
++ | USDCHC interface |
++ +------------------+*/
++
++&usdhc1 {
++ pinctrl-names = "default", "state_100mhz", "state_200mhz";
++ pinctrl-0 = <&pinctrl_usdhc1>;
++ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
++ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
++ keep-power-in-suspend;
++ wakeup-source;
++ vmmc-supply = <®_sd1_vmmc>;
++ status = "okay";
++};
++
++&usdhc2 {
++ pinctrl-names = "default", "state_100mhz", "state_200mhz";
++ pinctrl-0 = <&pinctrl_usdhc2_8bit>;
++ pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
++ non-removable;
++ bus-width = <8>;
++ keep-power-in-suspend;
++ wakeup-source;
++ status = "okay";
++};
++
++/*+----------------------+
++ | Basic pinctrl iomuxc |
++ +----------------------+*/
++
++&iomuxc {
++ pinctrl-names = "default";
++
++ pinctrl_camera_clock: cameraclockgrp {
++ fsl,pins = <
++ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
++ >;
++ };
++
++ pinctrl_gpio_leds: gpio-leds {
++ fsl,pins = <
++ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17059 /* led run */
++ >;
++ };
++
++ pinctrl_gpio_keys: gpio-keys {
++ fsl,pins = <
++ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 /* gpio key */
++ >;
++ };
++
++ pinctrl_mqs: pinctrl-mqs-pins {
++ fsl,pins = <
++ MX6UL_PAD_JTAG_TDI__MQS_LEFT 0x11088 /* MQS Left */
++ MX6UL_PAD_JTAG_TDO__MQS_RIGHT 0x11088 /* MQS Right */
++ >;
++ };
++
++ pinctrl_ts_pins: pinctrl-ts-pins {
++ fsl,pins = <
++ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 /* TouchScreen IRQ */
++ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 /* TouchScreen RST */
++ >;
++ };
++
++ pinctrl_csi1: csi1grp {
++ fsl,pins = <
++ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059 /* CSI_RST */
++ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x17059 /* CSI_PWDN */
++ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
++ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
++ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
++ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
++ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
++ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
++ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
++ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
++ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
++ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
++ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
++ >;
++ };
++
++ pinctrl_enet1: enet1grp {
++ fsl,pins = <
++ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
++ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
++ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
++ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
++ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
++ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
++ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
++ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
++ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0
++ >;
++ };
++
++ pinctrl_enet2: enet2grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
++ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
++ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
++ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
++ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
++ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
++ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
++ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
++ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
++ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
++ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x10B0
++ >;
++ };
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
++ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
++ >;
++ };
++
++ pinctrl_pwm1: pwm1grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
++ >;
++ };
++
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x110b0
++ >;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
++ >;
++ };
++
++ pinctrl_usb_otg1: usbotg1grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
++ >;
++ };
++
++ pinctrl_usdhc1: usdhc1grp {
++ fsl,pins = <
++ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
++ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
++ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
++ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
++ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
++ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
++ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
++ >;
++ };
++
++ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
++ fsl,pins = <
++ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
++ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
++ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
++ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
++ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
++ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
++
++ >;
++ };
++
++ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
++ fsl,pins = <
++ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
++ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
++ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
++ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
++ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
++ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
++ >;
++ };
++
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins = <
++ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
++ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
++ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
++ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
++ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
++ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
++ >;
++ };
++
++ pinctrl_usdhc2_8bit: usdhc2grp_8bit {
++ fsl,pins = <
++ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
++ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
++ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
++ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
++ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
++ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
++ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
++ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
++ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
++ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
++ >;
++ };
++
++ pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
++ fsl,pins = <
++ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
++ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
++ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
++ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
++ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
++ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
++ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
++ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
++ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
++ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
++ >;
++ };
++
++ pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
++ fsl,pins = <
++ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
++ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
++ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
++ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
++ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
++ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
++ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
++ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
++ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
++ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
++ >;
++ };
++
++};
+\ No newline at end of file
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/Makefile
+--- linux-imx/arch/arm/boot/dts/Makefile 2022-07-22 03:24:17.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/Makefile 2022-10-06 10:55:47.564618629 +0800
+@@ -1586,3 +1586,6 @@
+ aspeed-bmc-portwell-neptune.dtb \
+ aspeed-bmc-quanta-q71l.dtb \
+ aspeed-bmc-supermicro-x11spi.dtb
++DTC_FLAGS_igkboard := -@
++dtb-$(CONFIG_SOC_IMX6UL) += igkboard.dtb
++subdir-$(CONFIG_SOC_IMX6UL) += overlays
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/cam.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/cam.dts
+--- linux-imx/arch/arm/boot/dts/overlays/cam.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/cam.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,24 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++/* MIPI-DSI2 camera overlay */
++
++&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
++ status = "okay";
++};
++
++&csi {
++ status = "okay";
++};
++
++&i2c2 {
++ ov5640@3c {
++ status = "okay";
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can1.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/can1.dts
+--- linux-imx/arch/arm/boot/dts/overlays/can1.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/can1.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, CAN1 interfaces */
++
++&can1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_flexcan1>;
++ xceiver-supply = <®_can_3v3>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_flexcan1: flexcan1grp{
++ fsl,pins = <
++ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
++ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/can2.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/can2.dts
+--- linux-imx/arch/arm/boot/dts/overlays/can2.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/can2.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, CAN2 interfaces */
++
++&can2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_flexcan2>;
++ xceiver-supply = <®_can_3v3>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_flexcan2: flexcan2grp{
++ fsl,pins = <
++ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
++ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/i2c1.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/i2c1.dts
+--- linux-imx/arch/arm/boot/dts/overlays/i2c1.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/i2c1.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, I2C1 interfaces */
++
++&i2c1 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
++ MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/lcd.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/lcd.dts
+--- linux-imx/arch/arm/boot/dts/overlays/lcd.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/lcd.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,89 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* LCD display overlay */
++
++&backlight_lcd {
++ status = "okay";
++};
++
++&i2c2 {
++ gt9xx@5d {
++ status = "okay";
++ };
++};
++
++&lcdif {
++ assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
++ assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
++ display = <&display0>;
++ status = "okay";
++
++ display0: display@0 {
++ bits-per-pixel = <16>;
+ bus-width = <16>;
-
- display-timings {
- native-mode = <&timing0>;
-
- timing0: timing0 {
-- clock-frequency = <9200000>;
-- hactive = <480>;
-- vactive = <272>;
-- hfront-porch = <8>;
-- hback-porch = <4>;
-- hsync-len = <41>;
-- vback-porch = <2>;
-- vfront-porch = <4>;
-- vsync-len = <10>;
++
++ display-timings {
++ native-mode = <&timing0>;
++
++ timing0: timing0 {
+ clock-frequency = <30000000>;
+ hactive = <800>;
+ vactive = <480>;
@@ -257,225 +792,377 @@
+ vback-porch = <32>;
+ vfront-porch = <13>;
+ vsync-len = <3>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <1>;
-@@ -332,6 +424,13 @@
- status = "okay";
- };
-
-+&pwm2 {
-+ #pwm-cells = <2>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <1>;
++ pixelclk-active = <0>;
++ };
++ };
++ };
++};
++
++&iomuxc {
++ pinctrl_lcdif_dat: lcdifdatgrp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
++ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
++ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
++ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
++ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
++ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
++ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
++ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
++ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
++ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
++ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
++ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
++ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
++ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
++ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
++ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
++ >;
++ };
++
++ pinctrl_lcdif_ctrl: lcdifctrlgrp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
++ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
++ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
++ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
++ MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79
++ >;
++ };
++};
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/Makefile linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/Makefile
+--- linux-imx/arch/arm/boot/dts/overlays/Makefile 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/Makefile 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,18 @@
++# SPDX-License-Identifier: GPL-2.0
++# required for overlay support
++
++DTC_FLAGS += -@
++dtb-y += can1.dtbo
++dtb-y += can2.dtbo
++dtb-y += i2c1.dtbo
++dtb-y += spi1.dtbo
++dtb-y += uart2.dtbo
++dtb-y += uart3.dtbo
++dtb-y += uart4.dtbo
++dtb-y += uart7.dtbo
++dtb-y += pwm7.dtbo
++dtb-y += pwm8.dtbo
++dtb-y += w1.dtbo
++dtb-y += lcd.dtbo
++dtb-y += cam.dtbo
++dtb-y += nbiot-4g.dtbo
+\ No newline at end of file
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/nbiot-4g.dts
+--- linux-imx/arch/arm/boot/dts/overlays/nbiot-4g.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/nbiot-4g.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,34 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* NB-IoT/4G module use UART8 interfaces, conflict with SPI interface */
++
++&uart8 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pwm2>;
++ pinctrl-0 = <&pinctrl_spi_uart8 &pinctrl_nbiot_ctrl>;
+ status = "okay";
+};
+
- &pxp {
- status = "okay";
- };
-@@ -339,7 +438,7 @@
- &qspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_qspi>;
-- status = "okay";
-+ status = "disabled"; /* disable it for the pins conflict with GPIO Led and Key */
-
- flash0: n25q256a@0 {
- #address-cells = <1>;
-@@ -352,6 +451,24 @@
- };
- };
-
-+&mqs {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_mqs>;
-+ clocks = <&clks IMX6UL_CLK_SAI1>;
-+ clock-names = "mclk";
++&iomuxc {
++ pinctrl_spi_uart8: spi_uart8_grp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x1b0b1 /* MRXD */
++ MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x1b0b1 /* MTXD */
++ >;
++ };
++
++ pinctrl_nbiot_ctrl: nbiot_ctrl_grp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA22__GPIO3_IO27 0x17059 /* NB_PWREN/4G_RESET */
++ MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x17059 /* NB_MRST/4G_POWER_KEY */
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm7.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/pwm7.dts
+--- linux-imx/arch/arm/boot/dts/overlays/pwm7.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/pwm7.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, PWM7 interfaces */
++
++&pwm7 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm7>;
++ clocks = <&clks IMX6UL_CLK_PWM7>, <&clks IMX6UL_CLK_PWM7>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_pwm7: pwm7grp {
++ fsl,pins = <
++ MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x110b0
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/pwm8.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/pwm8.dts
+--- linux-imx/arch/arm/boot/dts/overlays/pwm8.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/pwm8.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/imx6ul-clock.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, PWM8 interfaces, conflict with NB-IoT */
++
++&pwm8 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm8_nbiot>;
++ clocks = <&clks IMX6UL_CLK_PWM8>, <&clks IMX6UL_CLK_PWM8>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_pwm8_nbiot: pwm8nbiotgrp {
++ fsl,pins = <
++ MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x110b0
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/spi1.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/spi1.dts
+--- linux-imx/arch/arm/boot/dts/overlays/spi1.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/spi1.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,39 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, SPI1 interfaces, conflict with UART8 */
++
++&ecspi1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_spi_uart8>;
++ cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
++ status = "okay";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ spidev0: spi@0 {
++ reg = <0>;
++ compatible = "semtech,sx1301";
++ spi-max-frequency = <1000000>;
++ };
++};
++
++&iomuxc {
++ pinctrl_spi_uart8: spi_uart8_grp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0
++ MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0
++ MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0
++ MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
++ >;
++ };
++};
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart2.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart2.dts
+--- linux-imx/arch/arm/boot/dts/overlays/uart2.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart2.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART2 interfaces */
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart2>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_uart2: uart2grp {
++ fsl,pins = <
++ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
++ >;
++ };
++};
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart3.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart3.dts
+--- linux-imx/arch/arm/boot/dts/overlays/uart3.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart3.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART3 interfaces */
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart3>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_uart3: uart3grp {
++ fsl,pins = <
++ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart4.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart4.dts
+--- linux-imx/arch/arm/boot/dts/overlays/uart4.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart4.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART4 interfaces */
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/uart7.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart7.dts
+--- linux-imx/arch/arm/boot/dts/overlays/uart7.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/uart7.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include "../imx6ul-pinfunc.h"
++
++/* 40-pin extended GPIO, UART7 interfaces, conflict with LCD display */
++
++&uart7 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart7>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl_uart7: uart7grp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1
++ MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1
++ >;
++ };
++};
++
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/overlays/w1.dts linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/w1.dts
+--- linux-imx/arch/arm/boot/dts/overlays/w1.dts 1970-01-01 08:00:00.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/boot/dts/overlays/w1.dts 2022-10-06 10:55:47.564618629 +0800
+@@ -0,0 +1,31 @@
++/*
++ * Copyright (C) 2022 LingYun IoT System Studio
++ * Author: Guo Wenxue<guowenxue@gmail.com>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include "../imx6ul-pinfunc.h"
++
++/* W1(DS18B20) on 40Pin Header Pin#7 (GPIO1_IO18) */
++
++&w1 {
++ compatible = "w1-gpio";
+ status = "okay";
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_w1>;
++ gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
+};
+
+
-+&sai1 {
-+ assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
-+ <&clks IMX6UL_CLK_SAI1>;
-+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-+ assigned-clock-rates = <0>, <24576000>;
-+ fsl,sai-mclk-direction-output;
-+ status = "okay";
++&iomuxc {
++ pinctrl_w1: w1grp {
++ fsl,pins = <
++ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x110b0
++ >;
++ };
+};
+
- &sai2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai2>;
-@@ -360,7 +477,7 @@
- assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
- assigned-clock-rates = <0>, <12288000>;
- fsl,sai-mclk-direction-output;
-- status = "okay";
-+ status = "disabled"; /* MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 conflict with fec2 reset pin */
- };
-
- &snvs_poweroff {
-@@ -384,7 +501,7 @@
- pinctrl-assert-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
- port = <1>;
- sven_low_active;
-- status = "okay";
-+ status = "disabled";
- };
-
- &tsc {
-@@ -439,6 +556,7 @@
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-+ no-1-8-v;
- keep-power-in-suspend;
- wakeup-source;
- vmmc-supply = <®_sd1_vmmc>;
-@@ -446,8 +564,8 @@
- };
-
- &usdhc2 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc2>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc2>;
- non-removable;
- keep-power-in-suspend;
- wakeup-source;
-@@ -463,6 +581,32 @@
- &iomuxc {
- pinctrl-names = "default";
-
-+ pinctrl_gpio_leds: gpio-leds {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17059 /* led run */
-+ >;
-+ };
-+
-+ pinctrl_gpio_keys: gpio-keys {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 /* gpio key */
-+ >;
-+ };
-+
-+ pinctrl_mqs: pinctrl-mqs-pins {
-+ fsl,pins = <
-+ MX6UL_PAD_JTAG_TDI__MQS_LEFT 0x11088 /* MQS Left */
-+ MX6UL_PAD_JTAG_TDO__MQS_RIGHT 0x11088 /* MQS Right */
-+ >;
-+ };
-+
-+ pinctrl_ts_pins: pinctrl-ts-pins {
-+ fsl,pins = <
-+ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 /* TouchScreen IRQ */
-+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 /* TouchScreen RST */
-+ >;
-+ };
-+
- pinctrl_csi1: csi1grp {
- fsl,pins = <
- MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
-@@ -490,6 +634,7 @@
- MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
- MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
- MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0 /* ENET1 RESET conflict with pinctrl_spi4 */
- >;
- };
-
-@@ -505,6 +650,7 @@
- MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
-+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x10B0 /* ENET2 RESET conflict with pinctrl_sai2 */
- >;
- };
-
-@@ -594,19 +740,18 @@
- MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
- MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
- MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
-- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
- >;
- };
-
-- pinctrl_peri_3v3: peri3v3grp {
-+ pinctrl_pwm1: pwm1grp {
- fsl,pins = <
-- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0
-+ MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
- >;
- };
-
-- pinctrl_pwm1: pwm1grp {
-+ pinctrl_pwm2: pwm2grp {
- fsl,pins = <
-- MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
-+ MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x110b0
- >;
- };
-
-@@ -625,7 +770,6 @@
- fsl,pins = <
- MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
- MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
-- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
- >;
- };
-@@ -678,9 +822,7 @@
- MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
- MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
- MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
-- MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
-- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
-+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
- >;
- };
-
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/imx6ul.dtsi linux-imx-igkboard/arch/arm/boot/dts/imx6ul.dtsi
---- linux-imx/arch/arm/boot/dts/imx6ul.dtsi 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/imx6ul.dtsi 2021-12-18 21:41:22.474200827 +0800
-@@ -727,6 +727,7 @@
- offset = <0x34>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled"; /* disable CPU builtin RTC and will use ISL1208 */
- };
-
- snvs_poweroff: snvs-poweroff {
-@@ -791,6 +792,12 @@
- reg = <0x020e4000 0x4000>;
- };
-
-+ mqs: mqs {
-+ compatible = "fsl,imx6sx-mqs";
-+ gpr = <&gpr>;
-+ status = "disabled";
-+ };
-+
- gpt2: timer@20e8000 {
- compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
- reg = <0x020e8000 0x4000>;
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/boot/dts/Makefile linux-imx-igkboard/arch/arm/boot/dts/Makefile
---- linux-imx/arch/arm/boot/dts/Makefile 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/boot/dts/Makefile 2021-12-22 19:41:12.058569872 +0800
-@@ -678,6 +678,7 @@
- imx6ul-tx6ul-0010.dtb \
- imx6ul-tx6ul-0011.dtb \
- imx6ul-tx6ul-mainboard.dtb \
-+ igkboard-emmc.dtb \
- imx6ull-14x14-evk.dtb \
- imx6ull-14x14-evk-emmc.dtb \
- imx6ull-14x14-evk-btwifi.dtb \
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-igkboard/arch/arm/configs/igkboard_defconfig
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/arch/arm/configs/igkboard_defconfig linux-imx-lf-5.15.32-2.0.0/arch/arm/configs/igkboard_defconfig
--- linux-imx/arch/arm/configs/igkboard_defconfig 1970-01-01 08:00:00.000000000 +0800
-+++ linux-imx-igkboard/arch/arm/configs/igkboard_defconfig 2021-12-22 19:45:31.209601680 +0800
-@@ -0,0 +1,722 @@
++++ linux-imx-lf-5.15.32-2.0.0/arch/arm/configs/igkboard_defconfig 2022-10-06 11:05:22.312555493 +0800
+@@ -0,0 +1,587 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
@@ -495,6 +1182,7 @@
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
++CONFIG_KALLSYMS_ALL=y
+CONFIG_PERF_EVENTS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
@@ -529,15 +1217,18 @@
+CONFIG_NEON=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
++CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
-+# CONFIG_BLK_DEV_BSG is not set
++CONFIG_BINFMT_MISC=m
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
++CONFIG_TLS=y
++CONFIG_TLS_DEVICE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
@@ -605,24 +1296,26 @@
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
-+CONFIG_SENSORS_FXOS8700=y
-+CONFIG_SENSORS_FXAS2100X=y
+CONFIG_PCI_ENDPOINT_TEST=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
++# CONFIG_BLK_DEV_BSG is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
-+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_IMX=y
+CONFIG_PATA_IMX=y
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=m
++CONFIG_BLK_DEV_DM=m
++CONFIG_DM_CRYPT=m
+CONFIG_NETDEVICES=y
++CONFIG_TUN=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
-+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
@@ -637,59 +1330,51 @@
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_MICREL_PHY=y
+CONFIG_AT803X_PHY=y
-+CONFIG_USB_RTL8150=y
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=y
+CONFIG_USB_LAN78XX=y
+CONFIG_USB_USBNET=y
-+# CONFIG_USB_NET_AX8817X is not set
-+# CONFIG_USB_NET_AX88179_178A is not set
-+CONFIG_USB_NET_CDC_EEM=y
-+CONFIG_USB_NET_DM9601=y
-+CONFIG_USB_NET_SMSC75XX=y
++CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_SMSC95XX=y
-+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_USB_NET_MCS7830=y
-+# CONFIG_USB_NET_ZAURUS is not set
-+CONFIG_USB_IPHETH=y
-+# CONFIG_WLAN_VENDOR_ADMTEK is not set
-+# CONFIG_WLAN_VENDOR_ATH is not set
-+# CONFIG_WLAN_VENDOR_ATMEL is not set
-+# CONFIG_WLAN_VENDOR_BROADCOM is not set
-+# CONFIG_WLAN_VENDOR_CISCO is not set
-+# CONFIG_WLAN_VENDOR_INTEL is not set
-+# CONFIG_WLAN_VENDOR_INTERSIL is not set
-+# CONFIG_WLAN_VENDOR_MARVELL is not set
-+CONFIG_MT7601U=y
-+CONFIG_MT76x0U=y
-+CONFIG_MT76x2U=y
-+CONFIG_MT7663U=y
-+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
-+# CONFIG_WLAN_VENDOR_RALINK is not set
-+CONFIG_RTL8187=y
-+CONFIG_RTL8192CE=y
-+CONFIG_RTL8188EE=y
-+CONFIG_RTL8192EE=y
-+CONFIG_RTL8821AE=y
-+CONFIG_RTL8192CU=y
-+CONFIG_RTL8XXXU=y
-+CONFIG_RTL8XXXU_UNTESTED=y
-+# CONFIG_WLAN_VENDOR_RSI is not set
-+# CONFIG_WLAN_VENDOR_ST is not set
-+# CONFIG_WLAN_VENDOR_TI is not set
-+# CONFIG_WLAN_VENDOR_ZYDAS is not set
-+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
-+CONFIG_INPUT_MOUSEDEV=y
-+CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_ATH10K=m
++CONFIG_ATH10K_SDIO=m
++CONFIG_HOSTAP=y
++CONFIG_WL12XX=m
++CONFIG_WL18XX=m
++CONFIG_WLCORE_SDIO=m
++# CONFIG_WILINK_PLATFORM_DATA is not set
+CONFIG_INPUT_EVDEV=y
++CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_RPMSG=y
+CONFIG_KEYBOARD_IMX=y
-+# CONFIG_INPUT_MOUSE is not set
++CONFIG_MOUSE_PS2=m
++CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_INPUT_TOUCHSCREEN=y
-+# CONFIG_TOUCHSCREEN_CT36X_WLD is not set
++CONFIG_TOUCHSCREEN_ADS7846=y
++CONFIG_TOUCHSCREEN_AD7879=y
++CONFIG_TOUCHSCREEN_AD7879_I2C=y
++CONFIG_TOUCHSCREEN_ATMEL_MXT=y
++CONFIG_TOUCHSCREEN_DA9052=y
++CONFIG_TOUCHSCREEN_EGALAX=y
++CONFIG_TOUCHSCREEN_ELAN_TS=y
+CONFIG_TOUCHSCREEN_GOODIX=y
-+# CONFIG_TOUCHSCREEN_SYNAPTICS_DSX is not set
-+# CONFIG_SERIO_SERPORT is not set
++CONFIG_TOUCHSCREEN_ILI210X=y
++CONFIG_TOUCHSCREEN_MAX11801=y
++CONFIG_TOUCHSCREEN_IMX6UL_TSC=y
++CONFIG_TOUCHSCREEN_EDT_FT5X06=y
++CONFIG_TOUCHSCREEN_MC13783=y
++CONFIG_TOUCHSCREEN_TSC2004=y
++CONFIG_TOUCHSCREEN_TSC2007=y
++CONFIG_TOUCHSCREEN_STMPE=y
++CONFIG_TOUCHSCREEN_SX8654=y
++CONFIG_TOUCHSCREEN_COLIBRI_VF50=y
++CONFIG_TOUCHSCREEN_FTS=y
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_MMA8450=y
++CONFIG_SERIO_SERPORT=m
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
@@ -724,15 +1409,19 @@
+CONFIG_GPIO_PCF857X=y
+CONFIG_GPIO_STMPE=y
+CONFIG_GPIO_74X164=y
++CONFIG_W1=y
++CONFIG_W1_MASTER_GPIO=y
++CONFIG_W1_SLAVE_THERM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_POWER_SUPPLY=y
++CONFIG_SABRESD_MAX8903=y
++CONFIG_RN5T618_POWER=m
+CONFIG_SENSORS_MC13783_ADC=y
+CONFIG_SENSORS_GPIO_FAN=y
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_SENSORS_MAX17135=y
-+CONFIG_SENSORS_MAG3110=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_STATISTICS=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
@@ -740,6 +1429,7 @@
+CONFIG_IMX_THERMAL=y
+CONFIG_DEVICE_THERMAL=y
+CONFIG_WATCHDOG=y
++CONFIG_DA9063_WATCHDOG=m
+CONFIG_DA9062_WATCHDOG=y
+CONFIG_RN5T618_WATCHDOG=y
+CONFIG_IMX2_WDT=y
@@ -753,7 +1443,6 @@
+CONFIG_MFD_RN5T618=y
+CONFIG_MFD_SI476X_CORE=y
+CONFIG_MFD_STMPE=y
-+CONFIG_MFD_WM8994=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_ANATOP=y
@@ -761,6 +1450,7 @@
+CONFIG_REGULATOR_DA9062=y
+CONFIG_REGULATOR_DA9063=y
+CONFIG_REGULATOR_GPIO=y
++CONFIG_REGULATOR_LTC3676=y
+CONFIG_REGULATOR_MAX17135=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
@@ -772,181 +1462,35 @@
+CONFIG_IR_GPIO_CIR=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
-+CONFIG_USB_VIDEO_CLASS=y
-+CONFIG_USB_GSPCA=y
-+# CONFIG_RADIO_ADAPTERS is not set
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_RADIO_SI476X=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_MUX=y
-+CONFIG_VIDEO_MXC_CAPTURE=y
++CONFIG_VIDEO_MXC_CAPTURE=m
+CONFIG_VIDEO_MXC_OUTPUT=y
-+CONFIG_VIDEO_MXC_CSI_CAMERA=y
-+CONFIG_MXC_VADC=y
-+CONFIG_MXC_MIPI_CSI=y
-+CONFIG_MXC_CAMERA_OV5640_V2=y
-+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
-+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=y
++CONFIG_VIDEO_MXC_CSI_CAMERA=m
++CONFIG_MXC_VADC=m
++CONFIG_MXC_MIPI_CSI=m
++CONFIG_MXC_CAMERA_OV5640=m
++CONFIG_MXC_CAMERA_OV5640_V2=m
++CONFIG_MXC_CAMERA_OV5640_MIPI=m
++CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m
++CONFIG_MXC_TVIN_ADV7180=m
++CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
+CONFIG_VIDEO_MXC_PXP_V4L2=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_CODA=m
+CONFIG_VIDEO_IMX_PXP=y
-+# CONFIG_VIDEO_IR_I2C is not set
-+# CONFIG_CXD2880_SPI_DRV is not set
-+# CONFIG_MEDIA_TUNER_SIMPLE is not set
-+# CONFIG_MEDIA_TUNER_TDA18250 is not set
-+# CONFIG_MEDIA_TUNER_TDA8290 is not set
-+# CONFIG_MEDIA_TUNER_TDA827X is not set
-+# CONFIG_MEDIA_TUNER_TDA18271 is not set
-+# CONFIG_MEDIA_TUNER_TDA9887 is not set
-+# CONFIG_MEDIA_TUNER_TEA5761 is not set
-+# CONFIG_MEDIA_TUNER_TEA5767 is not set
-+# CONFIG_MEDIA_TUNER_MSI001 is not set
-+# CONFIG_MEDIA_TUNER_MT20XX is not set
-+# CONFIG_MEDIA_TUNER_MT2060 is not set
-+# CONFIG_MEDIA_TUNER_MT2063 is not set
-+# CONFIG_MEDIA_TUNER_MT2266 is not set
-+# CONFIG_MEDIA_TUNER_MT2131 is not set
-+# CONFIG_MEDIA_TUNER_QT1010 is not set
-+# CONFIG_MEDIA_TUNER_XC2028 is not set
-+# CONFIG_MEDIA_TUNER_XC5000 is not set
-+# CONFIG_MEDIA_TUNER_XC4000 is not set
-+# CONFIG_MEDIA_TUNER_MXL5005S is not set
-+# CONFIG_MEDIA_TUNER_MXL5007T is not set
-+# CONFIG_MEDIA_TUNER_MC44S803 is not set
-+# CONFIG_MEDIA_TUNER_MAX2165 is not set
-+# CONFIG_MEDIA_TUNER_TDA18218 is not set
-+# CONFIG_MEDIA_TUNER_FC0011 is not set
-+# CONFIG_MEDIA_TUNER_FC0012 is not set
-+# CONFIG_MEDIA_TUNER_FC0013 is not set
-+# CONFIG_MEDIA_TUNER_TDA18212 is not set
-+# CONFIG_MEDIA_TUNER_E4000 is not set
-+# CONFIG_MEDIA_TUNER_FC2580 is not set
-+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
-+# CONFIG_MEDIA_TUNER_TUA9001 is not set
-+# CONFIG_MEDIA_TUNER_SI2157 is not set
-+# CONFIG_MEDIA_TUNER_IT913X is not set
-+# CONFIG_MEDIA_TUNER_R820T is not set
-+# CONFIG_MEDIA_TUNER_MXL301RF is not set
-+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
-+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
-+# CONFIG_DVB_STB0899 is not set
-+# CONFIG_DVB_STB6100 is not set
-+# CONFIG_DVB_STV090x is not set
-+# CONFIG_DVB_STV0910 is not set
-+# CONFIG_DVB_STV6110x is not set
-+# CONFIG_DVB_STV6111 is not set
-+# CONFIG_DVB_MXL5XX is not set
-+# CONFIG_DVB_M88DS3103 is not set
-+# CONFIG_DVB_DRXK is not set
-+# CONFIG_DVB_TDA18271C2DD is not set
-+# CONFIG_DVB_SI2165 is not set
-+# CONFIG_DVB_MN88472 is not set
-+# CONFIG_DVB_MN88473 is not set
-+# CONFIG_DVB_CX24110 is not set
-+# CONFIG_DVB_CX24123 is not set
-+# CONFIG_DVB_MT312 is not set
-+# CONFIG_DVB_ZL10036 is not set
-+# CONFIG_DVB_ZL10039 is not set
-+# CONFIG_DVB_S5H1420 is not set
-+# CONFIG_DVB_STV0288 is not set
-+# CONFIG_DVB_STB6000 is not set
-+# CONFIG_DVB_STV0299 is not set
-+# CONFIG_DVB_STV6110 is not set
-+# CONFIG_DVB_STV0900 is not set
-+# CONFIG_DVB_TDA8083 is not set
-+# CONFIG_DVB_TDA10086 is not set
-+# CONFIG_DVB_TDA8261 is not set
-+# CONFIG_DVB_VES1X93 is not set
-+# CONFIG_DVB_TUNER_ITD1000 is not set
-+# CONFIG_DVB_TUNER_CX24113 is not set
-+# CONFIG_DVB_TDA826X is not set
-+# CONFIG_DVB_TUA6100 is not set
-+# CONFIG_DVB_CX24116 is not set
-+# CONFIG_DVB_CX24117 is not set
-+# CONFIG_DVB_CX24120 is not set
-+# CONFIG_DVB_SI21XX is not set
-+# CONFIG_DVB_TS2020 is not set
-+# CONFIG_DVB_DS3000 is not set
-+# CONFIG_DVB_MB86A16 is not set
-+# CONFIG_DVB_TDA10071 is not set
-+# CONFIG_DVB_SP8870 is not set
-+# CONFIG_DVB_SP887X is not set
-+# CONFIG_DVB_CX22700 is not set
-+# CONFIG_DVB_CX22702 is not set
-+# CONFIG_DVB_S5H1432 is not set
-+# CONFIG_DVB_DRXD is not set
-+# CONFIG_DVB_L64781 is not set
-+# CONFIG_DVB_TDA1004X is not set
-+# CONFIG_DVB_NXT6000 is not set
-+# CONFIG_DVB_MT352 is not set
-+# CONFIG_DVB_ZL10353 is not set
-+# CONFIG_DVB_DIB3000MB is not set
-+# CONFIG_DVB_DIB3000MC is not set
-+# CONFIG_DVB_DIB7000M is not set
-+# CONFIG_DVB_DIB7000P is not set
-+# CONFIG_DVB_DIB9000 is not set
-+# CONFIG_DVB_TDA10048 is not set
-+# CONFIG_DVB_AF9013 is not set
-+# CONFIG_DVB_EC100 is not set
-+# CONFIG_DVB_STV0367 is not set
-+# CONFIG_DVB_CXD2820R is not set
-+# CONFIG_DVB_CXD2841ER is not set
-+# CONFIG_DVB_RTL2830 is not set
-+# CONFIG_DVB_RTL2832 is not set
-+# CONFIG_DVB_RTL2832_SDR is not set
-+# CONFIG_DVB_SI2168 is not set
-+# CONFIG_DVB_ZD1301_DEMOD is not set
-+# CONFIG_DVB_CXD2880 is not set
-+# CONFIG_DVB_VES1820 is not set
-+# CONFIG_DVB_TDA10021 is not set
-+# CONFIG_DVB_TDA10023 is not set
-+# CONFIG_DVB_STV0297 is not set
-+# CONFIG_DVB_NXT200X is not set
-+# CONFIG_DVB_OR51211 is not set
-+# CONFIG_DVB_OR51132 is not set
-+# CONFIG_DVB_BCM3510 is not set
-+# CONFIG_DVB_LGDT330X is not set
-+# CONFIG_DVB_LGDT3305 is not set
-+# CONFIG_DVB_LGDT3306A is not set
-+# CONFIG_DVB_LG2160 is not set
-+# CONFIG_DVB_S5H1409 is not set
-+# CONFIG_DVB_AU8522_DTV is not set
-+# CONFIG_DVB_AU8522_V4L is not set
-+# CONFIG_DVB_S5H1411 is not set
-+# CONFIG_DVB_S921 is not set
-+# CONFIG_DVB_DIB8000 is not set
-+# CONFIG_DVB_MB86A20S is not set
-+# CONFIG_DVB_TC90522 is not set
-+# CONFIG_DVB_MN88443X is not set
-+# CONFIG_DVB_PLL is not set
-+# CONFIG_DVB_TUNER_DIB0070 is not set
-+# CONFIG_DVB_TUNER_DIB0090 is not set
-+# CONFIG_DVB_DRX39XYJ is not set
-+# CONFIG_DVB_LNBH25 is not set
-+# CONFIG_DVB_LNBH29 is not set
-+# CONFIG_DVB_LNBP21 is not set
-+# CONFIG_DVB_LNBP22 is not set
-+# CONFIG_DVB_ISL6405 is not set
-+# CONFIG_DVB_ISL6421 is not set
-+# CONFIG_DVB_ISL6423 is not set
-+# CONFIG_DVB_A8293 is not set
-+# CONFIG_DVB_LGS8GL5 is not set
-+# CONFIG_DVB_LGS8GXX is not set
-+# CONFIG_DVB_ATBM8830 is not set
-+# CONFIG_DVB_TDA665x is not set
-+# CONFIG_DVB_IX2505V is not set
-+# CONFIG_DVB_M88RS2000 is not set
-+# CONFIG_DVB_AF9033 is not set
-+# CONFIG_DVB_HORUS3A is not set
-+# CONFIG_DVB_ASCOT2E is not set
-+# CONFIG_DVB_HELENE is not set
-+# CONFIG_DVB_CXD2099 is not set
-+# CONFIG_DVB_SP2 is not set
++CONFIG_VIDEO_ADV7180=m
++CONFIG_VIDEO_OV2680=m
++CONFIG_VIDEO_OV5645=m
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_LVDS=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
+CONFIG_DRM_TI_TFP410=y
++CONFIG_FB=y
+CONFIG_FB_MXS=y
+CONFIG_FB_MXC_SYNC_PANEL=y
+CONFIG_FB_MXC_OVERLAY=y
@@ -973,23 +1517,29 @@
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
-+# CONFIG_SND_DRIVERS is not set
-+# CONFIG_SND_PCI is not set
-+# CONFIG_SND_ARM is not set
-+# CONFIG_SND_SPI is not set
-+# CONFIG_SND_USB is not set
++CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_ASRC=y
-+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_FSL_MQS=y
+CONFIG_SND_SOC_FSL_RPMSG=y
+CONFIG_SND_IMX_SOC=y
++CONFIG_SND_SOC_EUKREA_TLV320=y
++CONFIG_SND_SOC_IMX_ES8328=y
++CONFIG_SND_SOC_IMX_SGTL5000=y
++CONFIG_SND_SOC_IMX_SPDIF=y
++CONFIG_SND_SOC_FSL_ASOC_CARD=y
++CONFIG_SND_SOC_IMX_HDMI=y
++CONFIG_SND_SOC_IMX6QDL_HDMI=y
++CONFIG_SND_SOC_AC97_CODEC=y
++CONFIG_SND_SOC_CS42XX8_I2C=y
++CONFIG_SND_SOC_WM8960=y
++CONFIG_SND_SOC_WM8962=y
++CONFIG_SND_SOC_RPMSG_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_HCD_TEST_MODE=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
@@ -1005,7 +1555,6 @@
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_GADGET=y
-+CONFIG_USB_FSL_USB2=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
@@ -1071,14 +1620,20 @@
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_COMMON_CLK_PWM=y
-+CONFIG_MAILBOX=y
+CONFIG_REMOTEPROC=y
+CONFIG_IMX_REMOTEPROC=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_IIO=y
++CONFIG_MMA8452=y
+CONFIG_IMX7D_ADC=y
+CONFIG_RN5T618_ADC=y
+CONFIG_VF610_ADC=y
++CONFIG_FXAS21002C=y
++CONFIG_FXOS8700_I2C=y
++CONFIG_RPMSG_IIO_PEDOMETER=m
++CONFIG_SENSORS_ISL29018=y
++CONFIG_MAG3110=y
++CONFIG_MPL3115=y
+CONFIG_PWM=y
+CONFIG_PWM_FSL_FTM=y
+CONFIG_PWM_IMX27=y
@@ -1112,13 +1667,16 @@
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_OVERLAY_FS=y
-+CONFIG_MSDOS_FS=y
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
-+CONFIG_EXFAT_FS=y
-+CONFIG_NTFS_FS=y
-+CONFIG_NTFS_RW=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
++CONFIG_JFFS2_FS=y
++CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
@@ -1141,21 +1699,17 @@
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_OFB=m
+CONFIG_CRYPTO_PCBC=m
-+CONFIG_CRYPTO_ESSIV=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
++CONFIG_CRYPTO_XXHASH=m
++CONFIG_CRYPTO_BLAKE2B=m
++CONFIG_CRYPTO_BLAKE2S=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
-+CONFIG_CRYPTO_MICHAEL_MIC=y
-+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
-+CONFIG_CRYPTO_RMD256=m
-+CONFIG_CRYPTO_RMD320=m
-+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_SHA3=m
+CONFIG_CRYPTO_SM3=m
+CONFIG_CRYPTO_STREEBOG=m
-+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
@@ -1166,17 +1720,16 @@
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
-+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SM4=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
-+CONFIG_CRYPTO_DEFLATE=y
-+CONFIG_CRYPTO_LZO=y
-+CONFIG_CRYPTO_ZSTD=y
+CONFIG_CRYPTO_ANSI_CPRNG=m
++CONFIG_CRYPTO_USER_API_HASH=m
++CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
++CONFIG_CRYPTO_USER_API_AEAD=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
+CONFIG_CRYPTO_DEV_FSL_CAAM=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
@@ -1184,7 +1737,6 @@
+CONFIG_CRYPTO_DEV_MXS_DCP=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
-+CONFIG_CRC_ITU_T=m
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_DMA_CMA=y
@@ -1198,40 +1750,34 @@
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-igkboard/Makefile
---- linux-imx/Makefile 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/Makefile 2021-12-22 19:45:15.333652470 +0800
-@@ -367,7 +367,8 @@
- # Alternatively CROSS_COMPILE can be set in the environment.
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/drivers/video/backlight/pwm_bl.c linux-imx-lf-5.15.32-2.0.0/drivers/video/backlight/pwm_bl.c
+--- linux-imx/drivers/video/backlight/pwm_bl.c 2022-07-22 03:24:23.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/drivers/video/backlight/pwm_bl.c 2022-10-06 11:02:43.047970154 +0800
+@@ -552,6 +552,7 @@
+ if (!state.period && (data->pwm_period_ns > 0))
+ state.period = data->pwm_period_ns;
+
++ state.enabled = true; /* Add by guowenxue to enalbe backlight as default */
+ ret = pwm_apply_state(pb->pwm, &state);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to apply initial PWM state: %d\n",
+diff -Nuar --no-dereference -x logo_linux_clut224.ppm linux-imx/Makefile linux-imx-lf-5.15.32-2.0.0/Makefile
+--- linux-imx/Makefile 2022-07-22 03:24:17.000000000 +0800
++++ linux-imx-lf-5.15.32-2.0.0/Makefile 2022-10-06 10:55:47.568618548 +0800
+@@ -382,6 +382,8 @@
# Default value for CROSS_COMPILE is not to prefix executables
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
--ARCH ?= $(SUBARCH)
-+ARCH ?= arm
+ ARCH ?= $(SUBARCH)
++ARCH = arm
+CROSS_COMPILE?=/opt/buildroot/cortexA7/bin/arm-linux-
-
+
# Architecture as present in compile.h
UTS_MACHINE := $(ARCH)
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/sound/soc/fsl/fsl_mqs.c linux-imx-igkboard/sound/soc/fsl/fsl_mqs.c
---- linux-imx/sound/soc/fsl/fsl_mqs.c 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/sound/soc/fsl/fsl_mqs.c 2021-12-18 21:41:22.474200827 +0800
-@@ -247,6 +247,8 @@
- &fsl_mqs_dai, 1);
- if (ret)
- goto err_free_gpr_np;
-+
-+ printk("NXP mqs sound card driver register ok\n");
- return 0;
-
- err_free_gpr_np:
-diff -Nuar -x include-prefixes -x logo_linux_clut224.ppm linux-imx/sound/soc/fsl/fsl_sai.c linux-imx-igkboard/sound/soc/fsl/fsl_sai.c
---- linux-imx/sound/soc/fsl/fsl_sai.c 2021-09-08 18:41:11.000000000 +0800
-+++ linux-imx-igkboard/sound/soc/fsl/fsl_sai.c 2021-12-18 21:41:22.474200827 +0800
-@@ -1349,7 +1349,7 @@
- sai->bus_clk = NULL;
- }
-
-- for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
-+ for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {
- sprintf(tmp, "mclk%d", i);
- sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
- if (IS_ERR(sai->mclk_clk[i])) {
+@@ -1880,6 +1882,7 @@
+ \( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \
+ -o -name '*.ko.*' \
+ -o -name '*.dtb' -o -name '*.dtbo' -o -name '*.dtb.S' -o -name '*.dt.yaml' \
++ -o -name '*.dtbo' \
+ -o -name '*.dwo' -o -name '*.lst' \
+ -o -name '*.su' -o -name '*.mod' \
+ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
--
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