From 00cb813bffdc9876ae03ff0b967be3b1912f2454 Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Sun, 04 Feb 2018 07:10:22 +0800
Subject: [PATCH] Add ok6410 project from gitlab on master linux server
---
ok6410/src/thirdparty/ethtool/build.sh | 72
ok6410/src/bootloader/asm/myboot/common.h | 20
ok6410/src/thirdparty/busybox/build.sh | 142
ok6410/src/bootloader/asm/asm_c_led/led.c | 24
ok6410/doc/android_s3c6410.txt | 214
ok6410/src/bootloader/asm/myboot/bootstrap.c | 97
ok6410/src/thirdparty/openswan/build-x86.sh | 9
ok6410/src/program/comport/cp_comport.h | 67
ok6410/src/thirdparty/appweb/build.sh | 93
ok6410/src/thirdparty/busybox/patch/busybox-1.20.2.config | 1020 +++
ok6410/src/thirdparty/curl/build.sh | 85
ok6410/src/thirdparty/scripts/funcs.sh | 116
ok6410/src/bootloader/asm/myboot/serial.h | 17
ok6410/src/thirdparty/php/build.sh | 78
ok6410/src/thirdparty/dropbear/build.sh | 79
ok6410/src/program/comport/makefile | 113
ok6410/src/thirdparty/busybox/patch/.config | 1020 +++
ok6410/src/bootloader/asm/myboot/bootstrap.lds | 45
ok6410/src/thirdparty/lrzsz/build.sh | 72
ok6410/src/bootloader/asm/myboot/start.S | 64
ok6410/src/bootloader/bootstrap/s3c6410.h | 1536 +++++
ok6410/src/bootloader/asm/asm_c_led/start.S | 115
ok6410/src/program/comport/comport.c | 238
ok6410/src/bootloader/asm/myboot/lowlevel_init.S | 214
ok6410/src/program/comport/cp_comport.c | 600 ++
ok6410/src/thirdparty/dhcp/build.sh | 85
ok6410/src/rootfs/copy_library.sh | 24
ok6410/src/bootloader/asm/myboot/s3c6410.h | 1538 +++++
ok6410/src/bootloader/bootstrap/makefile | 51
ok6410/src/bootloader/asm/jlink.howto | 32
ok6410/src/kernel/patch/linux-3.0-s3c6410.patch | 2268 ++++++++
ok6410/src/thirdparty/tree/build.sh | 83
ok6410/src/kernel/build.sh | 158
ok6410/src/bootloader/u-boot/build.sh | 162
ok6410/src/thirdparty/sqlite/build.sh | 72
ok6410/src/thirdparty/libconfig/build.sh | 65
ok6410/src/bootloader/asm/asm_led/led.S | 94
ok6410/src/thirdparty/file/build.sh | 78
ok6410/src/bootloader/u-boot/patch/u-boot-2010.09-ok6410.patch | 1722 ++++++
ok6410/src/thirdparty/wget/build.sh | 70
ok6410/src/crosstool/buildroot-config/buildroot-2012.08.arm1176jzfs.config | 897 +++
ok6410/src/thirdparty/pppd/patch/ppp-2.4.5.patch | 79
ok6410/src/bootloader/asm/asm_c_led/makefile | 54
ok6410/src/bootloader/asm/asm_led/makefile | 53
ok6410/src/kernel/patch/gen_patch.sh | 74
ok6410/src/thirdparty/scripts/envs.sh | 11
ok6410/src/bootloader/asm/asm_c_led/led.lds | 30
ok6410/src/bootloader/u-boot/patch/gen_patch.sh | 70
ok6410/src/thirdparty/openssl/build.sh | 117
ok6410/src/bootloader/asm/myboot/serial.c | 95
ok6410/src/thirdparty/openswan/build.sh | 77
ok6410/src/crosstool/crosstool-ng/symbol_link.sh | 17
ok6410/src/bootloader/asm/myboot/makefile | 54
ok6410/src/thirdparty/pppd/build.sh | 77
ok6410/src/crosstool/crosstool-ng/crosstool-ng_glibc.howto | 308 +
ok6410/src/thirdparty/gmp/build.sh | 64
ok6410/src/bootloader/asm/myboot/xmodem.c | 122
ok6410/src/thirdparty/iptables/build.sh | 72
ok6410/src/crosstool/crosstool-ng/crosstool-ng-1.15.3_arm1176jzfs.config | 486 +
ok6410/src/rootfs/rootfs_tree.tar.bz2 | 0
ok6410/src/bootloader/bootstrap/start.S | 274 +
ok6410/src/thirdparty/ntp/build.sh | 72
62 files changed, 15,755 insertions(+), 0 deletions(-)
diff --git a/ok6410/doc/android_s3c6410.txt b/ok6410/doc/android_s3c6410.txt
new file mode 100644
index 0000000..70189d0
--- /dev/null
+++ b/ok6410/doc/android_s3c6410.txt
@@ -0,0 +1,214 @@
+[guowenxue@centos6 official_android]$ mkdir -p device/lingyun/s3c6410
+
+Under device/lingyun/s3c6410 must get follow files:
+1, AndroidProducts.mk
+2, BoardConfig.mk
+3, s3c6410.mk
+4, vendorsetup.sh
+
+[guowenxue@centos6 official_android]$ cp device/lingyun/crespo/vendorsetup.sh device/lingyun/s3c6410/
+[guowenxue@centos6 official_android]$ vim device/lingyun/s3c6410/vendorsetup.sh
+...
+add_lunch_combo s3c6410-eng
+[guowenxue@centos6 official_android]$ vim device/lingyun/s3c6410/AndroidProducts.mk
+#
+# This file should set PRODUCT_MAKEFILES to a list of product makefiles
+# to expose to the build system. LOCAL_DIR will already be set to
+# the directory containing this file.
+#
+# This file may not rely on the value of any variable other than
+# LOCAL_DIR; do not use any conditionals, and do not look up the
+# value of any variable that isn't set in this file or in a file that
+# it includes.
+#
+
+PRODUCT_MAKEFILES := \
+ $(LOCAL_DIR)/s3c6410.mk
+
+[guowenxue@centos6 official_android]$ vim device/lingyun/s3c6410/s3c6410.mk
+#
+# This file should set PRODUCT_MAKEFILES to a list of product makefiles
+# to expose to the build system. LOCAL_DIR will already be set to
+# the directory containing this file.
+#
+# This file may not rely on the value of any variable other than
+
+
+# value of any variable that isn't set in this file or in a file that
+# it includes.
+#
+
+PRODUCT_MAKEFILES := \
+ $(LOCAL_DIR)/s3c6410.mk
+[guowenxue@centos6 official_android]$ cat device/lingyun/s3c6410/s3c6410.mk
+#
+# Copyright (C) 2007 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# This is a generic product that isn't specialized for a specific device.
+# It includes the base Android platform.
+
+
+PRODUCT_PACKAGES := \
+ AccountAndSyncSettings \
+ DeskClock \
+ AlarmProvider \
+ Calculator \
+ Calendar \
+ Camera \
+ CertInstaller \
+ DrmProvider \
+ Email \
+ Gallery3D \
+ LatinIME \
+ Launcher2 \
+ Mms \
+ Music \
+ Provision \
+ Protips \
+ QuickSearchBox \
+ Settings \
+ Sync \
+ SystemUI \
+ Updater \
+ CalendarProvider \
+ SyncProvider
+
+$(call inherit-product, build/target/product/core.mk)
+
+# Overrides
+PRODUCT_BRAND := lingyun
+PRODUCT_MANUFACTURER := lingyun
+PRODUCT_DEVICE := s3c6410
+PRODUCT_NAME := s3c6410
+
+
+[guowenxue@centos6 official_android]$ vim device/lingyun/s3c6410/BoardConfig.mk
+# config.mk
+#
+# Product-specific compile-time definitions.
+#
+
+# The generic product target doesn't have any hardware-specific pieces.
+TARGET_NO_BOOTLOADER := true
+TARGET_NO_KERNEL := true
+TARGET_CPU_ABI := armeabi
+BOARD_USES_ALSA_AUDIO := true
+BOARD_USES_OVERLAY := true
+BUILD_WITH_ALSA_UTILS := true
+
+# no hardware camera
+USE_CAMERA_STUB := false
+
+
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+Links:
+-----------------------------
+http://www.cnblogs.com/mr-raptor/archive/2012/06/07/2540359.html
+
+
+[guowenxue@centos6 official_android]$ mkdir -p vendor/lingyun
+[guowenxue@centos6 official_android]$ mkdir -p vendor/lingyun/ok6410
+[guowenxue@centos6 official_android]$ mkdir -p vendor/lingyun/products
+[guowenxue@centos6 official_android]$
+
+[guowenxue@centos6 official_android]$ vim vendor/lingyun/products/AndroidProduct.mk
+PRODUCT_MAKEFILES := \
+ $(LOCAL_DIR)/ok6410.mk
+
+[guowenxue@centos6 official_android]$ cp build/target/product/generic.mk vendor/lingyun/products/ok6410.mk
+[guowenxue@centos6 official_android]$ vim vendor/lingyun/products/ok6410.mk
+...
+$(call inherit-product, build/target/product/core.mk)
+
+# Overrides
+PRODUCT_BRAND := lingyun
+PRODUCT_DEVICE := ok6410
+PRODUCT_NAME := ok6410
+
+[guowenxue@centos6 official_android]$ cp device/lingyun/crespo/vendorsetup.sh vendor/lingyun/
+[guowenxue@centos6 official_android]$ vim vendor/lingyun/vendorsetup.sh
+...
+add_lunch_combo ok6410-eng
+[guowenxue@centos6 official_android]$ cp build/target/board/generic/AndroidBoard.mk vendor/lingyun/ok6410/
+LOCAL_PATH := $(call my-dir)
+
+
+# ----------------------------------------------------------------------------
+# copy base files
+
+include $(CLEAR_VARS)
+PRODUCT_COPY_FILES += \
+ $(LOCAL_PATH)/ts.conf:system/etc/ts.conf \
+ $(LOCAL_PATH)/linuxrc:root/linuxrc \
+ $(LOCAL_PATH)/init.rc:root/init.rc
+
+[guowenxue@centos6 official_android]$ cp build/target/board/generic/BoardConfig.mk vendor/lingyun/ok6410/
+# config.mk
+#
+# Product-specific compile-time definitions.
+#
+
+# The generic product target doesn't have any hardware-specific pieces.
+TARGET_NO_BOOTLOADER := true
+TARGET_NO_KERNEL := true
+TARGET_CPU_ABI := armeabi
+BOARD_USES_ALSA_AUDIO := true
+BOARD_USES_OVERLAY := true
+BUILD_WITH_ALSA_UTILS := true
+
+# no hardware camera
+USE_CAMERA_STUB := false
+
+
+[guowenxue@centos6 official_android]$ vim device/lingyun/s3c6410/BoardConfig.mk
+
diff --git a/ok6410/src/bootloader/asm/asm_c_led/led.c b/ok6410/src/bootloader/asm/asm_c_led/led.c
new file mode 100644
index 0000000..743889e
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_c_led/led.c
@@ -0,0 +1,24 @@
+#define GPMCON (*(volatile unsigned long *)0x7F008820)
+#define GPMDAT (*(volatile unsigned long *)0x7F008824)
+
+void delay()
+{
+ volatile int i;
+ for(i = 0; i < 0x10000; i++);
+}
+
+int main()
+{
+ int i;
+ GPMCON = 0x1111;
+ GPMDAT = 0xC;
+ while(1)
+ {
+ for(i = 0; i < 4;i++)
+ {
+ GPMDAT = ~(1<<i);
+ delay();
+ }
+ }
+ return 0;
+}
diff --git a/ok6410/src/bootloader/asm/asm_c_led/led.lds b/ok6410/src/bootloader/asm/asm_c_led/led.lds
new file mode 100644
index 0000000..652ca87
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_c_led/led.lds
@@ -0,0 +1,30 @@
+
+/***********************************************************************
+ * File: beep.lds
+ * Version: 1.0.0
+ * Copyright: 2011 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: Cross tool link text, refer to u-boot.lds
+ * ChangeLog: 1, Release initial version on "Mon Mar 21 21:09:52 CST 2011"
+ *
+ ***********************************************************************/
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+
+SECTIONS{
+ . = 0x0c000000;
+ .text : {
+ start.o
+ *(.text)
+ *(.rodata)
+ }
+
+ .data ALIGN(4): {
+ *(.data)
+ }
+
+ .bss ALIGN(4): {
+ *(.bss)
+ }
+}
diff --git a/ok6410/src/bootloader/asm/asm_c_led/makefile b/ok6410/src/bootloader/asm/asm_c_led/makefile
new file mode 100644
index 0000000..0f34e37
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_c_led/makefile
@@ -0,0 +1,54 @@
+# ***********************************************************************
+# * File: makefile
+# * Version: 1.0.0
+# * Copyright: 2011 (c) Guo Wenxue <guowenxue@gmail.com>
+# * Description: Makefile used to cross compile the ASM and C source code
+# * ChangeLog: 1, Release initial version on "Mon Mar 21 21:09:52 CST 2011"
+# *
+# ***********************************************************************
+
+BINAME = led
+TEXTBASE = 0x0c000000
+
+CROSS = /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+#CROSS = /opt/crosstool/arm-arm1176jzfs-linux-gnueabi/bin/arm-linux-
+CC = $(CROSS)gcc
+LD = $(CROSS)ld
+AR = $(CROSS)ar
+OBJCOPY = $(CROSS)objcopy
+OBJDUMP = $(CROSS)objdump
+STRIP = $(CROSS)strip
+READELF = $(CROSS)readelf
+
+CFLAGS = -g -O2 -Wall -nostdinc -nostdlib -fno-builtin
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+LDSCRIPT = ${BINAME}.lds
+LDFLAGS = -nostartfiles -T $(LDSCRIPT) -Ttext $(TEXTBASE)
+
+SRC_C = $(wildcard *.c)
+SRC_S = $(wildcard *.S)
+OBJ_C = $(patsubst %.c,%.o,$(SRC_C))
+OBJ_S = $(patsubst %.S,%.o,$(SRC_S))
+
+OBJ_ALL = $(OBJ_C) $(OBJ_S)
+
+
+.PHONY : all
+all: ${OBJ_ALL}
+ ${LD} $(LDFLAGS) -o ${BINAME}.elf ${OBJ_ALL}
+ ${OBJCOPY} -O binary -S ${BINAME}.elf ${BINAME}.bin
+ ${OBJDUMP} -D ${BINAME}.elf > ${BINAME}.maps
+ rm -f *.elf *.o
+
+%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+install:
+ cp ${BINAME}.bin /tftp -f --reply=yes
+
+clean:
+ rm -f *.elf *.o *.maps
+ rm -f ${BINAME}.bin
diff --git a/ok6410/src/bootloader/asm/asm_c_led/start.S b/ok6410/src/bootloader/asm/asm_c_led/start.S
new file mode 100644
index 0000000..9a35efb
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_c_led/start.S
@@ -0,0 +1,115 @@
+/***********************************************************************
+ * File: led.S
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This ASM used to disable watch dog and interrupt, then call C code to
+ * turn the four LEDs on/off on OK6410 board.
+ * ChangeLog: 1, Release initial version on "Sun Feb 24 15:06:12 CST 2013"
+ *
+ ***********************************************************************/
+
+
+#define SROM_BW 0x70000000
+#define WTCON 0x7E004000
+
+/* Interrupt definition */
+#define ELFIN_VIC0_BASE_ADDR (0x71200000)
+#define ELFIN_VIC1_BASE_ADDR (0x71300000)
+
+#define oIRQSTATUS 0x000
+#define oFIQSTATUS 0x004
+#define oRAWINTR 0x008
+#define oINTSELECT 0x00c
+#define oINTENABLE 0x010
+#define oINTENCLEAR 0x014
+#define oSOFTINT 0x018
+#define oSOFTINTCLEAR 0x01c
+#define oPROTECTION 0x020
+#define oSWPRIORITYMASK 0x024
+#define oPRIORITYDAISY 0x028
+#define oVECTADDR(X) (0x100+(X)*4)
+#define oVECPRIORITY(X) (0x200+(X)*4)
+#define oVECTADDRESS 0xF00
+
+#define VIC0IRQSTATUS (ELFIN_VIC0_BASE_ADDR + oIRQSTATUS)
+#define VIC0FIQSTATUS (ELFIN_VIC0_BASE_ADDR + oFIQSTATUS)
+#define VIC0RAWINTR (ELFIN_VIC0_BASE_ADDR + oRAWINTR)
+#define VIC0INTSELECT (ELFIN_VIC0_BASE_ADDR + oINTSELECT)
+#define VIC0INTENABLE (ELFIN_VIC0_BASE_ADDR + oINTENABLE)
+#define VIC0INTENCLEAR (ELFIN_VIC0_BASE_ADDR + oINTENCLEAR)
+#define VIC0SOFTINT (ELFIN_VIC0_BASE_ADDR + oSOFTINT)
+#define VIC0SOFTINTCLEAR (ELFIN_VIC0_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC0PROTECTION (ELFIN_VIC0_BASE_ADDR + oPROTECTION)
+#define VIC0SWPRIORITYMASK (ELFIN_VIC0_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC0PRIORITYDAISY (ELFIN_VIC0_BASE_ADDR + oPRIORITYDAISY)
+#define VIC0VECTADDR(X) (ELFIN_VIC0_BASE_ADDR + oVECTADDR(X))
+#define VIC0VECPRIORITY(X) (ELFIN_VIC0_BASE_ADDR + oVECPRIORITY(X))
+#define VIC0VECTADDRESS (ELFIN_VIC0_BASE_ADDR + oVECTADDRESS)
+
+#define VIC1IRQSTATUS (ELFIN_VIC1_BASE_ADDR + oIRQSTATUS)
+#define VIC1FIQSTATUS (ELFIN_VIC1_BASE_ADDR + oFIQSTATUS)
+#define VIC1RAWINTR (ELFIN_VIC1_BASE_ADDR + oRAWINTR)
+#define VIC1INTSELECT (ELFIN_VIC1_BASE_ADDR + oINTSELECT)
+#define VIC1INTENABLE (ELFIN_VIC1_BASE_ADDR + oINTENABLE)
+#define VIC1INTENCLEAR (ELFIN_VIC1_BASE_ADDR + oINTENCLEAR)
+#define VIC1SOFTINT (ELFIN_VIC1_BASE_ADDR + oSOFTINT)
+#define VIC1SOFTINTCLEAR (ELFIN_VIC1_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC1PROTECTION (ELFIN_VIC1_BASE_ADDR + oPROTECTION)
+#define VIC1SWPRIORITYMASK (ELFIN_VIC1_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC1PRIORITYDAISY (ELFIN_VIC1_BASE_ADDR + oPRIORITYDAISY)
+#define VIC1VECTADDR(X) (ELFIN_VIC1_BASE_ADDR + oVECTADDR(X))
+#define VIC1VECPRIORITY(X) (ELFIN_VIC1_BASE_ADDR + oVECPRIORITY(X))
+#define VIC1VECTADDRESS (ELFIN_VIC1_BASE_ADDR + oVECTADDRESS)
+
+
+/*****************************/
+/* CP15 Mode Bit Definition */
+/*****************************/
+#define R1_iA (1<<31)
+#define R1_nF (1<<30)
+#define R1_VE (1<<24)
+#define R1_I (1<<12)
+#define R1_BP (1<<11) /* Z bit */
+#define R1_C (1<<2)
+#define R1_A (1<<1)
+#define R1_M (1<<0)
+
+ .global _start
+
+_start:
+ /* Enable Instruction Cache */
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7, 0 /* Invalidate Entire I&D Cache */
+ mrc p15, 0, r0, c1, c0, 0 /* Enable I Cache */
+ orr r0, r0, #R1_I
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* disable vector interrupt */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #(1<<24)
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* Peri port setup */
+ ldr r0, =SROM_BW
+ orr r0, r0, #0x13
+ mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff)
+
+ /* Disable watchdog */
+ ldr r0, =WTCON
+ mov r1, #0
+ str r1, [r0]
+
+ /* disable all interrupt */
+ ldr r4, =VIC0INTENCLEAR
+ ldr r5, =0xFFFFFFFF;
+ str r5, [r4]
+ ldr r4, =VIC1INTENCLEAR
+ str r5, [r4]
+
+ /* Setup Stack */
+ ldr sp, =8*1024
+ bl main
+
+halt:
+ b halt
+
diff --git a/ok6410/src/bootloader/asm/asm_led/led.S b/ok6410/src/bootloader/asm/asm_led/led.S
new file mode 100644
index 0000000..eaa37a4
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_led/led.S
@@ -0,0 +1,94 @@
+/***********************************************************************
+ * File: led.S
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This ASM code used to turn LED0~LED4 on/off on OK6410 board
+ * ChangeLog: 1, Release initial version on "Sun Feb 24 15:06:12 CST 2013"
+ *
+ ***********************************************************************/
+
+
+#define SROM_BW 0x70000000
+#define WTCON 0x7E004000
+#define GPMCON 0x7F008820
+#define GPMDAT 0x7F008824
+#define GPMUP 0x7F008828
+
+#define OUTPUT 0x01 /*Set GPIO port as output mode*/
+#define INPUT 0x00 /*Set GPIO port as input mode*/
+
+#define LED1 0 /*On OK6410 board, LED1 use GPM1*/
+#define LED2 1 /*On OK6410 board, LED2 use GPM0*/
+#define LED3 2 /*On OK6410 board, LED3 use GPM2*/
+#define LED4 3 /*On OK6410 board, LED4 use GPM3*/
+
+
+#define DELAY 0X1000000 /*TEXTBASE = 0x57e00000, we have init CPU to 533MHz*/
+//#define DELAY 0X10000 /*TEXTBASE = 0x0C000000, we havn't init CPU CLOCK*/
+
+ .global _start
+
+_start:
+ /* Peri port setup */
+ ldr r0, =SROM_BW
+ orr r0, r0, #0x13
+ mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff)
+
+ /* Disable watchdog */
+ ldr r0, =WTCON
+ mov r1, #0
+ str r1, [r0]
+
+ /*Set GPM0, GPM1, GPM2, GPM3 as GPIO OUTPUT mode*/
+ ldr r0, =GPMCON
+ bic r1, r1, #0x00FF /*Set GPMCON for GPM0,GPM1 as 0x00 */
+ orr r1, r1, #0x0011 /*Set GPMCON for GPM0,GPM1 as GPIOOUT, 0x01*/
+ bic r1, r1, #0xFF00 /*Set GPMCON for GPM2,GPM3 as 0x00*/
+ orr r1, r1, #0x1100 /*Set GPMCON for GPM2,GPM3 as GPIOOUT, 0x01*/
+ str r1, [r0]
+
+loopled:
+ /*Turn off LED1, LED2, LED3, LED4*/
+ ldr r0, =GPMDAT
+ ldr r1, [r0]
+ orr r1, r1, #0xF /*Set bit[0:3] as high level*/
+ str r1, [r0]
+ bl delay
+
+ /*Turn on LED1*/
+ ldr r1, [r0]
+ bic r1, r1, #(1<<LED1) /*LED1 GPIO port as low level*/
+ str r1, [r0]
+ bl delay
+
+ /*Turn on LED2*/
+ ldr r1, [r0]
+ bic r1, r1, #(1<<LED2) /*LED2 GPIO port as low level*/
+ str r1, [r0]
+ bl delay
+
+ /*Turn on LED3*/
+ ldr r1, [r0]
+ bic r1, r1, #(1<<LED3) /*LED3 GPIO port as low level*/
+ str r1, [r0]
+ bl delay
+
+ /*Turn on LED4*/
+ ldr r1, [r0]
+ bic r1, r1, #(1<<LED4) /*LED4 GPIO port as low level*/
+ str r1, [r0]
+ bl delay
+
+ b loopled /*Loop running LED*/
+
+delay:
+ mov r2, #DELAY
+delay_loop:
+ sub r2, r2,#1
+ cmp r2, #0
+ bne delay_loop
+ mov pc, lr
+
+halt:
+ b halt
+
diff --git a/ok6410/src/bootloader/asm/asm_led/makefile b/ok6410/src/bootloader/asm/asm_led/makefile
new file mode 100644
index 0000000..e3b7e4a
--- /dev/null
+++ b/ok6410/src/bootloader/asm/asm_led/makefile
@@ -0,0 +1,53 @@
+# ***********************************************************************
+# * File: makefile
+# * Version: 1.0.0
+# * Copyright: 2011 (c) Guo Wenxue <guowenxue@gmail.com>
+# * Description: Makefile used to cross compile the ASM and C source code
+# * ChangeLog: 1, Release initial version on "Mon Mar 21 21:09:52 CST 2011"
+# *
+# ***********************************************************************
+
+BINAME = led
+#TEXTBASE = 0x0C000000
+TEXTBASE = 0x57e00000
+
+CROSS = /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+#CROSS = /opt/crosstool/arm-arm1176jzfs-linux-gnueabi/bin/arm-linux-
+CC = $(CROSS)gcc
+LD = $(CROSS)ld
+AR = $(CROSS)ar
+OBJCOPY = $(CROSS)objcopy
+OBJDUMP = $(CROSS)objdump
+STRIP = $(CROSS)strip
+READELF = $(CROSS)readelf
+
+CFLAGS = -g -O2 -Wall -nostdinc -nostdlib -fno-builtin
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+LDFLAGS = -Ttext $(TEXTBASE)
+
+SRC_C = $(wildcard *.c)
+SRC_S = $(wildcard *.S)
+OBJ_C = $(patsubst %.c,%.o,$(SRC_C))
+OBJ_S = $(patsubst %.S,%.o,$(SRC_S))
+
+OBJ_ALL = $(OBJ_C) $(OBJ_S)
+
+.PHONY : all
+all: ${OBJ_ALL}
+ ${LD} $(LDFLAGS) -o ${BINAME}.elf ${OBJ_ALL}
+ ${OBJDUMP} -D ${BINAME}.elf > ${BINAME}.maps
+ ${OBJCOPY} -O binary -S ${BINAME}.elf ${BINAME}.bin
+ rm -f *.elf *.o
+
+%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+install:
+ cp ${BINAME}.bin /tftp -f --reply=yes
+
+clean:
+ rm -f *.elf *.o
+ rm -f ${BINAME}.bin
diff --git a/ok6410/src/bootloader/asm/jlink.howto b/ok6410/src/bootloader/asm/jlink.howto
new file mode 100644
index 0000000..000154b
--- /dev/null
+++ b/ok6410/src/bootloader/asm/jlink.howto
@@ -0,0 +1,32 @@
+SEGGER J-Link Commander V4.10i ('?' for help)
+Compiled Jan 25 2010 14:44:16
+DLL version V4.10i, compiled Jan 25 2010 14:43:57
+Firmware: J-Link ARM V8 compiled Jan 31 2011 18:34:52
+Hardware: V8.00
+S/N : 20100214
+Feature(s) : RDI,FlashDL,FlashBP,JFlash,GDBFull
+VTarget = 3.319V
+Info: TotalIRLen = 9, IRPrint = 0x0011
+Found 2 JTAG devices, Total IRLen = 5:
+ #0 Id: 0x2B900F0F, IRLen: 04, IRPrint: 0x0, ARM ETB
+ #1 Id: 0x07B76F0F, IRLen: 05, IRPrint: 0x1, ARM1176 Core
+ARM11 identified.
+RTCK reaction time is approx. 504ns
+Using adaptive clocking instead of fixed JTAG speed.
+
+
+
+J-Link>h
+J-Link: ARM11 CP15 Settings changed: 0x00450078 from 0x00001002, MMU Off, ICache Off, DCache Off
+Info: CP15.0.0: 0x410FB766: ARM, Architecture Unknown architecture
+Info: CP15.0.1: 0x1D152152: ICache: 16kB (4*128*32), DCache: 16kB (4*128*32)
+DIDR: 6 Breakpoints available and 2 Watchpoints available.
+J-Link>setpc 0
+J-Link>loadbin C:\Users\USER\Downloads\led.bin 0x0C000000
+Loading binary file... [C:\Users\USER\Downloads\led.bin]
+Writing bin data into target memory @ 0x0C000000.
+J-Link>setpc 0x0C000000
+J-Link>g
+J-Link>
+
+
diff --git a/ok6410/src/bootloader/asm/myboot/bootstrap.c b/ok6410/src/bootloader/asm/myboot/bootstrap.c
new file mode 100644
index 0000000..2d28e3c
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/bootstrap.c
@@ -0,0 +1,97 @@
+/********************************************************************************************
+ * File: bootstrap.c
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This C code is the first stage bootloader(named bootstrap)
+ * main code, test on OK6410 board.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 23:02:41 CST 2013"
+ *
+ *******************************************************************************************/
+
+#include "s3c6410.h"
+#include "common.h"
+
+inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n" "bne 1b":"=r" (loops):"0"(loops));
+}
+
+
+/* OK6410 LED1~LED4 use GPIO: GPM0~GPM3 */
+static void led_init(void)
+{
+ unsigned int regv;
+
+ /* Set GPM0~GPM3 as GPIO output mode*/
+ regv = s3c_readl(GPMCON);
+ regv = (regv & ~0xffffU) | 0x1111U;
+ s3c_writel(regv, GPMCON);
+
+ /* Disable GPM0~GPM3 pull-up/down */
+ regv = s3c_readl(GPMPUD);
+ regv = (regv & ~0xffU) | 0x00U;
+ s3c_writel(regv, GPMPUD);
+
+
+ /* Set GPM0~GPM3 as high level to turn LED1~LED3 off */
+ regv = s3c_readl(GPMDAT);
+ regv = (regv & ~0xffU) | 0xfU;
+ s3c_writel(regv, GPMDAT);
+}
+
+static void led_display(unsigned int data)
+{
+ unsigned int regv;
+
+
+ regv = s3c_readl(GPMDAT);
+ regv = (regv & 0xf) & ((~data) & 0xf);
+ s3c_writel(regv, GPMDAT);
+}
+
+static int ddr_test(void)
+{
+ int i;
+ unsigned int val;
+
+ for (i=0; i<0x1000; i++)
+ {
+ s3c_writel(0x55aaaa55, (MEMORY_BASE_ADDRESS + i*0x100));
+ val = s3c_readl(MEMORY_BASE_ADDRESS + i*0x100);
+
+ if (val != 0x55aaaa55)
+ return -1;
+
+ s3c_writel(0xaa5555aa, (MEMORY_BASE_ADDRESS + i*0x100));
+ val = s3c_readl(MEMORY_BASE_ADDRESS + i*0x100);
+ if (val != 0xaa5555aa)
+ return -1;
+ }
+
+ return i;
+}
+
+int main()
+{
+ int rv = 0;
+ char *addr = (char *)MEMORY_BASE_ADDRESS;
+
+ led_init();
+ led_display(0x0f);
+
+ serial_init(CONFIG_BAUDRATE);
+ serial_puts("Bootstrap already running...\n");
+
+ rv = ddr_test();
+ if (rv < 0)
+ {
+ serial_puts("ddr test faild.\n");
+ }
+ else
+ serial_puts("1. ddr init/test successful.\n");
+
+ serial_puts("Xmodem Receive now!\n");
+ xmodem_recv(addr);
+
+ return 0;
+}
diff --git a/ok6410/src/bootloader/asm/myboot/bootstrap.lds b/ok6410/src/bootloader/asm/myboot/bootstrap.lds
new file mode 100644
index 0000000..91d05be
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/bootstrap.lds
@@ -0,0 +1,45 @@
+
+/***********************************************************************
+ * File: bootstrap.lds
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: Cross tool link text, refer to u-boot.lds
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 22:58:49 CST 2013"
+ *
+ ***********************************************************************/
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+
+SECTIONS{
+ .text :
+ {
+ *(.init)
+ *(.text)
+ *(.text.*)
+ }
+
+ . = ALIGN(4);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata.*)
+ }
+
+ . = ALIGN(4);
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(4);
+ .nobss : { *(.nobss) }
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+}
diff --git a/ok6410/src/bootloader/asm/myboot/common.h b/ok6410/src/bootloader/asm/myboot/common.h
new file mode 100644
index 0000000..8a4624a
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/common.h
@@ -0,0 +1,20 @@
+/********************************************************************************************
+ * File: serial.h
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: The UART on board drivers/functions.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 22:58:49 CST 2013"
+ *
+ *******************************************************************************************/
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+int serial_init(int baudrate);
+int serial_getc(void);
+void serial_putc(const char ch);
+void serial_puts(const char *str);
+int serial_tstc(void);
+long xmodem_recv(char *buf);
+
+#endif /* end of __SERIAL_H__ */
diff --git a/ok6410/src/bootloader/asm/myboot/lowlevel_init.S b/ok6410/src/bootloader/asm/myboot/lowlevel_init.S
new file mode 100644
index 0000000..ef58643
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/lowlevel_init.S
@@ -0,0 +1,214 @@
+/***********************************************************************
+ * File: lowlevel_init.S
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This ASM used to initialise the system clock and DDR SDRAM.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 11:58:42 CST 2013"
+ *
+ ***********************************************************************/
+
+#include "s3c6410.h"
+
+/************************************************************
+ * system_clock_init: Initialize core clock and bus clock. *
+ ************************************************************/
+ .globl system_clock_init
+system_clock_init:
+ ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
+
+#ifdef CONFIG_SYNC_MODE /* Set to Synchronous Mode, HCLK and PCLK from APLL */
+ ldr r1, [r0, #oOTHERS]
+ mov r2, #0x40 /* SyncMUXSEL = DOUT_APLL */
+ orr r1, r1, r2
+ str r1, [r0, #oOTHERS]
+ nop
+ nop
+ nop
+ nop
+ nop
+ ldr r2, =0x80 /* SyncReq = request Sync */
+ orr r1, r1, r2
+ str r1, [r0, #oOTHERS]
+
+check_syncack:
+ ldr r1, [r0, #oOTHERS]
+ ldr r2, =0xF00
+ and r1, r1, r2 /* Wait SYNCMODEACK = 0xF */
+ cmp r1, #0xF00
+ bne check_syncack
+
+#else /* CONFIG_ASYNC_MODE: Set to Asynchronous Mode, HCLK and PCLK from MPLL */
+ ldr r1, [r0, #oOTHERS]
+ bic r1, r1, #0xC0
+ orr r1, r1, #0x40
+ str r1, [r0, #oOTHERS]
+
+wait_for_async:
+ ldr r1, [r0, #oOTHERS]
+ and r1, r1, #0xf00 /* Wait SYNCMODEACK = 0x0 */
+ cmp r1, #0x0
+ bne wait_for_async
+
+ ldr r1, [r0, #oOTHERS]
+ bic r1, r1, #0x40 /* SyncMUX = Async */
+ str r1, [r0, #oOTHERS]
+
+#endif /* CONFIG_SYNC_MODE end */
+
+ /* Set lock time*/
+ ldr r1, =0xffff /* Lock Time : 0x4b1 (100us @Fin12MHz) for APLL/MPLL */
+ str r1, [r0, #oAPLL_LOCK] /* APLL Lock Time */
+ str r1, [r0, #oMPLL_LOCK] /* MPLL Lock Time */
+ ldr r1, =0xe13 /* Lock Time : 0xe13 (300us @Fin12MHz) for EPLL */
+ str r1, [r0, #oEPLL_LOCK] /* EPLL Lock Time */
+
+ /* Set Clock Divider */
+ ldr r1, [r0, #oCLK_DIV0]
+ bic r1, r1, #0x30000
+ bic r1, r1, #0xff00
+ bic r1, r1, #0xff
+ ldr r2, =CLK_DIV_VAL
+ orr r1, r1, r2
+ str r1, [r0, #oCLK_DIV0]
+
+ /* Set System Clock Divider */
+ ldr r1, =APLL_VAL
+ str r1, [r0, #oAPLL_CON]
+
+ ldr r1, =MPLL_VAL
+ str r1, [r0, #oMPLL_CON]
+
+ ldr r1, =EPLL_VAL
+ str r1, [r0, #oEPLL_CON0]
+ ldr r1, =EPLL_KVAL
+ str r1, [r0, #oEPLL_CON1]
+
+ /* APLL, MPLL, EPLL select to Fout */
+ ldr r1, [r0, #oCLK_SRC]
+ orr r1, r1, #0x7 /* PLL Clockout */
+ str r1, [r0, #oCLK_SRC]
+
+ /* wait at least 200us to stablize all clock */
+ mov r1, #0x10000
+1: subs r1, r1, #1
+ bne 1b
+
+ mov pc, lr
+
+
+ /***************************
+ * DDR SDRAM initialisze *
+ ***************************/
+ .globl mem_ctrl_asm_init
+mem_ctrl_asm_init:
+ ldr r0, =ELFIN_MEM_SYS_CFG /* Memory sussystem address 0x7e00f120 */
+ @mov r1, #0xd /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
+ mov r1, #S3C64XX_MEM_SYS_CFG_NAND /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
+ str r1, [r0]
+
+ ldr r0, =ELFIN_DMC1_BASE /* DMC1 base address 0x7e001000 */
+
+ @Enter Config State
+ ldr r1, =0x04
+ str r1, [r0, #INDEX_DMC_MEMC_CMD]
+
+ ldr r1, =DMC_DDR_REFRESH_PRD
+ str r1, [r0, #INDEX_DMC_REFRESH_PRD]
+
+ ldr r1, =DMC_DDR_CAS_LATENCY
+ str r1, [r0, #INDEX_DMC_CAS_LATENCY]
+
+ ldr r1, =DMC_DDR_t_DQSS
+ str r1, [r0, #INDEX_DMC_T_DQSS]
+
+ ldr r1, =DMC_DDR_t_MRD
+ str r1, [r0, #INDEX_DMC_T_MRD]
+
+ ldr r1, =DMC_DDR_t_RAS
+ str r1, [r0, #INDEX_DMC_T_RAS]
+
+ ldr r1, =DMC_DDR_t_RC
+ str r1, [r0, #INDEX_DMC_T_RC]
+
+ ldr r1, =DMC_DDR_t_RCD
+ ldr r2, =DMC_DDR_schedule_RCD
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RCD]
+
+
+ ldr r1, =DMC_DDR_t_RFC
+ ldr r2, =DMC_DDR_schedule_RFC
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RFC]
+
+ ldr r1, =DMC_DDR_t_RP
+ ldr r2, =DMC_DDR_schedule_RP
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RP]
+
+ ldr r1, =DMC_DDR_t_RRD
+ str r1, [r0, #INDEX_DMC_T_RRD]
+
+ ldr r1, =DMC_DDR_t_WR
+ str r1, [r0, #INDEX_DMC_T_WR]
+
+ ldr r1, =DMC_DDR_t_WTR
+ str r1, [r0, #INDEX_DMC_T_WTR]
+
+ ldr r1, =DMC_DDR_t_XP
+ str r1, [r0, #INDEX_DMC_T_XP]
+
+ ldr r1, =DMC_DDR_t_XSR
+ str r1, [r0, #INDEX_DMC_T_XSR]
+
+ ldr r1, =DMC_DDR_t_ESR
+ str r1, [r0, #INDEX_DMC_T_ESR]
+
+ ldr r1, =DMC1_MEM_CFG
+ str r1, [r0, #INDEX_DMC_MEMORY_CFG]
+
+ ldr r1, =DMC1_MEM_CFG2
+ str r1, [r0, #INDEX_DMC_MEMORY_CFG2]
+
+ ldr r1, =DMC1_CHIP0_CFG
+ str r1, [r0, #INDEX_DMC_CHIP_0_CFG]
+
+ ldr r1, =DMC_DDR_32_CFG
+ str r1, [r0, #INDEX_DMC_USER_CONFIG]
+
+ @DMC0 DDR Chip 0 configuration direct command reg
+ ldr r1, =DMC_NOP0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Precharge All
+ ldr r1, =DMC_PA0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Auto Refresh 2 time
+ ldr r1, =DMC_AR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @MRS
+ ldr r1, =DMC_mDDR_EMR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Mode Reg
+ ldr r1, =DMC_mDDR_MR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Enable DMC1, Enter Ready State
+ mov r1, #0x0
+ str r1, [r0, #INDEX_DMC_MEMC_CMD]
+
+ @Wait for Ready
+_check_dmc1_ready:
+ ldr r1, [r0, #INDEX_DMC_MEMC_STATUS]
+ mov r2, #0x3
+ and r1, r1, r2
+ cmp r1, #0x1
+ bne _check_dmc1_ready
+ nop
+
+ mov pc, lr
+
diff --git a/ok6410/src/bootloader/asm/myboot/makefile b/ok6410/src/bootloader/asm/myboot/makefile
new file mode 100644
index 0000000..182e955
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/makefile
@@ -0,0 +1,54 @@
+# ***********************************************************************
+# * File: makefile
+# * Version: 1.0.0
+# * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+# * Description: Makefile used to cross compile the ASM and C source code
+# * ChangeLog: 1, Release initial version on "Mon Feb 25 23:03:35 CST 2013"
+# *
+# ***********************************************************************
+
+BINAME = bootstrap-s3c6410
+TEXTBASE = 0x0c000000
+
+CROSS = /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+#CROSS = /opt/crosstool/arm-arm1176jzfs-linux-gnueabi/bin/arm-linux-
+CC = $(CROSS)gcc
+LD = $(CROSS)ld
+AR = $(CROSS)ar
+OBJCOPY = $(CROSS)objcopy
+OBJDUMP = $(CROSS)objdump
+STRIP = $(CROSS)strip
+READELF = $(CROSS)readelf
+
+CFLAGS = -g -O2 -Wall -nostdinc -nostdlib -fno-builtin -Iinclude
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+LDSCRIPT = bootstrap.lds
+LDFLAGS = -nostartfiles -T $(LDSCRIPT) -Ttext $(TEXTBASE)
+
+SRC_C = $(wildcard *.c)
+SRC_S = $(wildcard *.S)
+OBJ_C = $(patsubst %.c,%.o,$(SRC_C))
+OBJ_S = $(patsubst %.S,%.o,$(SRC_S))
+
+OBJ_ALL = $(OBJ_C) $(OBJ_S)
+
+
+.PHONY : all
+all: ${OBJ_ALL}
+ ${LD} $(LDFLAGS) -o ${BINAME}.elf ${OBJ_ALL}
+ ${OBJCOPY} -O binary -S ${BINAME}.elf ${BINAME}.bin
+ ${OBJDUMP} -D ${BINAME}.elf > ${BINAME}.maps
+ rm -f *.elf *.o
+
+%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+install:
+ cp ${BINAME}.bin /tftp -f --reply=yes
+
+clean:
+ rm -f *.elf *.o *.maps
+ rm -f ${BINAME}.bin
diff --git a/ok6410/src/bootloader/asm/myboot/s3c6410.h b/ok6410/src/bootloader/asm/myboot/s3c6410.h
new file mode 100644
index 0000000..5be4b6c
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/s3c6410.h
@@ -0,0 +1,1538 @@
+/* **********************************************************************
+ * File: s3c6410.h
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This is head file is for s3c6410 common register definition
+ * and some common funciton.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 11:58:42 CST 2013"
+ *
+ ************************************************************************/
+#ifndef __S3C6410_H__
+#define __S3C6410_H__
+
+#define MEMORY_BASE_ADDRESS 0x50000000
+#define CONFIG_SYS_CLK_FREQ 12000000 /* the OK6410 has 12MHz input clock of PLL */
+#define CONFIG_BAUDRATE 115200 /* Default serial port baudrate */
+#define CONFIG_STACKSIZE 512
+#define S_FRAME_SIZE 72
+
+#define CONFIG_CLK_532_133_66 1 /* CLK:532, HCLKx2:266 HCLK:133, PCLK:66 */
+//#define CONFIG_SYNC_MODE /* Refer to datasheet P142: FOUT = MDIV x FIN / (PDIV X 2SDIV) */
+//#define CONFIG_CLK_667_133_66 1 /* CLK:667, HCLKx2:266 HCLK:133, PCLK:66 */
+
+#ifdef CONFIG_CLK_667_133_66
+#undef CONFIG_SYNC_MODE
+#endif
+
+#define set_pll(mdiv, pdiv, sdiv) ((1<<31) | (mdiv<<16) | (pdiv<<8) | sdiv)
+
+#ifdef CONFIG_CLK_532_133_66
+/* APLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 266*12MHz/(3*2^1) = 532MHz */
+#define APLL_MDIV 266
+#define APLL_PDIV 3
+#define APLL_SDIV 1
+#elif defined(CONFIG_CLK_667_133_66)
+/* APLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 333*12MHz/(3*2^1) = 667MHz */
+#define APLL_MDIV 333
+#define APLL_PDIV 3
+#define APLL_SDIV 1
+#endif
+#define APLL_VAL set_pll(APLL_MDIV, APLL_PDIV, APLL_SDIV)
+#define Startup_APLL (CONFIG_SYS_CLK_FREQ/(APLL_PDIV<<APLL_SDIV)*APLL_MDIV)
+
+#ifdef CONFIG_CLK_532_133_66
+/* MPLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 266*12MHz/(3*2^1) = 532MHz */
+#define MPLL_MDIV 266
+#define MPLL_PDIV 3
+#define MPLL_SDIV 1
+#elif defined(CONFIG_CLK_667_133_66)
+/* MPLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 333*12MHz/(3*2^1) = 667MHz */
+#define MPLL_MDIV 333
+#define MPLL_PDIV 3
+#define MPLL_SDIV 1
+#endif
+#define MPLL_VAL set_pll(MPLL_MDIV, MPLL_PDIV, MPLL_SDIV)
+#define Startup_MPLL ((CONFIG_SYS_CLK_FREQ)/(MPLL_PDIV<<MPLL_SDIV)*MPLL_MDIV)
+
+/* FOUT = (MDIV+KDIV/2^16) X FIN / (PDIV X 2^SDIV)
+ * = (254+0/2^16) x 12MHz / (9 x 2^2)
+ * = 254 x 12MHz / 36 = 84.67MHz
+ */
+#define EPLL_MDIV 254
+#define EPLL_PDIV 9
+#define EPLL_SDIV 2
+#define EPLL_KDIV 0
+#define EPLL_VAL set_pll(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV)
+#define EPLL_KVAL EPLL_KDIV
+
+#define Startup_PCLKdiv 3 /* PCLK = HCLKX2 / (PCLK_RATIO + 1) = HCLKX2IN/4 */
+#define Startup_HCLKx2div 1 /* HCLKX2 = HCLKX2IN / (HCLKX2_RATIO+1) = HCLKX2IN/2 */
+#define Startup_HCLKdiv 1 /* HCLK = HCLKX2 / (HCLK_RATIO+1) = HCLKX2/2 */
+#define Startup_MPLLdiv 1 /* DOUTMPLL = MOUTMPLL / (MPLL_RATIO+1) = DOUTMPLL/2 */
+#define Startup_APLLdiv 0 /* ARMCLK = DOUTAPLL / (ARM_RATIO+1) = DOUTAPLL*/
+
+#define CLK_DIV_VAL ((Startup_PCLKdiv<<12)|(Startup_HCLKx2div<<9)|(Startup_HCLKdiv<<8)\
+ |(Startup_MPLLdiv<<4)|Startup_APLLdiv)
+
+#ifdef CONFIG_SYNC_MODE
+#define Startup_HCLK (Startup_APLL/(Startup_HCLKx2div+1)/(Startup_HCLKdiv+1))
+#define Startup_PCLK (Startup_APLL/(Startup_HCLKx2div+1)/(Startup_PCLKdiv+1))
+#else /* !CONFIG_SYNC_MODE */
+#define Startup_HCLK (Startup_MPLL/(Startup_HCLKx2div+1)/(Startup_HCLKdiv+1))
+#define Startup_PCLK (Startup_MPLL/(Startup_HCLKx2div+1)/(Startup_PCLKdiv+1))
+#endif /* end of CONFIG_SYNC_MODE */
+
+
+// FRIENDLYARM_BOOT_RAM256
+#define DMC1_MEM_CFG ((1<<30) | (2<<15) | (3<<3) | (2<<0))
+#define DMC1_CHIP0_CFG 0x150F0
+#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
+
+// Physical Memory Map
+#define DMC1_MEM_CFG2 0xB41
+#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */
+
+/* DDR Parameters */
+#define DDR_tREFRESH 7800 /* ns */
+#define DDR_tRAS 45 /* ns (min: 45ns)*/
+#define DDR_tRC 68 /* ns (min: 67.5ns)*/
+#define DDR_tRCD 23 /* ns (min: 22.5ns)*/
+#define DDR_tRFC 80 /* ns (min: 80ns)*/
+#define DDR_tRP 23 /* ns (min: 22.5ns)*/
+#define DDR_tRRD 15 /* ns (min: 15ns)*/
+#define DDR_tWR 15 /* ns (min: 15ns)*/
+#define DDR_tXSR 120 /* ns (min: 120ns)*/
+#define DDR_CASL 3 /* CAS Latency 3 */
+
+// mDDR memory configuration
+#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
+#define DMC_DDR_BA_EMRS 2
+#define DMC_DDR_MEM_CASLAT 3
+#define DMC_DDR_CAS_LATENCY (DDR_CASL<<1)
+#define DMC_DDR_t_DQSS 1
+#define DMC_DDR_t_MRD 2
+#define DMC_DDR_t_RAS (((Startup_HCLK / 1000 * DDR_tRAS) - 1) / 1000000 + 1) //7, Min 45ns
+#define DMC_DDR_t_RC (((Startup_HCLK / 1000 * DDR_tRC) - 1) / 1000000 + 1) //10, Min 67.5ns
+#define DMC_DDR_t_RCD (((Startup_HCLK / 1000 * DDR_tRCD) - 1) / 1000000 + 1) //4,5(TRM), Min 22.5ns
+#define DMC_DDR_schedule_RCD ((DMC_DDR_t_RCD - 3) << 3)
+#define DMC_DDR_t_RFC (((Startup_HCLK / 1000 * DDR_tRFC) - 1) / 1000000 + 1) //11,18(TRM) Min 80ns
+#define DMC_DDR_schedule_RFC ((DMC_DDR_t_RFC - 3) << 5)
+#define DMC_DDR_t_RP (((Startup_HCLK / 1000 * DDR_tRP) - 1) / 1000000 + 1) //4, 5(TRM) Min 22.5ns
+#define DMC_DDR_schedule_RP ((DMC_DDR_t_RP - 3) << 3)
+#define DMC_DDR_t_RRD (((Startup_HCLK / 1000 * DDR_tRRD) - 1) / 1000000 + 1) //3, Min 15ns
+#define DMC_DDR_t_WR (((Startup_HCLK / 1000 * DDR_tWR) - 1) / 1000000 + 1) //Min 15ns
+#define DMC_DDR_t_WTR 2
+#define DMC_DDR_t_XP 2 //1tck + tIS(1.5ns)
+#define DMC_DDR_t_XSR (((Startup_HCLK / 1000 * DDR_tXSR) - 1) / 1000000 + 1) //17, Min 120ns
+#define DMC_DDR_t_ESR DMC_DDR_t_XSR
+#define DMC_DDR_REFRESH_PRD (((Startup_HCLK / 1000 * DDR_tREFRESH) - 1) / 1000000) // TRM 2656
+#define DMC_DDR_USER_CONFIG 1 // 2b01 : mDDR
+
+
+
+#define S3C64XX_UART_CHANNELS 3
+#define S3C64XX_SPI_CHANNELS 2
+
+#define BIT(X) (1<<(X))
+
+#define ROM_BASE0 0x00000000 /* base address of rom bank 0 */
+#define ROM_BASE1 0x04000000 /* base address of rom bank 1 */
+#define DRAM_BASE0 0x40000000 /* base address of dram bank 0 */
+#define DRAM_BASE1 0x50000000 /* base address of dram bank 1 */
+
+#define S_OLD_R0 68
+#define S_PSR 64
+#define S_PC 60
+#define S_LR 56
+#define S_SP 52
+
+#define S_IP 48
+#define S_FP 44
+#define S_R10 40
+#define S_R9 36
+#define S_R8 32
+#define S_R7 28
+#define S_R6 24
+#define S_R5 20
+#define S_R4 16
+#define S_R3 12
+#define S_R2 8
+#define S_R1 4
+#define S_R0 0
+
+
+/*****************************/
+/* CPU Mode */
+/*****************************/
+#define USERMODE 0x10
+#define FIQMODE 0x11
+#define IRQMODE 0x12
+#define SVCMODE 0x13
+#define ABORTMODE 0x17
+#define UNDEFMODE 0x1b
+#define MODEMASK 0x1f
+#define NOINT 0xc0
+
+/*****************************/
+/* CP15 Mode Bit Definition */
+/*****************************/
+#define R1_iA (1<<31)
+#define R1_nF (1<<30)
+#define R1_VE (1<<24)
+#define R1_I (1<<12)
+#define R1_BP (1<<11) /* Z bit */
+#define R1_C (1<<2)
+#define R1_A (1<<1)
+#define R1_M (1<<0)
+
+#define RAM_BASE 0x50000000 /*Start address of DDR RAM */
+#define ROM_BASE 0x00000000 /*Start address of Flash */
+
+
+
+/* S3C6400 device base addresses */
+#define ELFIN_DMA_BASE 0x75000000
+#define ELFIN_LCD_BASE 0x77100000
+#define ELFIN_USB_HOST_BASE 0x74300000
+#define ELFIN_I2C_BASE 0x7f004000
+#define ELFIN_I2S_BASE 0x7f002000
+#define ELFIN_ADC_BASE 0x7e00b000
+#define ELFIN_SPI_BASE 0x7f00b000
+#define ELFIN_HSMMC_0_BASE 0x7c200000
+#define ELFIN_HSMMC_1_BASE 0x7c300000
+#define ELFIN_HSMMC_2_BASE 0x7c400000
+
+
+/* Clock & Power Controller for mDirac3*/
+#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
+
+#define oAPLL_LOCK 0x00
+#define oMPLL_LOCK 0x04
+#define oEPLL_LOCK 0x08
+#define oAPLL_CON 0x0C
+#define oMPLL_CON 0x10
+#define oEPLL_CON0 0x14
+#define oEPLL_CON1 0x18
+#define oCLK_SRC 0x1C
+#define oCLK_DIV0 0x20
+#define oCLK_DIV1 0x24
+#define oCLK_DIV2 0x28
+#define oCLK_OUT 0x2C
+#define oHCLK_GATE 0x30
+#define oPCLK_GATE 0x34
+#define oSCLK_GATE 0x38
+#define oAHB_CON0 0x100
+#define oAHB_CON1 0x104
+#define oAHB_CON2 0x108
+#define oSELECT_DMA 0x110
+#define oSW_RST 0x114
+#define oSYS_ID 0x118
+#define oMEM_SYS_CFG 0x120
+#define oQOS_OVERRIDE0 0x124
+#define oQOS_OVERRIDE1 0x128
+#define oMEM_CFG_STAT 0x12C
+#define oPWR_CFG 0x804
+#define oEINT_MASK 0x808
+#define oNOR_CFG 0x810
+#define oSTOP_CFG 0x814
+#define oSLEEP_CFG 0x818
+#define oOSC_FREQ 0x820
+#define oOSC_STABLE 0x824
+#define oPWR_STABLE 0x828
+#define oFPC_STABLE 0x82C
+#define oMTC_STABLE 0x830
+#define oOTHERS 0x900
+#define oRST_STAT 0x904
+#define oWAKEUP_STAT 0x908
+#define oBLK_PWR_STAT 0x90C
+#define oINF_REG0 0xA00
+#define oINF_REG1 0xA04
+#define oINF_REG2 0xA08
+#define oINF_REG3 0xA0C
+#define oINF_REG4 0xA10
+#define oINF_REG5 0xA14
+#define oINF_REG6 0xA18
+#define oINF_REG7 0xA1C
+
+#define oOSC_CNT_VAL 0x824
+#define oPWR_CNT_VAL 0x828
+#define oFPC_CNT_VAL 0x82C
+#define oMTC_CNT_VAL 0x830
+
+#define APLL_LOCK (ELFIN_CLOCK_POWER_BASE + oAPLL_LOCK)
+#define MPLL_LOCK (ELFIN_CLOCK_POWER_BASE + oMPLL_LOCK)
+#define EPLL_LOCK (ELFIN_CLOCK_POWER_BASE + oEPLL_LOCK)
+#define APLL_CON (ELFIN_CLOCK_POWER_BASE + oAPLL_CON)
+#define MPLL_CON (ELFIN_CLOCK_POWER_BASE + oMPLL_CON)
+#define EPLL_CON0 (ELFIN_CLOCK_POWER_BASE + oEPLL_CON0)
+#define EPLL_CON1 (ELFIN_CLOCK_POWER_BASE + oEPLL_CON1)
+#define CLK_SRC (ELFIN_CLOCK_POWER_BASE + oCLK_SRC)
+#define CLK_DIV0 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV0)
+#define CLK_DIV1 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV1)
+#define CLK_DIV2 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV2)
+#define CLK_OUT (ELFIN_CLOCK_POWER_BASE + oCLK_OUT)
+#define HCLK_GATE (ELFIN_CLOCK_POWER_BASE + oHCLK_GATE)
+#define PCLK_GATE (ELFIN_CLOCK_POWER_BASE + oPCLK_GATE)
+#define SCLK_GATE (ELFIN_CLOCK_POWER_BASE + oSCLK_GATE)
+#define AHB_CON0 (ELFIN_CLOCK_POWER_BASE + oAHB_CON0)
+#define AHB_CON1 (ELFIN_CLOCK_POWER_BASE + oAHB_CON1)
+#define AHB_CON2 (ELFIN_CLOCK_POWER_BASE + oAHB_CON2)
+#define SELECT_DMA (ELFIN_CLOCK_POWER_BASE + oSELECT_DMA)
+#define SW_RST (ELFIN_CLOCK_POWER_BASE + oSW_RST)
+#define SYS_ID (ELFIN_CLOCK_POWER_BASE + oSYS_ID)
+#define MEM_SYS_CFG (ELFIN_CLOCK_POWER_BASE + oMEM_SYS_CFG)
+#define QOS_OVERRIDE0 (ELFIN_CLOCK_POWER_BASE + oQOS_OVERRIDE0)
+#define QOS_OVERRIDE1 (ELFIN_CLOCK_POWER_BASE + oQOS_OVERRIDE1)
+#define MEM_CFG_STAT (ELFIN_CLOCK_POWER_BASE + oMEM_CFG_STAT)
+#define PWR_CFG (ELFIN_CLOCK_POWER_BASE + oPWR_CFG)
+#define EINT_MASK (ELFIN_CLOCK_POWER_BASE + oEINT_MASK)
+#define NOR_CFG (ELFIN_CLOCK_POWER_BASE + oNOR_CFG)
+#define STOP_CFG (ELFIN_CLOCK_POWER_BASE + oSTOP_CFG)
+#define SLEEP_CFG (ELFIN_CLOCK_POWER_BASE + oSLEEP_CFG)
+#define OSC_FREQ (ELFIN_CLOCK_POWER_BASE + oOSC_FREQ)
+#define OSC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oOSC_CNT_VAL)
+#define PWR_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oPWR_CNT_VAL)
+#define FPC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oFPC_CNT_VAL)
+#define MTC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oMTC_CNT_VAL)
+#define OTHERS (ELFIN_CLOCK_POWER_BASE + oOTHERS)
+#define RST_STAT (ELFIN_CLOCK_POWER_BASE + oRST_STAT)
+#define WAKEUP_STAT (ELFIN_CLOCK_POWER_BASE + oWAKEUP_STAT)
+#define BLK_PWR_STAT (ELFIN_CLOCK_POWER_BASE + oBLK_PWR_STAT)
+#define INF_REG0 (ELFIN_CLOCK_POWER_BASE + oINF_REG0)
+#define INF_REG1 (ELFIN_CLOCK_POWER_BASE + oINF_REG1)
+#define INF_REG2 (ELFIN_CLOCK_POWER_BASE + oINF_REG2)
+#define INF_REG3 (ELFIN_CLOCK_POWER_BASE + oINF_REG3)
+#define INF_REG4 (ELFIN_CLOCK_POWER_BASE + oINF_REG4)
+#define INF_REG5 (ELFIN_CLOCK_POWER_BASE + oINF_REG5)
+#define INF_REG6 (ELFIN_CLOCK_POWER_BASE + oINF_REG6)
+#define INF_REG7 (ELFIN_CLOCK_POWER_BASE + oINF_REG7)
+
+
+/*
+ * GPIO
+ */
+#define ELFIN_GPIO_BASE 0x7f008000
+
+#define oGPACON 0x00
+#define oGPADAT 0x04
+#define oGPAPUD 0x08
+#define oGPACONSLP 0x0C
+#define oGPAPUDSLP 0x10
+#define oGPBCON 0x20
+#define oGPBDAT 0x24
+#define oGPBPUD 0x28
+#define oGPBCONSLP 0x2C
+#define oGPBPUDSLP 0x30
+#define oGPCCON 0x40
+#define oGPCDAT 0x44
+#define oGPCPUD 0x48
+#define oGPCCONSLP 0x4C
+#define oGPCPUDSLP 0x50
+#define oGPDCON 0x60
+#define oGPDDAT 0x64
+#define oGPDPUD 0x68
+#define oGPDCONSLP 0x6C
+#define oGPDPUDSLP 0x70
+#define oGPECON 0x80
+#define oGPEDAT 0x84
+#define oGPEPUD 0x88
+#define oGPECONSLP 0x8C
+#define oGPEPUDSLP 0x90
+#define oGPFCON 0xA0
+#define oGPFDAT 0xA4
+#define oGPFPUD 0xA8
+#define oGPFCONSLP 0xAC
+#define oGPFPUDSLP 0xB0
+#define oGPGCON 0xC0
+#define oGPGDAT 0xC4
+#define oGPGPUD 0xC8
+#define oGPGCONSLP 0xCC
+#define oGPGPUDSLP 0xD0
+#define oGPHCON0 0xE0
+#define oGPHCON1 0xE4
+#define oGPHDAT 0xE8
+#define oGPHPUD 0xEC
+#define oGPHCONSLP 0xF0
+#define oGPHPUDSLP 0xF4
+#define oGPICON 0x100
+#define oGPIDAT 0x104
+#define oGPIPUD 0x108
+#define oGPICONSLP 0x10C
+#define oGPIPUDSLP 0x110
+#define oGPJCON 0x120
+#define oGPJDAT 0x124
+#define oGPJPUD 0x128
+#define oGPJCONSLP 0x12C
+#define oGPJPUDSLP 0x130
+#define oSPCON 0x1A0
+#define oMEM0DRVCON 0x1D0
+#define oMEM1DRVCON 0x1D4
+#define oGPKCON0 0x800
+#define oGPKCON1 0x804
+#define oGPKDAT 0x808
+#define oGPKPUD 0x80C
+#define oGPLCON0 0x810
+#define oGPLCON1 0x814
+#define oGPLDAT 0x818
+#define oGPLPUD 0x81C
+#define oGPMCON 0x820
+#define oGPMDAT 0x824
+#define oGPMPUD 0x828
+#define oGPNCON 0x830
+#define oGPNDAT 0x834
+#define oGPNPUD 0x838
+#define oGPOCON 0x140
+#define oGPODAT 0x144
+#define oGPOPUD 0x148
+#define oGPOCONSLP 0x14C
+#define oGPOPUDSLP 0x150
+#define oGPPCON 0x160
+#define oGPPDAT 0x164
+#define oGPPPUD 0x168
+#define oGPPCONSLP 0x16C
+#define oGPPPUDSLP 0x170
+#define oGPQCON 0x180
+#define oGPQDAT 0x184
+#define oGPQPUD 0x188
+#define oGPQCONSLP 0x18C
+#define oGPQPUDSLP 0x190
+#define oEINTPEND 0x924
+
+#define GPACON (ELFIN_GPIO_BASE + oGPACON)
+#define GPADAT (ELFIN_GPIO_BASE + oGPADAT)
+#define GPAPUD (ELFIN_GPIO_BASE + oGPAPUD)
+#define GPACONSLP (ELFIN_GPIO_BASE + oGPACONSLP)
+#define GPAPUDSLP (ELFIN_GPIO_BASE + oGPAPUDSLP)
+#define GPBCON (ELFIN_GPIO_BASE + oGPBCON)
+#define GPBDAT (ELFIN_GPIO_BASE + oGPBDAT)
+#define GPBPUD (ELFIN_GPIO_BASE + oGPBPUD)
+#define GPBCONSLP (ELFIN_GPIO_BASE + oGPBCONSLP)
+#define GPBPUDSLP (ELFIN_GPIO_BASE + oGPBPUDSLP)
+#define GPCCON (ELFIN_GPIO_BASE + oGPCCON)
+#define GPCDAT (ELFIN_GPIO_BASE + oGPCDAT)
+#define GPCPUD (ELFIN_GPIO_BASE + oGPCPUD)
+#define GPCCONSLP (ELFIN_GPIO_BASE + oGPCCONSLP)
+#define GPCPUDSLP (ELFIN_GPIO_BASE + oGPCPUDSLP)
+#define GPDCON (ELFIN_GPIO_BASE + oGPDCON)
+#define GPDDAT (ELFIN_GPIO_BASE + oGPDDAT)
+#define GPDPUD (ELFIN_GPIO_BASE + oGPDPUD)
+#define GPDCONSLP (ELFIN_GPIO_BASE + oGPDCONSLP)
+#define GPDPUDSLP (ELFIN_GPIO_BASE + oGPDPUDSLP)
+#define GPECON (ELFIN_GPIO_BASE + oGPECON)
+#define GPEDAT (ELFIN_GPIO_BASE + oGPEDAT)
+#define GPEPUD (ELFIN_GPIO_BASE + oGPEPUD)
+#define GPECONSLP (ELFIN_GPIO_BASE + oGPECONSLP)
+#define GPEPUDSLP (ELFIN_GPIO_BASE + oGPEPUDSLP)
+#define GPFCON (ELFIN_GPIO_BASE + oGPFCON)
+#define GPFDAT (ELFIN_GPIO_BASE + oGPFDAT)
+#define GPFPUD (ELFIN_GPIO_BASE + oGPFPUD)
+#define GPFCONSLP (ELFIN_GPIO_BASE + oGPFCONSLP)
+#define GPFPUDSLP (ELFIN_GPIO_BASE + oGPFPUDSLP)
+#define GPGCON (ELFIN_GPIO_BASE + oGPGCON)
+#define GPGDAT (ELFIN_GPIO_BASE + oGPGDAT)
+#define GPGPUD (ELFIN_GPIO_BASE + oGPGPUD)
+#define GPGCONSLP (ELFIN_GPIO_BASE + oGPGCONSLP)
+#define GPGPUDSLP (ELFIN_GPIO_BASE + oGPGPUDSLP)
+#define GPHCON0 (ELFIN_GPIO_BASE + oGPHCON0)
+#define GPHCON1 (ELFIN_GPIO_BASE + oGPHCON1)
+#define GPHDAT (ELFIN_GPIO_BASE + oGPHDAT)
+#define GPHPUD (ELFIN_GPIO_BASE + oGPHPUD)
+#define GPHCONSLP (ELFIN_GPIO_BASE + oGPHCONSLP)
+#define GPHPUDSLP (ELFIN_GPIO_BASE + oGPHPUDSLP)
+#define GPICON (ELFIN_GPIO_BASE + oGPICON)
+#define GPIDAT (ELFIN_GPIO_BASE + oGPIDAT)
+#define GPIPUD (ELFIN_GPIO_BASE + oGPIPUD)
+#define GPICONSLP (ELFIN_GPIO_BASE + oGPICONSLP)
+#define GPIPUDSLP (ELFIN_GPIO_BASE + oGPIPUDSLP)
+#define GPJCON (ELFIN_GPIO_BASE + oGPJCON)
+#define GPJDAT (ELFIN_GPIO_BASE + oGPJDAT)
+#define GPJPUD (ELFIN_GPIO_BASE + oGPJPUD)
+#define GPJCONSLP (ELFIN_GPIO_BASE + oGPJCONSLP)
+#define GPJPUDSLP (ELFIN_GPIO_BASE + oGPJPUDSLP)
+#define GPKCON0 (ELFIN_GPIO_BASE + oGPKCON0)
+#define GPKCON1 (ELFIN_GPIO_BASE + oGPKCON1)
+#define GPKDAT (ELFIN_GPIO_BASE + oGPKDAT)
+#define GPKPUD (ELFIN_GPIO_BASE + oGPKPUD)
+#define GPLCON0 (ELFIN_GPIO_BASE + oGPLCON0)
+#define GPLCON1 (ELFIN_GPIO_BASE + oGPLCON1)
+#define GPLDAT (ELFIN_GPIO_BASE + oGPLDAT)
+#define GPLPUD (ELFIN_GPIO_BASE + oGPLPUD)
+#define GPMCON (ELFIN_GPIO_BASE + oGPMCON)
+#define GPMDAT (ELFIN_GPIO_BASE + oGPMDAT)
+#define GPMPUD (ELFIN_GPIO_BASE + oGPMPUD)
+#define GPNCON (ELFIN_GPIO_BASE + oGPNCON)
+#define GPNDAT (ELFIN_GPIO_BASE + oGPNDAT)
+#define GPNPUD (ELFIN_GPIO_BASE + oGPNPUD)
+#define GPOCON (ELFIN_GPIO_BASE + oGPOCON)
+#define GPODAT (ELFIN_GPIO_BASE + oGPODAT)
+#define GPOPUD (ELFIN_GPIO_BASE + oGPODAT)
+#define GPOCONSLP (ELFIN_GPIO_BASE + oGPOCONSLP)
+#define GPOPUDSLP (ELFIN_GPIO_BASE + oGPOPUDSLP)
+#define GPPCON (ELFIN_GPIO_BASE + oGPPCON)
+#define GPPDAT (ELFIN_GPIO_BASE + oGPPDAT)
+#define GPPPUD (ELFIN_GPIO_BASE + oGPPPUD)
+#define GPPCONSLP (ELFIN_GPIO_BASE + oGPPCONSLP)
+#define GPPPUDSLP (ELFIN_GPIO_BASE + oGPPPUDSLP)
+#define GPQCON (ELFIN_GPIO_BASE + oGPQCON)
+#define GPQDAT (ELFIN_GPIO_BASE + oGPQDAT)
+#define GPQPUD (ELFIN_GPIO_BASE + oGPQPUD)
+#define GPQCONSLP (ELFIN_GPIO_BASE + oGPQCONSLP)
+#define GPQPUDSLP (ELFIN_GPIO_BASE + oGPQPUDSLP)
+#define SPCON (ELFIN_GPIO_BASE + oSPCON)
+#define MEM0DRVCON (ELFIN_GPIO_BASE + oMEM0DRVCON)
+#define MEM1DRVCON (ELFIN_GPIO_BASE + oMEM1DRVCON)
+
+/*
+ * Bus Matrix
+ */
+#define ELFIN_MEM_SYS_CFG 0x7e00f120
+
+
+/*
+ * Memory controller
+ */
+#define ELFIN_SROM_BASE 0x70000000
+
+#define SROM_BW (ELFIN_SROM_BASE + 0x00)
+#define SROM_BC0 (ELFIN_SROM_BASE + 0x04)
+#define SROM_BC1 (ELFIN_SROM_BASE + 0x08)
+#define SROM_BC2 (ELFIN_SROM_BASE + 0x0C)
+#define SROM_BC3 (ELFIN_SROM_BASE + 0x10)
+#define SROM_BC4 (ELFIN_SROM_BASE + 0x14)
+#define SROM_BC5 (ELFIN_SROM_BASE + 0x18)
+
+
+/*
+ * SDRAM Controller
+ */
+#define ELFIN_DMC0_BASE 0x7e000000
+#define ELFIN_DMC1_BASE 0x7e001000
+
+#define INDEX_DMC_MEMC_STATUS (0x00)
+#define INDEX_DMC_MEMC_CMD (0x04)
+#define INDEX_DMC_DIRECT_CMD (0x08)
+#define INDEX_DMC_MEMORY_CFG (0x0C)
+#define INDEX_DMC_REFRESH_PRD (0x10)
+#define INDEX_DMC_CAS_LATENCY (0x14)
+#define INDEX_DMC_T_DQSS (0x18)
+#define INDEX_DMC_T_MRD (0x1C)
+#define INDEX_DMC_T_RAS (0x20)
+#define INDEX_DMC_T_RC (0x24)
+#define INDEX_DMC_T_RCD (0x28)
+#define INDEX_DMC_T_RFC (0x2C)
+#define INDEX_DMC_T_RP (0x30)
+#define INDEX_DMC_T_RRD (0x34)
+#define INDEX_DMC_T_WR (0x38)
+#define INDEX_DMC_T_WTR (0x3C)
+#define INDEX_DMC_T_XP (0x40)
+#define INDEX_DMC_T_XSR (0x44)
+#define INDEX_DMC_T_ESR (0x48)
+#define INDEX_DMC_MEMORY_CFG2 (0x4C)
+#define INDEX_DMC_CHIP_0_CFG (0x200)
+#define INDEX_DMC_CHIP_1_CFG (0x204)
+#define INDEX_DMC_CHIP_2_CFG (0x208)
+#define INDEX_DMC_CHIP_3_CFG (0x20C)
+#define INDEX_DMC_USER_STATUS (0x300)
+#define INDEX_DMC_USER_CONFIG (0x304)
+
+/*
+* Memory Chip direct command
+*/
+#define DMC_NOP0 0x0c0000
+#define DMC_NOP1 0x1c0000
+#define DMC_PA0 0x000000 //Precharge all
+#define DMC_PA1 0x100000
+#define DMC_AR0 0x040000 //Autorefresh
+#define DMC_AR1 0x140000
+#define DMC_SDR_MR0 0x080032 //MRS, CAS 3, Burst Length 4
+#define DMC_SDR_MR1 0x180032
+#define DMC_DDR_MR0 0x080162
+#define DMC_DDR_MR1 0x180162
+#define DMC_mDDR_MR0 0x080032 //CAS 3, Burst Length 4
+#define DMC_mDDR_MR1 0x180032
+#define DMC_mSDR_EMR0 0x0a0000 //EMRS, DS:Full, PASR:Full Array
+#define DMC_mSDR_EMR1 0x1a0000
+#define DMC_DDR_EMR0 0x090000
+#define DMC_DDR_EMR1 0x190000
+#define DMC_mDDR_EMR0 0x0a0000 // DS:Full, PASR:Full Array
+#define DMC_mDDR_EMR1 0x1a0000
+
+
+/****************************************************************
+ Definitions for memory configuration
+ Set memory configuration
+ active_chips = 1'b0 (1 chip)
+ qos_master_chip = 3'b000(ARID[3:0])
+ memory burst = 3'b010(burst 4)
+ stop_mem_clock = 1'b0(disable dynamical stop)
+ auto_power_down = 1'b0(disable auto power-down mode)
+ power_down_prd = 6'b00_0000(0 cycle for auto power-down)
+ ap_bit = 1'b0 (bit position of auto-precharge is 10)
+ row_bits = 3'b010(# row address 13)
+ column_bits = 3'b010(# column address 10 )
+
+ Set user configuration
+ 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR
+
+ Set chip select for chip [n]
+ row bank control, bank address 0x3000_0000 ~ 0x37ff_ffff
+ CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24]
+******************************************************************/
+
+/*
+ * HS MMC Interface
+ */
+#define ELFIN_HSMMC_BASE 0x7C200000
+
+#define HM_SYSAD (0x00)
+#define HM_BLKSIZE (0x04)
+#define HM_BLKCNT (0x06)
+#define HM_ARGUMENT (0x08)
+#define HM_TRNMOD (0x0c)
+#define HM_CMDREG (0x0e)
+#define HM_RSPREG0 (0x10)
+#define HM_RSPREG1 (0x14)
+#define HM_RSPREG2 (0x18)
+#define HM_RSPREG3 (0x1c)
+#define HM_BDATA (0x20)
+#define HM_PRNSTS (0x24)
+#define HM_HOSTCTL (0x28)
+#define HM_PWRCON (0x29)
+#define HM_BLKGAP (0x2a)
+#define HM_WAKCON (0x2b)
+#define HM_CLKCON (0x2c)
+#define HM_TIMEOUTCON (0x2e)
+#define HM_SWRST (0x2f)
+#define HM_NORINTSTS (0x30)
+#define HM_ERRINTSTS (0x32)
+#define HM_NORINTSTSEN (0x34)
+#define HM_ERRINTSTSEN (0x36)
+#define HM_NORINTSIGEN (0x38)
+#define HM_ERRINTSIGEN (0x3a)
+#define HM_ACMD12ERRSTS (0x3c)
+#define HM_CAPAREG (0x40)
+#define HM_MAXCURR (0x48)
+#define HM_CONTROL2 (0x80)
+#define HM_CONTROL3 (0x84)
+#define HM_CONTROL4 (0x8c)
+#define HM_HCVER (0xfe)
+
+/*
+ * Nand flash controller
+ */
+#define ELFIN_NAND_BASE 0x70200000
+
+#define oNFCONF 0x00
+#define oNFCONT 0x04
+#define oNFCMMD 0x08
+#define oNFADDR 0x0c
+#define oNFDATA 0x10
+#define oNFMECCDATA0 0x14
+#define oNFMECCDATA1 0x18
+#define oNFSECCDATA0 0x1c
+#define oNFSBLK 0x20
+#define oNFEBLK 0x24
+#define oNFSTAT 0x28
+#define oNFESTAT0 0x2c
+#define oNFESTAT1 0x30
+#define oNFMECC0 0x34
+#define oNFMECC1 0x38
+#define oNFSECC 0x3c
+#define oNFMLCBITPT 0x40
+#define oNF8ECCERR0 0x44
+#define oNF8ECCERR1 0x48
+#define oNF8ECCERR2 0x4c
+#define oNFM8ECC0 0x50
+#define oNFM8ECC1 0x54
+#define oNFM8ECC2 0x58
+#define oNFM8ECC3 0x5c
+#define oNFMLC8BITPT0 0x60
+#define oNFMLC8BITPT1 0x64
+
+#define NFCONF (ELFIN_NAND_BASE + oNFCONF)
+#define NFCONT (ELFIN_NAND_BASE + oNFCONT)
+#define NFCMMD (ELFIN_NAND_BASE + oNFCMMD)
+#define NFADDR (ELFIN_NAND_BASE + oNFADDR)
+#define NFDATA (ELFIN_NAND_BASE + oNFDATA)
+#define NFMECCDATA0 (ELFIN_NAND_BASE + oNFMECCDATA0)
+#define NFMECCDATA1 (ELFIN_NAND_BASE + oNFMECCDATA1)
+#define NFSECCDATA0 (ELFIN_NAND_BASE + oNFSECCDATA0)
+#define NFSBLK (ELFIN_NAND_BASE + oNFSBLK)
+#define NFEBLK (ELFIN_NAND_BASE + oNFEBLK)
+#define NFSTAT (ELFIN_NAND_BASE + oNFSTAT)
+#define NFESTAT0 (ELFIN_NAND_BASE + oNFESTAT0)
+#define NFESTAT1 (ELFIN_NAND_BASE + oNFESTAT1)
+#define NFMECC0 (ELFIN_NAND_BASE + oNFMECC0)
+#define NFMECC1 (ELFIN_NAND_BASE + oNFMECC1)
+#define NFSECC (ELFIN_NAND_BASE + oNFSECC)
+#define NFMLCBITPT (ELFIN_NAND_BASE + oNFMLCBITPT)
+#define NF8ECCERR0 (ELFIN_NAND_BASE + oNF8ECCERR0)
+#define NF8ECCERR1 (ELFIN_NAND_BASE + oNF8ECCERR1)
+#define NF8ECCERR2 (ELFIN_NAND_BASE + oNF8ECCERR2)
+#define NFM8ECC0 (ELFIN_NAND_BASE + oNFM8ECC0)
+#define NFM8ECC1 (ELFIN_NAND_BASE + oNFM8ECC1)
+#define NFM8ECC2 (ELFIN_NAND_BASE + oNFM8ECC2)
+#define NFM8ECC3 (ELFIN_NAND_BASE + oNFM8ECC3)
+#define NFMLC8BITPT0 (ELFIN_NAND_BASE + oNFMLC8BITPT0)
+#define NFMLC8BITPT1 (ELFIN_NAND_BASE + oNFMLC8BITPT1)
+
+
+#define NFCONF_ECC_MLC (1<<24)
+
+#define NFCONF_ECC_1BIT (0<<23)
+#define NFCONF_ECC_4BIT (2<<23)
+#define NFCONF_ECC_8BIT (1<<23)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK (1<<7)
+#define NFCONT_SECCLOCK (1<<6)
+#define NFCONT_INITMECC (1<<5)
+#define NFCONT_INITSECC (1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<1)
+#define NFCONT_CS (1<<1)
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+#define NFESTAT0_ECCBUSY (1<<31)
+
+
+
+/*************************************************************
+ * OneNAND Controller
+ *************************************************************/
+
+/*
+ * S3C6400 SFRs
+ */
+#define ONENAND_REG_MEM_CFG (0x000)
+#define ONENAND_REG_BURST_LEN (0x010)
+#define ONENAND_REG_MEM_RESET (0x020)
+#define ONENAND_REG_INT_ERR_STAT (0x030)
+#define ONENAND_REG_INT_ERR_MASK (0x040)
+#define ONENAND_REG_INT_ERR_ACK (0x050)
+#define ONENAND_REG_ECC_ERR_STAT (0x060)
+#define ONENAND_REG_MANUFACT_ID (0x070)
+#define ONENAND_REG_DEVICE_ID (0x080)
+#define ONENAND_REG_DATA_BUF_SIZE (0x090)
+#define ONENAND_REG_BOOT_BUF_SIZE (0x0A0)
+#define ONENAND_REG_BUF_AMOUNT (0x0B0)
+#define ONENAND_REG_TECH (0x0C0)
+#define ONENAND_REG_FBA_WIDTH (0x0D0)
+#define ONENAND_REG_FPA_WIDTH (0x0E0)
+#define ONENAND_REG_FSA_WIDTH (0x0F0)
+#define ONENAND_REG_REVISION (0x100)
+#define ONENAND_REG_DATARAM0 (0x110)
+#define ONENAND_REG_DATARAM1 (0x120)
+#define ONENAND_REG_SYNC_MODE (0x130)
+#define ONENAND_REG_TRANS_SPARE (0x140)
+#define ONENAND_REG_LOCK_BIT (0x150)
+#define ONENAND_REG_DBS_DFS_WIDTH (0x160)
+#define ONENAND_REG_PAGE_CNT (0x170)
+#define ONENAND_REG_ERR_PAGE_ADDR (0x180)
+#define ONENAND_REG_BURST_RD_LAT (0x190)
+#define ONENAND_REG_INT_PIN_ENABLE (0x1A0)
+#define ONENAND_REG_INT_MON_CYC (0x1B0)
+#define ONENAND_REG_ACC_CLOCK (0x1C0)
+#define ONENAND_REG_SLOW_RD_PATH (0x1D0)
+#define ONENAND_REG_ERR_BLK_ADDR (0x1E0)
+#define ONENAND_REG_FLASH_VER_ID (0x1F0)
+#define ONENAND_REG_FLASH_AUX_CNTRL (0x300)
+
+/*
+ * S3C6400 SFR values
+ */
+#define ONENAND_MEM_CFG_SYNC_READ (1 << 15)
+#define ONENAND_MEM_CFG_BRL_7 (7 << 12)
+#define ONENAND_MEM_CFG_BRL_6 (6 << 12)
+#define ONENAND_MEM_CFG_BRL_5 (5 << 12)
+#define ONENAND_MEM_CFG_BRL_4 (4 << 12)
+#define ONENAND_MEM_CFG_BRL_3 (3 << 12)
+#define ONENAND_MEM_CFG_BRL_10 (2 << 12)
+#define ONENAND_MEM_CFG_BRL_9 (1 << 12)
+#define ONENAND_MEM_CFG_BRL_8 (0 << 12)
+#define ONENAND_MEM_CFG_BRL_SHIFT (12)
+#define ONENAND_MEM_CFG_BL_1K (5 << 9)
+#define ONENAND_MEM_CFG_BL_32 (4 << 9)
+#define ONENAND_MEM_CFG_BL_16 (3 << 9)
+#define ONENAND_MEM_CFG_BL_8 (2 << 9)
+#define ONENAND_MEM_CFG_BL_4 (1 << 9)
+#define ONENAND_MEM_CFG_BL_CONT (0 << 9)
+#define ONENAND_MEM_CFG_BL_SHIFT (9)
+#define ONENAND_MEM_CFG_NO_ECC (1 << 8)
+#define ONENAND_MEM_CFG_RDY_HIGH (1 << 7)
+#define ONENAND_MEM_CFG_INT_HIGH (1 << 6)
+#define ONENAND_MEM_CFG_IOBE (1 << 5)
+#define ONENAND_MEM_CFG_RDY_CONF (1 << 4)
+#define ONENAND_MEM_CFG_HF (1 << 2)
+#define ONENAND_MEM_CFG_WM_SYNC (1 << 1)
+#define ONENAND_MEM_CFG_BWPS_UNLOCK (1 << 0)
+
+#define ONENAND_BURST_LEN_CONT (0)
+#define ONENAND_BURST_LEN_4 (4)
+#define ONENAND_BURST_LEN_8 (8)
+#define ONENAND_BURST_LEN_16 (16)
+
+#define ONENAND_MEM_RESET_WARM (0x1)
+#define ONENAND_MEM_RESET_COLD (0x2)
+#define ONENAND_MEM_RESET_HOT (0x3)
+
+#define ONENAND_INT_ERR_CACHE_OP_ERR (1 << 13)
+#define ONENAND_INT_ERR_RST_CMP (1 << 12)
+#define ONENAND_INT_ERR_RDY_ACT (1 << 11)
+#define ONENAND_INT_ERR_INT_ACT (1 << 10)
+#define ONENAND_INT_ERR_UNSUP_CMD (1 << 9)
+#define ONENAND_INT_ERR_LOCKED_BLK (1 << 8)
+#define ONENAND_INT_ERR_BLK_RW_CMP (1 << 7)
+#define ONENAND_INT_ERR_ERS_CMP (1 << 6)
+#define ONENAND_INT_ERR_PGM_CMP (1 << 5)
+#define ONENAND_INT_ERR_LOAD_CMP (1 << 4)
+#define ONENAND_INT_ERR_ERS_FAIL (1 << 3)
+#define ONENAND_INT_ERR_PGM_FAIL (1 << 2)
+#define ONENAND_INT_ERR_INT_TO (1 << 1)
+#define ONENAND_INT_ERR_LD_FAIL_ECC_ERR (1 << 0)
+
+#define ONENAND_DEVICE_DENSITY_SHIFT (4)
+#define ONENAND_DEVICE_IS_DDP (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK (0x3)
+#define ONENAND_DEVICE_DENSITY_128Mb (0x000)
+#define ONENAND_DEVICE_DENSITY_256Mb (0x001)
+#define ONENAND_DEVICE_DENSITY_512Mb (0x002)
+#define ONENAND_DEVICE_DENSITY_1Gb (0x003)
+#define ONENAND_DEVICE_DENSITY_2Gb (0x004)
+#define ONENAND_DEVICE_DENSITY_4Gb (0x005)
+
+#define ONENAND_SYNC_MODE_RM_SYNC (1 << 1)
+#define ONENAND_SYNC_MODE_WM_SYNC (1 << 0)
+
+#define ONENAND_TRANS_SPARE_TSRF_INC (1 << 0)
+
+#define ONENAND_INT_PIN_ENABLE (1 << 0)
+
+#define ONENAND_ACC_CLOCK_266_133 (0x5)
+#define ONENAND_ACC_CLOCK_166_83 (0x3)
+#define ONENAND_ACC_CLOCK_134_67 (0x3)
+#define ONENAND_ACC_CLOCK_100_50 (0x2)
+#define ONENAND_ACC_CLOCK_60_30 (0x2)
+
+#define ONENAND_FLASH_AUX_WD_DISABLE (1 << 0)
+
+/*
+ * Datain values for mapped commands
+ */
+#define ONENAND_DATAIN_ERASE_STATUS (0x00)
+#define ONENAND_DATAIN_ERASE_MULTI (0x01)
+#define ONENAND_DATAIN_ERASE_SINGLE (0x03)
+#define ONENAND_DATAIN_ERASE_VERIFY (0x15)
+#define ONENAND_DATAIN_UNLOCK_START (0x08)
+#define ONENAND_DATAIN_UNLOCK_END (0x09)
+#define ONENAND_DATAIN_LOCK_START (0x0A)
+#define ONENAND_DATAIN_LOCK_END (0x0B)
+#define ONENAND_DATAIN_LOCKTIGHT_START (0x0C)
+#define ONENAND_DATAIN_LOCKTIGHT_END (0x0D)
+#define ONENAND_DATAIN_UNLOCK_ALL (0x0E)
+#define ONENAND_DATAIN_COPYBACK_SRC (0x1000)
+#define ONENAND_DATAIN_COPYBACK_DST (0x2000)
+#define ONENAND_DATAIN_ACCESS_OTP (0x12)
+#define ONENAND_DATAIN_ACCESS_MAIN (0x14)
+#define ONENAND_DATAIN_PIPELINE_READ (0x4000)
+#define ONENAND_DATAIN_PIPELINE_WRITE (0x4100)
+#define ONENAND_DATAIN_RMW_LOAD (0x10)
+#define ONENAND_DATAIN_RMW_MODIFY (0x11)
+
+/*
+ * Device ID Register F001h (R)
+ */
+#define ONENAND_DEVICE_DENSITY_SHIFT (4)
+#define ONENAND_DEVICE_IS_DDP (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK (0x3)
+
+/*
+ * Version ID Register F002h (R)
+ */
+#define ONENAND_VERSION_PROCESS_SHIFT (8)
+
+/*
+ * Start Address 1 F100h (R/W)
+ */
+#define ONENAND_DDP_SHIFT (15)
+#define ONENAND_DDP_CHIP0 (0)
+#define ONENAND_DDP_CHIP1 (1 << ONENAND_DDP_SHIFT)
+
+/*
+ * Start Buffer Register F200h (R/W)
+ */
+#define ONENAND_BSA_MASK (0x03)
+#define ONENAND_BSA_SHIFT (8)
+#define ONENAND_BSA_BOOTRAM (0 << 2)
+#define ONENAND_BSA_DATARAM0 (2 << 2)
+#define ONENAND_BSA_DATARAM1 (3 << 2)
+#define ONENAND_BSC_MASK (0x03)
+
+/*
+ * Command Register F220h (R/W)
+ */
+#define ONENAND_CMD_READ (0x00)
+#define ONENAND_CMD_READOOB (0x13)
+#define ONENAND_CMD_PROG (0x80)
+#define ONENAND_CMD_PROGOOB (0x1A)
+#define ONENAND_CMD_UNLOCK (0x23)
+#define ONENAND_CMD_LOCK (0x2A)
+#define ONENAND_CMD_LOCK_TIGHT (0x2C)
+#define ONENAND_CMD_UNLOCK_ALL (0x27)
+#define ONENAND_CMD_ERASE (0x94)
+#define ONENAND_CMD_RESET (0xF0)
+#define ONENAND_CMD_OTP_ACCESS (0x65)
+#define ONENAND_CMD_READID (0x90)
+#define ONENAND_CMD_STARTADDR1 (0xE0)
+#define ONENAND_CMD_WP_STATUS (0xE1)
+#define ONENAND_CMD_PIPELINE_READ (0x01)
+#define ONENAND_CMD_PIPELINE_WRITE (0x81)
+
+/*
+ * Command Mapping for S3C6400 OneNAND Controller
+ */
+#define ONENAND_AHB_ADDR (0x20000000)
+#define ONENAND_DUMMY_ADDR (0x20400000)
+#define ONENAND_CMD_SHIFT (24)
+#define ONENAND_CMD_MAP_00 (0x0)
+#define ONENAND_CMD_MAP_01 (0x1)
+#define ONENAND_CMD_MAP_10 (0x2)
+#define ONENAND_CMD_MAP_11 (0x3)
+#define ONENAND_CMD_MAP_FF (0xF)
+
+/*
+ * Mask for Mapping table
+ */
+#define ONENAND_MEM_ADDR_MASK (0xffffff)
+#define ONENAND_DDP_SHIFT_1Gb (21)
+#define ONENAND_DDP_SHIFT_2Gb (22)
+#define ONENAND_DDP_SHIFT_4Gb (23)
+#define ONENAND_FBA_SHIFT (12)
+#define ONENAND_FPA_SHIFT (6)
+#define ONENAND_FSA_SHIFT (4)
+#define ONENAND_FBA_MASK_128Mb (0xff)
+#define ONENAND_FBA_MASK_256Mb (0x1ff)
+#define ONENAND_FBA_MASK_512Mb (0x1ff)
+#define ONENAND_FBA_MASK_1Gb_DDP (0x1ff)
+#define ONENAND_FBA_MASK_1Gb (0x3ff)
+#define ONENAND_FBA_MASK_2Gb_DDP (0x3ff)
+#define ONENAND_FBA_MASK_2Gb (0x7ff)
+#define ONENAND_FBA_MASK_4Gb_DDP (0x7ff)
+#define ONENAND_FBA_MASK_4Gb (0xfff)
+#define ONENAND_FPA_MASK (0x3f)
+#define ONENAND_FSA_MASK (0x3)
+
+/*
+ * System Configuration 1 Register F221h (R, R/W)
+ */
+#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15)
+#define ONENAND_SYS_CFG1_BRL_7 (7 << 12)
+#define ONENAND_SYS_CFG1_BRL_6 (6 << 12)
+#define ONENAND_SYS_CFG1_BRL_5 (5 << 12)
+#define ONENAND_SYS_CFG1_BRL_4 (4 << 12)
+#define ONENAND_SYS_CFG1_BRL_3 (3 << 12)
+#define ONENAND_SYS_CFG1_BRL_10 (2 << 12)
+#define ONENAND_SYS_CFG1_BRL_9 (1 << 12)
+#define ONENAND_SYS_CFG1_BRL_8 (0 << 12)
+#define ONENAND_SYS_CFG1_BRL_SHIFT (12)
+#define ONENAND_SYS_CFG1_BL_32 (4 << 9)
+#define ONENAND_SYS_CFG1_BL_16 (3 << 9)
+#define ONENAND_SYS_CFG1_BL_8 (2 << 9)
+#define ONENAND_SYS_CFG1_BL_4 (1 << 9)
+#define ONENAND_SYS_CFG1_BL_CONT (0 << 9)
+#define ONENAND_SYS_CFG1_BL_SHIFT (9)
+#define ONENAND_SYS_CFG1_NO_ECC (1 << 8)
+#define ONENAND_SYS_CFG1_RDY (1 << 7)
+#define ONENAND_SYS_CFG1_INT (1 << 6)
+#define ONENAND_SYS_CFG1_IOBE (1 << 5)
+#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
+
+/*
+ * Controller Status Register F240h (R)
+ */
+#define ONENAND_CTRL_ONGO (1 << 15)
+#define ONENAND_CTRL_LOCK (1 << 14)
+#define ONENAND_CTRL_LOAD (1 << 13)
+#define ONENAND_CTRL_PROGRAM (1 << 12)
+#define ONENAND_CTRL_ERASE (1 << 11)
+#define ONENAND_CTRL_ERROR (1 << 10)
+#define ONENAND_CTRL_RSTB (1 << 7)
+#define ONENAND_CTRL_OTP_L (1 << 6)
+#define ONENAND_CTRL_OTP_BL (1 << 5)
+
+/*
+ * Interrupt Status Register F241h (R)
+ */
+#define ONENAND_INT_MASTER (1 << 15)
+#define ONENAND_INT_READ (1 << 7)
+#define ONENAND_INT_WRITE (1 << 6)
+#define ONENAND_INT_ERASE (1 << 5)
+#define ONENAND_INT_RESET (1 << 4)
+#define ONENAND_INT_CLEAR (0 << 0)
+
+/*
+ * NAND Flash Write Protection Status Register F24Eh (R)
+ */
+#define ONENAND_WP_US (1 << 2)
+#define ONENAND_WP_LS (1 << 1)
+#define ONENAND_WP_LTS (1 << 0)
+
+/*
+ * ECC Status Register FF00h (R)
+ */
+#define ONENAND_ECC_1BIT (1 << 0)
+#define ONENAND_ECC_1BIT_ALL (0x5555)
+#define ONENAND_ECC_2BIT (1 << 1)
+#define ONENAND_ECC_2BIT_ALL (0xAAAA)
+
+/*
+ * One-Time Programmable (OTP)
+ */
+#define ONENAND_OTP_LOCK_OFFSET (14)
+
+/*************************************************************
+ * End of OneNAND Controller
+ *************************************************************/
+
+/*
+ * Watchdog timer
+ */
+#define ELFIN_WATCHDOG_BASE 0x7E004000
+
+#define oWTCON 0x00
+#define oWTDAT 0x04
+#define oWTCNT 0x08
+
+#define WTCON (ELFIN_WATCHDOG_BASE + oWTCON)
+#define WTDAT (ELFIN_WATCHDOG_BASE + oWTDAT)
+#define WTCNT (ELFIN_WATCHDOG_BASE + oWTCNT)
+
+
+
+/*
+ * UART
+ */
+#define ELFIN_UART_BASE 0x7F005000
+
+#define oULCON 0x00
+#define oUCON 0x04
+#define oUFCON 0x08
+#define oUMCON 0x0C
+#define oUTRSTAT 0x10
+#define oUERSTAT 0x14
+#define oUFSTAT 0x18
+#define oUMSTAT 0x1C
+#define oUTXH 0x20
+#define oURXH 0x24
+#define oUBRDIV 0x28
+#define oUDIVSLOT 0x2C
+#define oUINTP 0x30
+#define oUINTSP 0x34
+#define oUINTM 0x38
+
+#ifdef CONFIG_SERIAL1
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0000)
+#elif defined(CONFIG_SERIAL2)
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0400)
+#else
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0000)
+#endif
+
+#define ELFIN_UART0_BASE (ELFIN_UART_BASE + 0x0000)
+
+#define ULCON0 (ELFIN_UART0_BASE + oULCON)
+#define UCON0 (ELFIN_UART0_BASE + oUCON)
+#define UFCON0 (ELFIN_UART0_BASE + oUFCON)
+#define UMCON0 (ELFIN_UART0_BASE + oUMCON)
+#define UTRSTAT0 (ELFIN_UART0_BASE + oUTRSTAT)
+#define UERSTAT0 (ELFIN_UART0_BASE + oUERSTAT)
+#define UFSTAT0 (ELFIN_UART0_BASE + oUFSTAT)
+#define UMSTAT0 (ELFIN_UART0_BASE + oUMSTAT)
+#define UTXH0 (ELFIN_UART0_BASE + oUTXH)
+#define URXH0 (ELFIN_UART0_BASE + oURXH)
+#define UBRDIV0 (ELFIN_UART0_BASE + oUBRDIV)
+#define UDIVSLOT0 (ELFIN_UART0_BASE + oUDIVSLOT)
+#define UINTP0 (ELFIN_UART0_BASE + oUINTP)
+#define UINTSP0 (ELFIN_UART0_BASE + oUINTSP)
+#define UINTM0 (ELFIN_UART0_BASE + oUINTM)
+
+#define ELFIN_UART1_BASE (ELFIN_UART_BASE + 0x0400)
+
+#define ULCON1 (ELFIN_UART1_BASE + oULCON)
+#define UCON1 (ELFIN_UART1_BASE + oUCON)
+#define UFCON1 (ELFIN_UART1_BASE + oUFCON)
+#define UMCON1 (ELFIN_UART1_BASE + oUMCON)
+#define UTRSTAT1 (ELFIN_UART1_BASE + oUTRSTAT)
+#define UERSTAT1 (ELFIN_UART1_BASE + oUERSTAT)
+#define UFSTAT1 (ELFIN_UART1_BASE + oUFSTAT)
+#define UMSTAT1 (ELFIN_UART1_BASE + oUMSTAT)
+#define UTXH1 (ELFIN_UART1_BASE + oUTXH)
+#define URXH1 (ELFIN_UART1_BASE + oURXH)
+#define UBRDIV1 (ELFIN_UART1_BASE + oUBRDIV)
+#define UDIVSLOT1 (ELFIN_UART1_BASE + oUDIVSLOT)
+#define UINTP1 (ELFIN_UART1_BASE + oUINTP)
+#define UINTSP1 (ELFIN_UART1_BASE + oUINTSP)
+#define UINTM1 (ELFIN_UART1_BASE + oUINTM)
+
+#define UTRSTAT_TX_EMPTY BIT(2)
+#define UTRSTAT_RX_READY BIT(0)
+#define UART_ERR_MASK 0xF
+
+
+/*
+ * PWM timer
+ */
+#define ELFIN_TIMER_BASE 0x7F006000
+
+#define oTCFG0 0x00
+#define oTCFG1 0x04
+#define oTCON 0x08
+#define oTCNTB0 0x0c
+#define oTCMPB0 0x10
+#define oTCNTO0 0x14
+#define oTCNTB1 0x18
+#define oTCMPB1 0x1c
+#define oTCNTO1 0x20
+#define oTCNTB2 0x24
+#define oTCMPB2 0x28
+#define oTCNTO2 0x2c
+#define oTCNTB3 0x30
+#define oTCMPB3 0x34
+#define oTCNTO3 0x38
+#define oTCNTB4 0x3c
+#define oTCNTO4 0x40
+#define oTINT_CSTAT 0x44
+
+#define TCFG0 (ELFIN_TIMER_BASE + oTCFG0)
+#define TCFG1 (ELFIN_TIMER_BASE + oTCFG1)
+#define TCON (ELFIN_TIMER_BASE + oTCON)
+#define TCNTB0 (ELFIN_TIMER_BASE + oTCNTB0)
+#define TCMPB0 (ELFIN_TIMER_BASE + oTCMPB0)
+#define TCNTO0 (ELFIN_TIMER_BASE + oTCNTO0)
+#define TCNTB1 (ELFIN_TIMER_BASE + oTCNTB1)
+#define TCMPB1 (ELFIN_TIMER_BASE + oTCMPB1)
+#define TCNTO1 (ELFIN_TIMER_BASE + oTCNTO1)
+#define TCNTB2 (ELFIN_TIMER_BASE + oTCNTB2)
+#define TCMPB2 (ELFIN_TIMER_BASE + oTCMPB2)
+#define TCNTO2 (ELFIN_TIMER_BASE + oTCNTO2)
+#define TCNTB3 (ELFIN_TIMER_BASE + oTCNTB3)
+#define TCMPB3 (ELFIN_TIMER_BASE + oTCMPB3)
+#define TCNTO3 (ELFIN_TIMER_BASE + oTCNTO3)
+#define TCNTB4 (ELFIN_TIMER_BASE + oTCNTB4)
+#define TCNTO4 (ELFIN_TIMER_BASE + oTCNTO4)
+#define TINT_CSTAT (ELFIN_TIMER_BASE + oTINT_CSTAT)
+
+/* Fields */
+#define fTCFG0_DZONE Fld(8,16) /* the dead zone length (= timer 0) */
+#define fTCFG0_PRE1 Fld(8,8) /* prescaler value for time 2,3,4 */
+#define fTCFG0_PRE0 Fld(8,0) /* prescaler value for time 0,1 */
+#define fTCFG1_MUX4 Fld(4,16)
+/* bits */
+#define TCFG0_DZONE(x) FInsrt((x), fTCFG0_DZONE)
+#define TCFG0_PRE1(x) FInsrt((x), fTCFG0_PRE1)
+#define TCFG0_PRE0(x) FInsrt((x), fTCFG0_PRE0)
+#define TCON_4_AUTO (1 << 22) /* auto reload on/off for Timer 4 */
+#define TCON_4_UPDATE (1 << 21) /* manual Update TCNTB4 */
+#define TCON_4_ONOFF (1 << 20) /* 0: Stop, 1: start Timer 4 */
+#define COUNT_4_ON (TCON_4_ONOFF*1)
+#define COUNT_4_OFF (TCON_4_ONOFF*0)
+#define TCON_3_AUTO (1 << 19) /* auto reload on/off for Timer 3 */
+#define TIMER3_ATLOAD_ON (TCON_3_AUTO*1)
+#define TIMER3_ATLAOD_OFF FClrBit(TCON, TCON_3_AUTO)
+#define TCON_3_INVERT (1 << 18) /* 1: Inverter on for TOUT3 */
+#define TIMER3_IVT_ON (TCON_3_INVERT*1)
+#define TIMER3_IVT_OFF (FClrBit(TCON, TCON_3_INVERT))
+#define TCON_3_MAN (1 << 17) /* manual Update TCNTB3,TCMPB3 */
+#define TIMER3_MANUP (TCON_3_MAN*1)
+#define TIMER3_NOP (FClrBit(TCON, TCON_3_MAN))
+#define TCON_3_ONOFF (1 << 16) /* 0: Stop, 1: start Timer 3 */
+#define TIMER3_ON (TCON_3_ONOFF*1)
+#define TIMER3_OFF (FClrBit(TCON, TCON_3_ONOFF))
+/* macros */
+#define GET_PRESCALE_TIMER4(x) FExtr((x), fTCFG0_PRE1)
+#define GET_DIVIDER_TIMER4(x) FExtr((x), fTCFG1_MUX4)
+
+/*
+ * RTC Controller
+ */
+#define ELFIN_RTC_BASE 0x7e005000
+
+#define oRTCCON 0x40
+#define oTICNT 0x44
+#define oRTCALM 0x50
+#define oALMSEC 0x54
+#define oALMMIN 0x58
+#define oALMHOUR 0x5c
+#define oALMDATE 0x60
+#define oALMMON 0x64
+#define oALMYEAR 0x68
+#define oBCDSEC 0x70
+#define oBCDMIN 0x74
+#define oBCDHOUR 0x78
+#define oBCDDATE 0x7c
+#define oBCDDAY 0x80
+#define oBCDMON 0x84
+#define oBCDYEAR 0x88
+
+#define RTCCON (ELFIN_RTC_BASE + oRTCCON)
+#define TICNT (ELFIN_RTC_BASE + oTICNT)
+#define RTCALM (ELFIN_RTC_BASE + oRTCALM)
+#define ALMSEC (ELFIN_RTC_BASE + oALMSEC)
+#define ALMMIN (ELFIN_RTC_BASE + oALMMIN)
+#define ALMHOUR (ELFIN_RTC_BASE + oALMHOUR)
+#define ALMDATE (ELFIN_RTC_BASE + oALMDATE)
+#define ALMMON (ELFIN_RTC_BASE + oALMMON)
+#define ALMYEAR (ELFIN_RTC_BASE + oALMYEAR)
+#define BCDSEC (ELFIN_RTC_BASE + oBCDSEC)
+#define BCDMIN (ELFIN_RTC_BASE + oBCDMIN)
+#define BCDHOUR (ELFIN_RTC_BASE + oBCDHOUR)
+#define BCDDATE (ELFIN_RTC_BASE + oBCDDATE)
+#define BCDDAY (ELFIN_RTC_BASE + oBCDDAY)
+#define BCDMON (ELFIN_RTC_BASE + oBCDMON)
+#define BCDYEAR (ELFIN_RTC_BASE + oBCDYEAR)
+
+/*
+ * USB2.0 HS OTG (Chapter 26)
+ */
+#define USBOTG_LINK_BASE (0x7C000000)
+#define USBOTG_PHY_BASE (0x7C100000)
+
+/* Core Global Registers */
+#define S3C_OTG_GOTGCTL (USBOTG_LINK_BASE + 0x000) /* OTG Control & Status */
+#define S3C_OTG_GOTGINT (USBOTG_LINK_BASE + 0x004) /* OTG Interrupt */
+#define S3C_OTG_GAHBCFG (USBOTG_LINK_BASE + 0x008) /* Core AHB Configuration */
+#define S3C_OTG_GUSBCFG (USBOTG_LINK_BASE + 0x00C) /* Core USB Configuration */
+#define S3C_OTG_GRSTCTL (USBOTG_LINK_BASE + 0x010) /* Core Reset */
+#define S3C_OTG_GINTSTS (USBOTG_LINK_BASE + 0x014) /* Core Interrupt */
+#define S3C_OTG_GINTMSK (USBOTG_LINK_BASE + 0x018) /* Core Interrupt Mask */
+#define S3C_OTG_GRXSTSR (USBOTG_LINK_BASE + 0x01C) /* Receive Status Debug Read/Status Read */
+#define S3C_OTG_GRXSTSP (USBOTG_LINK_BASE + 0x020) /* Receive Status Debug Pop/Status Pop */
+#define S3C_OTG_GRXFSIZ (USBOTG_LINK_BASE + 0x024) /* Receive FIFO Size */
+#define S3C_OTG_GNPTXFSIZ (USBOTG_LINK_BASE + 0x028) /* Non-Periodic Transmit FIFO Size */
+#define S3C_OTG_GNPTXSTS (USBOTG_LINK_BASE + 0x02C) /* Non-Periodic Transmit FIFO/Queue Status */
+
+#define S3C_OTG_HPTXFSIZ (USBOTG_LINK_BASE + 0x100) /* Host Periodic Transmit FIFO Size */
+#define S3C_OTG_DPTXFSIZ1 (USBOTG_LINK_BASE + 0x104) /* Device Periodic Transmit FIFO-1 Size */
+#define S3C_OTG_DPTXFSIZ2 (USBOTG_LINK_BASE + 0x108) /* Device Periodic Transmit FIFO-2 Size */
+#define S3C_OTG_DPTXFSIZ3 (USBOTG_LINK_BASE + 0x10C) /* Device Periodic Transmit FIFO-3 Size */
+#define S3C_OTG_DPTXFSIZ4 (USBOTG_LINK_BASE + 0x110) /* Device Periodic Transmit FIFO-4 Size */
+#define S3C_OTG_DPTXFSIZ5 (USBOTG_LINK_BASE + 0x114) /* Device Periodic Transmit FIFO-5 Size */
+#define S3C_OTG_DPTXFSIZ6 (USBOTG_LINK_BASE + 0x118) /* Device Periodic Transmit FIFO-6 Size */
+#define S3C_OTG_DPTXFSIZ7 (USBOTG_LINK_BASE + 0x11C) /* Device Periodic Transmit FIFO-7 Size */
+#define S3C_OTG_DPTXFSIZ8 (USBOTG_LINK_BASE + 0x120) /* Device Periodic Transmit FIFO-8 Size */
+#define S3C_OTG_DPTXFSIZ9 (USBOTG_LINK_BASE + 0x124) /* Device Periodic Transmit FIFO-9 Size */
+#define S3C_OTG_DPTXFSIZ10 (USBOTG_LINK_BASE + 0x128) /* Device Periodic Transmit FIFO-10 Size */
+#define S3C_OTG_DPTXFSIZ11 (USBOTG_LINK_BASE + 0x12C) /* Device Periodic Transmit FIFO-11 Size */
+#define S3C_OTG_DPTXFSIZ12 (USBOTG_LINK_BASE + 0x130) /* Device Periodic Transmit FIFO-12 Size */
+#define S3C_OTG_DPTXFSIZ13 (USBOTG_LINK_BASE + 0x134) /* Device Periodic Transmit FIFO-13 Size */
+#define S3C_OTG_DPTXFSIZ14 (USBOTG_LINK_BASE + 0x138) /* Device Periodic Transmit FIFO-14 Size */
+#define S3C_OTG_DPTXFSIZ15 (USBOTG_LINK_BASE + 0x13C) /* Device Periodic Transmit FIFO-15 Size */
+
+/* Host Global Registers */
+#define S3C_OTG_HCFG (USBOTG_LINK_BASE + 0x400) /* Host Configuration */
+#define S3C_OTG_HFIR (USBOTG_LINK_BASE + 0x404) /* Host Frame Interval */
+#define S3C_OTG_HFNUM (USBOTG_LINK_BASE + 0x408) /* Host Frame Number/Frame Time Remaining */
+#define S3C_OTG_HPTXSTS (USBOTG_LINK_BASE + 0x410) /* Host Periodic Transmit FIFO/Queue Status */
+#define S3C_OTG_HAINT (USBOTG_LINK_BASE + 0x414) /* Host All Channels Interrupt */
+#define S3C_OTG_HAINTMSK (USBOTG_LINK_BASE + 0x418) /* Host All Channels Interrupt Mask */
+
+/* Host Port Control & Status Registers */
+#define S3C_OTG_HPRT (USBOTG_LINK_BASE + 0x440) /* Host Port Control & Status */
+
+/* Host Channel-Specific Registers */
+#define S3C_OTG_HCCHAR0 (USBOTG_LINK_BASE + 0x500) /* Host Channel-0 Characteristics */
+#define S3C_OTG_HCSPLT0 (USBOTG_LINK_BASE + 0x504) /* Host Channel-0 Split Control */
+#define S3C_OTG_HCINT0 (USBOTG_LINK_BASE + 0x508) /* Host Channel-0 Interrupt */
+#define S3C_OTG_HCINTMSK0 (USBOTG_LINK_BASE + 0x50C) /* Host Channel-0 Interrupt Mask */
+#define S3C_OTG_HCTSIZ0 (USBOTG_LINK_BASE + 0x510) /* Host Channel-0 Transfer Size */
+#define S3C_OTG_HCDMA0 (USBOTG_LINK_BASE + 0x514) /* Host Channel-0 DMA Address */
+
+
+/* Device Global Registers */
+#define S3C_OTG_DCFG (USBOTG_LINK_BASE + 0x800) /* Device Configuration */
+#define S3C_OTG_DCTL (USBOTG_LINK_BASE + 0x804) /* Device Control */
+#define S3C_OTG_DSTS (USBOTG_LINK_BASE + 0x808) /* Device Status */
+#define S3C_OTG_DIEPMSK (USBOTG_LINK_BASE + 0x810) /* Device IN Endpoint Common Interrupt Mask */
+#define S3C_OTG_DOEPMSK (USBOTG_LINK_BASE + 0x814) /* Device OUT Endpoint Common Interrupt Mask */
+#define S3C_OTG_DAINT (USBOTG_LINK_BASE + 0x818) /* Device All Endpoints Interrupt */
+#define S3C_OTG_DAINTMSK (USBOTG_LINK_BASE + 0x81C) /* Device All Endpoints Interrupt Mask */
+#define S3C_OTG_DTKNQR1 (USBOTG_LINK_BASE + 0x820) /* Device IN Token Sequence Learning Queue Read 1 */
+#define S3C_OTG_DTKNQR2 (USBOTG_LINK_BASE + 0x824) /* Device IN Token Sequence Learning Queue Read 2 */
+#define S3C_OTG_DVBUSDIS (USBOTG_LINK_BASE + 0x828) /* Device VBUS Discharge Time */
+#define S3C_OTG_DVBUSPULSE (USBOTG_LINK_BASE + 0x82C) /* Device VBUS Pulsing Time */
+#define S3C_OTG_DTKNQR3 (USBOTG_LINK_BASE + 0x830) /* Device IN Token Sequence Learning Queue Read 3 */
+#define S3C_OTG_DTKNQR4 (USBOTG_LINK_BASE + 0x834) /* Device IN Token Sequence Learning Queue Read 4 */
+
+/* Device Logical IN Endpoint-Specific Registers */
+#define S3C_OTG_DIEPCTL0 (USBOTG_LINK_BASE + 0x900) /* Device IN Endpoint 0 Control */
+#define S3C_OTG_DIEPINT0 (USBOTG_LINK_BASE + 0x908) /* Device IN Endpoint 0 Interrupt */
+#define S3C_OTG_DIEPTSIZ0 (USBOTG_LINK_BASE + 0x910) /* Device IN Endpoint 0 Transfer Size */
+#define S3C_OTG_DIEPDMA0 (USBOTG_LINK_BASE + 0x914) /* Device IN Endpoint 0 DMA Address */
+
+/* Device Logical OUT Endpoint-Specific Registers */
+#define S3C_OTG_DOEPCTL0 (USBOTG_LINK_BASE + 0xB00) /* Device OUT Endpoint 0 Control */
+#define S3C_OTG_DOEPINT0 (USBOTG_LINK_BASE + 0xB08) /* Device OUT Endpoint 0 Interrupt */
+#define S3C_OTG_DOEPTSIZ0 (USBOTG_LINK_BASE + 0xB10) /* Device OUT Endpoint 0 Transfer Size */
+#define S3C_OTG_DOEPDMA0 (USBOTG_LINK_BASE + 0xB14) /* Device OUT Endpoint 0 DMA Address */
+
+/* Power & clock gating registers */
+#define S3C_OTG_PCGCCTRL (USBOTG_LINK_BASE + 0xE00)
+
+/* Endpoint FIFO address */
+#define S3C_OTG_EP0_FIFO (USBOTG_LINK_BASE + 0x1000)
+
+/* OTG PHY CORE REGISTERS */
+#define S3C_OTG_PHYPWR (USBOTG_PHY_BASE + 0x00)
+#define S3C_OTG_PHYCTRL (USBOTG_PHY_BASE + 0x04)
+#define S3C_OTG_RSTCON (USBOTG_PHY_BASE + 0x08)
+
+
+/*
+ * Interrupt
+ */
+#define ELFIN_VIC0_BASE_ADDR (0x71200000)
+#define ELFIN_VIC1_BASE_ADDR (0x71300000)
+
+#define oIRQSTATUS 0x000
+#define oFIQSTATUS 0x004
+#define oRAWINTR 0x008
+#define oINTSELECT 0x00c
+#define oINTENABLE 0x010
+#define oINTENCLEAR 0x014
+#define oSOFTINT 0x018
+#define oSOFTINTCLEAR 0x01c
+#define oPROTECTION 0x020
+#define oSWPRIORITYMASK 0x024
+#define oPRIORITYDAISY 0x028
+#define oVECTADDR(X) (0x100+(X)*4)
+#define oVECPRIORITY(X) (0x200+(X)*4)
+#define oVECTADDRESS 0xF00
+
+#define VIC0IRQSTATUS (ELFIN_VIC0_BASE_ADDR + oIRQSTATUS)
+#define VIC0FIQSTATUS (ELFIN_VIC0_BASE_ADDR + oFIQSTATUS)
+#define VIC0RAWINTR (ELFIN_VIC0_BASE_ADDR + oRAWINTR)
+#define VIC0INTSELECT (ELFIN_VIC0_BASE_ADDR + oINTSELECT)
+#define VIC0INTENABLE (ELFIN_VIC0_BASE_ADDR + oINTENABLE)
+#define VIC0INTENCLEAR (ELFIN_VIC0_BASE_ADDR + oINTENCLEAR)
+#define VIC0SOFTINT (ELFIN_VIC0_BASE_ADDR + oSOFTINT)
+#define VIC0SOFTINTCLEAR (ELFIN_VIC0_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC0PROTECTION (ELFIN_VIC0_BASE_ADDR + oPROTECTION)
+#define VIC0SWPRIORITYMASK (ELFIN_VIC0_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC0PRIORITYDAISY (ELFIN_VIC0_BASE_ADDR + oPRIORITYDAISY)
+#define VIC0VECTADDR(X) (ELFIN_VIC0_BASE_ADDR + oVECTADDR(X))
+#define VIC0VECPRIORITY(X) (ELFIN_VIC0_BASE_ADDR + oVECPRIORITY(X))
+#define VIC0VECTADDRESS (ELFIN_VIC0_BASE_ADDR + oVECTADDRESS)
+
+#define VIC1IRQSTATUS (ELFIN_VIC1_BASE_ADDR + oIRQSTATUS)
+#define VIC1FIQSTATUS (ELFIN_VIC1_BASE_ADDR + oFIQSTATUS)
+#define VIC1RAWINTR (ELFIN_VIC1_BASE_ADDR + oRAWINTR)
+#define VIC1INTSELECT (ELFIN_VIC1_BASE_ADDR + oINTSELECT)
+#define VIC1INTENABLE (ELFIN_VIC1_BASE_ADDR + oINTENABLE)
+#define VIC1INTENCLEAR (ELFIN_VIC1_BASE_ADDR + oINTENCLEAR)
+#define VIC1SOFTINT (ELFIN_VIC1_BASE_ADDR + oSOFTINT)
+#define VIC1SOFTINTCLEAR (ELFIN_VIC1_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC1PROTECTION (ELFIN_VIC1_BASE_ADDR + oPROTECTION)
+#define VIC1SWPRIORITYMASK (ELFIN_VIC1_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC1PRIORITYDAISY (ELFIN_VIC1_BASE_ADDR + oPRIORITYDAISY)
+#define VIC1VECTADDR(X) (ELFIN_VIC1_BASE_ADDR + oVECTADDR(X))
+#define VIC1VECPRIORITY(X) (ELFIN_VIC1_BASE_ADDR + oVECPRIORITY(X))
+#define VIC1VECTADDRESS (ELFIN_VIC1_BASE_ADDR + oVECTADDRESS)
+
+
+/* interrupt pending bit */
+#define IRQ_VIC0_BASE 0
+#define IRQ_VIC1_BASE 32
+#define IRQ_VIC0(X) (IRQ_VIC0_BASE + (X))
+#define IRQ_VIC1(X) (IRQ_VIC1_BASE + (X))
+#define IRQ_TOTAL 64
+
+/* VIC0 */
+#define IRQ_EINT0_3 IRQ_VIC0(0)
+#define IRQ_EINT4_11 IRQ_VIC0(1)
+#define IRQ_RTC_TIC IRQ_VIC0(2)
+#define IRQ_CAMIF_C IRQ_VIC0(3)
+#define IRQ_CAMIF_P IRQ_VIC0(4)
+#define IRQ_IIC1 IRQ_VIC0(5)
+#define IRQ_IIS IRQ_VIC0(6)
+#define IRQ_UNUSED7 IRQ_VIC0(7)
+#define IRQ_3D IRQ_VIC0(8)
+#define IRQ_POST0 IRQ_VIC0(9)
+#define IRQ_ROTATOR IRQ_VIC0(10)
+#define IRQ_2D IRQ_VIC0(11)
+#define IRQ_TVENC IRQ_VIC0(12)
+#define IRQ_SCALER IRQ_VIC0(13)
+#define IRQ_BATF IRQ_VIC0(14)
+#define IRQ_JPEG IRQ_VIC0(15)
+#define IRQ_MFC IRQ_VIC0(16)
+#define IRQ_SDMA0 IRQ_VIC0(17)
+#define IRQ_SDMA1 IRQ_VIC0(18)
+#define IRQ_ARM_DMAERR IRQ_VIC0(19)
+#define IRQ_ARM_DMA IRQ_VIC0(20)
+#define IRQ_ARM_DMAS IRQ_VIC0(21)
+#define IRQ_KEYPAD IRQ_VIC0(22)
+#define IRQ_TIMER0 IRQ_VIC0(23)
+#define IRQ_TIMER1 IRQ_VIC0(24)
+#define IRQ_TIMER2 IRQ_VIC0(25)
+#define IRQ_WDT IRQ_VIC0(26)
+#define IRQ_TIMER3 IRQ_VIC0(27)
+#define IRQ_TIMER4 IRQ_VIC0(28)
+#define IRQ_LCD_FIFO IRQ_VIC0(29)
+#define IRQ_LCD_VSYNC IRQ_VIC0(30)
+#define IRQ_LCD_SYSTEM IRQ_VIC0(31)
+
+/* VIC1 */
+#define IRQ_EINT12_19 IRQ_VIC1(0)
+#define IRQ_EINT20_27 IRQ_VIC1(1)
+#define IRQ_PCM0 IRQ_VIC1(2)
+#define IRQ_PCM1 IRQ_VIC1(3)
+#define IRQ_AC97 IRQ_VIC1(4)
+#define IRQ_UART0 IRQ_VIC1(5)
+#define IRQ_UART1 IRQ_VIC1(6)
+#define IRQ_UART2 IRQ_VIC1(7)
+#define IRQ_UART3 IRQ_VIC1(8)
+#define IRQ_DMA0 IRQ_VIC1(9)
+#define IRQ_DMA1 IRQ_VIC1(10)
+#define IRQ_ONENAND0 IRQ_VIC1(11)
+#define IRQ_ONENAND1 IRQ_VIC1(12)
+#define IRQ_NFC IRQ_VIC1(13)
+#define IRQ_CFC IRQ_VIC1(14)
+#define IRQ_USBH IRQ_VIC1(15)
+#define IRQ_SPI0 IRQ_VIC1(16)
+#define IRQ_SPI1 IRQ_VIC1(17)
+#define IRQ_IIC0 IRQ_VIC1(18)
+#define IRQ_HSItx IRQ_VIC1(19)
+#define IRQ_HSIrx IRQ_VIC1(20)
+#define IRQ_EINT4 IRQ_VIC1(21)
+#define IRQ_MSM IRQ_VIC1(22)
+#define IRQ_HOSTIF IRQ_VIC1(23)
+#define IRQ_HSMMC0 IRQ_VIC1(24)
+#define IRQ_HSMMC1 IRQ_VIC1(25)
+#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */
+#define IRQ_OTG IRQ_VIC1(26)
+#define IRQ_IRDA IRQ_VIC1(27)
+#define IRQ_RTC_ALARM IRQ_VIC1(28)
+#define IRQ_SEC IRQ_VIC1(29)
+#define IRQ_PENDN IRQ_VIC1(30)
+#define IRQ_TC IRQ_PENDN
+#define IRQ_ADC IRQ_VIC1(31)
+#define IRQ_ALLMSK (0xFFFFFFFF)
+
+
+#ifndef __ASSEMBLY__
+
+#define Fld(Size, Shft) (((Size) << 16) + (Shft))
+#define FSize(Field) ((Field) >> 16)
+#define FShft(Field) ((Field) & 0x0000FFFF)
+#define FMsk(Field) (((UData (1) << FSize(Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field) ((UData (1) << FSize(Field)) - 1)
+#define F1stBit(Field) (UData (1) << FShft(Field))
+
+#define FClrBit(Data, Bit) (Data = (Data & ~(Bit)))
+#define FClrFld(Data, Field) (Data = (Data & ~FMsk(Field)))
+
+#define FInsrt(Value, Field) (UData(Value) << FShft(Field))
+#define FExtr(Data, Field) ((UData(Data) >> FShft(Field)) & FAlnMsk(Field))
+
+
+typedef unsigned char u8;
+typedef unsigned short u16;
+typedef unsigned int u32;
+
+struct rt_hw_register
+{
+ unsigned int r0;
+ unsigned int r1;
+ unsigned int r2;
+ unsigned int r3;
+ unsigned int r4;
+ unsigned int r5;
+ unsigned int r6;
+ unsigned int r7;
+ unsigned int r8;
+ unsigned int r9;
+ unsigned int r10;
+ unsigned int fp;
+ unsigned int ip;
+ unsigned int sp;
+ unsigned int lr;
+ unsigned int pc;
+ unsigned int cpsr;
+ unsigned int ORIG_r0;
+};
+
+/* UART (see manual chapter 11) */
+typedef struct {
+ volatile u32 ULCON;
+ volatile u32 UCON;
+ volatile u32 UFCON;
+ volatile u32 UMCON;
+ volatile u32 UTRSTAT;
+ volatile u32 UERSTAT;
+ volatile u32 UFSTAT;
+ volatile u32 UMSTAT;
+#ifdef __BIG_ENDIAN
+ volatile u8 res1[3];
+ volatile u8 UTXH;
+ volatile u8 res2[3];
+ volatile u8 URXH;
+#else /* Little Endian */
+ volatile u8 UTXH;
+ volatile u8 res1[3];
+ volatile u8 URXH;
+ volatile u8 res2[3];
+#endif
+ volatile u32 UBRDIV;
+#ifdef __BIG_ENDIAN
+ volatile u8 res3[2];
+ volatile u16 UDIVSLOT;
+#else
+ volatile u16 UDIVSLOT;
+ volatile u8 res3[2];
+#endif
+} s3c64xx_uart;
+
+enum s3c64xx_uarts_nr
+{
+ S3C64XX_UART0,
+ S3C64XX_UART1,
+ S3C64XX_UART2,
+};
+
+static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+{
+ return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+}
+
+static inline unsigned char s3c_readb(unsigned int addr)
+{
+ return *(volatile unsigned char *)(addr);
+}
+static inline unsigned short s3c_readw(unsigned int addr)
+{
+ return *(volatile unsigned short *)(addr);
+}
+static inline unsigned int s3c_readl(unsigned int addr)
+{
+ return *(volatile unsigned int *)(addr);
+}
+static inline void s3c_writeb(unsigned char bval, unsigned int addr)
+{
+ *(volatile unsigned char *)(addr) = bval;
+}
+static inline void s3c_writew(unsigned short wval, unsigned int addr)
+{
+ *(volatile unsigned short *)(addr) = wval;
+}
+static inline void s3c_writel(unsigned int lval, unsigned int addr)
+{
+ *(volatile unsigned int *)(addr) = lval;
+}
+
+#endif /* end of __ASSEMBLY__ */
+
+
+#endif /*__S3C6410_H__*/
diff --git a/ok6410/src/bootloader/asm/myboot/serial.c b/ok6410/src/bootloader/asm/myboot/serial.c
new file mode 100644
index 0000000..dfd8782
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/serial.c
@@ -0,0 +1,95 @@
+/********************************************************************************************
+ * File: serial.c
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: The UART on board drivers/functions.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 22:58:49 CST 2013"
+ *
+ *******************************************************************************************/
+
+#include "s3c6410.h"
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+int serial_init(int baudrate)
+{
+ unsigned int regv;
+
+ s3c64xx_uart *const uart = s3c64xx_get_base_uart(S3C64XX_UART0);
+
+ /* UART I/O port initialize: GPA0->RXD0, GPA1->TXD0) */
+ regv = s3c_readl(GPACON);
+ regv = (regv & ~(0xff<<0)) | (0x22<<0);
+ s3c_writel(regv, GPACON);
+
+ /* RXD0: Pull-down, TXD0: pull up/down disable */
+ regv = s3c_readl(GPAPUD);
+ regv = (regv & ~(0xf<<0)) | (0x1<<0);
+ s3c_writel(regv, GPAPUD);
+
+ /* Normal Mode, No Parity, 1 Stop Bit, 8 Bit Data */
+ uart->ULCON = 3;
+
+ /* PCLK divide, Polling Mode */
+ uart->UCON = (0x2<<10) | (1<<9) | (1<<8) | (1<<2) | (1<<0);
+ uart->UFCON = 0; /* Disable FIFO */
+ uart->UMCON = 0; /* Disable Auto Flow Control */
+
+ /* Baudrate, DIV=PCLK/(bps*16)-1=66000000/(115200*16)-1 = 34; */
+ s3c_writel(34, UBRDIV0);
+
+ for (regv=0; regv<0x100; regv++) ;
+
+ uart->UDIVSLOT = 0x80;
+
+ return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+ s3c64xx_uart *const uart = s3c64xx_get_base_uart(S3C64XX_UART0);
+
+ /* wait for character to arrive */
+ while (!(uart->UTRSTAT & 0x1)) ;
+
+ return uart->URXH & 0xff;
+}
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+ s3c64xx_uart *const uart = s3c64xx_get_base_uart(S3C64XX_UART0);
+
+ /* wait for room in the tx FIFO */
+ while (!(uart->UTRSTAT & 0x2));
+
+ uart->UTXH = c;
+ if (c == '\n') serial_putc('\r'); /* If \n, also do \r */
+}
+
+/*
+ * Test whether a character is in the RX buffer
+ */
+int serial_tstc(void)
+{
+ s3c64xx_uart *const uart = s3c64xx_get_base_uart(S3C64XX_UART0);
+ return uart->UTRSTAT & 0x1;
+}
+
+
+void serial_puts(const char *s)
+{
+ while (*s)
+ serial_putc(*s++);
+}
+
+
diff --git a/ok6410/src/bootloader/asm/myboot/serial.h b/ok6410/src/bootloader/asm/myboot/serial.h
new file mode 100644
index 0000000..954673f
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/serial.h
@@ -0,0 +1,17 @@
+/********************************************************************************************
+ * File: serial.h
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: The UART on board drivers/functions.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 22:58:49 CST 2013"
+ *
+ *******************************************************************************************/
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+int serial_init(int baudrate);
+void serial_putc(const char ch);
+void serial_puts(const char *str);
+
+#endif /* end of __SERIAL_H__ */
diff --git a/ok6410/src/bootloader/asm/myboot/start.S b/ok6410/src/bootloader/asm/myboot/start.S
new file mode 100644
index 0000000..29e2d17
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/start.S
@@ -0,0 +1,64 @@
+/***********************************************************************
+ * File: start.S
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This ASM used to disable watch dog and interrupt, and initialise
+ * the system clock and DDR SDRAM.
+ * ChangeLog: 1, Release initial version on "Sun Feb 24 15:06:12 CST 2013"
+ *
+ ***********************************************************************/
+
+#include "s3c6410.h"
+
+ .section .init, "ax"
+ .global _start
+
+_start:
+ /* Enable Instruction Cache */
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7, 0 /* Invalidate Entire I&D Cache */
+ mrc p15, 0, r0, c1, c0, 0 /* Enable I Cache */
+ orr r0, r0, #R1_I
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* disable vector interrupt */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #(1<<24)
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* Peri port setup */
+ ldr r0, =ELFIN_SROM_BASE
+ orr r0, r0, #0x13
+ mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff)
+
+ /* Disable watchdog */
+ ldr r0, =WTCON
+ mov r1, #0
+ str r1, [r0]
+
+ /* disable all interrupt */
+ ldr r0, =VIC0INTENCLEAR
+ ldr r1, =0xFFFFFFFF;
+ str r1, [r0]
+ ldr r1, =VIC1INTENCLEAR
+ str r1, [r0]
+
+ bl system_clock_init /* setup clock */
+ bl mem_ctrl_asm_init /* initialize DDR RAM */
+
+ /* clear BSS */
+ mov r0, #0
+ ldr r1, =__bss_start
+ ldr r2, =__bss_end
+_bss_loop:
+ cmp r1, r2
+ strlo r0, [r1], #4
+ blo _bss_loop
+
+ /* Setup Stack */
+ ldr sp, =8*1024
+ bl main
+
+halt:
+ b halt
+
diff --git a/ok6410/src/bootloader/asm/myboot/xmodem.c b/ok6410/src/bootloader/asm/myboot/xmodem.c
new file mode 100644
index 0000000..20d5ecc
--- /dev/null
+++ b/ok6410/src/bootloader/asm/myboot/xmodem.c
@@ -0,0 +1,122 @@
+/********************************************************************************************
+ * File: xmodem.c
+ * Version: 1.0.0
+ * Copyright: 2011 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: Xmodem protocal used to download the second stage bootloader(launcher)
+ * ChangeLog: 1, Release initial version on "Tue Jul 12 16:43:18 CST 2011"
+ *
+ *******************************************************************************************/
+
+#include "common.h"
+
+#define XMODEM_SOH 0x01 /*Start Of Header, standard Xmodem */
+#define XMODEM_STX 0x02 /*1K-Modem start Xmodem */
+#define XMODEM_EOT 0x04 /*End Of Transmission */
+#define XMODEM_ACK 0x06
+#define XMODEM_NAK 0x15
+#define XMODEM_CAN 0x18 /*Stop transmission */
+#define XMODEM_EOF 0x1a /*CTRL+Z EOF */
+
+#define XMODEM_BLOCK_SIZE 128
+
+static int xmodem_wait(void)
+{
+ long cnt = 0;
+
+ while (!serial_tstc())
+ {
+ if (++cnt >= 20000000)
+ {
+ cnt = 0;
+ serial_putc(XMODEM_NAK);
+ }
+ }
+
+ return 0;
+}
+
+static int xmodem_read_block(unsigned char block_number, char *buf)
+{
+ unsigned char c, block_num, check_sum;
+ int i;
+
+ block_num = serial_getc();
+ if (block_num != block_number)
+ return -1;
+
+ block_num ^= serial_getc();
+ if (block_num != 0xff)
+ return -1;
+
+ check_sum = 0;
+ for (i = 0; i < XMODEM_BLOCK_SIZE; i++)
+ {
+ c = serial_getc();
+ *(buf++) = c;
+ check_sum += c;
+ }
+
+ check_sum ^= serial_getc();
+ if (check_sum)
+ return -1;
+
+ return i;
+}
+
+long xmodem_recv(char *buf)
+{
+ int r, receiving = 0;
+ long size = 0;
+ unsigned char c, block_number = 1;
+
+ while (1)
+ {
+ if (!receiving)
+ xmodem_wait();
+
+ c = serial_getc();
+
+ switch (c)
+ {
+ case XMODEM_EOT:
+ serial_putc(XMODEM_ACK);
+
+ /*Remove the CMPEOF */
+ long cnt = 0;
+ if ((buf[-1] == XMODEM_EOF) && (buf[-2] == XMODEM_EOF) && (buf[-3] == XMODEM_EOF))
+ {
+ while (size && buf[-cnt - 1] == XMODEM_EOF)
+ cnt++;
+ }
+
+ size -= cnt;
+ goto RECV_OK;
+
+ case XMODEM_CAN:
+ return -1;
+
+ case XMODEM_SOH:
+ receiving++;
+ r = xmodem_read_block(block_number, buf);
+ if (r < 0)
+ {
+ serial_putc(XMODEM_NAK);
+ }
+ else
+ {
+ block_number++;
+ size += r;
+ buf += r;
+ serial_putc(XMODEM_ACK);
+ }
+ break;
+
+ default:
+ if (receiving)
+ return -1;
+ }
+ }
+
+ RECV_OK:
+ return size;
+}
diff --git a/ok6410/src/bootloader/bootstrap/makefile b/ok6410/src/bootloader/bootstrap/makefile
new file mode 100644
index 0000000..d7a1ecb
--- /dev/null
+++ b/ok6410/src/bootloader/bootstrap/makefile
@@ -0,0 +1,51 @@
+# ***********************************************************************
+# * File: makefile
+# * Version: 1.0.0
+# * Copyright: 2011 (c) Guo Wenxue <guowenxue@gmail.com>
+# * Description: Makefile used to cross compile the ASM and C source code
+# * ChangeLog: 1, Release initial version on "Mon Mar 21 21:09:52 CST 2011"
+# *
+# ***********************************************************************
+
+BINAME = bootstrap-s3c6410
+TEXTBASE = 0x0C000000
+
+CROSS = /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+#CROSS = /opt/crosstool/arm-arm1176jzfs-linux-gnueabi/bin/arm-linux-
+CC = $(CROSS)gcc
+LD = $(CROSS)ld
+AR = $(CROSS)ar
+OBJCOPY = $(CROSS)objcopy
+OBJDUMP = $(CROSS)objdump
+STRIP = $(CROSS)strip
+READELF = $(CROSS)readelf
+
+CFLAGS = -g -O2 -Wall -nostdinc -nostdlib -fno-builtin
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+LDFLAGS = -Ttext $(TEXTBASE)
+
+SRC_C = $(wildcard *.c)
+SRC_S = $(wildcard *.S)
+OBJ_C = $(patsubst %.c,%.o,$(SRC_C))
+OBJ_S = $(patsubst %.S,%.o,$(SRC_S))
+
+OBJ_ALL = $(OBJ_C) $(OBJ_S)
+
+.PHONY : all
+all: ${OBJ_ALL}
+ ${LD} $(LDFLAGS) -o ${BINAME}.elf ${OBJ_ALL}
+ ${OBJCOPY} -O binary -S ${BINAME}.elf ${BINAME}.bin
+ rm -f *.elf *.o
+
+%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+install:
+ cp ${BINAME}.bin /tftp -f --reply=yes
+
+clean:
+ rm -f *.elf *.o
+ rm -f ${BINAME}.bin ${BINAME}.maps
diff --git a/ok6410/src/bootloader/bootstrap/s3c6410.h b/ok6410/src/bootloader/bootstrap/s3c6410.h
new file mode 100644
index 0000000..924a29d
--- /dev/null
+++ b/ok6410/src/bootloader/bootstrap/s3c6410.h
@@ -0,0 +1,1536 @@
+/* **********************************************************************
+ * File: s3c6410.h
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This is head file is for s3c6410 common register definition
+ * and some common funciton.
+ * ChangeLog: 1, Release initial version on "Mon Feb 25 11:58:42 CST 2013"
+ *
+ ************************************************************************/
+#ifndef __S3C6410_H__
+#define __S3C6410_H__
+
+#define MEMORY_BASE_ADDRESS 0x50000000
+#define CONFIG_SYS_CLK_FREQ 12000000 /* the OK6410 has 12MHz input clock of PLL */
+#define CONFIG_BAUDRATE 115200 /* Default serial port baudrate */
+#define CONFIG_STACKSIZE 512
+#define S_FRAME_SIZE 72
+
+#define CONFIG_CLK_532_133_66 1 /* CLK:532, HCLKx2:266 HCLK:133, PCLK:66 */
+//#define CONFIG_SYNC_MODE /* Refer to datasheet P142: FOUT = MDIV x FIN / (PDIV X 2SDIV) */
+//#define CONFIG_CLK_667_133_66 1 /* CLK:667, HCLKx2:266 HCLK:133, PCLK:66 */
+
+#ifdef CONFIG_CLK_667_133_66
+#undef CONFIG_SYNC_MODE
+#endif
+
+#define set_pll(mdiv, pdiv, sdiv) ((1<<31) | (mdiv<<16) | (pdiv<<8) | sdiv)
+
+#ifdef CONFIG_CLK_532_133_66
+/* APLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 266*12MHz/(3*2^1) = 532MHz */
+#define APLL_MDIV 266
+#define APLL_PDIV 3
+#define APLL_SDIV 1
+#elif defined(CONFIG_CLK_667_133_66)
+/* APLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 333*12MHz/(3*2^1) = 667MHz */
+#define APLL_MDIV 333
+#define APLL_PDIV 3
+#define APLL_SDIV 1
+#endif
+#define APLL_VAL set_pll(APLL_MDIV, APLL_PDIV, APLL_SDIV)
+#define Startup_APLL (CONFIG_SYS_CLK_FREQ/(APLL_PDIV<<APLL_SDIV)*APLL_MDIV)
+
+#ifdef CONFIG_CLK_532_133_66
+/* MPLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 266*12MHz/(3*2^1) = 532MHz */
+#define MPLL_MDIV 266
+#define MPLL_PDIV 3
+#define MPLL_SDIV 1
+#elif defined(CONFIG_CLK_667_133_66)
+/* MPLL = FOUT = MDIV X FIN / (PDIV X 2^SDIV) = 333*12MHz/(3*2^1) = 667MHz */
+#define MPLL_MDIV 333
+#define MPLL_PDIV 3
+#define MPLL_SDIV 1
+#endif
+#define MPLL_VAL set_pll(MPLL_MDIV, MPLL_PDIV, MPLL_SDIV)
+#define Startup_MPLL ((CONFIG_SYS_CLK_FREQ)/(MPLL_PDIV<<MPLL_SDIV)*MPLL_MDIV)
+
+/* FOUT = (MDIV+KDIV/2^16) X FIN / (PDIV X 2^SDIV)
+ * = (254+0/2^16) x 12MHz / (9 x 2^2)
+ * = 254 x 12MHz / 36 = 84.67MHz
+ */
+#define EPLL_MDIV 254
+#define EPLL_PDIV 9
+#define EPLL_SDIV 2
+#define EPLL_KDIV 0
+#define EPLL_VAL set_pll(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV)
+#define EPLL_KVAL EPLL_KDIV
+
+#define Startup_PCLKdiv 3 /* PCLK = HCLKX2 / (PCLK_RATIO + 1) = HCLKX2IN/4 */
+#define Startup_HCLKx2div 1 /* HCLKX2 = HCLKX2IN / (HCLKX2_RATIO+1) = HCLKX2IN/2 */
+#define Startup_HCLKdiv 1 /* HCLK = HCLKX2 / (HCLK_RATIO+1) = HCLKX2/2 */
+#define Startup_MPLLdiv 1 /* DOUTMPLL = MOUTMPLL / (MPLL_RATIO+1) = DOUTMPLL/2 */
+#define Startup_APLLdiv 0 /* ARMCLK = DOUTAPLL / (ARM_RATIO+1) = DOUTAPLL*/
+
+#define CLK_DIV_VAL ((Startup_PCLKdiv<<12)|(Startup_HCLKx2div<<9)|(Startup_HCLKdiv<<8)\
+ |(Startup_MPLLdiv<<4)|Startup_APLLdiv)
+
+#ifdef CONFIG_SYNC_MODE
+#define Startup_HCLK (Startup_APLL/(Startup_HCLKx2div+1)/(Startup_HCLKdiv+1))
+#define Startup_PCLK (Startup_APLL/(Startup_HCLKx2div+1)/(Startup_PCLKdiv+1))
+#else /* !CONFIG_SYNC_MODE */
+#define Startup_HCLK (Startup_MPLL/(Startup_HCLKx2div+1)/(Startup_HCLKdiv+1))
+#define Startup_PCLK (Startup_MPLL/(Startup_HCLKx2div+1)/(Startup_PCLKdiv+1))
+#endif /* end of CONFIG_SYNC_MODE */
+
+
+// FRIENDLYARM_BOOT_RAM256
+#define DMC1_MEM_CFG ((1<<30) | (2<<15) | (3<<3) | (2<<0))
+#define DMC1_CHIP0_CFG 0x150F0
+#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
+
+// Physical Memory Map
+#define DMC1_MEM_CFG2 0xB41
+#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */
+
+/* DDR Parameters */
+#define DDR_tREFRESH 7800 /* ns */
+#define DDR_tRAS 45 /* ns (min: 45ns)*/
+#define DDR_tRC 68 /* ns (min: 67.5ns)*/
+#define DDR_tRCD 23 /* ns (min: 22.5ns)*/
+#define DDR_tRFC 80 /* ns (min: 80ns)*/
+#define DDR_tRP 23 /* ns (min: 22.5ns)*/
+#define DDR_tRRD 15 /* ns (min: 15ns)*/
+#define DDR_tWR 15 /* ns (min: 15ns)*/
+#define DDR_tXSR 120 /* ns (min: 120ns)*/
+#define DDR_CASL 3 /* CAS Latency 3 */
+
+// mDDR memory configuration
+#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
+#define DMC_DDR_BA_EMRS 2
+#define DMC_DDR_MEM_CASLAT 3
+#define DMC_DDR_CAS_LATENCY (DDR_CASL<<1)
+#define DMC_DDR_t_DQSS 1
+#define DMC_DDR_t_MRD 2
+#define DMC_DDR_t_RAS (((Startup_HCLK / 1000 * DDR_tRAS) - 1) / 1000000 + 1) //7, Min 45ns
+#define DMC_DDR_t_RC (((Startup_HCLK / 1000 * DDR_tRC) - 1) / 1000000 + 1) //10, Min 67.5ns
+#define DMC_DDR_t_RCD (((Startup_HCLK / 1000 * DDR_tRCD) - 1) / 1000000 + 1) //4,5(TRM), Min 22.5ns
+#define DMC_DDR_schedule_RCD ((DMC_DDR_t_RCD - 3) << 3)
+#define DMC_DDR_t_RFC (((Startup_HCLK / 1000 * DDR_tRFC) - 1) / 1000000 + 1) //11,18(TRM) Min 80ns
+#define DMC_DDR_schedule_RFC ((DMC_DDR_t_RFC - 3) << 5)
+#define DMC_DDR_t_RP (((Startup_HCLK / 1000 * DDR_tRP) - 1) / 1000000 + 1) //4, 5(TRM) Min 22.5ns
+#define DMC_DDR_schedule_RP ((DMC_DDR_t_RP - 3) << 3)
+#define DMC_DDR_t_RRD (((Startup_HCLK / 1000 * DDR_tRRD) - 1) / 1000000 + 1) //3, Min 15ns
+#define DMC_DDR_t_WR (((Startup_HCLK / 1000 * DDR_tWR) - 1) / 1000000 + 1) //Min 15ns
+#define DMC_DDR_t_WTR 2
+#define DMC_DDR_t_XP 2 //1tck + tIS(1.5ns)
+#define DMC_DDR_t_XSR (((Startup_HCLK / 1000 * DDR_tXSR) - 1) / 1000000 + 1) //17, Min 120ns
+#define DMC_DDR_t_ESR DMC_DDR_t_XSR
+#define DMC_DDR_REFRESH_PRD (((Startup_HCLK / 1000 * DDR_tREFRESH) - 1) / 1000000) // TRM 2656
+#define DMC_DDR_USER_CONFIG 1 // 2b01 : mDDR
+
+
+
+#define S3C64XX_UART_CHANNELS 3
+#define S3C64XX_SPI_CHANNELS 2
+
+#define BIT(X) (1<<(X))
+
+#define ROM_BASE0 0x00000000 /* base address of rom bank 0 */
+#define ROM_BASE1 0x04000000 /* base address of rom bank 1 */
+#define DRAM_BASE0 0x40000000 /* base address of dram bank 0 */
+#define DRAM_BASE1 0x50000000 /* base address of dram bank 1 */
+
+#define S_OLD_R0 68
+#define S_PSR 64
+#define S_PC 60
+#define S_LR 56
+#define S_SP 52
+
+#define S_IP 48
+#define S_FP 44
+#define S_R10 40
+#define S_R9 36
+#define S_R8 32
+#define S_R7 28
+#define S_R6 24
+#define S_R5 20
+#define S_R4 16
+#define S_R3 12
+#define S_R2 8
+#define S_R1 4
+#define S_R0 0
+
+
+/*****************************/
+/* CPU Mode */
+/*****************************/
+#define USERMODE 0x10
+#define FIQMODE 0x11
+#define IRQMODE 0x12
+#define SVCMODE 0x13
+#define ABORTMODE 0x17
+#define UNDEFMODE 0x1b
+#define MODEMASK 0x1f
+#define NOINT 0xc0
+
+/*****************************/
+/* CP15 Mode Bit Definition */
+/*****************************/
+#define R1_iA (1<<31)
+#define R1_nF (1<<30)
+#define R1_VE (1<<24)
+#define R1_I (1<<12)
+#define R1_BP (1<<11) /* Z bit */
+#define R1_C (1<<2)
+#define R1_A (1<<1)
+#define R1_M (1<<0)
+
+#define RAM_BASE 0x50000000 /*Start address of DDR RAM */
+#define ROM_BASE 0x00000000 /*Start address of Flash */
+
+
+
+/* S3C6400 device base addresses */
+#define ELFIN_DMA_BASE 0x75000000
+#define ELFIN_LCD_BASE 0x77100000
+#define ELFIN_USB_HOST_BASE 0x74300000
+#define ELFIN_I2C_BASE 0x7f004000
+#define ELFIN_I2S_BASE 0x7f002000
+#define ELFIN_ADC_BASE 0x7e00b000
+#define ELFIN_SPI_BASE 0x7f00b000
+#define ELFIN_HSMMC_0_BASE 0x7c200000
+#define ELFIN_HSMMC_1_BASE 0x7c300000
+#define ELFIN_HSMMC_2_BASE 0x7c400000
+
+
+/* Clock & Power Controller for mDirac3*/
+#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
+
+#define oAPLL_LOCK 0x00
+#define oMPLL_LOCK 0x04
+#define oEPLL_LOCK 0x08
+#define oAPLL_CON 0x0C
+#define oMPLL_CON 0x10
+#define oEPLL_CON0 0x14
+#define oEPLL_CON1 0x18
+#define oCLK_SRC 0x1C
+#define oCLK_DIV0 0x20
+#define oCLK_DIV1 0x24
+#define oCLK_DIV2 0x28
+#define oCLK_OUT 0x2C
+#define oHCLK_GATE 0x30
+#define oPCLK_GATE 0x34
+#define oSCLK_GATE 0x38
+#define oAHB_CON0 0x100
+#define oAHB_CON1 0x104
+#define oAHB_CON2 0x108
+#define oSELECT_DMA 0x110
+#define oSW_RST 0x114
+#define oSYS_ID 0x118
+#define oMEM_SYS_CFG 0x120
+#define oQOS_OVERRIDE0 0x124
+#define oQOS_OVERRIDE1 0x128
+#define oMEM_CFG_STAT 0x12C
+#define oPWR_CFG 0x804
+#define oEINT_MASK 0x808
+#define oNOR_CFG 0x810
+#define oSTOP_CFG 0x814
+#define oSLEEP_CFG 0x818
+#define oOSC_FREQ 0x820
+#define oOSC_STABLE 0x824
+#define oPWR_STABLE 0x828
+#define oFPC_STABLE 0x82C
+#define oMTC_STABLE 0x830
+#define oOTHERS 0x900
+#define oRST_STAT 0x904
+#define oWAKEUP_STAT 0x908
+#define oBLK_PWR_STAT 0x90C
+#define oINF_REG0 0xA00
+#define oINF_REG1 0xA04
+#define oINF_REG2 0xA08
+#define oINF_REG3 0xA0C
+#define oINF_REG4 0xA10
+#define oINF_REG5 0xA14
+#define oINF_REG6 0xA18
+#define oINF_REG7 0xA1C
+
+#define oOSC_CNT_VAL 0x824
+#define oPWR_CNT_VAL 0x828
+#define oFPC_CNT_VAL 0x82C
+#define oMTC_CNT_VAL 0x830
+
+#define APLL_LOCK (ELFIN_CLOCK_POWER_BASE + oAPLL_LOCK)
+#define MPLL_LOCK (ELFIN_CLOCK_POWER_BASE + oMPLL_LOCK)
+#define EPLL_LOCK (ELFIN_CLOCK_POWER_BASE + oEPLL_LOCK)
+#define APLL_CON (ELFIN_CLOCK_POWER_BASE + oAPLL_CON)
+#define MPLL_CON (ELFIN_CLOCK_POWER_BASE + oMPLL_CON)
+#define EPLL_CON0 (ELFIN_CLOCK_POWER_BASE + oEPLL_CON0)
+#define EPLL_CON1 (ELFIN_CLOCK_POWER_BASE + oEPLL_CON1)
+#define CLK_SRC (ELFIN_CLOCK_POWER_BASE + oCLK_SRC)
+#define CLK_DIV0 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV0)
+#define CLK_DIV1 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV1)
+#define CLK_DIV2 (ELFIN_CLOCK_POWER_BASE + oCLK_DIV2)
+#define CLK_OUT (ELFIN_CLOCK_POWER_BASE + oCLK_OUT)
+#define HCLK_GATE (ELFIN_CLOCK_POWER_BASE + oHCLK_GATE)
+#define PCLK_GATE (ELFIN_CLOCK_POWER_BASE + oPCLK_GATE)
+#define SCLK_GATE (ELFIN_CLOCK_POWER_BASE + oSCLK_GATE)
+#define AHB_CON0 (ELFIN_CLOCK_POWER_BASE + oAHB_CON0)
+#define AHB_CON1 (ELFIN_CLOCK_POWER_BASE + oAHB_CON1)
+#define AHB_CON2 (ELFIN_CLOCK_POWER_BASE + oAHB_CON2)
+#define SELECT_DMA (ELFIN_CLOCK_POWER_BASE + oSELECT_DMA)
+#define SW_RST (ELFIN_CLOCK_POWER_BASE + oSW_RST)
+#define SYS_ID (ELFIN_CLOCK_POWER_BASE + oSYS_ID)
+#define MEM_SYS_CFG (ELFIN_CLOCK_POWER_BASE + oMEM_SYS_CFG)
+#define QOS_OVERRIDE0 (ELFIN_CLOCK_POWER_BASE + oQOS_OVERRIDE0)
+#define QOS_OVERRIDE1 (ELFIN_CLOCK_POWER_BASE + oQOS_OVERRIDE1)
+#define MEM_CFG_STAT (ELFIN_CLOCK_POWER_BASE + oMEM_CFG_STAT)
+#define PWR_CFG (ELFIN_CLOCK_POWER_BASE + oPWR_CFG)
+#define EINT_MASK (ELFIN_CLOCK_POWER_BASE + oEINT_MASK)
+#define NOR_CFG (ELFIN_CLOCK_POWER_BASE + oNOR_CFG)
+#define STOP_CFG (ELFIN_CLOCK_POWER_BASE + oSTOP_CFG)
+#define SLEEP_CFG (ELFIN_CLOCK_POWER_BASE + oSLEEP_CFG)
+#define OSC_FREQ (ELFIN_CLOCK_POWER_BASE + oOSC_FREQ)
+#define OSC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oOSC_CNT_VAL)
+#define PWR_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oPWR_CNT_VAL)
+#define FPC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oFPC_CNT_VAL)
+#define MTC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + oMTC_CNT_VAL)
+#define OTHERS (ELFIN_CLOCK_POWER_BASE + oOTHERS)
+#define RST_STAT (ELFIN_CLOCK_POWER_BASE + oRST_STAT)
+#define WAKEUP_STAT (ELFIN_CLOCK_POWER_BASE + oWAKEUP_STAT)
+#define BLK_PWR_STAT (ELFIN_CLOCK_POWER_BASE + oBLK_PWR_STAT)
+#define INF_REG0 (ELFIN_CLOCK_POWER_BASE + oINF_REG0)
+#define INF_REG1 (ELFIN_CLOCK_POWER_BASE + oINF_REG1)
+#define INF_REG2 (ELFIN_CLOCK_POWER_BASE + oINF_REG2)
+#define INF_REG3 (ELFIN_CLOCK_POWER_BASE + oINF_REG3)
+#define INF_REG4 (ELFIN_CLOCK_POWER_BASE + oINF_REG4)
+#define INF_REG5 (ELFIN_CLOCK_POWER_BASE + oINF_REG5)
+#define INF_REG6 (ELFIN_CLOCK_POWER_BASE + oINF_REG6)
+#define INF_REG7 (ELFIN_CLOCK_POWER_BASE + oINF_REG7)
+
+
+/*
+ * GPIO
+ */
+#define ELFIN_GPIO_BASE 0x7f008000
+
+#define oGPACON 0x00
+#define oGPADAT 0x04
+#define oGPAPUD 0x08
+#define oGPACONSLP 0x0C
+#define oGPAPUDSLP 0x10
+#define oGPBCON 0x20
+#define oGPBDAT 0x24
+#define oGPBPUD 0x28
+#define oGPBCONSLP 0x2C
+#define oGPBPUDSLP 0x30
+#define oGPCCON 0x40
+#define oGPCDAT 0x44
+#define oGPCPUD 0x48
+#define oGPCCONSLP 0x4C
+#define oGPCPUDSLP 0x50
+#define oGPDCON 0x60
+#define oGPDDAT 0x64
+#define oGPDPUD 0x68
+#define oGPDCONSLP 0x6C
+#define oGPDPUDSLP 0x70
+#define oGPECON 0x80
+#define oGPEDAT 0x84
+#define oGPEPUD 0x88
+#define oGPECONSLP 0x8C
+#define oGPEPUDSLP 0x90
+#define oGPFCON 0xA0
+#define oGPFDAT 0xA4
+#define oGPFPUD 0xA8
+#define oGPFCONSLP 0xAC
+#define oGPFPUDSLP 0xB0
+#define oGPGCON 0xC0
+#define oGPGDAT 0xC4
+#define oGPGPUD 0xC8
+#define oGPGCONSLP 0xCC
+#define oGPGPUDSLP 0xD0
+#define oGPHCON0 0xE0
+#define oGPHCON1 0xE4
+#define oGPHDAT 0xE8
+#define oGPHPUD 0xEC
+#define oGPHCONSLP 0xF0
+#define oGPHPUDSLP 0xF4
+#define oGPICON 0x100
+#define oGPIDAT 0x104
+#define oGPIPUD 0x108
+#define oGPICONSLP 0x10C
+#define oGPIPUDSLP 0x110
+#define oGPJCON 0x120
+#define oGPJDAT 0x124
+#define oGPJPUD 0x128
+#define oGPJCONSLP 0x12C
+#define oGPJPUDSLP 0x130
+#define oSPCON 0x1A0
+#define oMEM0DRVCON 0x1D0
+#define oMEM1DRVCON 0x1D4
+#define oGPKCON0 0x800
+#define oGPKCON1 0x804
+#define oGPKDAT 0x808
+#define oGPKPUD 0x80C
+#define oGPLCON0 0x810
+#define oGPLCON1 0x814
+#define oGPLDAT 0x818
+#define oGPLPUD 0x81C
+#define oGPMCON 0x820
+#define oGPMDAT 0x824
+#define oGPMPUD 0x828
+#define oGPNCON 0x830
+#define oGPNDAT 0x834
+#define oGPNPUD 0x838
+#define oGPOCON 0x140
+#define oGPODAT 0x144
+#define oGPOPUD 0x148
+#define oGPOCONSLP 0x14C
+#define oGPOPUDSLP 0x150
+#define oGPPCON 0x160
+#define oGPPDAT 0x164
+#define oGPPPUD 0x168
+#define oGPPCONSLP 0x16C
+#define oGPPPUDSLP 0x170
+#define oGPQCON 0x180
+#define oGPQDAT 0x184
+#define oGPQPUD 0x188
+#define oGPQCONSLP 0x18C
+#define oGPQPUDSLP 0x190
+#define oEINTPEND 0x924
+
+#define GPACON (ELFIN_GPIO_BASE + oGPACON)
+#define GPADAT (ELFIN_GPIO_BASE + oGPADAT)
+#define GPAPUD (ELFIN_GPIO_BASE + oGPAPUD)
+#define GPACONSLP (ELFIN_GPIO_BASE + oGPACONSLP)
+#define GPAPUDSLP (ELFIN_GPIO_BASE + oGPAPUDSLP)
+#define GPBCON (ELFIN_GPIO_BASE + oGPBCON)
+#define GPBDAT (ELFIN_GPIO_BASE + oGPBDAT)
+#define GPBPUD (ELFIN_GPIO_BASE + oGPBPUD)
+#define GPBCONSLP (ELFIN_GPIO_BASE + oGPBCONSLP)
+#define GPBPUDSLP (ELFIN_GPIO_BASE + oGPBPUDSLP)
+#define GPCCON (ELFIN_GPIO_BASE + oGPCCON)
+#define GPCDAT (ELFIN_GPIO_BASE + oGPCDAT)
+#define GPCPUD (ELFIN_GPIO_BASE + oGPCPUD)
+#define GPCCONSLP (ELFIN_GPIO_BASE + oGPCCONSLP)
+#define GPCPUDSLP (ELFIN_GPIO_BASE + oGPCPUDSLP)
+#define GPDCON (ELFIN_GPIO_BASE + oGPDCON)
+#define GPDDAT (ELFIN_GPIO_BASE + oGPDDAT)
+#define GPDPUD (ELFIN_GPIO_BASE + oGPDPUD)
+#define GPDCONSLP (ELFIN_GPIO_BASE + oGPDCONSLP)
+#define GPDPUDSLP (ELFIN_GPIO_BASE + oGPDPUDSLP)
+#define GPECON (ELFIN_GPIO_BASE + oGPECON)
+#define GPEDAT (ELFIN_GPIO_BASE + oGPEDAT)
+#define GPEPUD (ELFIN_GPIO_BASE + oGPEPUD)
+#define GPECONSLP (ELFIN_GPIO_BASE + oGPECONSLP)
+#define GPEPUDSLP (ELFIN_GPIO_BASE + oGPEPUDSLP)
+#define GPFCON (ELFIN_GPIO_BASE + oGPFCON)
+#define GPFDAT (ELFIN_GPIO_BASE + oGPFDAT)
+#define GPFPUD (ELFIN_GPIO_BASE + oGPFPUD)
+#define GPFCONSLP (ELFIN_GPIO_BASE + oGPFCONSLP)
+#define GPFPUDSLP (ELFIN_GPIO_BASE + oGPFPUDSLP)
+#define GPGCON (ELFIN_GPIO_BASE + oGPGCON)
+#define GPGDAT (ELFIN_GPIO_BASE + oGPGDAT)
+#define GPGPUD (ELFIN_GPIO_BASE + oGPGPUD)
+#define GPGCONSLP (ELFIN_GPIO_BASE + oGPGCONSLP)
+#define GPGPUDSLP (ELFIN_GPIO_BASE + oGPGPUDSLP)
+#define GPHCON0 (ELFIN_GPIO_BASE + oGPHCON0)
+#define GPHCON1 (ELFIN_GPIO_BASE + oGPHCON1)
+#define GPHDAT (ELFIN_GPIO_BASE + oGPHDAT)
+#define GPHPUD (ELFIN_GPIO_BASE + oGPHPUD)
+#define GPHCONSLP (ELFIN_GPIO_BASE + oGPHCONSLP)
+#define GPHPUDSLP (ELFIN_GPIO_BASE + oGPHPUDSLP)
+#define GPICON (ELFIN_GPIO_BASE + oGPICON)
+#define GPIDAT (ELFIN_GPIO_BASE + oGPIDAT)
+#define GPIPUD (ELFIN_GPIO_BASE + oGPIPUD)
+#define GPICONSLP (ELFIN_GPIO_BASE + oGPICONSLP)
+#define GPIPUDSLP (ELFIN_GPIO_BASE + oGPIPUDSLP)
+#define GPJCON (ELFIN_GPIO_BASE + oGPJCON)
+#define GPJDAT (ELFIN_GPIO_BASE + oGPJDAT)
+#define GPJPUD (ELFIN_GPIO_BASE + oGPJPUD)
+#define GPJCONSLP (ELFIN_GPIO_BASE + oGPJCONSLP)
+#define GPJPUDSLP (ELFIN_GPIO_BASE + oGPJPUDSLP)
+#define GPKCON0 (ELFIN_GPIO_BASE + oGPKCON0)
+#define GPKCON1 (ELFIN_GPIO_BASE + oGPKCON1)
+#define GPKDAT (ELFIN_GPIO_BASE + oGPKDAT)
+#define GPKPUD (ELFIN_GPIO_BASE + oGPKPUD)
+#define GPLCON0 (ELFIN_GPIO_BASE + oGPLCON0)
+#define GPLCON1 (ELFIN_GPIO_BASE + oGPLCON1)
+#define GPLDAT (ELFIN_GPIO_BASE + oGPLDAT)
+#define GPLPUD (ELFIN_GPIO_BASE + oGPLPUD)
+#define GPMCON (ELFIN_GPIO_BASE + oGPMCON)
+#define GPMDAT (ELFIN_GPIO_BASE + oGPMDAT)
+#define GPMPUD (ELFIN_GPIO_BASE + oGPMPUD)
+#define GPNCON (ELFIN_GPIO_BASE + oGPNCON)
+#define GPNDAT (ELFIN_GPIO_BASE + oGPNDAT)
+#define GPNPUD (ELFIN_GPIO_BASE + oGPNPUD)
+#define GPOCON (ELFIN_GPIO_BASE + oGPOCON)
+#define GPODAT (ELFIN_GPIO_BASE + oGPODAT)
+#define GPOPUD (ELFIN_GPIO_BASE + oGPODAT)
+#define GPOCONSLP (ELFIN_GPIO_BASE + oGPOCONSLP)
+#define GPOPUDSLP (ELFIN_GPIO_BASE + oGPOPUDSLP)
+#define GPPCON (ELFIN_GPIO_BASE + oGPPCON)
+#define GPPDAT (ELFIN_GPIO_BASE + oGPPDAT)
+#define GPPPUD (ELFIN_GPIO_BASE + oGPPPUD)
+#define GPPCONSLP (ELFIN_GPIO_BASE + oGPPCONSLP)
+#define GPPPUDSLP (ELFIN_GPIO_BASE + oGPPPUDSLP)
+#define GPQCON (ELFIN_GPIO_BASE + oGPQCON)
+#define GPQDAT (ELFIN_GPIO_BASE + oGPQDAT)
+#define GPQPUD (ELFIN_GPIO_BASE + oGPQPUD)
+#define GPQCONSLP (ELFIN_GPIO_BASE + oGPQCONSLP)
+#define GPQPUDSLP (ELFIN_GPIO_BASE + oGPQPUDSLP)
+#define SPCON (ELFIN_GPIO_BASE + oSPCON)
+#define MEM0DRVCON (ELFIN_GPIO_BASE + oMEM0DRVCON)
+#define MEM1DRVCON (ELFIN_GPIO_BASE + oMEM1DRVCON)
+
+/*
+ * Bus Matrix
+ */
+#define ELFIN_MEM_SYS_CFG 0x7e00f120
+
+
+/*
+ * Memory controller
+ */
+#define ELFIN_SROM_BASE 0x70000000
+
+#define SROM_BW (ELFIN_SROM_BASE + 0x00)
+#define SROM_BC0 (ELFIN_SROM_BASE + 0x04)
+#define SROM_BC1 (ELFIN_SROM_BASE + 0x08)
+#define SROM_BC2 (ELFIN_SROM_BASE + 0x0C)
+#define SROM_BC3 (ELFIN_SROM_BASE + 0x10)
+#define SROM_BC4 (ELFIN_SROM_BASE + 0x14)
+#define SROM_BC5 (ELFIN_SROM_BASE + 0x18)
+
+
+/*
+ * SDRAM Controller
+ */
+#define ELFIN_DMC0_BASE 0x7e000000
+#define ELFIN_DMC1_BASE 0x7e001000
+
+#define INDEX_DMC_MEMC_STATUS (0x00)
+#define INDEX_DMC_MEMC_CMD (0x04)
+#define INDEX_DMC_DIRECT_CMD (0x08)
+#define INDEX_DMC_MEMORY_CFG (0x0C)
+#define INDEX_DMC_REFRESH_PRD (0x10)
+#define INDEX_DMC_CAS_LATENCY (0x14)
+#define INDEX_DMC_T_DQSS (0x18)
+#define INDEX_DMC_T_MRD (0x1C)
+#define INDEX_DMC_T_RAS (0x20)
+#define INDEX_DMC_T_RC (0x24)
+#define INDEX_DMC_T_RCD (0x28)
+#define INDEX_DMC_T_RFC (0x2C)
+#define INDEX_DMC_T_RP (0x30)
+#define INDEX_DMC_T_RRD (0x34)
+#define INDEX_DMC_T_WR (0x38)
+#define INDEX_DMC_T_WTR (0x3C)
+#define INDEX_DMC_T_XP (0x40)
+#define INDEX_DMC_T_XSR (0x44)
+#define INDEX_DMC_T_ESR (0x48)
+#define INDEX_DMC_MEMORY_CFG2 (0x4C)
+#define INDEX_DMC_CHIP_0_CFG (0x200)
+#define INDEX_DMC_CHIP_1_CFG (0x204)
+#define INDEX_DMC_CHIP_2_CFG (0x208)
+#define INDEX_DMC_CHIP_3_CFG (0x20C)
+#define INDEX_DMC_USER_STATUS (0x300)
+#define INDEX_DMC_USER_CONFIG (0x304)
+
+/*
+* Memory Chip direct command
+*/
+#define DMC_NOP0 0x0c0000
+#define DMC_NOP1 0x1c0000
+#define DMC_PA0 0x000000 //Precharge all
+#define DMC_PA1 0x100000
+#define DMC_AR0 0x040000 //Autorefresh
+#define DMC_AR1 0x140000
+#define DMC_SDR_MR0 0x080032 //MRS, CAS 3, Burst Length 4
+#define DMC_SDR_MR1 0x180032
+#define DMC_DDR_MR0 0x080162
+#define DMC_DDR_MR1 0x180162
+#define DMC_mDDR_MR0 0x080032 //CAS 3, Burst Length 4
+#define DMC_mDDR_MR1 0x180032
+#define DMC_mSDR_EMR0 0x0a0000 //EMRS, DS:Full, PASR:Full Array
+#define DMC_mSDR_EMR1 0x1a0000
+#define DMC_DDR_EMR0 0x090000
+#define DMC_DDR_EMR1 0x190000
+#define DMC_mDDR_EMR0 0x0a0000 // DS:Full, PASR:Full Array
+#define DMC_mDDR_EMR1 0x1a0000
+
+
+/****************************************************************
+ Definitions for memory configuration
+ Set memory configuration
+ active_chips = 1'b0 (1 chip)
+ qos_master_chip = 3'b000(ARID[3:0])
+ memory burst = 3'b010(burst 4)
+ stop_mem_clock = 1'b0(disable dynamical stop)
+ auto_power_down = 1'b0(disable auto power-down mode)
+ power_down_prd = 6'b00_0000(0 cycle for auto power-down)
+ ap_bit = 1'b0 (bit position of auto-precharge is 10)
+ row_bits = 3'b010(# row address 13)
+ column_bits = 3'b010(# column address 10 )
+
+ Set user configuration
+ 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR
+
+ Set chip select for chip [n]
+ row bank control, bank address 0x3000_0000 ~ 0x37ff_ffff
+ CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24]
+******************************************************************/
+
+/*
+ * HS MMC Interface
+ */
+#define ELFIN_HSMMC_BASE 0x7C200000
+
+#define HM_SYSAD (0x00)
+#define HM_BLKSIZE (0x04)
+#define HM_BLKCNT (0x06)
+#define HM_ARGUMENT (0x08)
+#define HM_TRNMOD (0x0c)
+#define HM_CMDREG (0x0e)
+#define HM_RSPREG0 (0x10)
+#define HM_RSPREG1 (0x14)
+#define HM_RSPREG2 (0x18)
+#define HM_RSPREG3 (0x1c)
+#define HM_BDATA (0x20)
+#define HM_PRNSTS (0x24)
+#define HM_HOSTCTL (0x28)
+#define HM_PWRCON (0x29)
+#define HM_BLKGAP (0x2a)
+#define HM_WAKCON (0x2b)
+#define HM_CLKCON (0x2c)
+#define HM_TIMEOUTCON (0x2e)
+#define HM_SWRST (0x2f)
+#define HM_NORINTSTS (0x30)
+#define HM_ERRINTSTS (0x32)
+#define HM_NORINTSTSEN (0x34)
+#define HM_ERRINTSTSEN (0x36)
+#define HM_NORINTSIGEN (0x38)
+#define HM_ERRINTSIGEN (0x3a)
+#define HM_ACMD12ERRSTS (0x3c)
+#define HM_CAPAREG (0x40)
+#define HM_MAXCURR (0x48)
+#define HM_CONTROL2 (0x80)
+#define HM_CONTROL3 (0x84)
+#define HM_CONTROL4 (0x8c)
+#define HM_HCVER (0xfe)
+
+/*
+ * Nand flash controller
+ */
+#define ELFIN_NAND_BASE 0x70200000
+
+#define oNFCONF 0x00
+#define oNFCONT 0x04
+#define oNFCMMD 0x08
+#define oNFADDR 0x0c
+#define oNFDATA 0x10
+#define oNFMECCDATA0 0x14
+#define oNFMECCDATA1 0x18
+#define oNFSECCDATA0 0x1c
+#define oNFSBLK 0x20
+#define oNFEBLK 0x24
+#define oNFSTAT 0x28
+#define oNFESTAT0 0x2c
+#define oNFESTAT1 0x30
+#define oNFMECC0 0x34
+#define oNFMECC1 0x38
+#define oNFSECC 0x3c
+#define oNFMLCBITPT 0x40
+#define oNF8ECCERR0 0x44
+#define oNF8ECCERR1 0x48
+#define oNF8ECCERR2 0x4c
+#define oNFM8ECC0 0x50
+#define oNFM8ECC1 0x54
+#define oNFM8ECC2 0x58
+#define oNFM8ECC3 0x5c
+#define oNFMLC8BITPT0 0x60
+#define oNFMLC8BITPT1 0x64
+
+#define NFCONF (ELFIN_NAND_BASE + oNFCONF)
+#define NFCONT (ELFIN_NAND_BASE + oNFCONT)
+#define NFCMMD (ELFIN_NAND_BASE + oNFCMMD)
+#define NFADDR (ELFIN_NAND_BASE + oNFADDR)
+#define NFDATA (ELFIN_NAND_BASE + oNFDATA)
+#define NFMECCDATA0 (ELFIN_NAND_BASE + oNFMECCDATA0)
+#define NFMECCDATA1 (ELFIN_NAND_BASE + oNFMECCDATA1)
+#define NFSECCDATA0 (ELFIN_NAND_BASE + oNFSECCDATA0)
+#define NFSBLK (ELFIN_NAND_BASE + oNFSBLK)
+#define NFEBLK (ELFIN_NAND_BASE + oNFEBLK)
+#define NFSTAT (ELFIN_NAND_BASE + oNFSTAT)
+#define NFESTAT0 (ELFIN_NAND_BASE + oNFESTAT0)
+#define NFESTAT1 (ELFIN_NAND_BASE + oNFESTAT1)
+#define NFMECC0 (ELFIN_NAND_BASE + oNFMECC0)
+#define NFMECC1 (ELFIN_NAND_BASE + oNFMECC1)
+#define NFSECC (ELFIN_NAND_BASE + oNFSECC)
+#define NFMLCBITPT (ELFIN_NAND_BASE + oNFMLCBITPT)
+#define NF8ECCERR0 (ELFIN_NAND_BASE + oNF8ECCERR0)
+#define NF8ECCERR1 (ELFIN_NAND_BASE + oNF8ECCERR1)
+#define NF8ECCERR2 (ELFIN_NAND_BASE + oNF8ECCERR2)
+#define NFM8ECC0 (ELFIN_NAND_BASE + oNFM8ECC0)
+#define NFM8ECC1 (ELFIN_NAND_BASE + oNFM8ECC1)
+#define NFM8ECC2 (ELFIN_NAND_BASE + oNFM8ECC2)
+#define NFM8ECC3 (ELFIN_NAND_BASE + oNFM8ECC3)
+#define NFMLC8BITPT0 (ELFIN_NAND_BASE + oNFMLC8BITPT0)
+#define NFMLC8BITPT1 (ELFIN_NAND_BASE + oNFMLC8BITPT1)
+
+
+#define NFCONF_ECC_MLC (1<<24)
+
+#define NFCONF_ECC_1BIT (0<<23)
+#define NFCONF_ECC_4BIT (2<<23)
+#define NFCONF_ECC_8BIT (1<<23)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK (1<<7)
+#define NFCONT_SECCLOCK (1<<6)
+#define NFCONT_INITMECC (1<<5)
+#define NFCONT_INITSECC (1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<1)
+#define NFCONT_CS (1<<1)
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+#define NFESTAT0_ECCBUSY (1<<31)
+
+
+
+/*************************************************************
+ * OneNAND Controller
+ *************************************************************/
+
+/*
+ * S3C6400 SFRs
+ */
+#define ONENAND_REG_MEM_CFG (0x000)
+#define ONENAND_REG_BURST_LEN (0x010)
+#define ONENAND_REG_MEM_RESET (0x020)
+#define ONENAND_REG_INT_ERR_STAT (0x030)
+#define ONENAND_REG_INT_ERR_MASK (0x040)
+#define ONENAND_REG_INT_ERR_ACK (0x050)
+#define ONENAND_REG_ECC_ERR_STAT (0x060)
+#define ONENAND_REG_MANUFACT_ID (0x070)
+#define ONENAND_REG_DEVICE_ID (0x080)
+#define ONENAND_REG_DATA_BUF_SIZE (0x090)
+#define ONENAND_REG_BOOT_BUF_SIZE (0x0A0)
+#define ONENAND_REG_BUF_AMOUNT (0x0B0)
+#define ONENAND_REG_TECH (0x0C0)
+#define ONENAND_REG_FBA_WIDTH (0x0D0)
+#define ONENAND_REG_FPA_WIDTH (0x0E0)
+#define ONENAND_REG_FSA_WIDTH (0x0F0)
+#define ONENAND_REG_REVISION (0x100)
+#define ONENAND_REG_DATARAM0 (0x110)
+#define ONENAND_REG_DATARAM1 (0x120)
+#define ONENAND_REG_SYNC_MODE (0x130)
+#define ONENAND_REG_TRANS_SPARE (0x140)
+#define ONENAND_REG_LOCK_BIT (0x150)
+#define ONENAND_REG_DBS_DFS_WIDTH (0x160)
+#define ONENAND_REG_PAGE_CNT (0x170)
+#define ONENAND_REG_ERR_PAGE_ADDR (0x180)
+#define ONENAND_REG_BURST_RD_LAT (0x190)
+#define ONENAND_REG_INT_PIN_ENABLE (0x1A0)
+#define ONENAND_REG_INT_MON_CYC (0x1B0)
+#define ONENAND_REG_ACC_CLOCK (0x1C0)
+#define ONENAND_REG_SLOW_RD_PATH (0x1D0)
+#define ONENAND_REG_ERR_BLK_ADDR (0x1E0)
+#define ONENAND_REG_FLASH_VER_ID (0x1F0)
+#define ONENAND_REG_FLASH_AUX_CNTRL (0x300)
+
+/*
+ * S3C6400 SFR values
+ */
+#define ONENAND_MEM_CFG_SYNC_READ (1 << 15)
+#define ONENAND_MEM_CFG_BRL_7 (7 << 12)
+#define ONENAND_MEM_CFG_BRL_6 (6 << 12)
+#define ONENAND_MEM_CFG_BRL_5 (5 << 12)
+#define ONENAND_MEM_CFG_BRL_4 (4 << 12)
+#define ONENAND_MEM_CFG_BRL_3 (3 << 12)
+#define ONENAND_MEM_CFG_BRL_10 (2 << 12)
+#define ONENAND_MEM_CFG_BRL_9 (1 << 12)
+#define ONENAND_MEM_CFG_BRL_8 (0 << 12)
+#define ONENAND_MEM_CFG_BRL_SHIFT (12)
+#define ONENAND_MEM_CFG_BL_1K (5 << 9)
+#define ONENAND_MEM_CFG_BL_32 (4 << 9)
+#define ONENAND_MEM_CFG_BL_16 (3 << 9)
+#define ONENAND_MEM_CFG_BL_8 (2 << 9)
+#define ONENAND_MEM_CFG_BL_4 (1 << 9)
+#define ONENAND_MEM_CFG_BL_CONT (0 << 9)
+#define ONENAND_MEM_CFG_BL_SHIFT (9)
+#define ONENAND_MEM_CFG_NO_ECC (1 << 8)
+#define ONENAND_MEM_CFG_RDY_HIGH (1 << 7)
+#define ONENAND_MEM_CFG_INT_HIGH (1 << 6)
+#define ONENAND_MEM_CFG_IOBE (1 << 5)
+#define ONENAND_MEM_CFG_RDY_CONF (1 << 4)
+#define ONENAND_MEM_CFG_HF (1 << 2)
+#define ONENAND_MEM_CFG_WM_SYNC (1 << 1)
+#define ONENAND_MEM_CFG_BWPS_UNLOCK (1 << 0)
+
+#define ONENAND_BURST_LEN_CONT (0)
+#define ONENAND_BURST_LEN_4 (4)
+#define ONENAND_BURST_LEN_8 (8)
+#define ONENAND_BURST_LEN_16 (16)
+
+#define ONENAND_MEM_RESET_WARM (0x1)
+#define ONENAND_MEM_RESET_COLD (0x2)
+#define ONENAND_MEM_RESET_HOT (0x3)
+
+#define ONENAND_INT_ERR_CACHE_OP_ERR (1 << 13)
+#define ONENAND_INT_ERR_RST_CMP (1 << 12)
+#define ONENAND_INT_ERR_RDY_ACT (1 << 11)
+#define ONENAND_INT_ERR_INT_ACT (1 << 10)
+#define ONENAND_INT_ERR_UNSUP_CMD (1 << 9)
+#define ONENAND_INT_ERR_LOCKED_BLK (1 << 8)
+#define ONENAND_INT_ERR_BLK_RW_CMP (1 << 7)
+#define ONENAND_INT_ERR_ERS_CMP (1 << 6)
+#define ONENAND_INT_ERR_PGM_CMP (1 << 5)
+#define ONENAND_INT_ERR_LOAD_CMP (1 << 4)
+#define ONENAND_INT_ERR_ERS_FAIL (1 << 3)
+#define ONENAND_INT_ERR_PGM_FAIL (1 << 2)
+#define ONENAND_INT_ERR_INT_TO (1 << 1)
+#define ONENAND_INT_ERR_LD_FAIL_ECC_ERR (1 << 0)
+
+#define ONENAND_DEVICE_DENSITY_SHIFT (4)
+#define ONENAND_DEVICE_IS_DDP (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK (0x3)
+#define ONENAND_DEVICE_DENSITY_128Mb (0x000)
+#define ONENAND_DEVICE_DENSITY_256Mb (0x001)
+#define ONENAND_DEVICE_DENSITY_512Mb (0x002)
+#define ONENAND_DEVICE_DENSITY_1Gb (0x003)
+#define ONENAND_DEVICE_DENSITY_2Gb (0x004)
+#define ONENAND_DEVICE_DENSITY_4Gb (0x005)
+
+#define ONENAND_SYNC_MODE_RM_SYNC (1 << 1)
+#define ONENAND_SYNC_MODE_WM_SYNC (1 << 0)
+
+#define ONENAND_TRANS_SPARE_TSRF_INC (1 << 0)
+
+#define ONENAND_INT_PIN_ENABLE (1 << 0)
+
+#define ONENAND_ACC_CLOCK_266_133 (0x5)
+#define ONENAND_ACC_CLOCK_166_83 (0x3)
+#define ONENAND_ACC_CLOCK_134_67 (0x3)
+#define ONENAND_ACC_CLOCK_100_50 (0x2)
+#define ONENAND_ACC_CLOCK_60_30 (0x2)
+
+#define ONENAND_FLASH_AUX_WD_DISABLE (1 << 0)
+
+/*
+ * Datain values for mapped commands
+ */
+#define ONENAND_DATAIN_ERASE_STATUS (0x00)
+#define ONENAND_DATAIN_ERASE_MULTI (0x01)
+#define ONENAND_DATAIN_ERASE_SINGLE (0x03)
+#define ONENAND_DATAIN_ERASE_VERIFY (0x15)
+#define ONENAND_DATAIN_UNLOCK_START (0x08)
+#define ONENAND_DATAIN_UNLOCK_END (0x09)
+#define ONENAND_DATAIN_LOCK_START (0x0A)
+#define ONENAND_DATAIN_LOCK_END (0x0B)
+#define ONENAND_DATAIN_LOCKTIGHT_START (0x0C)
+#define ONENAND_DATAIN_LOCKTIGHT_END (0x0D)
+#define ONENAND_DATAIN_UNLOCK_ALL (0x0E)
+#define ONENAND_DATAIN_COPYBACK_SRC (0x1000)
+#define ONENAND_DATAIN_COPYBACK_DST (0x2000)
+#define ONENAND_DATAIN_ACCESS_OTP (0x12)
+#define ONENAND_DATAIN_ACCESS_MAIN (0x14)
+#define ONENAND_DATAIN_PIPELINE_READ (0x4000)
+#define ONENAND_DATAIN_PIPELINE_WRITE (0x4100)
+#define ONENAND_DATAIN_RMW_LOAD (0x10)
+#define ONENAND_DATAIN_RMW_MODIFY (0x11)
+
+/*
+ * Device ID Register F001h (R)
+ */
+#define ONENAND_DEVICE_DENSITY_SHIFT (4)
+#define ONENAND_DEVICE_IS_DDP (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK (0x3)
+
+/*
+ * Version ID Register F002h (R)
+ */
+#define ONENAND_VERSION_PROCESS_SHIFT (8)
+
+/*
+ * Start Address 1 F100h (R/W)
+ */
+#define ONENAND_DDP_SHIFT (15)
+#define ONENAND_DDP_CHIP0 (0)
+#define ONENAND_DDP_CHIP1 (1 << ONENAND_DDP_SHIFT)
+
+/*
+ * Start Buffer Register F200h (R/W)
+ */
+#define ONENAND_BSA_MASK (0x03)
+#define ONENAND_BSA_SHIFT (8)
+#define ONENAND_BSA_BOOTRAM (0 << 2)
+#define ONENAND_BSA_DATARAM0 (2 << 2)
+#define ONENAND_BSA_DATARAM1 (3 << 2)
+#define ONENAND_BSC_MASK (0x03)
+
+/*
+ * Command Register F220h (R/W)
+ */
+#define ONENAND_CMD_READ (0x00)
+#define ONENAND_CMD_READOOB (0x13)
+#define ONENAND_CMD_PROG (0x80)
+#define ONENAND_CMD_PROGOOB (0x1A)
+#define ONENAND_CMD_UNLOCK (0x23)
+#define ONENAND_CMD_LOCK (0x2A)
+#define ONENAND_CMD_LOCK_TIGHT (0x2C)
+#define ONENAND_CMD_UNLOCK_ALL (0x27)
+#define ONENAND_CMD_ERASE (0x94)
+#define ONENAND_CMD_RESET (0xF0)
+#define ONENAND_CMD_OTP_ACCESS (0x65)
+#define ONENAND_CMD_READID (0x90)
+#define ONENAND_CMD_STARTADDR1 (0xE0)
+#define ONENAND_CMD_WP_STATUS (0xE1)
+#define ONENAND_CMD_PIPELINE_READ (0x01)
+#define ONENAND_CMD_PIPELINE_WRITE (0x81)
+
+/*
+ * Command Mapping for S3C6400 OneNAND Controller
+ */
+#define ONENAND_AHB_ADDR (0x20000000)
+#define ONENAND_DUMMY_ADDR (0x20400000)
+#define ONENAND_CMD_SHIFT (24)
+#define ONENAND_CMD_MAP_00 (0x0)
+#define ONENAND_CMD_MAP_01 (0x1)
+#define ONENAND_CMD_MAP_10 (0x2)
+#define ONENAND_CMD_MAP_11 (0x3)
+#define ONENAND_CMD_MAP_FF (0xF)
+
+/*
+ * Mask for Mapping table
+ */
+#define ONENAND_MEM_ADDR_MASK (0xffffff)
+#define ONENAND_DDP_SHIFT_1Gb (21)
+#define ONENAND_DDP_SHIFT_2Gb (22)
+#define ONENAND_DDP_SHIFT_4Gb (23)
+#define ONENAND_FBA_SHIFT (12)
+#define ONENAND_FPA_SHIFT (6)
+#define ONENAND_FSA_SHIFT (4)
+#define ONENAND_FBA_MASK_128Mb (0xff)
+#define ONENAND_FBA_MASK_256Mb (0x1ff)
+#define ONENAND_FBA_MASK_512Mb (0x1ff)
+#define ONENAND_FBA_MASK_1Gb_DDP (0x1ff)
+#define ONENAND_FBA_MASK_1Gb (0x3ff)
+#define ONENAND_FBA_MASK_2Gb_DDP (0x3ff)
+#define ONENAND_FBA_MASK_2Gb (0x7ff)
+#define ONENAND_FBA_MASK_4Gb_DDP (0x7ff)
+#define ONENAND_FBA_MASK_4Gb (0xfff)
+#define ONENAND_FPA_MASK (0x3f)
+#define ONENAND_FSA_MASK (0x3)
+
+/*
+ * System Configuration 1 Register F221h (R, R/W)
+ */
+#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15)
+#define ONENAND_SYS_CFG1_BRL_7 (7 << 12)
+#define ONENAND_SYS_CFG1_BRL_6 (6 << 12)
+#define ONENAND_SYS_CFG1_BRL_5 (5 << 12)
+#define ONENAND_SYS_CFG1_BRL_4 (4 << 12)
+#define ONENAND_SYS_CFG1_BRL_3 (3 << 12)
+#define ONENAND_SYS_CFG1_BRL_10 (2 << 12)
+#define ONENAND_SYS_CFG1_BRL_9 (1 << 12)
+#define ONENAND_SYS_CFG1_BRL_8 (0 << 12)
+#define ONENAND_SYS_CFG1_BRL_SHIFT (12)
+#define ONENAND_SYS_CFG1_BL_32 (4 << 9)
+#define ONENAND_SYS_CFG1_BL_16 (3 << 9)
+#define ONENAND_SYS_CFG1_BL_8 (2 << 9)
+#define ONENAND_SYS_CFG1_BL_4 (1 << 9)
+#define ONENAND_SYS_CFG1_BL_CONT (0 << 9)
+#define ONENAND_SYS_CFG1_BL_SHIFT (9)
+#define ONENAND_SYS_CFG1_NO_ECC (1 << 8)
+#define ONENAND_SYS_CFG1_RDY (1 << 7)
+#define ONENAND_SYS_CFG1_INT (1 << 6)
+#define ONENAND_SYS_CFG1_IOBE (1 << 5)
+#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
+
+/*
+ * Controller Status Register F240h (R)
+ */
+#define ONENAND_CTRL_ONGO (1 << 15)
+#define ONENAND_CTRL_LOCK (1 << 14)
+#define ONENAND_CTRL_LOAD (1 << 13)
+#define ONENAND_CTRL_PROGRAM (1 << 12)
+#define ONENAND_CTRL_ERASE (1 << 11)
+#define ONENAND_CTRL_ERROR (1 << 10)
+#define ONENAND_CTRL_RSTB (1 << 7)
+#define ONENAND_CTRL_OTP_L (1 << 6)
+#define ONENAND_CTRL_OTP_BL (1 << 5)
+
+/*
+ * Interrupt Status Register F241h (R)
+ */
+#define ONENAND_INT_MASTER (1 << 15)
+#define ONENAND_INT_READ (1 << 7)
+#define ONENAND_INT_WRITE (1 << 6)
+#define ONENAND_INT_ERASE (1 << 5)
+#define ONENAND_INT_RESET (1 << 4)
+#define ONENAND_INT_CLEAR (0 << 0)
+
+/*
+ * NAND Flash Write Protection Status Register F24Eh (R)
+ */
+#define ONENAND_WP_US (1 << 2)
+#define ONENAND_WP_LS (1 << 1)
+#define ONENAND_WP_LTS (1 << 0)
+
+/*
+ * ECC Status Register FF00h (R)
+ */
+#define ONENAND_ECC_1BIT (1 << 0)
+#define ONENAND_ECC_1BIT_ALL (0x5555)
+#define ONENAND_ECC_2BIT (1 << 1)
+#define ONENAND_ECC_2BIT_ALL (0xAAAA)
+
+/*
+ * One-Time Programmable (OTP)
+ */
+#define ONENAND_OTP_LOCK_OFFSET (14)
+
+/*************************************************************
+ * End of OneNAND Controller
+ *************************************************************/
+
+/*
+ * Watchdog timer
+ */
+#define ELFIN_WATCHDOG_BASE 0x7E004000
+
+#define oWTCON 0x00
+#define oWTDAT 0x04
+#define oWTCNT 0x08
+
+#define WTCON (ELFIN_WATCHDOG_BASE + oWTCON)
+#define WTDAT (ELFIN_WATCHDOG_BASE + oWTDAT)
+#define WTCNT (ELFIN_WATCHDOG_BASE + oWTCNT)
+
+/*
+ * UART
+ */
+#define ELFIN_UART_BASE 0x7F005000
+
+#define oULCON 0x00
+#define oUCON 0x04
+#define oUFCON 0x08
+#define oUMCON 0x0C
+#define oUTRSTAT 0x10
+#define oUERSTAT 0x14
+#define oUFSTAT 0x18
+#define oUMSTAT 0x1C
+#define oUTXH 0x20
+#define oURXH 0x24
+#define oUBRDIV 0x28
+#define oUDIVSLOT 0x2C
+#define oUINTP 0x30
+#define oUINTSP 0x34
+#define oUINTM 0x38
+
+#ifdef CONFIG_SERIAL1
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0000)
+#elif defined(CONFIG_SERIAL2)
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0400)
+#else
+#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + 0x0000)
+#endif
+
+#define ELFIN_UART0_BASE (ELFIN_UART_BASE + 0x0000)
+
+#define ULCON0 (ELFIN_UART0_BASE + oULCON)
+#define UCON0 (ELFIN_UART0_BASE + oUCON)
+#define UFCON0 (ELFIN_UART0_BASE + oUFCON)
+#define UMCON0 (ELFIN_UART0_BASE + oUMCON)
+#define UTRSTAT0 (ELFIN_UART0_BASE + oUTRSTAT)
+#define UERSTAT0 (ELFIN_UART0_BASE + oUERSTAT)
+#define UFSTAT0 (ELFIN_UART0_BASE + oUFSTAT)
+#define UMSTAT0 (ELFIN_UART0_BASE + oUMSTAT)
+#define UTXH0 (ELFIN_UART0_BASE + oUTXH)
+#define URXH0 (ELFIN_UART0_BASE + oURXH)
+#define UBRDIV0 (ELFIN_UART0_BASE + oUBRDIV)
+#define UDIVSLOT0 (ELFIN_UART0_BASE + oUDIVSLOT)
+#define UINTP0 (ELFIN_UART0_BASE + oUINTP)
+#define UINTSP0 (ELFIN_UART0_BASE + oUINTSP)
+#define UINTM0 (ELFIN_UART0_BASE + oUINTM)
+
+#define ELFIN_UART1_BASE (ELFIN_UART_BASE + 0x0400)
+
+#define ULCON1 (ELFIN_UART1_BASE + oULCON)
+#define UCON1 (ELFIN_UART1_BASE + oUCON)
+#define UFCON1 (ELFIN_UART1_BASE + oUFCON)
+#define UMCON1 (ELFIN_UART1_BASE + oUMCON)
+#define UTRSTAT1 (ELFIN_UART1_BASE + oUTRSTAT)
+#define UERSTAT1 (ELFIN_UART1_BASE + oUERSTAT)
+#define UFSTAT1 (ELFIN_UART1_BASE + oUFSTAT)
+#define UMSTAT1 (ELFIN_UART1_BASE + oUMSTAT)
+#define UTXH1 (ELFIN_UART1_BASE + oUTXH)
+#define URXH1 (ELFIN_UART1_BASE + oURXH)
+#define UBRDIV1 (ELFIN_UART1_BASE + oUBRDIV)
+#define UDIVSLOT1 (ELFIN_UART1_BASE + oUDIVSLOT)
+#define UINTP1 (ELFIN_UART1_BASE + oUINTP)
+#define UINTSP1 (ELFIN_UART1_BASE + oUINTSP)
+#define UINTM1 (ELFIN_UART1_BASE + oUINTM)
+
+#define UTRSTAT_TX_EMPTY BIT(2)
+#define UTRSTAT_RX_READY BIT(0)
+#define UART_ERR_MASK 0xF
+
+
+/*
+ * PWM timer
+ */
+#define ELFIN_TIMER_BASE 0x7F006000
+
+#define oTCFG0 0x00
+#define oTCFG1 0x04
+#define oTCON 0x08
+#define oTCNTB0 0x0c
+#define oTCMPB0 0x10
+#define oTCNTO0 0x14
+#define oTCNTB1 0x18
+#define oTCMPB1 0x1c
+#define oTCNTO1 0x20
+#define oTCNTB2 0x24
+#define oTCMPB2 0x28
+#define oTCNTO2 0x2c
+#define oTCNTB3 0x30
+#define oTCMPB3 0x34
+#define oTCNTO3 0x38
+#define oTCNTB4 0x3c
+#define oTCNTO4 0x40
+#define oTINT_CSTAT 0x44
+
+#define TCFG0 (ELFIN_TIMER_BASE + oTCFG0)
+#define TCFG1 (ELFIN_TIMER_BASE + oTCFG1)
+#define TCON (ELFIN_TIMER_BASE + oTCON)
+#define TCNTB0 (ELFIN_TIMER_BASE + oTCNTB0)
+#define TCMPB0 (ELFIN_TIMER_BASE + oTCMPB0)
+#define TCNTO0 (ELFIN_TIMER_BASE + oTCNTO0)
+#define TCNTB1 (ELFIN_TIMER_BASE + oTCNTB1)
+#define TCMPB1 (ELFIN_TIMER_BASE + oTCMPB1)
+#define TCNTO1 (ELFIN_TIMER_BASE + oTCNTO1)
+#define TCNTB2 (ELFIN_TIMER_BASE + oTCNTB2)
+#define TCMPB2 (ELFIN_TIMER_BASE + oTCMPB2)
+#define TCNTO2 (ELFIN_TIMER_BASE + oTCNTO2)
+#define TCNTB3 (ELFIN_TIMER_BASE + oTCNTB3)
+#define TCMPB3 (ELFIN_TIMER_BASE + oTCMPB3)
+#define TCNTO3 (ELFIN_TIMER_BASE + oTCNTO3)
+#define TCNTB4 (ELFIN_TIMER_BASE + oTCNTB4)
+#define TCNTO4 (ELFIN_TIMER_BASE + oTCNTO4)
+#define TINT_CSTAT (ELFIN_TIMER_BASE + oTINT_CSTAT)
+
+/* Fields */
+#define fTCFG0_DZONE Fld(8,16) /* the dead zone length (= timer 0) */
+#define fTCFG0_PRE1 Fld(8,8) /* prescaler value for time 2,3,4 */
+#define fTCFG0_PRE0 Fld(8,0) /* prescaler value for time 0,1 */
+#define fTCFG1_MUX4 Fld(4,16)
+/* bits */
+#define TCFG0_DZONE(x) FInsrt((x), fTCFG0_DZONE)
+#define TCFG0_PRE1(x) FInsrt((x), fTCFG0_PRE1)
+#define TCFG0_PRE0(x) FInsrt((x), fTCFG0_PRE0)
+#define TCON_4_AUTO (1 << 22) /* auto reload on/off for Timer 4 */
+#define TCON_4_UPDATE (1 << 21) /* manual Update TCNTB4 */
+#define TCON_4_ONOFF (1 << 20) /* 0: Stop, 1: start Timer 4 */
+#define COUNT_4_ON (TCON_4_ONOFF*1)
+#define COUNT_4_OFF (TCON_4_ONOFF*0)
+#define TCON_3_AUTO (1 << 19) /* auto reload on/off for Timer 3 */
+#define TIMER3_ATLOAD_ON (TCON_3_AUTO*1)
+#define TIMER3_ATLAOD_OFF FClrBit(TCON, TCON_3_AUTO)
+#define TCON_3_INVERT (1 << 18) /* 1: Inverter on for TOUT3 */
+#define TIMER3_IVT_ON (TCON_3_INVERT*1)
+#define TIMER3_IVT_OFF (FClrBit(TCON, TCON_3_INVERT))
+#define TCON_3_MAN (1 << 17) /* manual Update TCNTB3,TCMPB3 */
+#define TIMER3_MANUP (TCON_3_MAN*1)
+#define TIMER3_NOP (FClrBit(TCON, TCON_3_MAN))
+#define TCON_3_ONOFF (1 << 16) /* 0: Stop, 1: start Timer 3 */
+#define TIMER3_ON (TCON_3_ONOFF*1)
+#define TIMER3_OFF (FClrBit(TCON, TCON_3_ONOFF))
+/* macros */
+#define GET_PRESCALE_TIMER4(x) FExtr((x), fTCFG0_PRE1)
+#define GET_DIVIDER_TIMER4(x) FExtr((x), fTCFG1_MUX4)
+
+/*
+ * RTC Controller
+ */
+#define ELFIN_RTC_BASE 0x7e005000
+
+#define oRTCCON 0x40
+#define oTICNT 0x44
+#define oRTCALM 0x50
+#define oALMSEC 0x54
+#define oALMMIN 0x58
+#define oALMHOUR 0x5c
+#define oALMDATE 0x60
+#define oALMMON 0x64
+#define oALMYEAR 0x68
+#define oBCDSEC 0x70
+#define oBCDMIN 0x74
+#define oBCDHOUR 0x78
+#define oBCDDATE 0x7c
+#define oBCDDAY 0x80
+#define oBCDMON 0x84
+#define oBCDYEAR 0x88
+
+#define RTCCON (ELFIN_RTC_BASE + oRTCCON)
+#define TICNT (ELFIN_RTC_BASE + oTICNT)
+#define RTCALM (ELFIN_RTC_BASE + oRTCALM)
+#define ALMSEC (ELFIN_RTC_BASE + oALMSEC)
+#define ALMMIN (ELFIN_RTC_BASE + oALMMIN)
+#define ALMHOUR (ELFIN_RTC_BASE + oALMHOUR)
+#define ALMDATE (ELFIN_RTC_BASE + oALMDATE)
+#define ALMMON (ELFIN_RTC_BASE + oALMMON)
+#define ALMYEAR (ELFIN_RTC_BASE + oALMYEAR)
+#define BCDSEC (ELFIN_RTC_BASE + oBCDSEC)
+#define BCDMIN (ELFIN_RTC_BASE + oBCDMIN)
+#define BCDHOUR (ELFIN_RTC_BASE + oBCDHOUR)
+#define BCDDATE (ELFIN_RTC_BASE + oBCDDATE)
+#define BCDDAY (ELFIN_RTC_BASE + oBCDDAY)
+#define BCDMON (ELFIN_RTC_BASE + oBCDMON)
+#define BCDYEAR (ELFIN_RTC_BASE + oBCDYEAR)
+
+/*
+ * USB2.0 HS OTG (Chapter 26)
+ */
+#define USBOTG_LINK_BASE (0x7C000000)
+#define USBOTG_PHY_BASE (0x7C100000)
+
+/* Core Global Registers */
+#define S3C_OTG_GOTGCTL (USBOTG_LINK_BASE + 0x000) /* OTG Control & Status */
+#define S3C_OTG_GOTGINT (USBOTG_LINK_BASE + 0x004) /* OTG Interrupt */
+#define S3C_OTG_GAHBCFG (USBOTG_LINK_BASE + 0x008) /* Core AHB Configuration */
+#define S3C_OTG_GUSBCFG (USBOTG_LINK_BASE + 0x00C) /* Core USB Configuration */
+#define S3C_OTG_GRSTCTL (USBOTG_LINK_BASE + 0x010) /* Core Reset */
+#define S3C_OTG_GINTSTS (USBOTG_LINK_BASE + 0x014) /* Core Interrupt */
+#define S3C_OTG_GINTMSK (USBOTG_LINK_BASE + 0x018) /* Core Interrupt Mask */
+#define S3C_OTG_GRXSTSR (USBOTG_LINK_BASE + 0x01C) /* Receive Status Debug Read/Status Read */
+#define S3C_OTG_GRXSTSP (USBOTG_LINK_BASE + 0x020) /* Receive Status Debug Pop/Status Pop */
+#define S3C_OTG_GRXFSIZ (USBOTG_LINK_BASE + 0x024) /* Receive FIFO Size */
+#define S3C_OTG_GNPTXFSIZ (USBOTG_LINK_BASE + 0x028) /* Non-Periodic Transmit FIFO Size */
+#define S3C_OTG_GNPTXSTS (USBOTG_LINK_BASE + 0x02C) /* Non-Periodic Transmit FIFO/Queue Status */
+
+#define S3C_OTG_HPTXFSIZ (USBOTG_LINK_BASE + 0x100) /* Host Periodic Transmit FIFO Size */
+#define S3C_OTG_DPTXFSIZ1 (USBOTG_LINK_BASE + 0x104) /* Device Periodic Transmit FIFO-1 Size */
+#define S3C_OTG_DPTXFSIZ2 (USBOTG_LINK_BASE + 0x108) /* Device Periodic Transmit FIFO-2 Size */
+#define S3C_OTG_DPTXFSIZ3 (USBOTG_LINK_BASE + 0x10C) /* Device Periodic Transmit FIFO-3 Size */
+#define S3C_OTG_DPTXFSIZ4 (USBOTG_LINK_BASE + 0x110) /* Device Periodic Transmit FIFO-4 Size */
+#define S3C_OTG_DPTXFSIZ5 (USBOTG_LINK_BASE + 0x114) /* Device Periodic Transmit FIFO-5 Size */
+#define S3C_OTG_DPTXFSIZ6 (USBOTG_LINK_BASE + 0x118) /* Device Periodic Transmit FIFO-6 Size */
+#define S3C_OTG_DPTXFSIZ7 (USBOTG_LINK_BASE + 0x11C) /* Device Periodic Transmit FIFO-7 Size */
+#define S3C_OTG_DPTXFSIZ8 (USBOTG_LINK_BASE + 0x120) /* Device Periodic Transmit FIFO-8 Size */
+#define S3C_OTG_DPTXFSIZ9 (USBOTG_LINK_BASE + 0x124) /* Device Periodic Transmit FIFO-9 Size */
+#define S3C_OTG_DPTXFSIZ10 (USBOTG_LINK_BASE + 0x128) /* Device Periodic Transmit FIFO-10 Size */
+#define S3C_OTG_DPTXFSIZ11 (USBOTG_LINK_BASE + 0x12C) /* Device Periodic Transmit FIFO-11 Size */
+#define S3C_OTG_DPTXFSIZ12 (USBOTG_LINK_BASE + 0x130) /* Device Periodic Transmit FIFO-12 Size */
+#define S3C_OTG_DPTXFSIZ13 (USBOTG_LINK_BASE + 0x134) /* Device Periodic Transmit FIFO-13 Size */
+#define S3C_OTG_DPTXFSIZ14 (USBOTG_LINK_BASE + 0x138) /* Device Periodic Transmit FIFO-14 Size */
+#define S3C_OTG_DPTXFSIZ15 (USBOTG_LINK_BASE + 0x13C) /* Device Periodic Transmit FIFO-15 Size */
+
+/* Host Global Registers */
+#define S3C_OTG_HCFG (USBOTG_LINK_BASE + 0x400) /* Host Configuration */
+#define S3C_OTG_HFIR (USBOTG_LINK_BASE + 0x404) /* Host Frame Interval */
+#define S3C_OTG_HFNUM (USBOTG_LINK_BASE + 0x408) /* Host Frame Number/Frame Time Remaining */
+#define S3C_OTG_HPTXSTS (USBOTG_LINK_BASE + 0x410) /* Host Periodic Transmit FIFO/Queue Status */
+#define S3C_OTG_HAINT (USBOTG_LINK_BASE + 0x414) /* Host All Channels Interrupt */
+#define S3C_OTG_HAINTMSK (USBOTG_LINK_BASE + 0x418) /* Host All Channels Interrupt Mask */
+
+/* Host Port Control & Status Registers */
+#define S3C_OTG_HPRT (USBOTG_LINK_BASE + 0x440) /* Host Port Control & Status */
+
+/* Host Channel-Specific Registers */
+#define S3C_OTG_HCCHAR0 (USBOTG_LINK_BASE + 0x500) /* Host Channel-0 Characteristics */
+#define S3C_OTG_HCSPLT0 (USBOTG_LINK_BASE + 0x504) /* Host Channel-0 Split Control */
+#define S3C_OTG_HCINT0 (USBOTG_LINK_BASE + 0x508) /* Host Channel-0 Interrupt */
+#define S3C_OTG_HCINTMSK0 (USBOTG_LINK_BASE + 0x50C) /* Host Channel-0 Interrupt Mask */
+#define S3C_OTG_HCTSIZ0 (USBOTG_LINK_BASE + 0x510) /* Host Channel-0 Transfer Size */
+#define S3C_OTG_HCDMA0 (USBOTG_LINK_BASE + 0x514) /* Host Channel-0 DMA Address */
+
+
+/* Device Global Registers */
+#define S3C_OTG_DCFG (USBOTG_LINK_BASE + 0x800) /* Device Configuration */
+#define S3C_OTG_DCTL (USBOTG_LINK_BASE + 0x804) /* Device Control */
+#define S3C_OTG_DSTS (USBOTG_LINK_BASE + 0x808) /* Device Status */
+#define S3C_OTG_DIEPMSK (USBOTG_LINK_BASE + 0x810) /* Device IN Endpoint Common Interrupt Mask */
+#define S3C_OTG_DOEPMSK (USBOTG_LINK_BASE + 0x814) /* Device OUT Endpoint Common Interrupt Mask */
+#define S3C_OTG_DAINT (USBOTG_LINK_BASE + 0x818) /* Device All Endpoints Interrupt */
+#define S3C_OTG_DAINTMSK (USBOTG_LINK_BASE + 0x81C) /* Device All Endpoints Interrupt Mask */
+#define S3C_OTG_DTKNQR1 (USBOTG_LINK_BASE + 0x820) /* Device IN Token Sequence Learning Queue Read 1 */
+#define S3C_OTG_DTKNQR2 (USBOTG_LINK_BASE + 0x824) /* Device IN Token Sequence Learning Queue Read 2 */
+#define S3C_OTG_DVBUSDIS (USBOTG_LINK_BASE + 0x828) /* Device VBUS Discharge Time */
+#define S3C_OTG_DVBUSPULSE (USBOTG_LINK_BASE + 0x82C) /* Device VBUS Pulsing Time */
+#define S3C_OTG_DTKNQR3 (USBOTG_LINK_BASE + 0x830) /* Device IN Token Sequence Learning Queue Read 3 */
+#define S3C_OTG_DTKNQR4 (USBOTG_LINK_BASE + 0x834) /* Device IN Token Sequence Learning Queue Read 4 */
+
+/* Device Logical IN Endpoint-Specific Registers */
+#define S3C_OTG_DIEPCTL0 (USBOTG_LINK_BASE + 0x900) /* Device IN Endpoint 0 Control */
+#define S3C_OTG_DIEPINT0 (USBOTG_LINK_BASE + 0x908) /* Device IN Endpoint 0 Interrupt */
+#define S3C_OTG_DIEPTSIZ0 (USBOTG_LINK_BASE + 0x910) /* Device IN Endpoint 0 Transfer Size */
+#define S3C_OTG_DIEPDMA0 (USBOTG_LINK_BASE + 0x914) /* Device IN Endpoint 0 DMA Address */
+
+/* Device Logical OUT Endpoint-Specific Registers */
+#define S3C_OTG_DOEPCTL0 (USBOTG_LINK_BASE + 0xB00) /* Device OUT Endpoint 0 Control */
+#define S3C_OTG_DOEPINT0 (USBOTG_LINK_BASE + 0xB08) /* Device OUT Endpoint 0 Interrupt */
+#define S3C_OTG_DOEPTSIZ0 (USBOTG_LINK_BASE + 0xB10) /* Device OUT Endpoint 0 Transfer Size */
+#define S3C_OTG_DOEPDMA0 (USBOTG_LINK_BASE + 0xB14) /* Device OUT Endpoint 0 DMA Address */
+
+/* Power & clock gating registers */
+#define S3C_OTG_PCGCCTRL (USBOTG_LINK_BASE + 0xE00)
+
+/* Endpoint FIFO address */
+#define S3C_OTG_EP0_FIFO (USBOTG_LINK_BASE + 0x1000)
+
+/* OTG PHY CORE REGISTERS */
+#define S3C_OTG_PHYPWR (USBOTG_PHY_BASE + 0x00)
+#define S3C_OTG_PHYCTRL (USBOTG_PHY_BASE + 0x04)
+#define S3C_OTG_RSTCON (USBOTG_PHY_BASE + 0x08)
+
+
+/*
+ * Interrupt
+ */
+#define ELFIN_VIC0_BASE_ADDR (0x71200000)
+#define ELFIN_VIC1_BASE_ADDR (0x71300000)
+
+#define oIRQSTATUS 0x000
+#define oFIQSTATUS 0x004
+#define oRAWINTR 0x008
+#define oINTSELECT 0x00c
+#define oINTENABLE 0x010
+#define oINTENCLEAR 0x014
+#define oSOFTINT 0x018
+#define oSOFTINTCLEAR 0x01c
+#define oPROTECTION 0x020
+#define oSWPRIORITYMASK 0x024
+#define oPRIORITYDAISY 0x028
+#define oVECTADDR(X) (0x100+(X)*4)
+#define oVECPRIORITY(X) (0x200+(X)*4)
+#define oVECTADDRESS 0xF00
+
+#define VIC0IRQSTATUS (ELFIN_VIC0_BASE_ADDR + oIRQSTATUS)
+#define VIC0FIQSTATUS (ELFIN_VIC0_BASE_ADDR + oFIQSTATUS)
+#define VIC0RAWINTR (ELFIN_VIC0_BASE_ADDR + oRAWINTR)
+#define VIC0INTSELECT (ELFIN_VIC0_BASE_ADDR + oINTSELECT)
+#define VIC0INTENABLE (ELFIN_VIC0_BASE_ADDR + oINTENABLE)
+#define VIC0INTENCLEAR (ELFIN_VIC0_BASE_ADDR + oINTENCLEAR)
+#define VIC0SOFTINT (ELFIN_VIC0_BASE_ADDR + oSOFTINT)
+#define VIC0SOFTINTCLEAR (ELFIN_VIC0_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC0PROTECTION (ELFIN_VIC0_BASE_ADDR + oPROTECTION)
+#define VIC0SWPRIORITYMASK (ELFIN_VIC0_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC0PRIORITYDAISY (ELFIN_VIC0_BASE_ADDR + oPRIORITYDAISY)
+#define VIC0VECTADDR(X) (ELFIN_VIC0_BASE_ADDR + oVECTADDR(X))
+#define VIC0VECPRIORITY(X) (ELFIN_VIC0_BASE_ADDR + oVECPRIORITY(X))
+#define VIC0VECTADDRESS (ELFIN_VIC0_BASE_ADDR + oVECTADDRESS)
+
+#define VIC1IRQSTATUS (ELFIN_VIC1_BASE_ADDR + oIRQSTATUS)
+#define VIC1FIQSTATUS (ELFIN_VIC1_BASE_ADDR + oFIQSTATUS)
+#define VIC1RAWINTR (ELFIN_VIC1_BASE_ADDR + oRAWINTR)
+#define VIC1INTSELECT (ELFIN_VIC1_BASE_ADDR + oINTSELECT)
+#define VIC1INTENABLE (ELFIN_VIC1_BASE_ADDR + oINTENABLE)
+#define VIC1INTENCLEAR (ELFIN_VIC1_BASE_ADDR + oINTENCLEAR)
+#define VIC1SOFTINT (ELFIN_VIC1_BASE_ADDR + oSOFTINT)
+#define VIC1SOFTINTCLEAR (ELFIN_VIC1_BASE_ADDR + oSOFTINTCLEAR)
+#define VIC1PROTECTION (ELFIN_VIC1_BASE_ADDR + oPROTECTION)
+#define VIC1SWPRIORITYMASK (ELFIN_VIC1_BASE_ADDR + oSWPRIORITYMASK)
+#define VIC1PRIORITYDAISY (ELFIN_VIC1_BASE_ADDR + oPRIORITYDAISY)
+#define VIC1VECTADDR(X) (ELFIN_VIC1_BASE_ADDR + oVECTADDR(X))
+#define VIC1VECPRIORITY(X) (ELFIN_VIC1_BASE_ADDR + oVECPRIORITY(X))
+#define VIC1VECTADDRESS (ELFIN_VIC1_BASE_ADDR + oVECTADDRESS)
+
+
+/* interrupt pending bit */
+#define IRQ_VIC0_BASE 0
+#define IRQ_VIC1_BASE 32
+#define IRQ_VIC0(X) (IRQ_VIC0_BASE + (X))
+#define IRQ_VIC1(X) (IRQ_VIC1_BASE + (X))
+#define IRQ_TOTAL 64
+
+/* VIC0 */
+#define IRQ_EINT0_3 IRQ_VIC0(0)
+#define IRQ_EINT4_11 IRQ_VIC0(1)
+#define IRQ_RTC_TIC IRQ_VIC0(2)
+#define IRQ_CAMIF_C IRQ_VIC0(3)
+#define IRQ_CAMIF_P IRQ_VIC0(4)
+#define IRQ_IIC1 IRQ_VIC0(5)
+#define IRQ_IIS IRQ_VIC0(6)
+#define IRQ_UNUSED7 IRQ_VIC0(7)
+#define IRQ_3D IRQ_VIC0(8)
+#define IRQ_POST0 IRQ_VIC0(9)
+#define IRQ_ROTATOR IRQ_VIC0(10)
+#define IRQ_2D IRQ_VIC0(11)
+#define IRQ_TVENC IRQ_VIC0(12)
+#define IRQ_SCALER IRQ_VIC0(13)
+#define IRQ_BATF IRQ_VIC0(14)
+#define IRQ_JPEG IRQ_VIC0(15)
+#define IRQ_MFC IRQ_VIC0(16)
+#define IRQ_SDMA0 IRQ_VIC0(17)
+#define IRQ_SDMA1 IRQ_VIC0(18)
+#define IRQ_ARM_DMAERR IRQ_VIC0(19)
+#define IRQ_ARM_DMA IRQ_VIC0(20)
+#define IRQ_ARM_DMAS IRQ_VIC0(21)
+#define IRQ_KEYPAD IRQ_VIC0(22)
+#define IRQ_TIMER0 IRQ_VIC0(23)
+#define IRQ_TIMER1 IRQ_VIC0(24)
+#define IRQ_TIMER2 IRQ_VIC0(25)
+#define IRQ_WDT IRQ_VIC0(26)
+#define IRQ_TIMER3 IRQ_VIC0(27)
+#define IRQ_TIMER4 IRQ_VIC0(28)
+#define IRQ_LCD_FIFO IRQ_VIC0(29)
+#define IRQ_LCD_VSYNC IRQ_VIC0(30)
+#define IRQ_LCD_SYSTEM IRQ_VIC0(31)
+
+/* VIC1 */
+#define IRQ_EINT12_19 IRQ_VIC1(0)
+#define IRQ_EINT20_27 IRQ_VIC1(1)
+#define IRQ_PCM0 IRQ_VIC1(2)
+#define IRQ_PCM1 IRQ_VIC1(3)
+#define IRQ_AC97 IRQ_VIC1(4)
+#define IRQ_UART0 IRQ_VIC1(5)
+#define IRQ_UART1 IRQ_VIC1(6)
+#define IRQ_UART2 IRQ_VIC1(7)
+#define IRQ_UART3 IRQ_VIC1(8)
+#define IRQ_DMA0 IRQ_VIC1(9)
+#define IRQ_DMA1 IRQ_VIC1(10)
+#define IRQ_ONENAND0 IRQ_VIC1(11)
+#define IRQ_ONENAND1 IRQ_VIC1(12)
+#define IRQ_NFC IRQ_VIC1(13)
+#define IRQ_CFC IRQ_VIC1(14)
+#define IRQ_USBH IRQ_VIC1(15)
+#define IRQ_SPI0 IRQ_VIC1(16)
+#define IRQ_SPI1 IRQ_VIC1(17)
+#define IRQ_IIC0 IRQ_VIC1(18)
+#define IRQ_HSItx IRQ_VIC1(19)
+#define IRQ_HSIrx IRQ_VIC1(20)
+#define IRQ_EINT4 IRQ_VIC1(21)
+#define IRQ_MSM IRQ_VIC1(22)
+#define IRQ_HOSTIF IRQ_VIC1(23)
+#define IRQ_HSMMC0 IRQ_VIC1(24)
+#define IRQ_HSMMC1 IRQ_VIC1(25)
+#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */
+#define IRQ_OTG IRQ_VIC1(26)
+#define IRQ_IRDA IRQ_VIC1(27)
+#define IRQ_RTC_ALARM IRQ_VIC1(28)
+#define IRQ_SEC IRQ_VIC1(29)
+#define IRQ_PENDN IRQ_VIC1(30)
+#define IRQ_TC IRQ_PENDN
+#define IRQ_ADC IRQ_VIC1(31)
+#define IRQ_ALLMSK (0xFFFFFFFF)
+
+
+#ifndef __ASSEMBLY__
+
+#define Fld(Size, Shft) (((Size) << 16) + (Shft))
+#define FSize(Field) ((Field) >> 16)
+#define FShft(Field) ((Field) & 0x0000FFFF)
+#define FMsk(Field) (((UData (1) << FSize(Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field) ((UData (1) << FSize(Field)) - 1)
+#define F1stBit(Field) (UData (1) << FShft(Field))
+
+#define FClrBit(Data, Bit) (Data = (Data & ~(Bit)))
+#define FClrFld(Data, Field) (Data = (Data & ~FMsk(Field)))
+
+#define FInsrt(Value, Field) (UData(Value) << FShft(Field))
+#define FExtr(Data, Field) ((UData(Data) >> FShft(Field)) & FAlnMsk(Field))
+
+
+typedef unsigned char u8;
+typedef unsigned short u16;
+typedef unsigned int u32;
+
+struct rt_hw_register
+{
+ unsigned int r0;
+ unsigned int r1;
+ unsigned int r2;
+ unsigned int r3;
+ unsigned int r4;
+ unsigned int r5;
+ unsigned int r6;
+ unsigned int r7;
+ unsigned int r8;
+ unsigned int r9;
+ unsigned int r10;
+ unsigned int fp;
+ unsigned int ip;
+ unsigned int sp;
+ unsigned int lr;
+ unsigned int pc;
+ unsigned int cpsr;
+ unsigned int ORIG_r0;
+};
+
+/* UART (see manual chapter 11) */
+typedef struct {
+ volatile u32 ULCON;
+ volatile u32 UCON;
+ volatile u32 UFCON;
+ volatile u32 UMCON;
+ volatile u32 UTRSTAT;
+ volatile u32 UERSTAT;
+ volatile u32 UFSTAT;
+ volatile u32 UMSTAT;
+#ifdef __BIG_ENDIAN
+ volatile u8 res1[3];
+ volatile u8 UTXH;
+ volatile u8 res2[3];
+ volatile u8 URXH;
+#else /* Little Endian */
+ volatile u8 UTXH;
+ volatile u8 res1[3];
+ volatile u8 URXH;
+ volatile u8 res2[3];
+#endif
+ volatile u32 UBRDIV;
+#ifdef __BIG_ENDIAN
+ volatile u8 res3[2];
+ volatile u16 UDIVSLOT;
+#else
+ volatile u16 UDIVSLOT;
+ volatile u8 res3[2];
+#endif
+} s3c64xx_uart;
+
+enum s3c64xx_uarts_nr
+{
+ S3C64XX_UART0,
+ S3C64XX_UART1,
+ S3C64XX_UART2,
+};
+
+static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+{
+ return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+}
+
+static inline unsigned char s3c_readb(unsigned int addr)
+{
+ return *(volatile unsigned char *)(addr);
+}
+static inline unsigned short s3c_readw(unsigned int addr)
+{
+ return *(volatile unsigned short *)(addr);
+}
+static inline unsigned int s3c_readl(unsigned int addr)
+{
+ return *(volatile unsigned int *)(addr);
+}
+static inline void s3c_writeb(unsigned char bval, unsigned int addr)
+{
+ *(volatile unsigned char *)(addr) = bval;
+}
+static inline void s3c_writew(unsigned short wval, unsigned int addr)
+{
+ *(volatile unsigned short *)(addr) = wval;
+}
+static inline void s3c_writel(unsigned int lval, unsigned int addr)
+{
+ *(volatile unsigned int *)(addr) = lval;
+}
+
+#endif /* end of __ASSEMBLY__ */
+
+
+#endif /*__S3C6410_H__*/
diff --git a/ok6410/src/bootloader/bootstrap/start.S b/ok6410/src/bootloader/bootstrap/start.S
new file mode 100644
index 0000000..785ff1b
--- /dev/null
+++ b/ok6410/src/bootloader/bootstrap/start.S
@@ -0,0 +1,274 @@
+/***********************************************************************
+ * File: start.S
+ * Version: 1.0.0
+ * Copyright: 2013 (c) Guo Wenxue <guowenxue@gmail.com>
+ * Description: This ASM used to disable watch dog and interrupt, and initialise
+ * the system clock and DDR SDRAM.
+ * ChangeLog: 1, Release initial version on "Sun Feb 24 15:06:12 CST 2013"
+ *
+ ***********************************************************************/
+
+#include "s3c6410.h"
+
+ .section .init, "ax"
+ .global _start
+
+_start:
+ /* Enable Instruction Cache */
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7, 0 /* Invalidate Entire I&D Cache */
+ mrc p15, 0, r0, c1, c0, 0 /* Enable I Cache */
+ orr r0, r0, #R1_I
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* disable vector interrupt */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #(1<<24)
+ mcr p15, 0, r0, c1, c0, 0
+
+ /* Peri port setup */
+ ldr r0, =ELFIN_SROM_BASE
+ orr r0, r0, #0x13
+ mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff)
+
+ /* Disable watchdog */
+ ldr r0, =WTCON
+ mov r1, #0
+ str r1, [r0]
+
+ /* disable all interrupt */
+ ldr r0, =VIC0INTENCLEAR
+ ldr r1, =0xFFFFFFFF;
+ str r1, [r0]
+ ldr r1, =VIC1INTENCLEAR
+ str r1, [r0]
+
+ bl system_clock_init /* setup clock */
+ bl mem_ctrl_asm_init /* initialize DDR RAM */
+ bl setup_led
+
+halt:
+ b halt
+
+
+
+/************************************************************
+ * system_clock_init: Initialize core clock and bus clock. *
+ ************************************************************/
+ .globl system_clock_init
+system_clock_init:
+ ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
+
+#ifdef CONFIG_SYNC_MODE /* Set to Synchronous Mode, HCLK and PCLK from APLL */
+ ldr r1, [r0, #oOTHERS]
+ mov r2, #0x40 /* SyncMUXSEL = DOUT_APLL */
+ orr r1, r1, r2
+ str r1, [r0, #oOTHERS]
+ nop
+ nop
+ nop
+ nop
+ nop
+ ldr r2, =0x80 /* SyncReq = request Sync */
+ orr r1, r1, r2
+ str r1, [r0, #oOTHERS]
+
+check_syncack:
+ ldr r1, [r0, #oOTHERS]
+ ldr r2, =0xF00
+ and r1, r1, r2 /* Wait SYNCMODEACK = 0xF */
+ cmp r1, #0xF00
+ bne check_syncack
+
+#else /* CONFIG_ASYNC_MODE: Set to Asynchronous Mode, HCLK and PCLK from MPLL */
+ ldr r1, [r0, #oOTHERS]
+ bic r1, r1, #0xC0
+ orr r1, r1, #0x40
+ str r1, [r0, #oOTHERS]
+
+wait_for_async:
+ ldr r1, [r0, #oOTHERS]
+ and r1, r1, #0xf00 /* Wait SYNCMODEACK = 0x0 */
+ cmp r1, #0x0
+ bne wait_for_async
+
+ ldr r1, [r0, #oOTHERS]
+ bic r1, r1, #0x40 /* SyncMUX = Async */
+ str r1, [r0, #oOTHERS]
+
+#endif /* CONFIG_SYNC_MODE end */
+
+ /* Set lock time*/
+ mov r1, #0xff00
+ orr r1, r1, #0xff
+ str r1, [r0, #oAPLL_LOCK]
+ str r1, [r0, #oMPLL_LOCK]
+ str r1, [r0, #oEPLL_LOCK]
+
+ /* Set Clock Divider */
+ ldr r1, [r0, #oCLK_DIV0]
+ bic r1, r1, #0x30000
+ bic r1, r1, #0xff00
+ bic r1, r1, #0xff
+ ldr r2, =CLK_DIV_VAL
+ orr r1, r1, r2
+ str r1, [r0, #oCLK_DIV0]
+
+ /* Set System Clock Divider */
+ ldr r1, =APLL_VAL
+ str r1, [r0, #oAPLL_CON]
+
+ ldr r1, =MPLL_VAL
+ str r1, [r0, #oMPLL_CON]
+
+ ldr r1, =EPLL_VAL
+ str r1, [r0, #oEPLL_CON0]
+ ldr r1, =EPLL_KVAL
+ str r1, [r0, #oEPLL_CON1]
+
+ /* APLL, MPLL, EPLL select to Fout */
+ ldr r1, [r0, #oCLK_SRC]
+ orr r1, r1, #0x7 /* PLL Clockout */
+ str r1, [r0, #oCLK_SRC]
+
+ /* wait at least 200us to stablize all clock */
+ mov r1, #0x10000
+1: subs r1, r1, #1
+ bne 1b
+
+ mov pc, lr
+
+
+ /***************************
+ * DDR SDRAM initialisze *
+ ***************************/
+ .globl mem_ctrl_asm_init
+mem_ctrl_asm_init:
+ ldr r0, =ELFIN_MEM_SYS_CFG /* Memory sussystem address 0x7e00f120 */
+ @mov r1, #0xd /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
+ mov r1, #S3C64XX_MEM_SYS_CFG_NAND /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
+ str r1, [r0]
+
+ ldr r0, =ELFIN_DMC1_BASE /* DMC1 base address 0x7e001000 */
+
+ @Enter Config State
+ ldr r1, =0x04
+ str r1, [r0, #INDEX_DMC_MEMC_CMD]
+
+ ldr r1, =DMC_DDR_REFRESH_PRD
+ str r1, [r0, #INDEX_DMC_REFRESH_PRD]
+
+ ldr r1, =DMC_DDR_CAS_LATENCY
+ str r1, [r0, #INDEX_DMC_CAS_LATENCY]
+
+ ldr r1, =DMC_DDR_t_DQSS
+ str r1, [r0, #INDEX_DMC_T_DQSS]
+
+ ldr r1, =DMC_DDR_t_MRD
+ str r1, [r0, #INDEX_DMC_T_MRD]
+
+ ldr r1, =DMC_DDR_t_RAS
+ str r1, [r0, #INDEX_DMC_T_RAS]
+
+ ldr r1, =DMC_DDR_t_RC
+ str r1, [r0, #INDEX_DMC_T_RC]
+
+ ldr r1, =DMC_DDR_t_RCD
+ ldr r2, =DMC_DDR_schedule_RCD
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RCD]
+
+
+ ldr r1, =DMC_DDR_t_RFC
+ ldr r2, =DMC_DDR_schedule_RFC
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RFC]
+
+ ldr r1, =DMC_DDR_t_RP
+ ldr r2, =DMC_DDR_schedule_RP
+ orr r1, r1, r2
+ str r1, [r0, #INDEX_DMC_T_RP]
+
+ ldr r1, =DMC_DDR_t_RRD
+ str r1, [r0, #INDEX_DMC_T_RRD]
+
+ ldr r1, =DMC_DDR_t_WR
+ str r1, [r0, #INDEX_DMC_T_WR]
+
+ ldr r1, =DMC_DDR_t_WTR
+ str r1, [r0, #INDEX_DMC_T_WTR]
+
+ ldr r1, =DMC_DDR_t_XP
+ str r1, [r0, #INDEX_DMC_T_XP]
+
+ ldr r1, =DMC_DDR_t_XSR
+ str r1, [r0, #INDEX_DMC_T_XSR]
+
+ ldr r1, =DMC_DDR_t_ESR
+ str r1, [r0, #INDEX_DMC_T_ESR]
+
+ ldr r1, =DMC1_MEM_CFG
+ str r1, [r0, #INDEX_DMC_MEMORY_CFG]
+
+ ldr r1, =DMC1_MEM_CFG2
+ str r1, [r0, #INDEX_DMC_MEMORY_CFG2]
+
+ ldr r1, =DMC1_CHIP0_CFG
+ str r1, [r0, #INDEX_DMC_CHIP_0_CFG]
+
+ ldr r1, =DMC_DDR_32_CFG
+ str r1, [r0, #INDEX_DMC_USER_CONFIG]
+
+ @DMC0 DDR Chip 0 configuration direct command reg
+ ldr r1, =DMC_NOP0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Precharge All
+ ldr r1, =DMC_PA0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Auto Refresh 2 time
+ ldr r1, =DMC_AR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @MRS
+ ldr r1, =DMC_mDDR_EMR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Mode Reg
+ ldr r1, =DMC_mDDR_MR0
+ str r1, [r0, #INDEX_DMC_DIRECT_CMD]
+
+ @Enable DMC1, Enter Ready State
+ mov r1, #0x0
+ str r1, [r0, #INDEX_DMC_MEMC_CMD]
+
+ @Wait for Ready
+_check_dmc1_ready:
+ ldr r1, [r0, #INDEX_DMC_MEMC_STATUS]
+ mov r2, #0x3
+ and r1, r1, r2
+ cmp r1, #0x1
+ bne _check_dmc1_ready
+ nop
+
+ mov pc, lr
+
+setup_led:
+ /*Set GPM0, GPM1, GPM2, GPM3 as GPIO OUTPUT mode*/
+ ldr r0, =ELFIN_GPIO_BASE
+ ldr r1, [r0, #oGPMCON]
+ bic r1, r1, #0x00FF /*Set GPMCON for GPM0,GPM1 as 0x00 */
+ orr r1, r1, #0x0011 /*Set GPMCON for GPM0,GPM1 as GPIOOUT, 0x01*/
+ bic r1, r1, #0xFF00 /*Set GPMCON for GPM2,GPM3 as 0x00*/
+ orr r1, r1, #0x1100 /*Set GPMCON for GPM2,GPM3 as GPIOOUT, 0x01*/
+ str r1, [r0, #oGPMCON]
+
+ /* Turn on LED1, LED2, LED3, LED4 */
+ ldr r1, [r0, #oGPMDAT]
+ bic r1, r1, #0xF /*Set bit[0:3] as low level*/
+ str r1, [r0, #oGPMDAT]
+
+ mov pc, lr
+
diff --git a/ok6410/src/bootloader/u-boot/build.sh b/ok6410/src/bootloader/u-boot/build.sh
new file mode 100644
index 0000000..69ee710
--- /dev/null
+++ b/ok6410/src/bootloader/u-boot/build.sh
@@ -0,0 +1,162 @@
+#!/bin/sh
+# Descripion: This shell script used to choose a u-boot version to cross compile
+# Author: GuoWenxue<guowenxue@gmail.com>
+# ChangeLog:
+# 1, Version 1.0.0(2011.04.01), initialize first version
+# 2, Version 1.0.1(2011.04.03), modify it to compatible with Linux kernel build script
+# 3, Version 1.1.0(2011.04.10), modify to support s3c2410 cross compile support
+#
+
+#User can pass a argument to specify which version should be cross compile
+#or uncomment the SRC_NAME variable to specify the version
+
+#SRC_NAME=u-boot-2010.09
+
+PWD=`pwd`
+PACKET_DIR=$PWD
+PATCH_DIR=$PWD/patch
+INST_PATH=$PWD/../../../bin
+
+BOARD=ok6410
+
+if [ -z "$CROSS" ] ; then
+ CROSS=/opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+fi
+
+#===============================================================
+# Functions forward definition =
+#===============================================================
+sup_ver=("" "u-boot-2010.09")
+function select_version()
+{
+ echo "Current support U-Boot version:"
+ i=1
+ len=${#sup_ver[*]}
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_ver[$i]}"
+ let i++;
+ done
+
+ if [ $len -eq 2 ] ; then
+ SRC_NAME=${sup_ver[1]}
+ return;
+ fi
+
+ echo "Please select: "
+ index=
+ read index
+
+ SRC_NAME=${sup_ver[$index]}
+}
+
+sup_boards=("" "ok6410")
+function select_board()
+{
+ echo "Current support OK6410 boards:"
+ i=1
+ len=${#sup_boards[*]}
+
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_boards[$i]}"
+ let i++;
+ done
+
+ echo "Please select: "
+ index=
+ read index
+
+ BOARD=${sup_boards[$index]}
+}
+
+
+function disp_banner()
+{
+ echo ""
+ echo "*******************************************************"
+ echo "* Cross compile $SRC_NAME for $BOARD now... "
+ echo "*******************************************************"
+ echo ""
+}
+
+#===============================================================
+# Script excute body start =
+#===============================================================
+
+# If not define default version, then let user choose a one
+if [ -z $SRC_NAME ] ; then
+ select_version
+fi
+
+# If don't set the BOARD, then select one
+if [ -z $BOARD ] ; then
+ select_board
+fi
+
+disp_banner
+
+# If $SRC_NAME not set, then abort this cross compile
+if [ -z $SRC_NAME ] ; then
+ echo "ERROR: Please choose a valid version to cross compile"
+ exit 1;
+fi
+
+# Check patche file exist or not
+PATCH_FILE=$PATCH_DIR/$SRC_NAME-$BOARD.patch
+if [ ! -f $PATCH_FILE ] ; then
+ echo "ERROR:$SRC_NAME patch file doesn't exist:"
+ echo "PATH: \"$PATCH_FILE\""
+ echo ""
+ exit
+fi
+
+# Check original source code packet exist or not
+SRC_ORIG_PACKET=$PACKET_DIR/$SRC_NAME.tar.bz2
+if [ ! -s $SRC_ORIG_PACKET ] ; then
+ echo "============================================================================"
+ echo "ERROR:$SRC_NAME source code patcket doesn't exist:"
+ echo "PATH: \"$SRC_ORIG_PACKET\""
+ DL_ADDR="ftp://ftp.denx.de/pub/u-boot/$SRC_NAME.tar.bz2"
+ echo ""
+ echo "Download $DL_ADDR now... "
+ echo "============================================================================"
+ wget $DL_ADDR
+
+ if [ ! -s $SRC_ORIG_PACKET ] ; then
+ echo "Download $DL_ADDR failure, exit now... "
+ exit
+ fi
+fi
+
+#decompress the source code packet and patch
+echo "* Decompress the source code patcket and patch now... *"
+
+if [ -d $SRC_NAME ] ; then
+ rm -rf $SRC_NAME
+fi
+
+if [ ! -d $INST_PATH ] ; then
+ mkdir -p $INST_PATH
+fi
+
+#Remove old source code
+tar -xjf $SRC_ORIG_PACKET
+
+#Start to cross compile the source code and install it now
+cd $SRC_NAME
+patch -p1 < $PATCH_FILE
+
+#If don't do "make $BOARD_config", it will configure for the board first
+if [ ! -s include/config.mk ] ; then
+ make ${BOARD}_config
+fi
+make
+
+CPU="s3c`echo $BOARD | sed 's/[^0-9.]//g'`"
+
+set -x
+cp -af u-boot.bin $INST_PATH/u-boot-$CPU.bin
+cp -af u-boot.bin /tftp/u-boot-$CPU.bin
+cp -af tools/mkimage $INST_PATH
+
diff --git a/ok6410/src/bootloader/u-boot/patch/gen_patch.sh b/ok6410/src/bootloader/u-boot/patch/gen_patch.sh
new file mode 100644
index 0000000..6e0948f
--- /dev/null
+++ b/ok6410/src/bootloader/u-boot/patch/gen_patch.sh
@@ -0,0 +1,70 @@
+#!/bin/sh
+# Description: This shell script used to generate the patch file
+# Author: GuoWenxue<guowenxue@gmail.com>
+# Changlog:
+# 1, Version 1.0.0(2011.04.01), initialize first version
+#
+
+PWD=`pwd`
+PACKET_DIR=$PWD
+
+# Parameter valid check
+if [ $# != 2 ] ; then
+ echo "+---------------------------------------------------"
+ echo "| Usage: $0 [SRC_FOLDER] [ARCH]"
+ echo "| Example: $0 u-boot-2010.09 fl2440"
+ echo "| Example: $0 u-boot-1.3.4 at91sam9260"
+ echo "+---------------------------------------------------"
+ exit;
+fi
+
+SRC_NAME=`basename $1`
+ARCH=$2
+
+# Check latest source code exist or not
+if [ ! -d $SRC_NAME ] ; then
+ echo "+-------------------------------------------------------------------"
+ echo "| ERROR: Source code \"$SRC_NAME\" doesn't exist!"
+ echo "+-------------------------------------------------------------------"
+ exit;
+fi
+
+SRC_PACKET_PATH=$PACKET_DIR/$SRC_NAME.tar.bz2
+# Check original source code packet exist or not
+if [ ! -s $SRC_PACKET_PATH ] ; then
+ echo "+-------------------------------------------------------------------"
+ echo "| ERROR: Orignal source code packet doesn't exist!"
+ echo "| $SRC_PACKET_PATH"
+ echo "+-------------------------------------------------------------------"
+ exit;
+fi
+
+# Clean up the source code
+echo "+----------------------------------------------------------"
+echo "| Clean up the new source code "
+echo "+----------------------------------------------------------"
+NEW_SRC=$SRC_NAME-$ARCH
+cd $SRC_NAME
+rm -f tags cscope*
+make distclean
+cd ..
+mv $SRC_NAME $NEW_SRC
+
+echo "+----------------------------------------------------------"
+echo "| Decompress original source code packet "
+echo "+----------------------------------------------------------"
+ORIG_SRC=$SRC_NAME
+tar -xjf $SRC_PACKET_PATH
+
+# Generate the patch file
+echo "+------------------------------------------------------------------------"
+echo "| Generate patch file \"$NEW_SRC.patch\" "
+echo "+------------------------------------------------------------------------"
+diff -Nuar $ORIG_SRC $NEW_SRC > $NEW_SRC.patch
+
+# Rollback to the original status
+rm -rf $ORIG_SRC
+mv $NEW_SRC $SRC_NAME
+
+
+
diff --git a/ok6410/src/bootloader/u-boot/patch/u-boot-2010.09-ok6410.patch b/ok6410/src/bootloader/u-boot/patch/u-boot-2010.09-ok6410.patch
new file mode 100644
index 0000000..40bfe75
--- /dev/null
+++ b/ok6410/src/bootloader/u-boot/patch/u-boot-2010.09-ok6410.patch
@@ -0,0 +1,1722 @@
+diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/Makefile u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/Makefile
+--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/Makefile 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/Makefile 2014-01-04 09:13:24.728450119 +0800
+@@ -30,7 +30,7 @@
+
+ SOBJS = reset.o
+
+-COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
++COBJS-$(CONFIG_S3C64XX) += cpu_init.o speed.o
+ COBJS-y += timer.o
+
+ OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/speed.c u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/speed.c
+--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/speed.c 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/speed.c 2014-01-04 09:13:24.728450119 +0800
+@@ -132,7 +132,7 @@
+
+ int print_cpuinfo(void)
+ {
+- printf("\nCPU: S3C6400@%luMHz\n", get_ARMCLK() / 1000000);
++ printf("\nCPU: S3C6410@%luMHz\n", get_ARMCLK() / 1000000);
+ printf(" Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
+ get_FCLK() / 1000000, get_HCLK() / 1000000,
+ get_PCLK() / 1000000);
+diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/timer.c u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/timer.c
+--- u-boot-2010.09/arch/arm/cpu/arm1176/s3c64xx/timer.c 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/s3c64xx/timer.c 2014-01-04 09:13:24.736448718 +0800
+@@ -43,7 +43,7 @@
+ #include <asm/arch/s3c6400.h>
+ #include <div64.h>
+
+-static ulong timer_load_val;
++DECLARE_GLOBAL_DATA_PTR;
+
+ #define PRESCALER 167
+
+@@ -60,12 +60,6 @@
+ return timers->TCNTO4;
+ }
+
+-/* Internal tick units */
+-/* Last decremneter snapshot */
+-static unsigned long lastdec;
+-/* Monotonic incrementing timer */
+-static unsigned long long timestamp;
+-
+ int timer_init(void)
+ {
+ s3c64xx_timers *const timers = s3c64xx_get_base_timers();
+@@ -83,20 +77,18 @@
+ * the prescaler automatically for other PCLK frequencies.
+ */
+ timers->TCFG0 = PRESCALER << 8;
+- if (timer_load_val == 0) {
+- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
+- timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
+- }
++ gd->timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
++ timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
+
+ /* load value for 10 ms timeout */
+- lastdec = timers->TCNTB4 = timer_load_val;
++ gd->lastinc = timers->TCNTB4 = gd->timer_rate_hz;
+ /* auto load, manual update of Timer 4 */
+ timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
+ TCON_4_UPDATE;
+
+ /* auto load, start Timer 4 */
+ timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
+- timestamp = 0;
++ gd->timer_reset_value = 0;
+
+ return 0;
+ }
+@@ -113,16 +105,16 @@
+ {
+ ulong now = read_timer();
+
+- if (lastdec >= now) {
++ if (gd->lastinc >= now) {
+ /* normal mode */
+- timestamp += lastdec - now;
++ gd->timer_reset_value += gd->lastinc - now;
+ } else {
+ /* we have an overflow ... */
+- timestamp += lastdec + timer_load_val - now;
++ gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now;
+ }
+- lastdec = now;
++ gd->lastinc = now;
+
+- return timestamp;
++ return gd->timer_reset_value;
+ }
+
+ /*
+@@ -132,14 +124,14 @@
+ ulong get_tbclk(void)
+ {
+ /* We overrun in 100s */
+- return (ulong)(timer_load_val / 100);
++ return (ulong)(gd->timer_rate_hz / 100);
+ }
+
+ void reset_timer_masked(void)
+ {
+ /* reset time */
+- lastdec = read_timer();
+- timestamp = 0;
++ gd->lastinc = read_timer();
++ gd->timer_reset_value = 0;
+ }
+
+ void reset_timer(void)
+@@ -150,7 +142,7 @@
+ ulong get_timer_masked(void)
+ {
+ unsigned long long res = get_ticks();
+- do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
++ do_div(res, (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ)));
+ return res;
+ }
+
+@@ -161,7 +153,7 @@
+
+ void set_timer(ulong t)
+ {
+- timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
++ gd->timer_reset_value = t * (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ));
+ }
+
+ void __udelay(unsigned long usec)
+@@ -170,7 +162,7 @@
+ ulong tmo;
+
+ tmo = (usec + 9) / 10;
+- tmp = get_ticks() + tmo; /* get current timestamp */
++ tmp = get_ticks() + tmo; /* get current timer_reset_value */
+
+ while (get_ticks() < tmp)/* loop till event */
+ /*NOP*/;
+diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/start.S u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/start.S
+--- u-boot-2010.09/arch/arm/cpu/arm1176/start.S 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/start.S 2014-01-04 09:13:24.744448764 +0800
+@@ -36,6 +36,8 @@
+ #include <asm/proc/domain.h>
+ #endif
+
++#include <asm/arch/s3c6400.h>
++
+ #if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
+ #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
+ #endif
+@@ -232,6 +234,59 @@
+ ble copy_loop
+ #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
+
++#ifdef CONFIG_BOOT_NAND
++relocate: /* relocate U-Boot to RAM */
++ adr r0, _start /* r0 <- current position of code */
++ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
++ cmp r0, r1 /* don't reloc during debug */
++ beq stack_setup
++
++ /* Prepare to call C functions */
++ ldr sp, _TEXT_PHY_BASE /* setup temp stack pointer */
++ sub sp, sp, #12
++ mov fp, #0 /* no previous frame, so fp=0 */
++
++ bl copy_uboot_to_ram /* Jump to C functions */
++ tst r0, #0x0 /* Check return value */
++ bne copy_failed
++
++ ldr r0, =0x0c000000 /*The first 8K data in internal SRAM*/
++ ldr r1, _TEXT_PHY_BASE /*The first 8K data read from Nandflash into SDRAM*/
++ mov r2, #0x1000 /*The compare data length: 4K*/
++
++compare_next_byte:
++ ldr r3, [r0], #4
++ ldr r4, [r1], #4
++ teq r3, r4
++ bne copy_failed
++
++ subs r2, r2, #4
++ bne compare_next_byte /* Compare not finished */
++
++#ifdef CONFIG_OK6410_LED
++ /*Turn LED1 on*/
++ ldr r0, =ELFIN_GPIO_BASE
++ ldr r1, [r0, #GPMDAT_OFFSET]
++ bic r1, r1, #0x1
++ str r1, [r0, #GPMDAT_OFFSET]
++#endif
++
++ beq stack_setup /* Compare finish and it's ok, start setup stack */
++
++copy_failed: /* compare failed */
++#ifdef CONFIG_OK6410_LED
++ /*Turn LED4 on*/
++ ldr r0, =ELFIN_GPIO_BASE
++ ldr r1, [r0, #GPMDAT_OFFSET]
++ bic r1, r1, #0x8
++ str r1, [r0, #GPMDAT_OFFSET]
++#endif
++
++ nop
++ b copy_failed
++#endif /* CONFIG_BOOT_FROM_NORFLASH */
++
++
+ #ifdef CONFIG_ENABLE_MMU
+ enable_mmu:
+ /* enable domain access */
+diff -Nuar u-boot-2010.09/arch/arm/cpu/arm1176/u-boot.lds u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/u-boot.lds
+--- u-boot-2010.09/arch/arm/cpu/arm1176/u-boot.lds 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/cpu/arm1176/u-boot.lds 2014-01-04 09:13:24.744448764 +0800
+@@ -32,6 +32,9 @@
+ .text :
+ {
+ arch/arm/cpu/arm1176/start.o (.text)
++ arch/arm/cpu/arm1176/s3c64xx/cpu_init.o (.text)
++ board/kkernel/ok6410/lowlevel_init.o (.text)
++ board/kkernel/ok6410/nand_cp.o (.text)
+ *(.text)
+ }
+
+diff -Nuar u-boot-2010.09/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h u-boot-2010.09-ok6410/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+--- u-boot-2010.09/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h 2014-01-04 09:13:24.745447999 +0800
+@@ -34,7 +34,7 @@
+ #ifndef __S3C64XX_H__
+ #define __S3C64XX_H__
+
+-#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
++#if defined(CONFIG_SYNC_MODE) && (defined(CONFIG_S3C6400) || defined(CONFIG_S3C6410))
+ #error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
+ #endif
+
+diff -Nuar u-boot-2010.09/arch/arm/include/asm/global_data.h u-boot-2010.09-ok6410/arch/arm/include/asm/global_data.h
+--- u-boot-2010.09/arch/arm/include/asm/global_data.h 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/arch/arm/include/asm/global_data.h 2014-01-04 09:13:24.745447999 +0800
+@@ -47,6 +47,14 @@
+ #ifdef CONFIG_FSL_ESDHC
+ unsigned long sdhc_clk;
+ #endif
++#ifdef CONFIG_ARM /* Add by guowenxue from u-boot-2012.10 */
++ /* "static data" needed by most of timer.c on ARM platforms */
++ unsigned long timer_rate_hz;
++ unsigned long tbl;
++ unsigned long tbu;
++ unsigned long long timer_reset_value;
++ unsigned long lastinc;
++#endif
+ #if 0
+ unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long bus_clk;
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/config.mk u-boot-2010.09-ok6410/board/kkernel/ok6410/config.mk
+--- u-boot-2010.09/board/kkernel/ok6410/config.mk 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/config.mk 2014-01-04 09:13:24.745447999 +0800
+@@ -0,0 +1,32 @@
++#
++# (C) Copyright 2002
++# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
++# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
++#
++# (C) Copyright 2008
++# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++#
++# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
++#
++# see http://www.samsung.com/ for more information on SAMSUNG
++
++# On SMDK6400 we use the 64 MB SDRAM bank at
++#
++# 0x50000000 to 0x58000000
++#
++# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
++#
++# we load ourselves to 0x57e00000 without MMU
++# with MMU, load address is changed to 0xc7e00000
++#
++# download area is 0x5000c000
++
++sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
++
++ifndef CONFIG_NAND_SPL
++TEXT_BASE = $(RAM_TEXT)
++else
++TEXT_BASE = 0
++endif
++
++LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/lowlevel_init.S u-boot-2010.09-ok6410/board/kkernel/ok6410/lowlevel_init.S
+--- u-boot-2010.09/board/kkernel/ok6410/lowlevel_init.S 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/lowlevel_init.S 2014-01-04 09:13:24.746456662 +0800
+@@ -0,0 +1,322 @@
++/*
++ * Memory Setup stuff - taken from blob memsetup.S
++ *
++ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
++ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
++ *
++ * Modified for the Samsung SMDK2410 by
++ * (C) Copyright 2002
++ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
++ *
++ * (C) Copyright 2008
++ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++
++#include <config.h>
++#include <version.h>
++
++#include <asm/arch/s3c6400.h>
++
++#ifdef CONFIG_SERIAL1
++#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
++#elif defined(CONFIG_SERIAL2)
++#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
++#else
++#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET)
++#endif
++
++_TEXT_BASE:
++ .word TEXT_BASE
++
++ .globl lowlevel_init
++lowlevel_init:
++ mov r12, lr
++
++#ifdef CONFIG_OK6410_LED
++ ldr r0, =ELFIN_GPIO_BASE
++ ldr r1, [r0, #GPMCON_OFFSET]
++ bic r1, r1, #0x00FF /*Set GPMCON for GPM0,GPM1 as 0x00 */
++ orr r1, r1, #0x0011 /*Set GPMCON for GPM0,GPM1 as GPIOOUT, 0x01*/
++ bic r1, r1, #0xFF00 /*Set GPMCON for GPM2,GPM3 as 0x00*/
++ orr r1, r1, #0x1100 /*Set GPMCON for GPM2,GPM3 as GPIOOUT, 0x01*/
++ str r1, [r0, #GPMCON_OFFSET]
++
++ /* Turn off LED1, LED2, LED3, LED4 */
++ ldr r1, [r0, #GPMDAT_OFFSET]
++ orr r1, r1, #0xF /*Set bit[0:3] as high level*/
++ str r1, [r0, #GPMDAT_OFFSET]
++#endif
++
++ /* Disable Watchdog */
++ ldr r0, =0x7e000000 @0x7e004000
++ orr r0, r0, #0x4000
++ mov r1, #0
++ str r1, [r0]
++
++ /* External interrupt pending clear */
++ ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/
++ ldr r1, [r0]
++ str r1, [r0]
++
++ ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000
++ ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000
++
++ /* Disable all interrupts (VIC0 and VIC1) */
++ mvn r3, #0x0
++ str r3, [r0, #oINTMSK]
++ str r3, [r1, #oINTMSK]
++
++ /* Set all interrupts as IRQ */
++ mov r3, #0x0
++ str r3, [r0, #oINTMOD]
++ str r3, [r1, #oINTMOD]
++
++ /* Pending Interrupt Clear */
++ mov r3, #0x0
++ str r3, [r0, #oVECTADDR]
++ str r3, [r1, #oVECTADDR]
++
++ /* init system clock */
++ bl system_clock_init
++
++#ifndef CONFIG_NAND_SPL
++ /* for UART */
++ bl uart_asm_init
++#endif
++
++#ifdef CONFIG_BOOT_NAND
++ /* simple init for NAND */
++ bl nand_asm_init
++#endif
++
++ /* Memory subsystem address 0x7e00f120 */
++ ldr r0, =ELFIN_MEM_SYS_CFG
++
++ /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
++ mov r1, #S3C64XX_MEM_SYS_CFG_NAND
++ str r1, [r0]
++
++ bl mem_ctrl_asm_init
++
++/* Wakeup support. Don't know if it's going to be used, untested. */
++ ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
++ ldr r1, [r0]
++ bic r1, r1, #0xfffffff7
++ cmp r1, #0x8
++ beq wakeup_reset
++
++1:
++ mov lr, r12
++ mov pc, lr
++
++wakeup_reset:
++
++ /* Clear wakeup status register */
++ ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
++ ldr r1, [r0]
++ str r1, [r0]
++
++ /* Load return address and jump to kernel */
++ ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
++ /* r1 = physical address of s3c6410_cpu_resume function */
++ ldr r1, [r0]
++ /* Jump to kernel (sleep-s3c6410.S) */
++ mov pc, r1
++ nop
++ nop
++/*
++ * system_clock_init: Initialize core clock and bus clock.
++ * void system_clock_init(void)
++ */
++system_clock_init:
++ ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
++
++#ifdef CONFIG_SYNC_MODE
++ ldr r1, [r0, #OTHERS_OFFSET]
++ mov r2, #0x40
++ orr r1, r1, r2
++ str r1, [r0, #OTHERS_OFFSET]
++
++ nop
++ nop
++ nop
++ nop
++ nop
++
++ ldr r2, =0x80
++ orr r1, r1, r2
++ str r1, [r0, #OTHERS_OFFSET]
++
++check_syncack:
++ ldr r1, [r0, #OTHERS_OFFSET]
++ ldr r2, =0xf00
++ and r1, r1, r2
++ cmp r1, #0xf00
++ bne check_syncack
++#else /* ASYNC Mode */
++ nop
++ nop
++ nop
++ nop
++ nop
++
++ /*
++ * This was unconditional in original Samsung sources, but it doesn't
++ * seem to make much sense on S3C6400.
++ */
++#ifndef CONFIG_S3C6410
++ ldr r1, [r0, #OTHERS_OFFSET]
++ bic r1, r1, #0xC0
++ orr r1, r1, #0x40
++ str r1, [r0, #OTHERS_OFFSET]
++
++wait_for_async:
++ ldr r1, [r0, #OTHERS_OFFSET]
++ and r1, r1, #0xf00
++ cmp r1, #0x0
++ bne wait_for_async
++#endif
++
++ ldr r1, [r0, #OTHERS_OFFSET]
++ bic r1, r1, #0x40
++ str r1, [r0, #OTHERS_OFFSET]
++#endif
++
++ mov r1, #0xff00
++ orr r1, r1, #0xff
++ str r1, [r0, #APLL_LOCK_OFFSET]
++ str r1, [r0, #MPLL_LOCK_OFFSET]
++
++ /* Set Clock Divider */
++ ldr r1, [r0, #CLK_DIV0_OFFSET]
++ bic r1, r1, #0x30000
++ bic r1, r1, #0xff00
++ bic r1, r1, #0xff
++ ldr r2, =CLK_DIV_VAL
++ orr r1, r1, r2
++ str r1, [r0, #CLK_DIV0_OFFSET]
++
++ ldr r1, =APLL_VAL
++ str r1, [r0, #APLL_CON_OFFSET]
++ ldr r1, =MPLL_VAL
++ str r1, [r0, #MPLL_CON_OFFSET]
++
++ /* FOUT of EPLL is 48MHz */
++ ldr r1, =0x80200103
++ str r1, [r0, #EPLL_CON0_OFFSET]
++ ldr r1, =0x0
++ str r1, [r0, #EPLL_CON1_OFFSET]
++
++ /* APLL, MPLL, EPLL select to Fout */
++ ldr r1, [r0, #CLK_SRC_OFFSET]
++ orr r1, r1, #0x7
++ str r1, [r0, #CLK_SRC_OFFSET]
++
++ /* wait at least 200us to stablize all clock */
++ mov r1, #0x10000
++1: subs r1, r1, #1
++ bne 1b
++
++ /* Synchronization for VIC port */
++#if defined(CONFIG_SYNC_MODE)
++ ldr r1, [r0, #OTHERS_OFFSET]
++ orr r1, r1, #0x20
++ str r1, [r0, #OTHERS_OFFSET]
++#elif !defined(CONFIG_S3C6410)
++ /* According to 661558um_S3C6400X_rev10.pdf 0x20 is reserved */
++ ldr r1, [r0, #OTHERS_OFFSET]
++ bic r1, r1, #0x20
++ str r1, [r0, #OTHERS_OFFSET]
++#endif
++ mov pc, lr
++
++
++#ifndef CONFIG_NAND_SPL
++/*
++ * uart_asm_init: Initialize UART's pins
++ */
++uart_asm_init:
++ /* set GPIO to enable UART */
++ ldr r0, =ELFIN_GPIO_BASE
++ ldr r1, =0x220022
++ str r1, [r0, #GPACON_OFFSET]
++ mov pc, lr
++#endif
++
++#ifdef CONFIG_BOOT_NAND
++/*
++ * NAND Interface init for SMDK6400
++ */
++nand_asm_init:
++ ldr r0, =ELFIN_NAND_BASE
++ ldr r1, [r0, #NFCONF_OFFSET]
++ orr r1, r1, #0x70
++ orr r1, r1, #0x7700
++ str r1, [r0, #NFCONF_OFFSET]
++
++ ldr r1, [r0, #NFCONT_OFFSET]
++ orr r1, r1, #0x07
++ str r1, [r0, #NFCONT_OFFSET]
++
++ mov pc, lr
++#endif
++
++#ifdef CONFIG_ENABLE_MMU
++/*
++ * MMU Table for SMDK6400
++ */
++
++ /* form a first-level section entry */
++.macro FL_SECTION_ENTRY base,ap,d,c,b
++ .word (\base << 20) | (\ap << 10) | \
++ (\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1)
++.endm
++
++.section .mmudata, "a"
++ .align 14
++ /* the following alignment creates the mmu table at address 0x4000. */
++ .globl mmu_table
++mmu_table:
++ .set __base, 0
++ /* 1:1 mapping for debugging */
++ .rept 0xA00
++ FL_SECTION_ENTRY __base, 3, 0, 0, 0
++ .set __base, __base + 1
++ .endr
++
++ /* access is not allowed. */
++ .rept 0xC00 - 0xA00
++ .word 0x00000000
++ .endr
++
++ /* 128MB for SDRAM 0xC0000000 -> 0x50000000 */
++ .set __base, 0x500
++ .rept 0xC80 - 0xC00
++ FL_SECTION_ENTRY __base, 3, 0, 1, 1
++ .set __base, __base + 1
++ .endr
++
++ /* access is not allowed. */
++ .rept 0x1000 - 0xc80
++ .word 0x00000000
++ .endr
++#endif
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/Makefile u-boot-2010.09-ok6410/board/kkernel/ok6410/Makefile
+--- u-boot-2010.09/board/kkernel/ok6410/Makefile 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/Makefile 2014-01-04 09:13:24.754448618 +0800
+@@ -0,0 +1,54 @@
++#
++# (C) Copyright 2000, 2001, 2002
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y := ok6410.o nand_cp.o
++SOBJS := lowlevel_init.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(SOBJS) $(OBJS)
++ $(AR) $(ARFLAGS) $@ $(SOBJS) $(OBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/nand_cp.c u-boot-2010.09-ok6410/board/kkernel/ok6410/nand_cp.c
+--- u-boot-2010.09/board/kkernel/ok6410/nand_cp.c 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/nand_cp.c 2014-01-04 09:21:24.663450211 +0800
+@@ -0,0 +1,121 @@
++/*********************************************************************************
++ * Copyright: (C) 2013 Guo Wenxue<guowenxue@gmail.com>
++ * All rights reserved.
++ *
++ * Filename: nand_cp.c
++ * Description: This file
++ *
++ * Version: 1.0.0(03/08/2013~)
++ * Author: Guo Wenxue <guowenxue@gmail.com>
++ * ChangeLog: 1, Release initial version on "03/08/2013 11:35:45 PM"
++ *
++ ********************************************************************************/
++
++#include <common.h>
++#ifdef CONFIG_S3C64XX
++#include <asm/io.h>
++#include <linux/mtd/nand.h>
++#include <asm/arch/s3c6400.h>
++
++#define UBOOT_LENGTH 0x60000 /* 384K */
++#define NAND_DISABLE_CE() (NFCONT_REG |= (1 << 1))
++#define NAND_ENABLE_CE() (NFCONT_REG &= ~(1 << 1))
++#define NF_TRANSRnB() do{ while(!(NFSTAT_REG & (1 << 0))); } while(0)
++
++static int nandll_read_page(uchar * buf, ulong addr, int large_block)
++{
++ int i;
++ int page_size = 512;
++
++ if (large_block == 1)
++ page_size = 2048;
++ if (large_block == 2)
++ page_size = 4096;
++
++ NAND_ENABLE_CE();
++ NFCMD_REG = NAND_CMD_READ0;
++ NFADDR_REG = 0; /* Write Address */
++
++ if (large_block)
++ NFADDR_REG = 0;
++
++ NFADDR_REG = (addr) & 0xff;
++ NFADDR_REG = (addr >> 8) & 0xff;
++ NFADDR_REG = (addr >> 16) & 0xff;
++
++ if (large_block)
++ NFCMD_REG = NAND_CMD_READSTART;
++
++ NF_TRANSRnB();
++
++ for (i = 0; i < page_size; i++)
++ {
++ *buf++ = NFDATA8_REG;
++ }
++
++ NAND_DISABLE_CE();
++ return 0;
++}
++
++static int nandll_read_blocks(ulong dst_addr, ulong size, int large_block)
++{
++ uchar *buf = (uchar *) dst_addr;
++ int i;
++ uint page_shift = 9;
++
++ if (large_block == 1)
++ page_shift = 11;
++
++ /* Read pages */
++ if (large_block == 2)
++ page_shift = 12;
++
++ if (large_block == 2)
++ {
++ /* Read pages */
++ for (i = 0; i < 4; i++, buf += (1 << (page_shift - 1)))
++ {
++ nandll_read_page(buf, i, large_block);
++ }
++
++ /* Read pages */
++ for (i = 4; i < (UBOOT_LENGTH >> page_shift); i++, buf += (1 << page_shift))
++ {
++ nandll_read_page(buf, i, large_block);
++ }
++ }
++ else
++ {
++ for (i = 0; i < (UBOOT_LENGTH >> page_shift); i++, buf += (1 << page_shift))
++ {
++ nandll_read_page(buf, i, large_block);
++ }
++ }
++
++ return 0;
++}
++
++int copy_uboot_to_ram(void)
++{
++ int large_block = 0;
++ int i;
++ vu_char id;
++
++ NAND_ENABLE_CE();
++ NFCMD_REG = NAND_CMD_READID;
++ NFADDR_REG = 0x00;
++
++ /* wait for a while */
++ for (i = 0; i < 200; i++) ;
++ id = NFDATA8_REG;
++ id = NFDATA8_REG;
++
++ if (id > 0x80)
++ large_block = 1;
++ if (id == 0xd5)
++ large_block = 2;
++
++ return nandll_read_blocks(CONFIG_SYS_PHY_UBOOT_BASE, UBOOT_LENGTH, large_block);
++}
++
++#endif
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/ok6410.c u-boot-2010.09-ok6410/board/kkernel/ok6410/ok6410.c
+--- u-boot-2010.09/board/kkernel/ok6410/ok6410.c 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/ok6410.c 2014-01-04 09:13:24.777448690 +0800
+@@ -0,0 +1,163 @@
++/*
++ * (C) Copyright 2002
++ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
++ * Marius Groeger <mgroeger@sysgo.de>
++ *
++ * (C) Copyright 2002
++ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
++ *
++ * (C) Copyright 2008
++ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <netdev.h>
++#include <asm/arch/s3c6400.h>
++
++/* ------------------------------------------------------------------------- */
++#define CS8900_Tacs 0x0 /* 0clk address set-up */
++#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
++#define CS8900_Tacc 0xE /* 14clk access cycle */
++#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */
++#define CS8900_Tah 0x4 /* 4clk address holding time */
++#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */
++#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */
++
++#define DM9000_Tacs 0x0 /* 0clk address set-up */
++#define DM9000_Tcos 0x4 /* 4clk chip selection set-up */
++#define DM9000_Tacc 0xE /* 14clk access cycle */
++#define DM9000_Tcoh 0x1 /* 1clk chip selection hold */
++#define DM9000_Tah 0x4 /* 4clk address holding time */
++#define DM9000_Tacp 0x6 /* 6clk page mode access cycle */
++#define DM9000_PMC 0x0 /* normal(1data)page mode configuration */
++
++static inline void delay(unsigned long loops)
++{
++ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
++ "bne 1b"
++ : "=r" (loops) : "0" (loops));
++}
++
++/*
++ * Miscellaneous platform dependent initialisations
++ */
++
++#ifdef CONFIG_CS8900
++static void cs8900_pre_init(void)
++{
++ SROM_BW_REG &= ~(0xf << 4);
++ SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
++ SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) +
++ (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) +
++ (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC);
++}
++#endif
++
++#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
++static void dm9000_pre_init(void)
++{
++ SROM_BW_REG &= ~(0xf << 4);
++ SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
++ SROM_BC1_REG = ((DM9000_Tacs << 28) + (DM9000_Tcos << 24) +
++ (DM9000_Tacc << 16) + (DM9000_Tcoh << 12) +
++ (DM9000_Tah << 8) + (DM9000_Tacp << 4) + DM9000_PMC);
++}
++#endif
++
++int board_init(void)
++{
++ DECLARE_GLOBAL_DATA_PTR;
++
++#ifdef CONFIG_CS8900
++ cs8900_pre_init();
++#endif
++
++#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
++ dm9000_pre_init();
++#endif
++
++ /* NOR-flash in SROM0 */
++
++ /* Enable WAIT */
++ SROM_BW_REG |= 4 | 8 | 1;
++
++ gd->bd->bi_arch_number = MACH_TYPE;
++ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ DECLARE_GLOBAL_DATA_PTR;
++
++ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
++
++ return 0;
++}
++
++#ifdef CONFIG_DISPLAY_BOARDINFO
++int checkboard(void)
++{
++ printf("Board: OK6410\n");
++ return 0;
++}
++#endif
++
++#ifdef CONFIG_ENABLE_MMU
++ulong virt_to_phy_smdk6400(ulong addr)
++{
++ if ((0xc0000000 <= addr) && (addr < 0xc8000000))
++ return addr - 0xc0000000 + 0x50000000;
++ else
++ printf("do not support this address : %08lx\n", addr);
++
++ return addr;
++}
++#endif
++
++#ifndef CONFIG_SYS_NO_FLASH /* Comment by guowenxue */
++ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
++{
++ if (banknum == 0) { /* non-CFI boot flash */
++ info->portwidth = FLASH_CFI_16BIT;
++ info->chipwidth = FLASH_CFI_BY16;
++ info->interface = FLASH_CFI_X16;
++ return 1;
++ } else
++ return 0;
++}
++#endif
++
++#ifdef CONFIG_CMD_NET
++int board_eth_init(bd_t *bis)
++{
++ int rc = 0;
++#ifdef CONFIG_CS8900
++ rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
++#endif
++#ifdef CONFIG_DRIVER_DM9000 /* Add by guowenxue*/
++ rc = dm9000_initialize(bis);
++#endif
++ return rc;
++}
++#endif
+diff -Nuar u-boot-2010.09/board/kkernel/ok6410/u-boot-nand.lds u-boot-2010.09-ok6410/board/kkernel/ok6410/u-boot-nand.lds
+--- u-boot-2010.09/board/kkernel/ok6410/u-boot-nand.lds 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/board/kkernel/ok6410/u-boot-nand.lds 2014-01-04 09:13:24.777448690 +0800
+@@ -0,0 +1,65 @@
++/*
++ * (C) Copyright 2002
++ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
++ *
++ * (C) Copyright 2008
++ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
++OUTPUT_ARCH(arm)
++ENTRY(_start)
++SECTIONS
++{
++ . = 0x00000000;
++
++ . = ALIGN(4);
++ .text :
++ {
++ arch/arm/cpu/arm1176/start.o (.text)
++ arch/arm/cpu/arm1176/s3c64xx/cpu_init.o (.text)
++ board/kkernel/ok6410/lowlevel_init.o (.text)
++ board/kkernel/ok6410/nand_cp.o (.text)
++ arch/arm/lib/board.o (.text)
++ *(.text)
++ }
++
++ . = ALIGN(4);
++ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
++
++ . = ALIGN(4);
++ .data : { *(.data) }
++
++ . = ALIGN(4);
++ .got : { *(.got) }
++
++ __u_boot_cmd_start = .;
++ .u_boot_cmd : { *(.u_boot_cmd) }
++ __u_boot_cmd_end = .;
++
++ . = ALIGN(4);
++ .mmudata : { *(.mmudata) }
++
++ . = ALIGN(4);
++ __bss_start = .;
++ .bss : { *(.bss) . = ALIGN(4); }
++ _end = .;
++}
+diff -Nuar u-boot-2010.09/common/env_common.c u-boot-2010.09-ok6410/common/env_common.c
+--- u-boot-2010.09/common/env_common.c 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/common/env_common.c 2014-01-04 09:13:24.778447811 +0800
+@@ -59,6 +59,23 @@
+ #ifdef CONFIG_BOOTCOMMAND
+ "bootcmd=" CONFIG_BOOTCOMMAND "\0"
+ #endif
++/* This part add by guowenxue */
++#if defined(CONFIG_CPU) /* Burn bootloader image */
++ "cpu=" CONFIG_CPU "\0"
++#endif
++#if defined(CONFIG_BURNBL) /* Burn bootloader image to Nandflash*/
++ "bbl=" CONFIG_BURNBL "\0"
++#endif
++#if defined(CONFIG_BURNKERNEL) /* Burn Linux kernel image */
++ "bkr=" CONFIG_BURNKERNEL "\0"
++#endif
++#ifdef CONFIG_BUBIFS
++ "bubifs=" CONFIG_BUBIFS "\0"
++#endif
++#if defined(CONFIG_TFTPBOOT) /* TFTP download system image and boot */
++ "tpb=" CONFIG_TFTPBOOT "\0"
++#endif
++/* Add by guowenxue end */
+ #ifdef CONFIG_RAMBOOTCOMMAND
+ "ramboot=" CONFIG_RAMBOOTCOMMAND "\0"
+ #endif
+diff -Nuar u-boot-2010.09/drivers/usb/host/ohci-hcd.c u-boot-2010.09-ok6410/drivers/usb/host/ohci-hcd.c
+--- u-boot-2010.09/drivers/usb/host/ohci-hcd.c 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/drivers/usb/host/ohci-hcd.c 2014-01-04 09:13:24.778447811 +0800
+@@ -67,6 +67,7 @@
+ #if defined(CONFIG_ARM920T) || \
+ defined(CONFIG_S3C24X0) || \
+ defined(CONFIG_S3C6400) || \
++ defined(CONFIG_S3C6410) || \
+ defined(CONFIG_440EP) || \
+ defined(CONFIG_PCI_OHCI) || \
+ defined(CONFIG_MPC5200) || \
+diff -Nuar u-boot-2010.09/include/common.h u-boot-2010.09-ok6410/include/common.h
+--- u-boot-2010.09/include/common.h 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/include/common.h 2014-01-04 09:13:24.779447911 +0800
+@@ -507,6 +507,7 @@
+ #if defined(CONFIG_S3C24X0) || \
+ defined(CONFIG_LH7A40X) || \
+ defined(CONFIG_S3C6400) || \
++ defined(CONFIG_S3C6410) || \
+ defined(CONFIG_EP93XX)
+ ulong get_FCLK (void);
+ ulong get_HCLK (void);
+diff -Nuar u-boot-2010.09/include/configs/ok6410.h u-boot-2010.09-ok6410/include/configs/ok6410.h
+--- u-boot-2010.09/include/configs/ok6410.h 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/include/configs/ok6410.h 2014-01-04 09:27:06.729448779 +0800
+@@ -0,0 +1,358 @@
++/*
++ * (C) Copyright 2002
++ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
++ * Marius Groeger <mgroeger@sysgo.de>
++ * Gary Jennejohn <garyj@denx.de>
++ * David Mueller <d.mueller@elsoft.ch>
++ *
++ * (C) Copyright 2008
++ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++ *
++ * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
++ *
++ * (C) Copyright 2013
++ * Guo Wenxue, Wuhan Lingyun Embedded System Trainning, <guowenxue@gmail.com>
++ * Configuation settings for the FeiLing OK6410 board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++/*
++ * High Level Configuration Options
++ * (easy to change)
++ */
++#define CONFIG_S3C6410 1 /* in a SAMSUNG S3C6410 SoC */
++#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
++#define CONFIG_OK6410 1 /* on a SAMSUNG OK6410 Board */
++#define CONFIG_OK6410_LED 1 /* LED on OK6410 Board */
++
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++#define CONFIG_PERIPORT_REMAP
++#define CONFIG_PERIPORT_BASE 0x70000000
++#define CONFIG_PERIPORT_SIZE 0x13
++
++#define CONFIG_SYS_SDRAM_BASE 0x50000000
++
++/* input clock of PLL: OK6410 has 12MHz input clock */
++#define CONFIG_SYS_CLK_FREQ 12000000
++
++#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
++#define CONFIG_ENABLE_MMU
++#endif
++
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_CMDLINE_TAG
++#define CONFIG_INITRD_TAG
++
++#define CONFIG_USE_UBIFS 1 /* Use UBIFS rootfs boot up*/
++
++/*
++ * Architecture magic and machine type, match linux-3.0/include/generated/mach-types.h
++ */
++#define MACH_TYPE 1626 /* MACH_TYPE_SMDK6410 in Linux kernel*/
++
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_NET_MULTI 1
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_DRIVER_DM9000 1
++#define CONFIG_DM9000_BASE 0x18000300 //XM0CSN1
++#define DM9000_IO CONFIG_DM9000_BASE
++#define DM9000_DATA (CONFIG_DM9000_BASE+4) //ADDR2
++#define CONFIG_DM9000_USE_16BIT 1
++#define CONFIG_DM9000_NO_SROM 1
++#undef CONFIG_DM9000_DEBUG
++
++#define CONFIG_ETHADDR 08:00:60:26:0a:6b
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_IPADDR 192.168.1.246
++#define CONFIG_SERVERIP 192.168.1.2
++#define CONFIG_GATEWAYIP 192.168.1.1
++
++#define CONFIG_CPU "s3c6410"
++#define CONFIG_BURNBL "nand erase 0 100000;tftp 50000000 u-boot-$cpu.bin;nand write $fileaddr 0 $filesize"
++#define CONFIG_BURNKERNEL "tftp 50008000 linuxrom-$cpu.bin;nand erase 100000 a00000;nand write $fileaddr 100000 $filesize"
++#define CONFIG_TFTPBOOT "tftp 50008000 linuxrom-$cpu.bin;bootm $fileaddr"
++#define CONFIG_BOOTCOMMAND "nand read 50008000 100000 a00000;bootm 50008000"
++#define CONFIG_BOOTARGS "console=ttySAC,115200"
++
++#ifdef CONFIG_USE_UBIFS /* Use UBIFS rootfs file system */
++ #undef CONFIG_BOOTARGS
++ #define CONFIG_BOOTARGS "console=ttySAC,115200 mem=64M ubi.mtd=3 root=ubi0:rootfs rootwait rootfstype=ubifs rw loglevel=7"
++ #define CONFIG_BUBIFS "tftp 50800000 ubifs-$cpu.rootfs;nand erase 3800000 6400000;nand write 50800000 3800000 $filesize"
++#endif
++/*
++ * select serial console configuration
++ */
++#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OK6410 */
++
++#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
++#ifdef CONFIG_SYS_HUSH_PARSER
++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
++#endif
++
++#define CONFIG_CMDLINE_EDITING
++
++/* allow to overwrite serial and ethaddr */
++#define CONFIG_ENV_OVERWRITE
++
++#define CONFIG_BAUDRATE 115200
++
++/***********************************************************
++ * Command definition
++ ***********************************************************/
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_CACHE
++#define CONFIG_CMD_REGINFO
++#define CONFIG_CMD_LOADS
++#define CONFIG_CMD_LOADB
++#define CONFIG_CMD_SAVEENV
++#define CONFIG_CMD_NAND
++#if defined(CONFIG_BOOT_ONENAND)
++#define CONFIG_CMD_ONENAND
++#endif
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_ELF
++#define CONFIG_CMD_FAT
++#define CONFIG_CMD_EXT2
++
++#define CONFIG_BOOTDELAY 3
++
++#define CONFIG_ZERO_BOOTDELAY_CHECK
++
++#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
++#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
++#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
++#endif
++
++/*
++ * Miscellaneous configurable options
++ */
++#define CONFIG_SYS_LONGHELP /* undef to save memory */
++#define CONFIG_SYS_PROMPT "[ OK6410A@guowenxue ]# " /* Monitor Command Prompt */
++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
++#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
++#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
++
++#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
++
++#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
++
++#define CONFIG_SYS_HZ 1000
++
++/* valid baudrates */
++#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
++
++/*-----------------------------------------------------------------------
++ * Stack sizes
++ *
++ * The stack sizes are set up in start.S using the settings below
++ */
++#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */
++
++/**********************************
++ Support Clock Settings
++ **********************************
++ Setting SYNC ASYNC
++ ----------------------------------
++ 667_133_66 X O
++ 533_133_66 O O
++ 400_133_66 X O
++ 400_100_50 O O
++ **********************************/
++
++#define CONFIG_CLK_667_133_66
++/*
++#define CONFIG_CLK_533_133_66
++#define CONFIG_CLK_400_100_50
++#define CONFIG_CLK_400_133_66
++#define CONFIG_SYNC_MODE
++*/
++
++/* OK6410 has 2 banks of DRAM, but we use only one in U-Boot */
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
++#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
++
++#if 1 /* NOR flash - no real flash on this board, add by guowenxue */
++#define CONFIG_SYS_NO_FLASH 1
++#undef CONFIG_CMD_IMLS
++#else
++#define CONFIG_SYS_FLASH_BASE 0x10000000
++#define CONFIG_SYS_MONITOR_BASE 0x00000000
++
++/*-----------------------------------------------------------------------
++ * FLASH and environment organization
++ */
++#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
++/* AM29LV160B has 35 sectors, AM29LV800B - 19 */
++#define CONFIG_SYS_MAX_FLASH_SECT 40
++
++#define CONFIG_AMD_LV800
++#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */
++/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
++#define CONFIG_FLASH_CFI_DRIVER 1
++#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
++#define CONFIG_FLASH_CFI_LEGACY
++#define CONFIG_SYS_FLASH_LEGACY_512Kx16
++
++/* timeout values are in ticks */
++#define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
++#define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
++#endif
++
++#define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
++#define CONFIG_ENV_OFFSET 0x0060000
++
++/*
++ * OK6410 board specific data
++ */
++
++#define CONFIG_IDENT_STRING " for OK6410 by Guo Wenxue<QQ: 281143292>"
++
++/* base address for uboot */
++#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
++/* total memory available to uboot */
++#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
++
++/* Put environment copies after the end of U-Boot owned RAM */
++//#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
++
++#ifdef CONFIG_ENABLE_MMU
++#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
++#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;bootm 0xc0018000"
++#else
++#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
++//#define CONFIG_BOOTCOMMAND "nand read 50008000 100000 a00000;bootm 50008000"
++#endif
++
++/* NAND U-Boot load and start address */
++#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
++
++
++/* NAND configuration */
++#define CONFIG_SYS_MAX_NAND_DEVICE 1
++#define CONFIG_SYS_NAND_BASE 0x70200010
++#define CONFIG_SYS_S3C_NAND_HWECC
++
++#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
++#define CONFIG_SYS_NAND_WP 1
++#define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */
++#define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */
++
++#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */
++#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */
++
++#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */
++#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */
++
++/* NAND chip page size */
++#define CONFIG_SYS_NAND_PAGE_SIZE 2048
++/* NAND chip block size */
++#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
++/* NAND chip page per block count */
++#define CONFIG_SYS_NAND_PAGE_COUNT 64
++/* Location of the bad-block label */
++#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
++/* Extra address cycle for > 128MiB */
++#define CONFIG_SYS_NAND_5_ADDR_CYCLE
++
++/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
++#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
++/* Number of ECC bytes per OOB - S3C6410 calculates 4 bytes ECC in 1-bit mode */
++#define CONFIG_SYS_NAND_ECCBYTES 4
++/* Number of ECC-blocks per NAND page */
++#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
++/* Size of a single OOB region */
++#define CONFIG_SYS_NAND_OOBSIZE 64
++/* Number of ECC bytes per page */
++#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
++/* ECC byte positions */
++#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
++ 48, 49, 50, 51, 52, 53, 54, 55, \
++ 56, 57, 58, 59, 60, 61, 62, 63}
++
++/* Boot configuration (define only one of next 3) */
++#define CONFIG_BOOT_NAND
++/* None of these are currently implemented. Left from the original Samsung
++ * version for reference
++#define CONFIG_BOOT_NOR
++#define CONFIG_BOOT_MOVINAND
++#define CONFIG_BOOT_ONENAND
++*/
++
++#define CONFIG_NAND
++#define CONFIG_NAND_S3C64XX
++/* Unimplemented or unsupported. See comment above.
++#define CONFIG_ONENAND
++#define CONFIG_MOVINAND
++*/
++
++/* Settings as above boot configuration */
++#define CONFIG_ENV_IS_IN_NAND
++
++#if !defined(CONFIG_ENABLE_MMU)
++#define CONFIG_CMD_USB 1
++#define CONFIG_USB_S3C64XX
++#define CONFIG_USB_OHCI_NEW 1
++#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
++#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6410"
++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
++#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
++
++#define CONFIG_USB_STORAGE 1
++#endif
++#define CONFIG_DOS_PARTITION 1
++
++#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
++# error "usb_ohci.c is currently broken with MMU enabled."
++#endif
++
++#ifdef CONFIG_USE_UBIFS /* Enable UBIFS support */
++#define CONFIG_CMD_UBI
++#define CONFIG_CMD_UBIFS
++#define CONFIG_RBTREE
++#define CONFIG_LZO
++
++#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
++#define CONFIG_MTD_PARTITIONS
++#define CONFIG_CMD_MTDPARTS
++#define MTDIDS_DEFAULT "nand0=nand0"
++#define MTDPARTS_DEFAULT "mtdparts=nand0:1m(u-boot),15m(kernel),40m(rootfs),100m(rootfs),-(user)"
++#define MTD_ACTIVE_PART "nand0,3"
++#endif /* end of CONFIG_USE_UBIFS*/
++
++#endif /* __CONFIG_H */
+diff -Nuar u-boot-2010.09/Makefile u-boot-2010.09-ok6410/Makefile
+--- u-boot-2010.09/Makefile 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/Makefile 2014-01-04 09:13:24.780447865 +0800
+@@ -154,6 +154,8 @@
+ # load ARCH, BOARD, and CPU configuration
+ include $(obj)include/config.mk
+ export ARCH CPU BOARD VENDOR SOC
++ARCH=arm
++CROSS_COMPILE ?= /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+
+ # set default to nothing for native builds
+ ifeq ($(HOSTARCH),$(ARCH))
+@@ -308,6 +310,7 @@
+ ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
+
+ all: $(ALL)
++ cp u-boot.bin u-boot-s3c6410.bin
+
+ $(obj)u-boot.hex: $(obj)u-boot
+ $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
+@@ -2242,6 +2245,12 @@
+ @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
++ok6410_config : unconfig
++ @echo "#define CONFiG_NAND_U_BOOT" > $(obj)include/config.h
++ @echo "RAM_TEXT = 0x57e00000" >> $(obj)board/kkernel/ok6410/config.tmp;
++ @$(MKCONFIG) ok6410 arm arm1176 ok6410 kkernel s3c64xx
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
+ #========================================================================
+ # MIPS
+ #========================================================================
+diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/config.mk u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/config.mk
+--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/config.mk 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/config.mk 2014-01-04 09:13:24.780447865 +0800
+@@ -0,0 +1,40 @@
++#
++# (C) Copyright 2006
++# Stefan Roese, DENX Software Engineering, sr@denx.de.
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++#
++# Samsung S3C64xx Reference Platform (smdk6400) board
++
++# TEXT_BASE for SPL:
++#
++# On S3C64xx platforms the SPL is located in SRAM at 0.
++#
++# TEXT_BASE = 0
++
++include $(TOPDIR)/board/$(BOARDDIR)/config.mk
++
++# PAD_TO used to generate a 4kByte binary needed for the combined image
++# -> PAD_TO = TEXT_BASE + 4096
++PAD_TO := $(shell expr $$[$(TEXT_BASE) + 4096])
++
++ifeq ($(debug),1)
++PLATFORM_CPPFLAGS += -DDEBUG
++endif
+diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/Makefile u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/Makefile
+--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/Makefile 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/Makefile 2014-01-04 09:13:24.781447895 +0800
+@@ -0,0 +1,113 @@
++#
++# (C) Copyright 2006-2007
++# Stefan Roese, DENX Software Engineering, sr@denx.de.
++#
++# (C) Copyright 2008
++# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++CONFIG_NAND_SPL = y
++
++include $(TOPDIR)/config.mk
++include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
++
++LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
++LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
++AFLAGS += -DCONFIG_NAND_SPL
++CFLAGS += -DCONFIG_NAND_SPL
++
++SOBJS = start.o cpu_init.o lowlevel_init.o
++COBJS = nand_boot.o nand_ecc.o s3c64xx.o nand_cp.o
++
++SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
++OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
++__OBJS := $(SOBJS) $(COBJS)
++LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
++
++nandobj := $(OBJTREE)/nand_spl/
++
++ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
++
++all: $(obj).depend $(ALL)
++
++$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
++ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
++
++$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
++ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
++
++$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
++ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
++ -Map $(nandobj)u-boot-spl.map \
++ -o $(nandobj)u-boot-spl
++
++$(nandobj)u-boot.lds: $(LDSCRIPT)
++ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
++
++# create symbolic links for common files
++
++# from cpu directory
++$(obj)start.S:
++ @rm -f $@
++ @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
++
++# from SoC directory
++$(obj)cpu_init.S:
++ @rm -f $@
++ @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
++
++# from board directory
++$(obj)lowlevel_init.S:
++ @rm -f $@
++ @ln -s $(TOPDIR)/board/kkernel/ok6410/lowlevel_init.S $@
++
++$(obj)nand_cp.c:
++ @rm -f $@
++ @ln -s $(TOPDIR)/board/kkernel/ok6410/nand_cp.c $@
++
++# from nand_spl directory
++$(obj)nand_boot.c:
++ @rm -f $@
++ @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
++
++# from drivers/mtd/nand directory
++$(obj)nand_ecc.c:
++ @rm -f $@
++ @ln -s $(TOPDIR)/drivers/mtd/nand/nand_ecc.c $@
++
++$(obj)s3c64xx.c:
++ @rm -f $@
++ @ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
++
++#########################################################################
++
++$(obj)%.o: $(obj)%.S
++ $(CC) $(AFLAGS) -c -o $@ $<
++
++$(obj)%.o: $(obj)%.c
++ $(CC) $(CFLAGS) -c -o $@ $<
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -Nuar u-boot-2010.09/nand_spl/board/kkernel/ok6410/u-boot.lds u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/u-boot.lds
+--- u-boot-2010.09/nand_spl/board/kkernel/ok6410/u-boot.lds 1970-01-01 08:00:00.000000000 +0800
++++ u-boot-2010.09-ok6410/nand_spl/board/kkernel/ok6410/u-boot.lds 2014-01-04 09:13:24.781447895 +0800
+@@ -0,0 +1,61 @@
++/*
++ * (C) Copyright 2002
++ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
++ *
++ * (C) Copyright 2008
++ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
++OUTPUT_ARCH(arm)
++ENTRY(_start)
++SECTIONS
++{
++ . = 0x00000000;
++
++ . = ALIGN(4);
++ .text :
++ {
++ start.o (.text)
++ cpu_init.o (.text)
++ nand_boot.o (.text)
++
++ *(.text)
++ }
++
++ . = ALIGN(4);
++ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
++
++ . = ALIGN(4);
++ .data : { *(.data) }
++
++ . = ALIGN(4);
++ .got : { *(.got) }
++
++ __u_boot_cmd_start = .;
++ .u_boot_cmd : { *(.u_boot_cmd) }
++ __u_boot_cmd_end = .;
++
++ . = ALIGN(4);
++ __bss_start = .;
++ .bss : { *(.bss) . = ALIGN(4); }
++ _end = .;
++}
+diff -Nuar u-boot-2010.09/net/net.c u-boot-2010.09-ok6410/net/net.c
+--- u-boot-2010.09/net/net.c 2010-09-29 05:20:55.000000000 +0800
++++ u-boot-2010.09-ok6410/net/net.c 2014-01-04 09:13:24.782447844 +0800
+@@ -527,6 +527,11 @@
+ printf("Bytes transferred = %ld (%lx hex)\n",
+ NetBootFileXferSize,
+ NetBootFileXferSize);
++ #define PAGESIZE_BIT 17 /* Add by guowenxue to make the filesize page align */
++ if(NetBootFileXferSize%(1<<PAGESIZE_BIT))
++ {
++ NetBootFileXferSize = ((NetBootFileXferSize>>PAGESIZE_BIT)+1) <<PAGESIZE_BIT;
++ }
+ sprintf(buf, "%lX", NetBootFileXferSize);
+ setenv("filesize", buf);
+
diff --git a/ok6410/src/crosstool/buildroot-config/buildroot-2012.08.arm1176jzfs.config b/ok6410/src/crosstool/buildroot-config/buildroot-2012.08.arm1176jzfs.config
new file mode 100644
index 0000000..d9e43bf
--- /dev/null
+++ b/ok6410/src/crosstool/buildroot-config/buildroot-2012.08.arm1176jzfs.config
@@ -0,0 +1,897 @@
+#
+# Automatically generated make config: don't edit
+# Buildroot 2012.08 Configuration
+#
+BR2_HAVE_DOT_CONFIG=y
+BR2_arm=y
+# BR2_armeb is not set
+# BR2_avr32 is not set
+# BR2_bfin is not set
+# BR2_i386 is not set
+# BR2_microblazeel is not set
+# BR2_microblazebe is not set
+# BR2_mips is not set
+# BR2_mipsel is not set
+# BR2_powerpc is not set
+# BR2_sh is not set
+# BR2_sh64 is not set
+# BR2_sparc is not set
+# BR2_x86_64 is not set
+# BR2_generic_arm is not set
+# BR2_arm7tdmi is not set
+# BR2_arm610 is not set
+# BR2_arm710 is not set
+# BR2_arm720t is not set
+# BR2_arm920t is not set
+# BR2_arm922t is not set
+# BR2_arm926t is not set
+# BR2_arm10t is not set
+# BR2_arm1136jf_s is not set
+# BR2_arm1176jz_s is not set
+BR2_arm1176jzf_s=y
+# BR2_cortex_a8 is not set
+# BR2_cortex_a9 is not set
+# BR2_sa110 is not set
+# BR2_sa1100 is not set
+# BR2_xscale is not set
+# BR2_iwmmxt is not set
+BR2_ARM_TYPE="ARM1176JZF_S"
+BR2_ARM_EABI=y
+# BR2_ARM_OABI is not set
+BR2_ARCH="arm"
+BR2_ENDIAN="LITTLE"
+BR2_GCC_TARGET_TUNE="arm1176jzf-s"
+BR2_GCC_TARGET_ARCH="armv6zk"
+BR2_GCC_TARGET_ABI="aapcs-linux"
+
+#
+# Build options
+#
+
+#
+# Commands
+#
+BR2_WGET="wget --passive-ftp -nd -t 3"
+BR2_SVN="svn"
+BR2_BZR="bzr"
+BR2_GIT="git"
+BR2_LOCALFILES="cp"
+BR2_SCP="scp"
+BR2_SSH="ssh"
+BR2_HG="hg"
+BR2_ZCAT="gzip -d -c"
+BR2_BZCAT="bzcat"
+BR2_XZCAT="xzcat"
+BR2_TAR_OPTIONS=""
+BR2_DL_DIR="$(TOPDIR)/dl"
+BR2_HOST_DIR="$(TOPDIR)/arm1176jzfs"
+
+#
+# Mirrors and Download locations
+#
+BR2_PRIMARY_SITE=""
+BR2_BACKUP_SITE="http://sources.buildroot.net/"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
+BR2_JLEVEL=8
+# BR2_CCACHE is not set
+# BR2_DEPRECATED is not set
+# BR2_ENABLE_DEBUG is not set
+BR2_STRIP_strip=y
+# BR2_STRIP_sstrip is not set
+# BR2_STRIP_none is not set
+BR2_STRIP_EXCLUDE_FILES=""
+BR2_STRIP_EXCLUDE_DIRS=""
+# BR2_OPTIMIZE_0 is not set
+# BR2_OPTIMIZE_1 is not set
+# BR2_OPTIMIZE_2 is not set
+# BR2_OPTIMIZE_3 is not set
+BR2_OPTIMIZE_S=y
+# BR2_PREFER_STATIC_LIB is not set
+# BR2_HAVE_DOCUMENTATION is not set
+# BR2_HAVE_DEVFILES is not set
+BR2_PACKAGE_OVERRIDE_FILE="$(TOPDIR)/local.mk"
+
+#
+# Toolchain
+#
+BR2_TOOLCHAIN_BUILDROOT=y
+# BR2_TOOLCHAIN_EXTERNAL is not set
+# BR2_TOOLCHAIN_CTNG is not set
+
+#
+# Kernel Header Options
+#
+# BR2_KERNEL_HEADERS_2_6_38 is not set
+# BR2_KERNEL_HEADERS_2_6_39 is not set
+# BR2_KERNEL_HEADERS_3_0 is not set
+# BR2_KERNEL_HEADERS_3_1 is not set
+# BR2_KERNEL_HEADERS_3_2 is not set
+# BR2_KERNEL_HEADERS_3_3 is not set
+# BR2_KERNEL_HEADERS_3_4 is not set
+BR2_KERNEL_HEADERS_VERSION=y
+# BR2_KERNEL_HEADERS_SNAP is not set
+BR2_DEFAULT_KERNEL_VERSION="2.6.37"
+BR2_DEFAULT_KERNEL_HEADERS="2.6.37"
+
+#
+# uClibc Options
+#
+# BR2_UCLIBC_VERSION_0_9_31 is not set
+# BR2_UCLIBC_VERSION_0_9_32 is not set
+BR2_UCLIBC_VERSION_0_9_33=y
+# BR2_UCLIBC_VERSION_SNAPSHOT is not set
+BR2_UCLIBC_VERSION_STRING="0.9.33.2"
+BR2_UCLIBC_CONFIG="toolchain/uClibc/uClibc-0.9.33.config"
+# BR2_PTHREAD_DEBUG is not set
+# BR2_UCLIBC_INSTALL_TEST_SUITE is not set
+
+#
+# Binutils Options
+#
+# BR2_BINUTILS_VERSION_2_20 is not set
+# BR2_BINUTILS_VERSION_2_20_1 is not set
+# BR2_BINUTILS_VERSION_2_21 is not set
+BR2_BINUTILS_VERSION_2_21_1=y
+# BR2_BINUTILS_VERSION_2_22 is not set
+BR2_BINUTILS_VERSION="2.21.1"
+BR2_BINUTILS_EXTRA_CONFIG_OPTIONS=""
+
+#
+# GCC Options
+#
+# BR2_GCC_VERSION_4_3_X is not set
+# BR2_GCC_VERSION_4_4_X is not set
+BR2_GCC_VERSION_4_5_X=y
+# BR2_GCC_VERSION_4_6_X is not set
+# BR2_GCC_VERSION_4_7_X is not set
+# BR2_GCC_VERSION_SNAP is not set
+BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE=y
+BR2_GCC_VERSION="4.5.4"
+BR2_EXTRA_GCC_CONFIG_OPTIONS=""
+# BR2_INSTALL_OBJC is not set
+# BR2_INSTALL_FORTRAN is not set
+BR2_GCC_SHARED_LIBGCC=y
+BR2_GCC_ENABLE_TLS=y
+# BR2_GCC_ENABLE_OPENMP is not set
+
+#
+# Gdb Options
+#
+# BR2_PACKAGE_GDB is not set
+# BR2_PACKAGE_GDB_SERVER is not set
+# BR2_PACKAGE_GDB_HOST is not set
+BR2_LARGEFILE=y
+BR2_INET_IPV6=y
+BR2_INET_RPC=y
+BR2_USE_WCHAR=y
+BR2_INSTALL_LIBSTDCPP=y
+BR2_TOOLCHAIN_HAS_THREADS=y
+BR2_TOOLCHAIN_HAS_THREADS_DEBUG_IF_NEEDED=y
+BR2_TOOLCHAIN_HAS_SHADOW_PASSWORDS=y
+# BR2_ENABLE_LOCALE_PURGE is not set
+BR2_GENERATE_LOCALE=""
+BR2_NEEDS_GETTEXT=y
+BR2_USE_MMU=y
+BR2_PREFER_SOFT_FLOAT=y
+BR2_SOFT_FLOAT=y
+BR2_TARGET_OPTIMIZATION="-pipe"
+BR2_TARGET_LDFLAGS=""
+
+#
+# Toolchain Options
+#
+BR2_TOOLCHAIN_BUILDROOT_LARGEFILE=y
+BR2_TOOLCHAIN_BUILDROOT_INET_IPV6=y
+BR2_TOOLCHAIN_BUILDROOT_INET_RPC=y
+BR2_TOOLCHAIN_BUILDROOT_WCHAR=y
+# BR2_TOOLCHAIN_BUILDROOT_LOCALE is not set
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+# BR2_TOOLCHAIN_BUILDROOT_USE_SSP is not set
+# BR2_PTHREADS_NONE is not set
+# BR2_PTHREADS is not set
+# BR2_PTHREADS_OLD is not set
+BR2_PTHREADS_NATIVE=y
+# BR2_ELF2FLT is not set
+
+#
+# System configuration
+#
+BR2_TARGET_GENERIC_HOSTNAME="buildroot"
+BR2_TARGET_GENERIC_ISSUE="Welcome to Buildroot"
+BR2_ROOTFS_DEVICE_CREATION_STATIC=y
+# BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_DEVTMPFS is not set
+# BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV is not set
+# BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_UDEV is not set
+# BR2_INIT_BUSYBOX is not set
+# BR2_INIT_SYSV is not set
+
+#
+# systemd requires largefile, wchar, IPv6, threads and udev support
+#
+BR2_INIT_NONE=y
+BR2_ROOTFS_DEVICE_TABLE="target/generic/device_table.txt"
+BR2_ROOTFS_STATIC_DEVICE_TABLE="target/generic/device_table_dev.txt"
+BR2_ROOTFS_SKELETON_DEFAULT=y
+# BR2_ROOTFS_SKELETON_CUSTOM is not set
+BR2_TARGET_GENERIC_GETTY_PORT="ttyS0"
+# BR2_TARGET_GENERIC_GETTY_BAUDRATE_KEEP is not set
+# BR2_TARGET_GENERIC_GETTY_BAUDRATE_9600 is not set
+# BR2_TARGET_GENERIC_GETTY_BAUDRATE_19200 is not set
+# BR2_TARGET_GENERIC_GETTY_BAUDRATE_38400 is not set
+# BR2_TARGET_GENERIC_GETTY_BAUDRATE_57600 is not set
+BR2_TARGET_GENERIC_GETTY_BAUDRATE_115200=y
+BR2_TARGET_GENERIC_GETTY_BAUDRATE="115200"
+# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
+BR2_ROOTFS_POST_BUILD_SCRIPT=""
+
+#
+# Package Selection for the target
+#
+# BR2_PACKAGE_BUSYBOX is not set
+BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
+
+#
+# Audio and video applications
+#
+# BR2_PACKAGE_ALSA_UTILS is not set
+# BR2_PACKAGE_AUMIX is not set
+# BR2_PACKAGE_BELLAGIO is not set
+# BR2_PACKAGE_FAAD2 is not set
+# BR2_PACKAGE_FLAC is not set
+# BR2_PACKAGE_FFMPEG is not set
+# BR2_PACKAGE_GSTREAMER is not set
+# BR2_PACKAGE_LAME is not set
+# BR2_PACKAGE_MADPLAY is not set
+# BR2_PACKAGE_MPD is not set
+# BR2_PACKAGE_MPG123 is not set
+# BR2_PACKAGE_MPLAYER is not set
+# BR2_PACKAGE_MUSEPACK is not set
+# BR2_PACKAGE_PULSEAUDIO is not set
+# BR2_PACKAGE_VORBIS_TOOLS is not set
+# BR2_PACKAGE_WAVPACK is not set
+
+#
+# Compressors and decompressors
+#
+# BR2_PACKAGE_BZIP2 is not set
+# BR2_PACKAGE_GZIP is not set
+# BR2_PACKAGE_LZOP is not set
+# BR2_PACKAGE_XZ is not set
+
+#
+# Debugging, profiling and benchmark
+#
+# BR2_PACKAGE_BONNIE is not set
+# BR2_PACKAGE_DHRYSTONE is not set
+# BR2_PACKAGE_DSTAT is not set
+# BR2_PACKAGE_DMALLOC is not set
+# BR2_PACKAGE_KEXEC is not set
+# BR2_PACKAGE_LATENCYTOP is not set
+# BR2_PACKAGE_LMBENCH is not set
+# BR2_PACKAGE_LSOF is not set
+# BR2_PACKAGE_LTP_TESTSUITE is not set
+# BR2_PACKAGE_LTRACE is not set
+# BR2_PACKAGE_MEMSTAT is not set
+# BR2_PACKAGE_NETPERF is not set
+# BR2_PACKAGE_OPROFILE is not set
+# BR2_PACKAGE_RAMSPEED is not set
+# BR2_PACKAGE_RT_TESTS is not set
+# BR2_PACKAGE_STRACE is not set
+# BR2_PACKAGE_STRESS is not set
+# BR2_PACKAGE_WHETSTONE is not set
+# BR2_PACKAGE_PV is not set
+
+#
+# Development tools
+#
+# BR2_PACKAGE_AUTOCONF is not set
+# BR2_PACKAGE_AUTOMAKE is not set
+# BR2_PACKAGE_BINUTILS is not set
+# BR2_PACKAGE_BISON is not set
+# BR2_PACKAGE_BSDIFF is not set
+# BR2_PACKAGE_CCACHE is not set
+# BR2_PACKAGE_COREUTILS is not set
+# BR2_PACKAGE_CVS is not set
+# BR2_PACKAGE_DIFFUTILS is not set
+# BR2_PACKAGE_DISTCC is not set
+# BR2_PACKAGE_FINDUTILS is not set
+# BR2_PACKAGE_FLEX is not set
+# BR2_PACKAGE_GAWK is not set
+
+#
+# gcc needs development files in target filesystem
+#
+# BR2_PACKAGE_GETTEXT is not set
+# BR2_PACKAGE_LIBINTL is not set
+# BR2_PACKAGE_GMP is not set
+# BR2_PACKAGE_GPERF is not set
+# BR2_PACKAGE_GREP is not set
+# BR2_PACKAGE_MAKE is not set
+# BR2_PACKAGE_MPC is not set
+# BR2_PACKAGE_MPFR is not set
+# BR2_PACKAGE_LIBTOOL is not set
+# BR2_PACKAGE_M4 is not set
+# BR2_PACKAGE_PATCH is not set
+# BR2_PACKAGE_PKG_CONFIG is not set
+# BR2_PACKAGE_SED is not set
+# BR2_PACKAGE_SSTRIP is not set
+# BR2_PACKAGE_TAR is not set
+
+#
+# Games
+#
+# BR2_PACKAGE_GNUCHESS is not set
+# BR2_PACKAGE_PRBOOM is not set
+
+#
+# Graphic libraries and applications (graphic/text)
+#
+
+#
+# Graphic applications
+#
+# BR2_PACKAGE_RRDTOOL is not set
+
+#
+# graphic libraries
+#
+# BR2_PACKAGE_DIRECTFB is not set
+# BR2_PACKAGE_FBDUMP is not set
+# BR2_PACKAGE_FBGRAB is not set
+# BR2_PACKAGE_FBSET is not set
+
+#
+# fbterm requires a toolchain with C++, WCHAR and locale support
+#
+# BR2_PACKAGE_FBV is not set
+# BR2_PACKAGE_IMAGEMAGICK is not set
+# BR2_PACKAGE_SDL is not set
+
+#
+# other GUIs
+#
+# BR2_PACKAGE_EFL is not set
+# BR2_PACKAGE_QT is not set
+# BR2_PACKAGE_XORG7 is not set
+
+#
+# X libraries and helper libraries
+#
+# BR2_PACKAGE_LIBERATION is not set
+
+#
+# X Window managers
+#
+
+#
+# X applications
+#
+# BR2_PACKAGE_GOB2 is not set
+
+#
+# midori requires C++, WCHAR in toolchain and libgtk2
+#
+# BR2_PACKAGE_VALA is not set
+
+#
+# Hardware handling
+#
+# BR2_PACKAGE_CDRKIT is not set
+# BR2_PACKAGE_CRAMFS is not set
+# BR2_PACKAGE_DBUS is not set
+# BR2_PACKAGE_DEVMEM2 is not set
+# BR2_PACKAGE_DMRAID is not set
+# BR2_PACKAGE_DOSFSTOOLS is not set
+# BR2_PACKAGE_E2FSPROGS is not set
+# BR2_PACKAGE_EEPROG is not set
+# BR2_PACKAGE_FCONFIG is not set
+# BR2_PACKAGE_FIS is not set
+# BR2_PACKAGE_FMTOOLS is not set
+# BR2_PACKAGE_GADGETFS_TEST is not set
+# BR2_PACKAGE_GDISK is not set
+# BR2_PACKAGE_GENEXT2FS is not set
+# BR2_PACKAGE_GENROMFS is not set
+# BR2_PACKAGE_GPSD is not set
+# BR2_PACKAGE_GVFS is not set
+# BR2_PACKAGE_HDPARM is not set
+# BR2_PACKAGE_HWDATA is not set
+# BR2_PACKAGE_I2C_TOOLS is not set
+# BR2_PACKAGE_INPUT_EVENT_DAEMON is not set
+# BR2_PACKAGE_INPUT_TOOLS is not set
+# BR2_PACKAGE_IOSTAT is not set
+# BR2_PACKAGE_IRDA_UTILS is not set
+# BR2_PACKAGE_KBD is not set
+# BR2_PACKAGE_LCDPROC is not set
+# BR2_PACKAGE_LINUX_FIRMWARE is not set
+# BR2_PACKAGE_LM_SENSORS is not set
+# BR2_PACKAGE_LSHW is not set
+# BR2_PACKAGE_LSUIO is not set
+# BR2_PACKAGE_LVM2 is not set
+# BR2_PACKAGE_MAKEDEVS is not set
+# BR2_PACKAGE_MDADM is not set
+# BR2_PACKAGE_MEMTESTER is not set
+# BR2_PACKAGE_MINICOM is not set
+# BR2_PACKAGE_MTD is not set
+# BR2_PACKAGE_NANOCOM is not set
+# BR2_PACKAGE_NTFS_3G is not set
+# BR2_PACKAGE_OFONO is not set
+# BR2_PACKAGE_OPEN2300 is not set
+# BR2_PACKAGE_OPENOCD is not set
+
+#
+# owl-linux requires a Linux kernel
+#
+
+#
+# owl-linux is only supported on ARM9 architecture with EABI
+#
+# BR2_PACKAGE_PARTED is not set
+# BR2_PACKAGE_PCIUTILS is not set
+# BR2_PACKAGE_PICOCOM is not set
+# BR2_PACKAGE_RNG_TOOLS is not set
+# BR2_PACKAGE_SANE_BACKENDS is not set
+# BR2_PACKAGE_SDPARM is not set
+# BR2_PACKAGE_SETSERIAL is not set
+# BR2_PACKAGE_SMARTMONTOOLS is not set
+# BR2_PACKAGE_SQUASHFS is not set
+# BR2_PACKAGE_SREDIRD is not set
+# BR2_PACKAGE_SSHFS is not set
+# BR2_PACKAGE_STATSERIAL is not set
+# BR2_PACKAGE_SYSSTAT is not set
+# BR2_PACKAGE_TI_UTILS is not set
+# BR2_PACKAGE_UBOOT_TOOLS is not set
+
+#
+# udev requires /dev mgmnt set to udev under System configuration
+#
+# BR2_PACKAGE_UNIONFS is not set
+# BR2_PACKAGE_USB_MODESWITCH is not set
+# BR2_PACKAGE_USBUTILS is not set
+# BR2_PACKAGE_WIPE is not set
+# BR2_PACKAGE_XFSPROGS is not set
+
+#
+# Interpreter languages and scripting
+#
+# BR2_PACKAGE_HASERL is not set
+# BR2_PACKAGE_LUA is not set
+# BR2_PACKAGE_LUAJIT is not set
+# BR2_PACKAGE_MICROPERL is not set
+# BR2_PACKAGE_PHP is not set
+# BR2_PACKAGE_PYTHON is not set
+# BR2_PACKAGE_RUBY is not set
+# BR2_PACKAGE_TCL is not set
+
+#
+# Libraries
+#
+
+#
+# Audio/Sound
+#
+# BR2_PACKAGE_ALSA_LIB is not set
+# BR2_PACKAGE_AUDIOFILE is not set
+# BR2_PACKAGE_LIBAO is not set
+# BR2_PACKAGE_LIBCDAUDIO is not set
+# BR2_PACKAGE_LIBCUE is not set
+# BR2_PACKAGE_LIBCUEFILE is not set
+# BR2_PACKAGE_LIBID3TAG is not set
+# BR2_PACKAGE_LIBMAD is not set
+# BR2_PACKAGE_LIBMPD is not set
+# BR2_PACKAGE_LIBREPLAYGAIN is not set
+# BR2_PACKAGE_LIBSAMPLERATE is not set
+# BR2_PACKAGE_LIBSNDFILE is not set
+# BR2_PACKAGE_LIBVORBIS is not set
+# BR2_PACKAGE_PORTAUDIO is not set
+# BR2_PACKAGE_SPEEX is not set
+# BR2_PACKAGE_TAGLIB is not set
+# BR2_PACKAGE_TREMOR is not set
+# BR2_PACKAGE_WEBRTC_AUDIO_PROCESSING is not set
+
+#
+# Compression and decompression
+#
+# BR2_PACKAGE_LIBARCHIVE is not set
+BR2_PACKAGE_LZO=y
+BR2_PACKAGE_ZLIB=y
+
+#
+# Crypto
+#
+# BR2_PACKAGE_BEECRYPT is not set
+# BR2_PACKAGE_GNUTLS is not set
+# BR2_PACKAGE_LIBGCRYPT is not set
+# BR2_PACKAGE_LIBGPG_ERROR is not set
+# BR2_PACKAGE_LIBNSS is not set
+# BR2_PACKAGE_OCF_LINUX is not set
+BR2_PACKAGE_OPENSSL=y
+BR2_PACKAGE_OPENSSL_BIN=y
+# BR2_PACKAGE_OPENSSL_ENGINES is not set
+# BR2_PACKAGE_OPENSSL_OCF is not set
+# BR2_PACKAGE_POLARSSL is not set
+
+#
+# Database
+#
+# BR2_PACKAGE_BERKELEYDB is not set
+# BR2_PACKAGE_MYSQL_CLIENT is not set
+# BR2_PACKAGE_SQLCIPHER is not set
+# BR2_PACKAGE_SQLITE is not set
+
+#
+# Filesystem
+#
+# BR2_PACKAGE_GAMIN is not set
+# BR2_PACKAGE_LIBCONFIG is not set
+# BR2_PACKAGE_LIBCONFUSE is not set
+# BR2_PACKAGE_LIBFUSE is not set
+# BR2_PACKAGE_LIBLOCKFILE is not set
+# BR2_PACKAGE_LIBSYSFS is not set
+
+#
+# Graphics
+#
+# BR2_PACKAGE_ATK is not set
+# BR2_PACKAGE_CAIRO is not set
+# BR2_PACKAGE_FONTCONFIG is not set
+# BR2_PACKAGE_FREETYPE is not set
+# BR2_PACKAGE_IMLIB2 is not set
+# BR2_PACKAGE_JPEG is not set
+# BR2_PACKAGE_LIBART is not set
+# BR2_PACKAGE_LIBDMTX is not set
+# BR2_PACKAGE_LIBEXIF is not set
+# BR2_PACKAGE_LIBGEOTIFF is not set
+# BR2_PACKAGE_GDK_PIXBUF is not set
+# BR2_PACKAGE_LIBPNG is not set
+# BR2_PACKAGE_LIBRAW is not set
+# BR2_PACKAGE_LIBSVGTINY is not set
+# BR2_PACKAGE_LIBUNGIF is not set
+# BR2_PACKAGE_OPENCV is not set
+# BR2_PACKAGE_PANGO is not set
+# BR2_PACKAGE_PIXMAN is not set
+# BR2_PACKAGE_TIFF is not set
+
+#
+# webkit requires C++, WCHAR in toolchain and libgtk2
+#
+# BR2_PACKAGE_ZXING is not set
+
+#
+# Hardware handling
+#
+# BR2_PACKAGE_LIBAIO is not set
+# BR2_PACKAGE_LIBRAW1394 is not set
+# BR2_PACKAGE_TSLIB is not set
+# BR2_PACKAGE_LIBFREEFARE is not set
+# BR2_PACKAGE_LIBFTDI is not set
+# BR2_PACKAGE_LIBHID is not set
+# BR2_PACKAGE_LIBIQRF is not set
+# BR2_PACKAGE_LIBNFC is not set
+# BR2_PACKAGE_LIBNFC_LLCP is not set
+# BR2_PACKAGE_LIBUSB is not set
+# BR2_PACKAGE_LIBV4L is not set
+
+#
+# Javascript
+#
+# BR2_PACKAGE_EXPLORERCANVAS is not set
+# BR2_PACKAGE_FLOT is not set
+# BR2_PACKAGE_JQUERY is not set
+# BR2_PACKAGE_JQUERY_SPARKLINE is not set
+# BR2_PACKAGE_JQUERY_VALIDATION is not set
+# BR2_PACKAGE_JSMIN is not set
+
+#
+# Multimedia
+#
+# BR2_PACKAGE_LIBDVDREAD is not set
+# BR2_PACKAGE_LIBDVDNAV is not set
+# BR2_PACKAGE_LIBMMS is not set
+# BR2_PACKAGE_LIBMPEG2 is not set
+# BR2_PACKAGE_LIBOGG is not set
+# BR2_PACKAGE_LIBPLAYER is not set
+# BR2_PACKAGE_LIBTHEORA is not set
+# BR2_PACKAGE_LIVE555 is not set
+# BR2_PACKAGE_MEDIASTREAMER is not set
+
+#
+# Networking
+#
+# BR2_PACKAGE_GLIB_NETWORKING is not set
+# BR2_PACKAGE_LIBCGI is not set
+# BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBCURL is not set
+# BR2_PACKAGE_LIBDNET is not set
+# BR2_PACKAGE_LIBESMTP is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBFCGI is not set
+# BR2_PACKAGE_LIBIDN is not set
+# BR2_PACKAGE_LIBOAUTH is not set
+# BR2_PACKAGE_LIBMICROHTTPD is not set
+# BR2_PACKAGE_NEON is not set
+# BR2_PACKAGE_LIBMNL is not set
+# BR2_PACKAGE_LIBMODBUS is not set
+# BR2_PACKAGE_LIBMBUS is not set
+# BR2_PACKAGE_LIBNETFILTER_CONNTRACK is not set
+# BR2_PACKAGE_LIBNETFILTER_CTTIMEOUT is not set
+# BR2_PACKAGE_LIBNFNETLINK is not set
+# BR2_PACKAGE_LIBNL is not set
+# BR2_PACKAGE_LIBOPING is not set
+# BR2_PACKAGE_LIBPCAP is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
+# BR2_PACKAGE_LIBRSYNC is not set
+# BR2_PACKAGE_LIBSOUP is not set
+# BR2_PACKAGE_LIBTORRENT is not set
+# BR2_PACKAGE_LIBUPNP is not set
+# BR2_PACKAGE_LIBVNCSERVER is not set
+# BR2_PACKAGE_ORTP is not set
+# BR2_PACKAGE_ZEROMQ is not set
+
+#
+# Other
+#
+# BR2_PACKAGE_APR is not set
+# BR2_PACKAGE_APR_UTIL is not set
+# BR2_PACKAGE_FFTW is not set
+# BR2_PACKAGE_LIBARGTABLE2 is not set
+# BR2_PACKAGE_ARGP_STANDALONE is not set
+# BR2_PACKAGE_BOOST is not set
+# BR2_PACKAGE_LIBATOMIC_OPS is not set
+# BR2_PACKAGE_LIBCAP is not set
+# BR2_PACKAGE_LIBCAP_NG is not set
+# BR2_PACKAGE_LIBDAEMON is not set
+# BR2_PACKAGE_LIBELF is not set
+# BR2_PACKAGE_LIBEVENT is not set
+# BR2_PACKAGE_LIBEV is not set
+# BR2_PACKAGE_LIBFFI is not set
+# BR2_PACKAGE_LIBGLIB2 is not set
+# BR2_PACKAGE_LIBICAL is not set
+# BR2_PACKAGE_LIBNSPR is not set
+# BR2_PACKAGE_LIBSIGC is not set
+# BR2_PACKAGE_LIBTPL is not set
+# BR2_PACKAGE_LIBURCU is not set
+# BR2_PACKAGE_LTTNG_LIBUST is not set
+# BR2_PACKAGE_ORC is not set
+# BR2_PACKAGE_POCO is not set
+# BR2_PACKAGE_PROTOBUF is not set
+
+#
+# Text and terminal handling
+#
+# BR2_PACKAGE_ENCHANT is not set
+# BR2_PACKAGE_ICU is not set
+BR2_PACKAGE_LIBICONV=y
+# BR2_PACKAGE_NCURSES is not set
+# BR2_PACKAGE_NEWT is not set
+# BR2_PACKAGE_PCRE is not set
+# BR2_PACKAGE_POPT is not set
+# BR2_PACKAGE_READLINE is not set
+# BR2_PACKAGE_SLANG is not set
+
+#
+# JSON/XML
+#
+# BR2_PACKAGE_CJSON is not set
+# BR2_PACKAGE_EXPAT is not set
+# BR2_PACKAGE_EZXML is not set
+# BR2_PACKAGE_JSON_C is not set
+# BR2_PACKAGE_LIBROXML is not set
+# BR2_PACKAGE_LIBXML2 is not set
+# BR2_PACKAGE_LIBXSLT is not set
+# BR2_PACKAGE_LIBYAML is not set
+# BR2_PACKAGE_MXML is not set
+# BR2_PACKAGE_XERCES is not set
+# BR2_PACKAGE_YAJL is not set
+
+#
+# Miscellaneous
+#
+# BR2_PACKAGE_COLLECTD is not set
+# BR2_PACKAGE_EMPTY is not set
+# BR2_PACKAGE_MOBILE_BROADBAND_PROVIDER_INFO is not set
+# BR2_PACKAGE_SHARED_MIME_INFO is not set
+# BR2_PACKAGE_SOUND_THEME_BOREALIS is not set
+# BR2_PACKAGE_SOUND_THEME_FREEDESKTOP is not set
+
+#
+# Networking applications
+#
+# BR2_PACKAGE_ARGUS is not set
+# BR2_PACKAGE_AVAHI is not set
+# BR2_PACKAGE_AXEL is not set
+# BR2_PACKAGE_BLUEZ_UTILS is not set
+# BR2_PACKAGE_BOA is not set
+# BR2_PACKAGE_BIND is not set
+# BR2_PACKAGE_BMON is not set
+# BR2_PACKAGE_BRIDGE_UTILS is not set
+# BR2_PACKAGE_CAN_UTILS is not set
+# BR2_PACKAGE_CONNMAN is not set
+# BR2_PACKAGE_CTORRENT is not set
+# BR2_PACKAGE_CIFS_UTILS is not set
+# BR2_PACKAGE_CONNTRACK_TOOLS is not set
+# BR2_PACKAGE_CUPS is not set
+# BR2_PACKAGE_DHCP is not set
+# BR2_PACKAGE_DHCPDUMP is not set
+# BR2_PACKAGE_DNSMASQ is not set
+# BR2_PACKAGE_DROPBEAR is not set
+# BR2_PACKAGE_EBTABLES is not set
+# BR2_PACKAGE_ETHTOOL is not set
+# BR2_PACKAGE_HEIRLOOM_MAILX is not set
+# BR2_PACKAGE_HIAWATHA is not set
+# BR2_PACKAGE_HOSTAPD is not set
+# BR2_PACKAGE_IFPLUGD is not set
+# BR2_PACKAGE_INADYN is not set
+# BR2_PACKAGE_IPERF is not set
+# BR2_PACKAGE_IPROUTE2 is not set
+# BR2_PACKAGE_IPSEC_TOOLS is not set
+# BR2_PACKAGE_IPSET is not set
+# BR2_PACKAGE_IPTABLES is not set
+# BR2_PACKAGE_IW is not set
+# BR2_PACKAGE_KISMET is not set
+# BR2_PACKAGE_LIGHTTPD is not set
+# BR2_PACKAGE_LINKS is not set
+# BR2_PACKAGE_LINPHONE is not set
+# BR2_PACKAGE_LRZSZ is not set
+# BR2_PACKAGE_MII_DIAG is not set
+# BR2_PACKAGE_MROUTED is not set
+# BR2_PACKAGE_MSMTP is not set
+# BR2_PACKAGE_MUTT is not set
+# BR2_PACKAGE_NBD is not set
+# BR2_PACKAGE_NCFTP is not set
+# BR2_PACKAGE_NDISC6 is not set
+# BR2_PACKAGE_NETCAT is not set
+# BR2_PACKAGE_NETKITBASE is not set
+# BR2_PACKAGE_NETKITTELNET is not set
+# BR2_PACKAGE_NETATALK is not set
+# BR2_PACKAGE_NETPLUG is not set
+# BR2_PACKAGE_NETSNMP is not set
+# BR2_PACKAGE_NETSTAT_NAT is not set
+# BR2_PACKAGE_NOIP is not set
+# BR2_PACKAGE_NFS_UTILS is not set
+# BR2_PACKAGE_NGIRCD is not set
+# BR2_PACKAGE_NGREP is not set
+# BR2_PACKAGE_NTP is not set
+# BR2_PACKAGE_NUTTCP is not set
+# BR2_PACKAGE_OLSR is not set
+# BR2_PACKAGE_OPENNTPD is not set
+# BR2_PACKAGE_OPENSSH is not set
+# BR2_PACKAGE_OPENSWAN is not set
+# BR2_PACKAGE_OPENVPN is not set
+# BR2_PACKAGE_PORTMAP is not set
+# BR2_PACKAGE_PPPD is not set
+# BR2_PACKAGE_PPTP_LINUX is not set
+# BR2_PACKAGE_PROFTPD is not set
+# BR2_PACKAGE_QUAGGA is not set
+# BR2_PACKAGE_RADVD is not set
+# BR2_PACKAGE_RSH_REDONE is not set
+# BR2_PACKAGE_RSYNC is not set
+# BR2_PACKAGE_RTORRENT is not set
+# BR2_PACKAGE_SAMBA is not set
+# BR2_PACKAGE_SER2NET is not set
+# BR2_PACKAGE_SOCAT is not set
+# BR2_PACKAGE_SOCKETCAND is not set
+# BR2_PACKAGE_SPAWN_FCGI is not set
+# BR2_PACKAGE_SQUID is not set
+# BR2_PACKAGE_STUNNEL is not set
+# BR2_PACKAGE_TCPDUMP is not set
+# BR2_PACKAGE_TCPREPLAY is not set
+# BR2_PACKAGE_TFTPD is not set
+# BR2_PACKAGE_THTTPD is not set
+# BR2_PACKAGE_TINYHTTPD is not set
+# BR2_PACKAGE_TN5250 is not set
+# BR2_PACKAGE_TRANSMISSION is not set
+# BR2_PACKAGE_UDPCAST is not set
+# BR2_PACKAGE_USHARE is not set
+# BR2_PACKAGE_VPNC is not set
+# BR2_PACKAGE_VSFTPD is not set
+# BR2_PACKAGE_VTUN is not set
+# BR2_PACKAGE_WGET is not set
+# BR2_PACKAGE_WIRELESS_TOOLS is not set
+# BR2_PACKAGE_WPA_SUPPLICANT is not set
+# BR2_PACKAGE_XINETD is not set
+# BR2_PACKAGE_XL2TP is not set
+
+#
+# Package managers
+#
+# BR2_PACKAGE_IPKG is not set
+# BR2_PACKAGE_OPKG is not set
+
+#
+# rpm requires libneon with SSL, XML and ZLIB support
+#
+
+#
+# Real-Time
+#
+# BR2_PACKAGE_XENOMAI is not set
+
+#
+# Shell and utilities
+#
+# BR2_PACKAGE_AT is not set
+# BR2_PACKAGE_BASH is not set
+# BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_DIALOG is not set
+# BR2_PACKAGE_FILE is not set
+# BR2_PACKAGE_INOTIFY_TOOLS is not set
+# BR2_PACKAGE_LOCKFILE_PROGS is not set
+# BR2_PACKAGE_LOGROTATE is not set
+# BR2_PACKAGE_LOGSURFER is not set
+# BR2_PACKAGE_SCREEN is not set
+# BR2_PACKAGE_SUDO is not set
+# BR2_PACKAGE_WHICH is not set
+# BR2_PACKAGE_XMLSTARLET is not set
+
+#
+# System tools
+#
+# BR2_PACKAGE_ACL is not set
+# BR2_PACKAGE_ATTR is not set
+# BR2_PACKAGE_BOOTUTILS is not set
+# BR2_PACKAGE_BWM_NG is not set
+# BR2_PACKAGE_HTOP is not set
+# BR2_PACKAGE_KMOD is not set
+# BR2_PACKAGE_MODULE_INIT_TOOLS is not set
+# BR2_PACKAGE_MONIT is not set
+# BR2_PACKAGE_PROCPS is not set
+# BR2_PACKAGE_PSMISC is not set
+# BR2_PACKAGE_QUOTA is not set
+# BR2_PACKAGE_RSYSLOG is not set
+# BR2_PACKAGE_SYSKLOGD is not set
+# BR2_PACKAGE_SYSVINIT is not set
+
+#
+# systemd not available (depends on /dev management with udev and ipv6 support, and thread support in toolchain)
+#
+# BR2_PACKAGE_UTIL_LINUX is not set
+
+#
+# Text editors and viewers
+#
+# BR2_PACKAGE_ED is not set
+# BR2_PACKAGE_LESS is not set
+# BR2_PACKAGE_NANO is not set
+# BR2_PACKAGE_UEMACS is not set
+# BR2_PACKAGE_VIM is not set
+
+#
+# Host utilities
+#
+# BR2_PACKAGE_HOST_DFU_UTIL is not set
+# BR2_PACKAGE_HOST_LPC3250LOADER is not set
+# BR2_PACKAGE_HOST_OMAP_U_BOOT_UTILS is not set
+# BR2_PACKAGE_HOST_OPENOCD is not set
+# BR2_PACKAGE_HOST_SAM_BA is not set
+# BR2_PACKAGE_HOST_UBOOT_TOOLS is not set
+
+#
+# Filesystem images
+#
+# BR2_TARGET_ROOTFS_CRAMFS is not set
+# BR2_TARGET_ROOTFS_CLOOP is not set
+# BR2_TARGET_ROOTFS_EXT2 is not set
+# BR2_TARGET_ROOTFS_JFFS2 is not set
+# BR2_TARGET_ROOTFS_UBIFS is not set
+# BR2_TARGET_ROOTFS_SQUASHFS is not set
+# BR2_TARGET_ROOTFS_TAR is not set
+# BR2_TARGET_ROOTFS_CPIO is not set
+
+#
+# initramfs requires a Linux kernel to be built
+#
+# BR2_TARGET_ROOTFS_ROMFS is not set
+
+#
+# Bootloaders
+#
+# BR2_TARGET_BAREBOX is not set
+# BR2_TARGET_MXS_BOOTLETS is not set
+# BR2_TARGET_UBOOT is not set
+
+#
+# Kernel
+#
+# BR2_LINUX_KERNEL is not set
diff --git a/ok6410/src/crosstool/crosstool-ng/crosstool-ng-1.15.3_arm1176jzfs.config b/ok6410/src/crosstool/crosstool-ng/crosstool-ng-1.15.3_arm1176jzfs.config
new file mode 100644
index 0000000..57bd4ce
--- /dev/null
+++ b/ok6410/src/crosstool/crosstool-ng/crosstool-ng-1.15.3_arm1176jzfs.config
@@ -0,0 +1,486 @@
+#
+# Automatically generated make config: don't edit
+# crosstool-NG 1.15.3 Configuration
+# Sun Feb 24 11:27:04 2013
+#
+CT_CONFIGURE_has_xz=y
+CT_CONFIGURE_has_cvs=y
+CT_CONFIGURE_has_svn=y
+CT_MODULES=y
+
+#
+# Paths and misc options
+#
+
+#
+# crosstool-NG behavior
+#
+# CT_OBSOLETE is not set
+# CT_EXPERIMENTAL is not set
+# CT_DEBUG_CT is not set
+
+#
+# Paths
+#
+CT_LOCAL_TARBALLS_DIR="${PWD}/src"
+CT_SAVE_TARBALLS=y
+CT_WORK_DIR="${CT_TOP_DIR}/.build"
+CT_PREFIX_DIR="${PWD}/${CT_TARGET}"
+CT_INSTALL_DIR="${CT_PREFIX_DIR}"
+CT_RM_RF_PREFIX_DIR=y
+# CT_REMOVE_DOCS is not set
+# CT_BUILD_MANUALS is not set
+CT_INSTALL_DIR_RO=y
+CT_STRIP_ALL_TOOLCHAIN_EXECUTABLES=y
+
+#
+# Downloading
+#
+# CT_FORBID_DOWNLOAD is not set
+# CT_FORCE_DOWNLOAD is not set
+CT_CONNECT_TIMEOUT=10
+# CT_ONLY_DOWNLOAD is not set
+# CT_USE_MIRROR is not set
+
+#
+# Extracting
+#
+# CT_FORCE_EXTRACT is not set
+CT_OVERIDE_CONFIG_GUESS_SUB=y
+# CT_ONLY_EXTRACT is not set
+CT_PATCH_BUNDLED=y
+# CT_PATCH_LOCAL is not set
+# CT_PATCH_BUNDLED_LOCAL is not set
+# CT_PATCH_LOCAL_BUNDLED is not set
+# CT_PATCH_BUNDLED_FALLBACK_LOCAL is not set
+# CT_PATCH_LOCAL_FALLBACK_BUNDLED is not set
+# CT_PATCH_NONE is not set
+CT_PATCH_ORDER="bundled"
+
+#
+# Build behavior
+#
+CT_PARALLEL_JOBS=0
+CT_LOAD=0
+CT_USE_PIPES=y
+CT_EXTRA_FLAGS_FOR_HOST=""
+# CT_CONFIG_SHELL_SH is not set
+# CT_CONFIG_SHELL_ASH is not set
+CT_CONFIG_SHELL_BASH=y
+# CT_CONFIG_SHELL_CUSTOM is not set
+CT_CONFIG_SHELL="${bash}"
+
+#
+# Logging
+#
+# CT_LOG_ERROR is not set
+# CT_LOG_WARN is not set
+# CT_LOG_INFO is not set
+CT_LOG_EXTRA=y
+# CT_LOG_ALL is not set
+# CT_LOG_DEBUG is not set
+CT_LOG_LEVEL_MAX="EXTRA"
+# CT_LOG_SEE_TOOLS_WARN is not set
+CT_LOG_PROGRESS_BAR=y
+CT_LOG_TO_FILE=y
+CT_LOG_FILE_COMPRESS=y
+
+#
+# Target options
+#
+CT_ARCH="arm"
+CT_ARCH_SUPPORTS_BOTH_MMU=y
+CT_ARCH_SUPPORTS_BOTH_ENDIAN=y
+CT_ARCH_SUPPORTS_32=y
+CT_ARCH_SUPPORTS_WITH_ARCH=y
+CT_ARCH_SUPPORTS_WITH_CPU=y
+CT_ARCH_SUPPORTS_WITH_TUNE=y
+CT_ARCH_SUPPORTS_WITH_FLOAT=y
+CT_ARCH_SUPPORTS_WITH_FPU=y
+CT_ARCH_SUPPORTS_SOFTFP=y
+CT_ARCH_DEFAULT_HAS_MMU=y
+CT_ARCH_DEFAULT_LE=y
+CT_ARCH_DEFAULT_32=y
+CT_ARCH_ARCH="armv6"
+CT_ARCH_CPU="arm1176jzf-s"
+CT_ARCH_TUNE=""
+CT_ARCH_FPU=""
+# CT_ARCH_BE is not set
+CT_ARCH_LE=y
+CT_ARCH_32=y
+CT_ARCH_BITNESS=32
+CT_ARCH_FLOAT_HW=y
+# CT_ARCH_FLOAT_SW is not set
+CT_TARGET_CFLAGS=""
+CT_TARGET_LDFLAGS=""
+# CT_ARCH_alpha is not set
+CT_ARCH_arm=y
+# CT_ARCH_avr32 is not set
+# CT_ARCH_blackfin is not set
+# CT_ARCH_mips is not set
+# CT_ARCH_powerpc is not set
+# CT_ARCH_sh is not set
+# CT_ARCH_sparc is not set
+# CT_ARCH_x86 is not set
+CT_ARCH_alpha_AVAILABLE=y
+CT_ARCH_arm_AVAILABLE=y
+CT_ARCH_avr32_AVAILABLE=y
+CT_ARCH_blackfin_AVAILABLE=y
+CT_ARCH_m68k_AVAILABLE=y
+CT_ARCH_mips_AVAILABLE=y
+CT_ARCH_powerpc_AVAILABLE=y
+CT_ARCH_s390_AVAILABLE=y
+CT_ARCH_sh_AVAILABLE=y
+CT_ARCH_sparc_AVAILABLE=y
+CT_ARCH_x86_AVAILABLE=y
+
+#
+# Generic target options
+#
+CT_ARCH_USE_MMU=y
+CT_ARCH_ENDIAN="little"
+
+#
+# Target optimisations
+#
+# CT_ARCH_FLOAT_SOFTFP is not set
+CT_ARCH_FLOAT="hard"
+
+#
+# arm other options
+#
+CT_ARCH_ARM_MODE="arm"
+CT_ARCH_ARM_MODE_ARM=y
+CT_ARCH_ARM_EABI=y
+
+#
+# Toolchain options
+#
+
+#
+# General toolchain options
+#
+CT_FORCE_SYSROOT=y
+CT_USE_SYSROOT=y
+CT_SYSROOT_NAME="sysroot"
+CT_SYSROOT_DIR_PREFIX=""
+CT_TOOLCHAIN_PKGVERSION=""
+CT_TOOLCHAIN_BUGURL=""
+
+#
+# Tuple completion and aliasing
+#
+CT_TARGET_VENDOR="arm1176jzfs"
+CT_TARGET_ALIAS_SED_EXPR=""
+CT_TARGET_ALIAS=""
+
+#
+# Toolchain type
+#
+CT_CROSS=y
+CT_TOOLCHAIN_TYPE="cross"
+
+#
+# Build system
+#
+CT_BUILD=""
+CT_BUILD_PREFIX=""
+CT_BUILD_SUFFIX=""
+
+#
+# Misc options
+#
+# CT_TOOLCHAIN_ENABLE_NLS is not set
+
+#
+# Operating System
+#
+CT_KERNEL_SUPPORTS_SHARED_LIBS=y
+CT_KERNEL="linux"
+CT_KERNEL_VERSION="3.0.30"
+# CT_KERNEL_bare_metal is not set
+CT_KERNEL_linux=y
+CT_KERNEL_bare_metal_AVAILABLE=y
+CT_KERNEL_linux_AVAILABLE=y
+# CT_KERNEL_V_3_3_4 is not set
+# CT_KERNEL_V_3_3_3 is not set
+# CT_KERNEL_V_3_3_2 is not set
+# CT_KERNEL_V_3_3_1 is not set
+# CT_KERNEL_V_3_3 is not set
+# CT_KERNEL_V_3_2_16 is not set
+# CT_KERNEL_V_3_1_10 is not set
+CT_KERNEL_V_3_0_30=y
+# CT_KERNEL_V_2_6_39_4 is not set
+# CT_KERNEL_V_2_6_38_8 is not set
+# CT_KERNEL_V_2_6_37_6 is not set
+# CT_KERNEL_V_2_6_36_4 is not set
+# CT_KERNEL_V_2_6_33_20 is not set
+# CT_KERNEL_V_2_6_32_59 is not set
+# CT_KERNEL_V_2_6_31_14 is not set
+# CT_KERNEL_V_2_6_27_62 is not set
+# CT_KERNEL_LINUX_CUSTOM is not set
+CT_KERNEL_mingw32_AVAILABLE=y
+
+#
+# Common kernel options
+#
+CT_SHARED_LIBS=y
+
+#
+# linux other options
+#
+CT_KERNEL_LINUX_VERBOSITY_0=y
+# CT_KERNEL_LINUX_VERBOSITY_1 is not set
+# CT_KERNEL_LINUX_VERBOSITY_2 is not set
+CT_KERNEL_LINUX_VERBOSE_LEVEL=0
+CT_KERNEL_LINUX_INSTALL_CHECK=y
+
+#
+# Binary utilities
+#
+CT_ARCH_BINFMT_ELF=y
+
+#
+# GNU binutils
+#
+# CT_BINUTILS_V_2_21_1a is not set
+# CT_BINUTILS_V_2_20_1a is not set
+CT_BINUTILS_V_2_19_1a=y
+# CT_BINUTILS_V_2_18a is not set
+CT_BINUTILS_VERSION="2.19.1a"
+CT_BINUTILS_2_19_or_later=y
+CT_BINUTILS_2_18_or_later=y
+CT_BINUTILS_HAS_HASH_STYLE=y
+CT_BINUTILS_GOLD_SUPPORTS_ARCH=y
+CT_BINUTILS_HAS_PKGVERSION_BUGURL=y
+CT_BINUTILS_FORCE_LD_BFD=y
+CT_BINUTILS_LINKER_LD=y
+CT_BINUTILS_LINKERS_LIST="ld"
+CT_BINUTILS_LINKER_DEFAULT="bfd"
+CT_BINUTILS_EXTRA_CONFIG_ARRAY=""
+CT_BINUTILS_FOR_TARGET=y
+CT_BINUTILS_FOR_TARGET_IBERTY=y
+CT_BINUTILS_FOR_TARGET_BFD=y
+
+#
+# C compiler
+#
+CT_CC="gcc"
+CT_CC_VERSION="4.3.2"
+CT_CC_gcc=y
+# CT_CC_V_4_6_3 is not set
+# CT_CC_V_4_6_2 is not set
+# CT_CC_V_4_6_1 is not set
+# CT_CC_V_4_6_0 is not set
+# CT_CC_V_4_5_3 is not set
+# CT_CC_V_4_5_2 is not set
+# CT_CC_V_4_5_1 is not set
+# CT_CC_V_4_5_0 is not set
+# CT_CC_V_4_4_7 is not set
+# CT_CC_V_4_4_6 is not set
+# CT_CC_V_4_4_5 is not set
+# CT_CC_V_4_4_4 is not set
+# CT_CC_V_4_4_3 is not set
+# CT_CC_V_4_4_2 is not set
+# CT_CC_V_4_4_1 is not set
+# CT_CC_V_4_4_0 is not set
+# CT_CC_V_4_3_6 is not set
+# CT_CC_V_4_3_5 is not set
+# CT_CC_V_4_3_4 is not set
+# CT_CC_V_4_3_3 is not set
+CT_CC_V_4_3_2=y
+# CT_CC_V_4_3_1 is not set
+# CT_CC_V_4_2_4 is not set
+# CT_CC_V_4_2_2 is not set
+CT_CC_GCC_4_2_or_later=y
+CT_CC_GCC_4_3=y
+CT_CC_GCC_4_3_or_later=y
+CT_CC_GCC_HAS_PKGVERSION_BUGURL=y
+CT_CC_GCC_USE_GMP_MPFR=y
+# CT_CC_LANG_FORTRAN is not set
+CT_CC_SUPPORT_CXX=y
+CT_CC_SUPPORT_FORTRAN=y
+CT_CC_SUPPORT_JAVA=y
+CT_CC_SUPPORT_ADA=y
+CT_CC_SUPPORT_OBJC=y
+CT_CC_SUPPORT_OBJCXX=y
+
+#
+# Additional supported languages:
+#
+CT_CC_LANG_CXX=y
+# CT_CC_LANG_JAVA is not set
+
+#
+# gcc other options
+#
+CT_CC_ENABLE_CXX_FLAGS=""
+CT_CC_CORE_EXTRA_CONFIG_ARRAY=""
+CT_CC_EXTRA_CONFIG_ARRAY=""
+
+#
+# Optimisation features
+#
+
+#
+# Settings for libraries running on target
+#
+CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y
+# CT_CC_GCC_LIBMUDFLAP is not set
+# CT_CC_GCC_LIBGOMP is not set
+# CT_CC_GCC_LIBSSP is not set
+
+#
+# Misc. obscure options.
+#
+CT_CC_CXA_ATEXIT=y
+# CT_CC_GCC_DISABLE_PCH is not set
+# CT_CC_GCC_SJLJ_EXCEPTIONS is not set
+CT_CC_GCC_LDBL_128=m
+
+#
+# C-library
+#
+CT_LIBC="glibc"
+CT_LIBC_VERSION="2.9"
+# CT_LIBC_eglibc is not set
+CT_LIBC_glibc=y
+# CT_LIBC_uClibc is not set
+CT_LIBC_eglibc_AVAILABLE=y
+CT_LIBC_glibc_AVAILABLE=y
+CT_LIBC_GLIBC_TARBALL=y
+# CT_LIBC_GLIBC_V_2_14_1 is not set
+# CT_LIBC_GLIBC_V_2_14 is not set
+# CT_LIBC_GLIBC_V_2_13 is not set
+# CT_LIBC_GLIBC_V_2_12_2 is not set
+# CT_LIBC_GLIBC_V_2_12_1 is not set
+# CT_LIBC_GLIBC_V_2_11_1 is not set
+# CT_LIBC_GLIBC_V_2_11 is not set
+# CT_LIBC_GLIBC_V_2_10_1 is not set
+CT_LIBC_GLIBC_V_2_9=y
+# CT_LIBC_GLIBC_V_2_8 is not set
+CT_LIBC_mingw_AVAILABLE=y
+CT_LIBC_newlib_AVAILABLE=y
+CT_LIBC_none_AVAILABLE=y
+CT_LIBC_uClibc_AVAILABLE=y
+CT_LIBC_SUPPORT_THREADS_ANY=y
+CT_LIBC_SUPPORT_NPTL=y
+CT_THREADS="nptl"
+
+#
+# Common C library options
+#
+CT_THREADS_NPTL=y
+CT_LIBC_XLDD=y
+CT_LIBC_GLIBC_MAY_FORCE_PORTS=y
+CT_LIBC_glibc_familly=y
+CT_LIBC_GLIBC_EXTRA_CONFIG_ARRAY=""
+CT_LIBC_GLIBC_CONFIGPARMS=""
+CT_LIBC_GLIBC_EXTRA_CFLAGS=""
+CT_LIBC_EXTRA_CC_ARGS=""
+# CT_LIBC_DISABLE_VERSIONING is not set
+CT_LIBC_OLDEST_ABI=""
+# CT_LIBC_GLIBC_FORCE_UNWIND is not set
+CT_LIBC_GLIBC_USE_PORTS=y
+CT_LIBC_ADDONS_LIST=""
+# CT_LIBC_LOCALES is not set
+# CT_LIBC_GLIBC_KERNEL_VERSION_NONE is not set
+CT_LIBC_GLIBC_KERNEL_VERSION_AS_HEADERS=y
+# CT_LIBC_GLIBC_KERNEL_VERSION_CHOSEN is not set
+CT_LIBC_GLIBC_MIN_KERNEL="3.0.30"
+
+#
+# glibc other options
+#
+
+#
+# WARNING !!!
+#
+
+#
+# For glibc >= 2.8, it can happen that the tarballs
+#
+
+#
+# for the addons are not available for download.
+#
+
+#
+# If that happens, bad luck... Try a previous version
+#
+
+#
+# or try again later... :-(
+#
+
+#
+# Debug facilities
+#
+CT_DEBUG_dmalloc=y
+CT_DMALLOC_V_5_5_2=y
+CT_DMALLOC_VERSION="5.5.2"
+CT_DEBUG_duma=y
+CT_DUMA_A=y
+CT_DUMA_SO=y
+CT_DUMA_V_2_5_15=y
+CT_DUMA_VERSION="2_5_15"
+CT_DEBUG_gdb=y
+CT_GDB_CROSS=y
+# CT_GDB_CROSS_STATIC is not set
+CT_GDB_CROSS_PYTHON=y
+CT_GDB_CROSS_EXTRA_CONFIG_ARRAY=""
+CT_GDB_NATIVE=y
+# CT_GDB_NATIVE_STATIC is not set
+CT_GDB_GDBSERVER=y
+CT_GDB_GDBSERVER_STATIC=y
+
+#
+# gdb version
+#
+CT_GDB_V_6_8a=y
+CT_GDB_VERSION="6.8a"
+CT_DEBUG_ltrace=y
+CT_LTRACE_V_0_5_3=y
+# CT_LTRACE_V_0_5_2 is not set
+CT_LTRACE_VERSION="0.5.3"
+CT_LTRACE_0_5_3_or_later=y
+CT_DEBUG_strace=y
+CT_STRACE_V_4_5_19=y
+# CT_STRACE_V_4_5_18 is not set
+CT_STRACE_VERSION="4.5.19"
+
+#
+# Companion libraries
+#
+CT_COMPLIBS_NEEDED=y
+CT_GMP_NEEDED=y
+CT_MPFR_NEEDED=y
+CT_COMPLIBS=y
+CT_GMP=y
+CT_MPFR=y
+CT_LIBELF_TARGET=y
+# CT_GMP_V_5_0_2 is not set
+# CT_GMP_V_5_0_1 is not set
+CT_GMP_V_4_3_2=y
+# CT_GMP_V_4_3_1 is not set
+# CT_GMP_V_4_3_0 is not set
+CT_GMP_VERSION="4.3.2"
+# CT_MPFR_V_3_1_0 is not set
+# CT_MPFR_V_3_0_1 is not set
+# CT_MPFR_V_3_0_0 is not set
+CT_MPFR_V_2_4_2=y
+# CT_MPFR_V_2_4_1 is not set
+# CT_MPFR_V_2_4_0 is not set
+CT_MPFR_VERSION="2.4.2"
+
+#
+# libelf version needed to build for target
+#
+CT_LIBELF_V_0_8_13=y
+# CT_LIBELF_V_0_8_12 is not set
+CT_LIBELF_VERSION="0.8.13"
+
+#
+# Companion libraries common options
+#
+# CT_COMPLIBS_CHECK is not set
diff --git a/ok6410/src/crosstool/crosstool-ng/crosstool-ng_glibc.howto b/ok6410/src/crosstool/crosstool-ng/crosstool-ng_glibc.howto
new file mode 100644
index 0000000..5aa8b99
--- /dev/null
+++ b/ok6410/src/crosstool/crosstool-ng/crosstool-ng_glibc.howto
@@ -0,0 +1,308 @@
+
+�����ڽ��ܽ��������������֮ǰ���Ƚ���һ��uClibc��glibc�Ȼ���֪ʶ��
+
+
+GCC�� gcc��gnu collect compiler����һ����빤�ߵ��ܳơ�����Ҫ��ɵĹ��������ǡ�Ԥ�����͡����롱���Լ��ṩ���������������ص����п��֧�֣���libgcc_s.so��libstdc++.so�ȡ�
+
+glibc: glibc��gnu������libc�⣬Ҳ��c���п⣬��Ҳ��CC�ı�׼�⣬��������GCC���ֱ�׼������ʵ�֣����и���unixϵ�ĺ��������档glibc��linuxϵͳ����ײ��api�����������κε����пⶼ��������glibc��glibc���˷�װlinux����ϵͳ���ṩ��ϵͳ�����⣬������Ҳ�ṩ���������һЩ��Ҫ���ܷ����ʵ�֡�
+
+uclibc: uclibc����һc���п⣬��glibc�������С����������uclinux��ʱ����Ҫһ���ܱ���Ƚ�С�����Ŀ���ļ��ı����������ʱ�������д��һ��uc-libc�⣬��������˵��uclinux�ϵ�һ��glibc��ֲ�����ǻ����кܶຯ��û��ʵ�֣���������ֻ����ǿ��������uclinux��д���򡣺�������ţ����д��uclibc,��������������ϵ���������glibc,����˺ܶ���ǰuc-libc��֧�ֵĺ��������˾������м�ֵ�ľ���uclibcʵ����pthreadϵ�к�������ǰ��uc-libcֻ����fork+exec����ɵĶ��̹߳��ܡ�uclibc����Ҳ��ֻ������Ƕ��ʽϵͳ���棬һЩ��Ҳϲ���ڱ�׼ƽ̨ʹ����������һЩ������ȻuClibc��Glibc�����еĽӿ����Ǽ��ݵģ�����Щ�ӿڲ�û��ʵ�֡�
+
+libstdc++: libstdc++ ��GNU C++ standard Library.
+
+���⣬������Щ����glibc��uClibc��һЩ��������£��ҿ���һ�£�������Щ�������Ѿ�����ˣ��� uClibc������ʱ��librt��ǰȱ��aio�ӿڡ�ȫ����ʱ�ӽӿں͹����ڴ�ӿ�(����ʵ�ֶ�ʱ���ӿں���Ϣ���нӿ�)������ʹ��uClibcʱ��û������Щ���ƣ���������������uClinux��Ҫ��ȱ��MMU�����²���֧�ֶ�̬�⼼���͹����ڴ棬�������Ѿ��ܹ��ܺõĽ���ˡ������һ�ιٷ�����uClibc�ļ�飺
+
+A C library for embedded Linux
+uClibc (aka uClibc/pronounced yew-see-lib-see) is a C library for developing embedded Linux systems. It is much smaller than the GNU C Library, but nearly all applications supported by glibc also work perfectly with uClibc. Porting applications from glibc to uClibc typically involves just recompiling the source code. uClibc even supports shared libraries and threading. It currently runs on standard Linux and MMU-less (also known as uClinux) systems with support for alpha, amd64, ARM, Blackfin, cris, h8300, hppa, i386, i960, ia64, m68k, mips/mipsel, PowerPC, SH, SPARC, and v850 processors.
+If you are building an embedded Linux system and you find that glibc is eating up too much space, you may want to consider using uClibc. If you are building a huge fileserver with 12 Terabytes of storage, then using glibc may make more sense. Unless, for example, that 12 Terabytes will be Network Attached Storage and you plan to burn Linux into the system's firmware...
+
+
+
+1��Linux����������ϵͳ����˵����
+[guowenxue@centos6 crosstool]$ lsb_release -a
+LSB Version: :core-4.0-amd64:core-4.0-noarch:graphics-4.0-amd64:graphics-4.0-noarch:printing-4.0-amd64:printing-4.0-noarch
+Distributor ID: CentOS
+Description: CentOS release 6.3 (Final)
+Release: 6.3
+Codename: Final
+[guowenxue@centos6 crosstool]$ uname -a
+Linux centos6.localdomain 2.6.32-279.1.1.el6.x86_64 #1 SMP Tue Jul 10 13:47:21 UTC 2012 x86_64 x86_64 x86_64 GNU/Linux
+[guowenxue@centos6 crosstool]$ gcc -v
+Using built-in specs.
+Target: x86_64-redhat-linux
+Configured with: ../configure --prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/info --with-bugurl=http://bugzilla.redhat.com/bugzilla --enable-bootstrap --enable-shared --enable-threads=posix --enable-checking=release --with-system-zlib --enable-__cxa_atexit --disable-libunwind-exceptions --enable-gnu-unique-object --enable-languages=c,c++,objc,obj-c++,java,fortran,ada --enable-java-awt=gtk --disable-dssi --with-java-home=/usr/lib/jvm/java-1.5.0-gcj-1.5.0.0/jre --enable-libgcj-multifile --enable-java-maintainer-mode --with-ecj-jar=/usr/share/java/eclipse-ecj.jar --disable-libjava-multilib --with-ppl --with-cloog --with-tune=generic --with-arch_32=i686 --build=x86_64-redhat-linux
+Thread model: posix
+gcc version 4.4.6 20120305 (Red Hat 4.4.6-4) (GCC)
+
+2�����ȴ���/opt/crosstool-ngĿ¼�������أ����벢��װcrosstool-ng����Ŀ¼��
+[guowenxue@centos6 ~]$ sudo mkdir -p /opt/crosstool-ng
+[guowenxue@centos6 ~]$ sudo chown guowenxue.guowenxue /opt/crosstool-ng
+[guowenxue@centos6 ~]$ cd /opt/crosstool-ng
+[guowenxue@centos6 crosstool-ng]$ wget http://crosstool-ng.org/download/crosstool-ng/crosstool-ng-1.15.3.tar.bz2
+--2012-07-18 15:35:40-- http://crosstool-ng.org/download/crosstool-ng/crosstool-ng-1.15.3.tar.bz2
+Resolving crosstool-ng.org... 140.211.15.107
+Connecting to crosstool-ng.org|140.211.15.107|:80... connected.
+HTTP request sent, awaiting response... 200 OK
+Length: 1976469 (1.9M) [application/x-bzip]
+Saving to: ��crosstool-ng-1.15.3.tar.bz2��
+
+100%[==========================================================================================>] 1,976,469 442K/s in 4.4s
+
+2012-07-18 15:35:45 (442 KB/s) - ��crosstool-ng-1.15.3.tar.bz2�� saved [1976469/1976469
+
+[guowenxue@centos6 crosstool-ng]$ tar -xjf crosstool-ng-1.15.3.tar.bz2
+[guowenxue@centos6 crosstool-ng]$ cd crosstool-ng-1.15.3
+[guowenxue@centos6 crosstool-ng-1.15.3]$ ./configure --prefix=/opt/crosstool-ng
+[guowenxue@centos6 crosstool-ng-1.15.3]$ make && make install
+[guowenxue@centos6 crosstool-ng-1.15.3]$ cd /opt/crosstool-ng
+[guowenxue@centos6 crosstool-ng]$ ls
+bin crosstool-ng-1.15.3 crosstool-ng-1.15.3.tar.bz2 lib share
+
+
+3������ʹ��crosstool-ng��������������Ĺ���Ŀ¼/opt/crosstool�����������Դ�������/opt/crosstool/srcĿ¼�£����Դ���·���������������.
+[guowenxue@centos6 crosstool-ng]$ sudo mkdir -p /opt/crosstool/src
+[guowenxue@centos6 crosstool-ng]$ sudo chown -R guowenxue.guowenxue /opt/crosstool
+[guowenxue@centos6 crosstool-ng]$ cd /opt/crosstool
+[guowenxue@centos6 crosstool]$ ls src/
+binutils-2.19.1a.tar.bz2 expat-2.0.1.tar.gz glibc-2.9.tar.bz2 libelf-0.8.13.tar.gz mpfr-2.4.2.tar.xz
+dmalloc-5.5.2.tgz gcc-4.3.2.tar.bz2 glibc-ports-2.9.tar.bz2 linux-3.0.30.tar.xz ncurses-5.9.tar.gz
+duma_2_5_15.tar.gz gdb-6.8a.tar.bz2 gmp-4.3.2.tar.bz2 ltrace_0.5.3.orig.tar.gz strace-4.5.19.tar.bz2
+��ʾ����������ЩԴ���ʱ��ֱ��ʹ��googleӢ������Դ������ƣ������ҵ���Ӧ�����ص�ַ(��ô�Դ����ٷ�����)��������������غõĻ���������������������Ĺ�����crosstool-ng���Զ����������أ���������̻�Ƚ�������������һ��ʵ����Ѹ�����غú��ٿ�ʼ���롣
+
+4, ��/opt/crosstool������������������������ѡ��
+[guowenxue@centos6 crosstool]$ cp /opt/crosstool-ng/lib/ct-ng.1.15.3/samples/arm-unknown-linux-gnueabi/crosstool.config .config
+[guowenxue@centos6 crosstool]$ export PATH=$PATH:/opt/crosstool-ng/bin/
+[guowenxue@centos6 crosstool]$ export TERM=vt100
+[guowenxue@centos6 crosstool]$ ct-ng menuconfig
+
+ Paths and misc options --->
+ ... ...
+ (${PWD}/src) Local tarballs directory ����ָ���������������������Ҫ��Դ���������λ��
+ ... ...
+ (${PWD}/${CT_TARGET}) Prefix directory ${PWD}/${CT_TARGET} ����ָ������������������İ�װ·��
+
+ Target options --->
+ ... ...
+ �����������ο�man gcc����ӦCPU��datasheet������:
+ �������������-march�����������AT91SAM9260/AT91SAM9G20 ��ARM926T�ĺ˵Ļ��������ã�
+ (armv5te) Architecture level
+ �����S3C2440/S3C2410 ��ARM920T�ĺ˵Ļ��������ã�
+ (armv4t) Architecture level
+
+
+ �������������-mcpu�����������AT91SAM9260/AT91SAM9G20 ��ARM926T�ĺ˵Ļ��������ã�
+ (arm926ej-s) Emit assembly for CPU
+ �����S3C2440/S3C2410 ��ARM920T�ĺ˵Ļ��������ã�
+ (arm920t) Emit assembly for CPU
+ Ĭ����unknow
+
+
+ �������������-mtune�����������AT91SAM9260/AT91SAM9G20 ��ARM926T�ĺ˵Ļ��������ã�
+ (arm926ej-s) Tune for CPU
+ �����S3C2440/S3C2410 ��ARM920T�ĺ˵Ļ��������ã�
+ (arm920t) Tune for CPU
+ Ĭ����unknow
+
+ Toolchain options --->
+ ... ...
+
+ �����AT91SAM9260/AT91SAM9G20 ��ARM926T�ĺ˵Ļ��������ã�
+ (arm926t) Tuple's vendor string
+ �����S3C2440/S3C2410 ��ARM920T�ĺ˵Ļ��������ã�
+ (arm920t) Tuple's vendor string
+ Ĭ����unknow������ֻ�ǽ��������������
+
+ C compiler --->
+ [ ] Fortran ȡ����Fortran��֧�֣������ò���
+ [ ] Java ȡ����Java��֧�֣������ò���
+
+
+5, ���������ǾͿ�ʼ��/opt/crosstool���濪ʼ�����ˣ�������̵�ʱ������PC�����ܣ��ҵ�Linux��������������Intel(R) Xeon(R) CPU E31235 @ 3.20GHz��4��8�̵߳ġ�����������ʹ��build.16���롣������Ĺ��̿��Կ�������������ܹ�ֻ����10��08�롣���ʹ��Buildroot���������������ܶࡣ
+[guowenxue@centos6 crosstool]$ ct-ng build.16
+[INFO ] Performing some trivial sanity checks
+[INFO ] Build started 20120718.110916
+[INFO ] Building environment variables[guowenxue@centos6 crosstool]$ ct-ng build.16
+[INFO ] Performing some trivial sanity checks
+[INFO ] Build started 20120718.155253
+[INFO ] Building environment variables
+[EXTRA] Preparing working directories
+[EXTRA] Installing user-supplied crosstool-NG configuration
+[EXTRA] =================================================================
+[EXTRA] Dumping internal crosstool-NG configuration
+[EXTRA] Building a toolchain for:
+[EXTRA] build = x86_64-unknown-linux-gnu
+[EXTRA] host = x86_64-unknown-linux-gnu
+[EXTRA] target = arm-arm926t-linux-gnueabi
+[EXTRA] Dumping internal crosstool-NG configuration: done in 0.04s (at 00:00)
+[INFO ] =================================================================
+[INFO ] Retrieving needed toolchain components' tarballs
+[INFO ] Retrieving needed toolchain components' tarballs: done in 0.06s (at 00:00)
+[INFO ] =================================================================
+[INFO ] Extracting and patching toolchain components
+[INFO ] Extracting and patching toolchain components: done in 0.10s (at 00:01)
+[INFO ] =================================================================
+[INFO ] Installing GMP for host
+[EXTRA] Configuring GMP
+[EXTRA] Building GMP
+[EXTRA] Installing GMP
+[INFO ] Installing GMP for host: done in 25.08s (at 00:26)
+[INFO ] =================================================================
+[INFO ] Installing MPFR for host
+[EXTRA] Configuring MPFR
+[EXTRA] Building MPFR
+[EXTRA] Installing MPFR
+[INFO ] Installing MPFR for host: done in 8.06s (at 00:34)
+[INFO ] =================================================================
+[INFO ] Installing binutils for host
+[EXTRA] Configuring binutils
+[EXTRA] Building binutils
+[EXTRA] Installing binutils
+[INFO ] Installing binutils for host: done in 18.80s (at 00:52)
+[INFO ] =================================================================
+[INFO ] Installing pass-1 core C compiler
+[EXTRA] Configuring core C compiler
+[EXTRA] Building core C compiler
+[EXTRA] Installing core C compiler
+[INFO ] Installing pass-1 core C compiler: done in 32.69s (at 01:25)
+[INFO ] =================================================================
+[INFO ] Installing kernel headers
+[EXTRA] Installing kernel headers
+[EXTRA] Checking installed headers
+[INFO ] Installing kernel headers: done in 3.59s (at 01:29)
+[INFO ] =================================================================
+[INFO ] Installing C library headers & start files
+[EXTRA] Configuring C library
+[EXTRA] Installing C library headers
+[EXTRA] Installing C library start files
+[INFO ] Installing C library headers & start files: done in 16.95s (at 01:46)
+[INFO ] =================================================================
+[INFO ] Installing pass-2 core C compiler
+[EXTRA] Configuring core C compiler
+[EXTRA] Building core C compiler
+[EXTRA] Installing core C compiler
+[INFO ] Installing pass-2 core C compiler: done in 43.60s (at 02:29)
+[INFO ] =================================================================
+[INFO ] Installing C library
+[EXTRA] Configuring C library
+[EXTRA] Building C library
+[EXTRA] Installing C library
+[INFO ] Installing C library: done in 170.78s (at 05:20)
+[INFO ] =================================================================
+[INFO ] Installing final compiler
+[EXTRA] Configuring final compiler
+[EXTRA] Building final compiler
+[EXTRA] Installing final compiler
+[INFO ] Installing final compiler: done in 80.87s (at 06:41)
+[INFO ] =================================================================
+[INFO ] Installing libelf for the target
+[EXTRA] Configuring libelf
+[EXTRA] Building libelf
+[EXTRA] Installing libelf
+[INFO ] Installing libelf for the target: done in 4.05s (at 06:45)
+[INFO ] =================================================================
+[INFO ] Installing binutils for target
+[EXTRA] Configuring binutils for target
+[EXTRA] Building binutils' libraries (libiberty bfd) for target
+[EXTRA] Installing binutils' libraries (libiberty bfd) for target
+[INFO ] Installing binutils for target: done in 32.83s (at 07:18)
+[INFO ] =================================================================
+[INFO ] Installing dmalloc
+[EXTRA] Configuring dmalloc
+[EXTRA] Building dmalloc
+[EXTRA] Installing dmalloc
+[INFO ] Installing dmalloc: done in 6.54s (at 07:25)
+[INFO ] =================================================================
+[INFO ] Installing D.U.M.A.
+[EXTRA] Copying sources
+[EXTRA] Building libraries 'libduma.a libduma.so.0.0.0'
+[EXTRA] Installing libraries 'libduma.a libduma.so.0.0.0'
+[EXTRA] Installing shared library link
+[EXTRA] Installing wrapper script
+[INFO ] Installing D.U.M.A.: done in 0.73s (at 07:25)
+[INFO ] =================================================================
+[INFO ] Installing cross-gdb
+[EXTRA] Configuring cross-gdb
+[EXTRA] Building cross-gdb
+[EXTRA] Installing cross-gdb
+[INFO ] Installing cross-gdb: done in 48.04s (at 08:13)
+[INFO ] =================================================================
+[INFO ] Installing native gdb
+[EXTRA] Building static target ncurses
+[EXTRA] Building static target expat
+[EXTRA] Configuring native gdb
+[EXTRA] Building native gdb
+[EXTRA] Installing native gdb
+[EXTRA] Cleaning up ncurses
+[INFO ] Installing native gdb: done in 93.79s (at 09:47)
+[INFO ] =================================================================
+[INFO ] Installing gdbserver
+[EXTRA] Configuring gdbserver
+[EXTRA] Building gdbserver
+[EXTRA] Installing gdbserver
+[INFO ] Installing gdbserver: done in 4.46s (at 09:52)
+[INFO ] =================================================================
+[INFO ] Installing ltrace
+[EXTRA] Copying sources to build dir
+[EXTRA] Configuring ltrace
+[EXTRA] Building ltrace
+[EXTRA] Installing ltrace
+[INFO ] Installing ltrace: done in 2.87s (at 09:54)
+[INFO ] =================================================================
+[INFO ] Installing strace
+[EXTRA] Configuring strace
+[EXTRA] Building strace
+[EXTRA] Installing strace
+[INFO ] Installing strace: done in 12.05s (at 10:07)
+[INFO ] =================================================================
+[INFO ] Cleaning-up the toolchain's directory
+[INFO ] Stripping all toolchain executables
+[EXTRA] Installing the populate helper
+[EXTRA] Installing a cross-ldd helper
+[EXTRA] Creating toolchain aliases
+[EXTRA] Removing access to the build system tools
+[INFO ] Cleaning-up the toolchain's directory: done in 1.68s (at 10:08)
+[INFO ] Build completed at 20120718.160301
+[INFO ] (elapsed: 10:08.46)
+[INFO ] Finishing installation (may take a few seconds)...
+[10:08] / [guowenxue@centos6 crosstool]$
+
+
+6�����Խ����������
+[guowenxue@centos6 crosstool]$ /opt/crosstool/arm-arm926t-linux-gnueabi/bin/arm-arm926t-linux-gnueabi-gcc -v
+Using built-in specs.
+Target: arm-arm926t-linux-gnueabi
+Configured with: /opt/crosstool/.build/src/gcc-4.3.2/configure --build=x86_64-build_unknown-linux-gnu --host=x86_64-build_unknown-linux-gnu --target=arm-arm926t-linux-gnueabi --prefix=/opt/crosstool/arm-arm926t-linux-gnueabi --with-sysroot=/opt/crosstool/arm-arm926t-linux-gnueabi/arm-arm926t-linux-gnueabi/sysroot --enable-languages=c,c++ --with-arch=armv5te --with-cpu=arm926ej-s --with-tune=arm926ej-s --with-float=soft --with-pkgversion='crosstool-NG 1.15.3' --disable-sjlj-exceptions --enable-__cxa_atexit --disable-libmudflap --disable-libgomp --disable-libssp --with-gmp=/opt/crosstool/.build/arm-arm926t-linux-gnueabi/buildtools --with-mpfr=/opt/crosstool/.build/arm-arm926t-linux-gnueabi/buildtools --enable-threads=posix --enable-target-optspace --disable-nls --disable-multilib --with-local-prefix=/opt/crosstool/arm-arm926t-linux-gnueabi/arm-arm926t-linux-gnueabi/sysroot --enable-c99 --enable-long-long
+Thread model: posix
+gcc version 4.3.2 (crosstool-NG 1.15.3)
+
+[guowenxue@centos6 crosstool]$ /opt/crosstool/arm-arm926t-linux-gnueabi/bin/arm-arm926t-linux-gnueabi-gcc ~/.hello.c -o hello -static
+[guowenxue@centos6 crosstool]$ file hello
+hello: ELF 32-bit LSB executable, ARM, version 1 (SYSV), statically linked, for GNU/Linux 3.0.30, not stripped
+[guowenxue@centos6 crosstool]$ cp hello /tftp/
+
+
+����hello�����AT91SAM9G20������������Buildroot-2011.11+uClibc�����Ľ�������������ļ�ϵͳ�������ڵĽ����������crosstool-ng+glibc���ģ�����������ⲻһ���������ڱ���hello.c��ʱ��һ��Ҫ��"-static"ѡ������̬���롣
+
+������ARM���������������hello���������ԣ�
+~ >: tftp -gr hello 192.168.1.78
+hello 100% |*******************************| 583k 0:00:00 ETA
+~ >: chmod 755 hello
+~ >: ./hello
+Hello World!
+���������Կ����ղ������Ľ����������OK�ġ�
+
+
+
+֮ǰ��������������
+======================================
+1��ȱ��gcj���
+[EXTRA] Preparing working directories
+[ERROR] Missing: 'x86_64-unknown-linux-gnu-gcj' or 'x86_64-unknown-linux-gnu-gcj' or 'gcj' : either needed!
+[00:01] / make[1]: ** [build] Error 1
+make: *** [build.4] Er��ror 2
+[guowenxue@centos6 crosstool]$ sudo yum install *gcj
+
+2��֮ǰ�ڱ���gdbʱ����libexpat�������ҵķ�������û�а�װ���dev rpm����������ʹ��yum��������װ��
+[guowenxue@centos6 crosstool]$ sudo yum install expat*
+
+���ҵ�Linux������ֻ��ȱ�������������������������Ĺ����л��������⣬����ʹ��Yum��������װȱ�ٵ��������
\ No newline at end of file
diff --git a/ok6410/src/crosstool/crosstool-ng/symbol_link.sh b/ok6410/src/crosstool/crosstool-ng/symbol_link.sh
new file mode 100644
index 0000000..6693763
--- /dev/null
+++ b/ok6410/src/crosstool/crosstool-ng/symbol_link.sh
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+if [ $# != 1 ] ; then
+ echo "Usage: $0 [PATH]"
+ echo "Example: $0 arm-arm1176jzfs-linux-gnueabi/bin"
+ exit;
+fi
+
+chmod 755 $1
+cd $1
+pwd
+
+for i in `ls arm-*-*`
+do
+ name=`echo $i | awk -F "-" '{print $5}'`
+ ln -s $i arm-linux-$name
+done
diff --git a/ok6410/src/kernel/build.sh b/ok6410/src/kernel/build.sh
new file mode 100644
index 0000000..376bb20
--- /dev/null
+++ b/ok6410/src/kernel/build.sh
@@ -0,0 +1,158 @@
+#!/bin/sh
+# Descripion: This shell script used to choose a linux kernel version to cross compile
+# Author: GuoWenxue<guowenxue@gmail.com>
+# ChangeLog:
+# 1, Version 1.0.0(2011.04.01), initialize first version
+#
+
+PWD=`pwd`
+PACKET_DIR=$PWD
+PATCH_DIR=$PWD/patch
+INST_PATH=$PWD/../../bin
+SRC_NAME=linux-3.0
+ARCH=s3c6410
+#unset ARCH
+
+#===============================================================
+# Functions forward definition =
+#===============================================================
+function disp_banner()
+{
+ echo ""
+ echo "+------------------------------------------+"
+ echo "| Build $SRC_NAME for $ARCH "
+ echo "+------------------------------------------+"
+ echo ""
+}
+
+sup_ver=("" "linux-3.0")
+function select_version()
+{
+ echo "Current support linux kernel version:"
+ i=1
+ len=${#sup_ver[*]}
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_ver[$i]}"
+ let i++;
+ done
+
+ echo "Please select: "
+ index=
+ read index
+
+ SRC_NAME=${sup_ver[$index]}
+}
+
+sup_arch=("" "s3c6410")
+function select_arch()
+{
+ echo "Current support S3C64X0 ARCH:"
+ i=1
+ len=${#sup_arch[*]}
+
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_arch[$i]}"
+ let i++;
+ done
+
+ echo "Please select: "
+ index=
+ read index
+
+ ARCH=${sup_arch[$index]}
+}
+
+#===============================================================
+# Script excute body start =
+#===============================================================
+
+# If not define default version, then let user choose a one
+if [ -z $SRC_NAME ] ; then
+ select_version
+fi
+
+# If don't set the ARCH, then select one
+if [ -z $ARCH ] ; then
+ select_arch
+fi
+
+
+if [ -z "$CROSS" ] ; then
+ CROSS=/opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+fi
+
+# If $SRC_NAME not set, then abort this cross compile
+if [ -z $SRC_NAME ] ; then
+ echo "ERROR: Please choose a valid version to cross compile"
+ exit 1;
+fi
+
+disp_banner #Display this shell script banner
+
+
+# Check patche file exist or not
+PATCH_FILE=$PATCH_DIR/$SRC_NAME-${ARCH}.patch
+if [ ! -f $PATCH_FILE ] ; then
+ echo "ERROR:$SRC_NAME patch file doesn't exist!"
+ echo "PATH: \"$PATCH_FILE\""
+ exit
+fi
+
+# Check original source code packet exist or not
+SRC_ORIG_PACKET=$PACKET_DIR/$SRC_NAME.tar.bz2
+if [ ! -s $SRC_ORIG_PACKET ] ; then
+ echo "========================================================================="
+ echo "ERROR:$SRC_NAME source code patcket doesn't exist."
+ echo "PATH: \"$SRC_ORIG_PACKET\""
+ echo ""
+
+ MAJOR=`echo $SRC_NAME | awk -F "-" '{print $2}' | awk -F "." '{print $1}'`
+ if [ $MAJOR == 3 ] ; then
+ DL_ADDR=http://www.kernel.org/pub/linux/kernel/v3.x/$SRC_NAME.tar.bz2
+ elif [ $MAJOR == 2 ] ; then
+ DL_ADDR=http://www.kernel.org/pub/linux/kernel/v2.6/$SRC_NAME.tar.bz2
+ fi
+
+ echo "Download $DL_ADDR now..."
+ echo "========================================================================="
+
+ wget $DL_ADDR
+
+ if [ ! -s $SRC_ORIG_PACKET ] ; then
+ echo "Download $DL_ADDR failure, exit now..."
+ exit
+ fi
+fi
+
+
+#decompress the source code packet and patch
+echo "* Decompress the source code patcket and patch now... *"
+
+if [ -d $SRC_NAME ] ; then
+ rm -rf $SRC_NAME
+fi
+
+if [ ! -d $INST_PATH ] ; then
+ mkdir -p $INST_PATH
+fi
+
+#Remove old source code
+tar -xjf $SRC_ORIG_PACKET
+
+#Start to cross compile the source code and install it now
+cd $SRC_NAME
+ patch -p1 < $PATCH_FILE
+ cp .cfg-$ARCH .config
+ #Modify the cross tool in Makefile
+ line=`sed -n '/CROSS_COMPILE ?= /=' Makefile`
+ sed -i -e ${line}s"|.*|CROSS_COMPILE ?= $CROSS|" Makefile
+ make
+
+ set -x
+ cp -af linuxrom-$ARCH.bin $INST_PATH
+ cp -af linuxrom-$ARCH.bin /tftp
+cd -
+
+
diff --git a/ok6410/src/kernel/patch/gen_patch.sh b/ok6410/src/kernel/patch/gen_patch.sh
new file mode 100644
index 0000000..6fdffde
--- /dev/null
+++ b/ok6410/src/kernel/patch/gen_patch.sh
@@ -0,0 +1,74 @@
+#!/bin/sh
+# Description: This shell script used to generate the patch file
+# Author: GuoWenxue<guowenxue@gmail.com>
+# Changlog:
+# 1, Version 1.0.0(2011.04.01), initialize first version
+#
+
+PWD=`pwd`
+PACKET_DIR=$PWD/
+
+# Parameter valid check
+if [ $# != 2 ] ; then
+ echo "+---------------------------------------------------"
+ echo "| Usage: $0 [SRC_FOLDER] [ARCH]"
+ echo "| Example: $0 linux-2.6.24 fl2440"
+ echo "| Example: $0 linux-2.6.24 gr01"
+ echo "+---------------------------------------------------"
+ exit;
+fi
+
+SRC_NAME=`basename $1`
+ARCH=$2
+
+# Check latest source code exist or not
+if [ ! -d $SRC_NAME ] ; then
+ echo "+-------------------------------------------------------------------"
+ echo "| ERROR: Source code \"$SRC_NAME\" doesn't exist!"
+ echo "+-------------------------------------------------------------------"
+ exit;
+fi
+
+SRC_PACKET_PATH=$PACKET_DIR/$SRC_NAME.tar.bz2
+# Check original source code packet exist or not
+if [ ! -s $SRC_PACKET_PATH ] ; then
+ echo "+-------------------------------------------------------------------"
+ echo "| ERROR: Orignal source code packet doesn't exist!"
+ echo "| $SRC_PACKET_PATH"
+ echo "+-------------------------------------------------------------------"
+ exit;
+fi
+
+echo "+----------------------------------------------------------"
+echo "| Clean up the new source code "
+echo "+----------------------------------------------------------"
+NEW_SRC=$SRC_NAME-$ARCH
+cd $SRC_NAME
+rm -f uImage*.gz
+rm -f cscope.*
+rm -f tags
+set -x
+if [ -s .config ] ; then
+ mv .config .cfg-$ARCH
+fi
+set +x
+make distclean
+cd ..
+mv $SRC_NAME $NEW_SRC
+
+
+echo "+------------------------------------------------------------------------"
+echo "| Decrompress orignal source code packet "
+echo "+------------------------------------------------------------------------"
+ORIG_SRC=$SRC_NAME
+tar -xjf $SRC_PACKET_PATH
+
+echo "+------------------------------------------------------------------------"
+echo "| Generate patch file \"$NEW_SRC.patch\" "
+echo "+------------------------------------------------------------------------"
+
+diff -Nuar $ORIG_SRC $NEW_SRC > $NEW_SRC.patch
+rm -rf $ORIG_SRC
+mv $NEW_SRC $SRC_NAME
+
+
diff --git a/ok6410/src/kernel/patch/linux-3.0-s3c6410.patch b/ok6410/src/kernel/patch/linux-3.0-s3c6410.patch
new file mode 100644
index 0000000..86b65be
--- /dev/null
+++ b/ok6410/src/kernel/patch/linux-3.0-s3c6410.patch
@@ -0,0 +1,2268 @@
+diff -Nuar linux-3.0/arch/arm/mach-s3c64xx/mach-smdk6410.c linux-3.0-s3c6410/arch/arm/mach-s3c64xx/mach-smdk6410.c
+--- linux-3.0/arch/arm/mach-s3c64xx/mach-smdk6410.c 2011-07-22 10:17:23.000000000 +0800
++++ linux-3.0-s3c6410/arch/arm/mach-s3c64xx/mach-smdk6410.c 2013-04-01 15:15:39.079931025 +0800
+@@ -31,6 +31,11 @@
+ #include <linux/regulator/machine.h>
+ #include <linux/pwm_backlight.h>
+
++#include <linux/dm9000.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <plat/nand.h>
++
+ #ifdef CONFIG_SMDK6410_WM1190_EV1
+ #include <linux/mfd/wm8350/core.h>
+ #include <linux/mfd/wm8350/pmic.h>
+@@ -310,6 +315,95 @@
+
+ static struct map_desc smdk6410_iodesc[] = {};
+
++/* DM9000AEP 10/100 ethernet controller */
++
++static struct resource ok6410_dm9000_resource[] = {
++ [0] = {
++ .start = S3C64XX_PA_XM0CSN1,
++ .end = S3C64XX_PA_XM0CSN1 + 1,
++ .flags = IORESOURCE_MEM
++ },
++ [1] = {
++ .start = S3C64XX_PA_XM0CSN1 + 4,
++ .end = S3C64XX_PA_XM0CSN1 + 5,
++ .flags = IORESOURCE_MEM
++ },
++ [2] = {
++ .start = S3C_EINT(7),
++ .end = S3C_EINT(7),
++ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
++ }
++};
++
++static struct dm9000_plat_data ok6410_dm9000_pdata = {
++ .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
++};
++
++static struct platform_device ok6410_device_dm9000 = {
++ .name = "dm9000",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(ok6410_dm9000_resource),
++ .resource = ok6410_dm9000_resource,
++ .dev = {
++ .platform_data = &ok6410_dm9000_pdata,
++ },
++};
++
++static struct mtd_partition ok6410_nand_part[] = {
++ [0] = {
++ .name = "uboot image",
++ .offset = 0,
++ .size = SZ_1M,
++ },
++ [1] = {
++ .name = "kernel image",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_1M * 15,
++ },
++ [2] = {
++ .name = "cramfs rootfs",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_1M * 30,
++ },
++ [3] = {
++ .name = "ubifs rootfs",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_1M * 30,
++ },
++ [4] = {
++ .name = "apps partition",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_1M * 80,
++ },
++ [5] = {
++ .name = "data partition",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_1M * 60,
++ },
++ [6] = {
++ .name = "backup partition",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct s3c2410_nand_set ok6410_nand_sets[] = {
++ [0] = {
++ .name = "nand",
++ .nr_chips = 1,
++ .nr_partitions = ARRAY_SIZE(ok6410_nand_part),
++ .partitions = ok6410_nand_part,
++ },
++};
++
++static struct s3c2410_platform_nand ok6410_nand_info = {
++ .tacls = 25,
++ .twrph0 = 55,
++ .twrph1 = 40,
++ .nr_sets = ARRAY_SIZE(ok6410_nand_sets),
++ .sets = ok6410_nand_sets,
++};
++
+ static struct platform_device *smdk6410_devices[] __initdata = {
+ #ifdef CONFIG_SMDK6410_SD_CH0
+ &s3c_device_hsmmc0,
+@@ -322,6 +416,8 @@
+ &s3c_device_fb,
+ &s3c_device_ohci,
+ &s3c_device_usb_hsotg,
++ &s3c_device_nand,
++ &ok6410_device_dm9000,
+ &samsung_asoc_dma,
+ &s3c64xx_device_iisv4,
+ &samsung_device_keypad,
+@@ -333,7 +429,7 @@
+
+ &smdk6410_smsc911x,
+ &s3c_device_adc,
+- &s3c_device_cfcon,
++ //&s3c_device_cfcon, /* This is for IDE device */
+ &s3c_device_rtc,
+ &s3c_device_ts,
+ &s3c_device_wdt,
+@@ -700,16 +796,43 @@
+ __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
+ }
+
++#include <plat/regs-usb-hsotg-phy.h>
++void s3c_hsotg_phy_config(int enable)
++{
++ u32 val;
++
++ if (enable)
++ {
++ __raw_writel(0x0, S3C_PHYPWR); /* Power up */
++ val = __raw_readl(S3C_PHYCLK);
++ val &= ~S3C_PHYCLK_CLKSEL_MASK;
++ __raw_writel(val, S3C_PHYCLK);
++ __raw_writel(0x1, S3C_RSTCON);
++
++ udelay(5);
++ __raw_writel(0x0, S3C_RSTCON); /* Finish the reset */
++ udelay(5);
++ }
++ else
++ {
++ __raw_writel(0x19, S3C_PHYPWR); /* Power down */
++ }
++}
++EXPORT_SYMBOL(s3c_hsotg_phy_config);
++
+ static void __init smdk6410_machine_init(void)
+ {
+ u32 cs1;
+
++ s3c_hsotg_phy_config(1); /* Provide the USB OTG 48MHz clock */
++
+ s3c_i2c0_set_platdata(NULL);
+ s3c_i2c1_set_platdata(NULL);
+ s3c_fb_set_platdata(&smdk6410_lcd_pdata);
+
+ samsung_keypad_set_platdata(&smdk6410_keypad_data);
+
++ s3c_nand_set_platdata(&ok6410_nand_info);
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
+ /* configure nCS1 width to 16 bits */
+@@ -738,7 +861,7 @@
+ i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
+ i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
+
+- s3c_ide_set_platdata(&smdk6410_ide_pdata);
++ //s3c_ide_set_platdata(&smdk6410_ide_pdata);
+
+ platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
+ }
+diff -Nuar linux-3.0/.cfg-s3c6410 linux-3.0-s3c6410/.cfg-s3c6410
+--- linux-3.0/.cfg-s3c6410 1970-01-01 08:00:00.000000000 +0800
++++ linux-3.0-s3c6410/.cfg-s3c6410 2013-04-01 15:36:59.494106822 +0800
+@@ -0,0 +1,2050 @@
++#
++# Automatically generated make config: don't edit
++# Linux/arm 3.0.0 Kernel Configuration
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_ARCH_USES_GETTIMEOFFSET=y
++CONFIG_KTIME_SCALAR=y
++CONFIG_HAVE_PROC_CPU=y
++CONFIG_NO_IOPORT=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_ARCH_HAS_CPUFREQ=y
++CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_NEED_DMA_MAP_STATE=y
++CONFIG_VECTORS_BASE=0xffff0000
++# CONFIG_ARM_PATCH_PHYS_VIRT is not set
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_HAVE_IRQ_WORK=y
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_CROSS_COMPILE=""
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_KERNEL_GZIP=y
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_LZO is not set
++CONFIG_DEFAULT_HOSTNAME="(none)"
++# CONFIG_SWAP is not set
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_FHANDLE is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++CONFIG_HAVE_GENERIC_HARDIRQS=y
++
++#
++# IRQ subsystem
++#
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HAVE_SPARSE_IRQ=y
++CONFIG_GENERIC_IRQ_SHOW=y
++CONFIG_GENERIC_IRQ_CHIP=y
++# CONFIG_SPARSE_IRQ is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TINY_RCU=y
++# CONFIG_PREEMPT_RCU is not set
++# CONFIG_RCU_TRACE is not set
++# CONFIG_TREE_RCU_TRACE is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=17
++# CONFIG_CGROUPS is not set
++CONFIG_NAMESPACES=y
++CONFIG_UTS_NS=y
++CONFIG_IPC_NS=y
++CONFIG_USER_NS=y
++CONFIG_PID_NS=y
++CONFIG_NET_NS=y
++# CONFIG_SCHED_AUTOGROUP is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE="../../rootfs/rootfs_tree"
++CONFIG_INITRAMFS_ROOT_UID=0
++CONFIG_INITRAMFS_ROOT_GID=0
++CONFIG_RD_GZIP=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_RD_LZO is not set
++CONFIG_INITRAMFS_COMPRESSION_NONE=y
++# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_EXPERT=y
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++CONFIG_KALLSYMS_ALL=y
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_EMBEDDED=y
++CONFIG_HAVE_PERF_EVENTS=y
++CONFIG_PERF_USE_VMALLOC=y
++
++#
++# Kernel Performance Events And Counters
++#
++# CONFIG_PERF_EVENTS is not set
++# CONFIG_PERF_COUNTERS is not set
++# CONFIG_VM_EVENT_COUNTERS is not set
++CONFIG_SLUB_DEBUG=y
++CONFIG_COMPAT_BRK=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_DMA_API_DEBUG=y
++
++#
++# GCOV-based kernel profiling
++#
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_FORCE_LOAD=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_BLOCK=y
++# CONFIG_LBDAF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++# CONFIG_INLINE_SPIN_TRYLOCK is not set
++# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK is not set
++# CONFIG_INLINE_SPIN_LOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_SPIN_UNLOCK is not set
++# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_READ_TRYLOCK is not set
++# CONFIG_INLINE_READ_LOCK is not set
++# CONFIG_INLINE_READ_LOCK_BH is not set
++# CONFIG_INLINE_READ_LOCK_IRQ is not set
++# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_READ_UNLOCK is not set
++# CONFIG_INLINE_READ_UNLOCK_BH is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_WRITE_TRYLOCK is not set
++# CONFIG_INLINE_WRITE_LOCK is not set
++# CONFIG_INLINE_WRITE_LOCK_BH is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_WRITE_UNLOCK is not set
++# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
++# CONFIG_MUTEX_SPIN_ON_OWNER is not set
++CONFIG_FREEZER=y
++
++#
++# System Type
++#
++CONFIG_MMU=y
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_VEXPRESS is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_BCMRING is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CNS3XXX is not set
++# CONFIG_ARCH_GEMINI is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_MXS is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_DOVE is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_LPC32XX is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_NUC93X is not set
++# CONFIG_ARCH_TEGRA is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_SHMOBILE is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++CONFIG_ARCH_S3C64XX=y
++# CONFIG_ARCH_S5P64X0 is not set
++# CONFIG_ARCH_S5PC100 is not set
++# CONFIG_ARCH_S5PV210 is not set
++# CONFIG_ARCH_EXYNOS4 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_TCC_926 is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_U8500 is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_PLAT_SPEAR is not set
++# CONFIG_ARCH_VT8500 is not set
++# CONFIG_GPIO_PCA953X is not set
++CONFIG_PLAT_SAMSUNG=y
++
++#
++# Boot options
++#
++CONFIG_S3C_BOOT_ERROR_RESET=y
++CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
++CONFIG_S3C_LOWLEVEL_UART_PORT=0
++CONFIG_SAMSUNG_CLKSRC=y
++CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
++CONFIG_SAMSUNG_IRQ_UART=y
++CONFIG_SAMSUNG_GPIOLIB_4BIT=y
++CONFIG_S3C_GPIO_CFG_S3C24XX=y
++CONFIG_S3C_GPIO_CFG_S3C64XX=y
++CONFIG_S3C_GPIO_PULL_UPDOWN=y
++CONFIG_SAMSUNG_GPIO_EXTRA=0
++CONFIG_S3C_GPIO_SPACE=0
++CONFIG_S3C_GPIO_TRACK=y
++CONFIG_S3C_ADC=y
++CONFIG_S3C_DEV_HSMMC=y
++CONFIG_S3C_DEV_HSMMC1=y
++CONFIG_S3C_DEV_I2C1=y
++CONFIG_S3C_DEV_FB=y
++CONFIG_S3C_DEV_USB_HOST=y
++CONFIG_S3C_DEV_USB_HSOTG=y
++CONFIG_S3C_DEV_WDT=y
++CONFIG_S3C_DEV_NAND=y
++CONFIG_S3C_DEV_RTC=y
++CONFIG_SAMSUNG_DEV_ADC=y
++CONFIG_SAMSUNG_DEV_IDE=y
++CONFIG_SAMSUNG_DEV_TS=y
++CONFIG_SAMSUNG_DEV_KEYPAD=y
++CONFIG_SAMSUNG_DEV_PWM=y
++# CONFIG_S3C24XX_PWM is not set
++CONFIG_S3C_DMA=y
++
++#
++# Power management
++#
++# CONFIG_SAMSUNG_PM_DEBUG is not set
++# CONFIG_S3C_PM_DEBUG_LED_SMDK is not set
++# CONFIG_SAMSUNG_PM_CHECK is not set
++CONFIG_SAMSUNG_WAKEMASK=y
++
++#
++# Power Domain
++#
++
++#
++# System MMU
++#
++CONFIG_PLAT_S3C64XX=y
++CONFIG_CPU_S3C6410=y
++CONFIG_S3C64XX_DMA=y
++CONFIG_S3C64XX_SETUP_SDHCI=y
++CONFIG_S3C64XX_SETUP_I2C0=y
++CONFIG_S3C64XX_SETUP_I2C1=y
++CONFIG_S3C64XX_SETUP_IDE=y
++CONFIG_S3C64XX_SETUP_FB_24BPP=y
++CONFIG_S3C64XX_SETUP_KEYPAD=y
++CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
++# CONFIG_MACH_SMDK6400 is not set
++# CONFIG_MACH_ANW6410 is not set
++# CONFIG_MACH_MINI6410 is not set
++# CONFIG_MACH_REAL6410 is not set
++CONFIG_MACH_SMDK6410=y
++CONFIG_SMDK6410_SD_CH0=y
++# CONFIG_SMDK6410_SD_CH1 is not set
++# CONFIG_SMDK6410_WM1190_EV1 is not set
++# CONFIG_SMDK6410_WM1192_EV1 is not set
++# CONFIG_MACH_NCP is not set
++# CONFIG_MACH_HMT is not set
++# CONFIG_MACH_SMARTQ5 is not set
++# CONFIG_MACH_SMARTQ7 is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_V6=y
++CONFIG_CPU_32v6=y
++CONFIG_CPU_ABRT_EV6=y
++CONFIG_CPU_PABRT_V6=y
++CONFIG_CPU_CACHE_V6=y
++CONFIG_CPU_CACHE_VIPT=y
++CONFIG_CPU_COPY_V6=y
++CONFIG_CPU_TLB_V6=y
++CONFIG_CPU_HAS_ASID=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++CONFIG_CPU_USE_DOMAINS=y
++
++#
++# Processor Features
++#
++# CONFIG_ARM_THUMB is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_ARM_L1_CACHE_SHIFT=5
++CONFIG_ARM_DMA_MEM_BUFFERABLE=y
++CONFIG_CPU_HAS_PMU=y
++# CONFIG_ARM_ERRATA_411920 is not set
++CONFIG_ARM_VIC=y
++CONFIG_ARM_VIC_NR=2
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++CONFIG_HZ=100
++CONFIG_AEABI=y
++CONFIG_OABI_COMPAT=y
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_HAVE_ARCH_PFN_VALID=y
++# CONFIG_HIGHMEM is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_HAVE_MEMBLOCK=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=999999
++# CONFIG_COMPACTION is not set
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_KSM is not set
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++CONFIG_NEED_PER_CPU_KM=y
++# CONFIG_CLEANCACHE is not set
++CONFIG_FORCE_MAX_ZONEORDER=11
++CONFIG_ALIGNMENT_TRAP=y
++# CONFIG_UACCESS_WITH_MEMCPY is not set
++# CONFIG_SECCOMP is not set
++# CONFIG_CC_STACKPROTECTOR is not set
++# CONFIG_DEPRECATED_PARAM_STRUCT is not set
++
++#
++# Boot options
++#
++# CONFIG_USE_OF is not set
++CONFIG_ZBOOT_ROM_TEXT=0
++CONFIG_ZBOOT_ROM_BSS=0
++CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc"
++CONFIG_CMDLINE_FROM_BOOTLOADER=y
++# CONFIG_CMDLINE_EXTEND is not set
++# CONFIG_CMDLINE_FORCE is not set
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++# CONFIG_CRASH_DUMP is not set
++# CONFIG_AUTO_ZRELADDR is not set
++
++#
++# CPU Power Management
++#
++
++#
++# CPU Frequency scaling
++#
++# CONFIG_CPU_FREQ is not set
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++# CONFIG_FPE_NWFPE is not set
++# CONFIG_FPE_FASTFPE is not set
++CONFIG_VFP=y
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_PM_SLEEP=y
++# CONFIG_PM_RUNTIME is not set
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++# CONFIG_APM_EMULATION is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE_DEMUX is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_LRO=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_NETFILTER_ADVANCED=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=y
++CONFIG_NETFILTER_NETLINK_QUEUE=y
++CONFIG_NETFILTER_NETLINK_LOG=y
++CONFIG_NF_CONNTRACK=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CONNTRACK_TIMESTAMP=y
++CONFIG_NF_CT_PROTO_DCCP=y
++CONFIG_NF_CT_PROTO_GRE=y
++CONFIG_NF_CT_PROTO_SCTP=y
++CONFIG_NF_CT_PROTO_UDPLITE=y
++CONFIG_NF_CONNTRACK_AMANDA=y
++CONFIG_NF_CONNTRACK_FTP=y
++CONFIG_NF_CONNTRACK_H323=y
++CONFIG_NF_CONNTRACK_IRC=y
++CONFIG_NF_CONNTRACK_BROADCAST=y
++CONFIG_NF_CONNTRACK_NETBIOS_NS=y
++CONFIG_NF_CONNTRACK_SNMP=y
++CONFIG_NF_CONNTRACK_PPTP=y
++CONFIG_NF_CONNTRACK_SANE=y
++CONFIG_NF_CONNTRACK_SIP=y
++CONFIG_NF_CONNTRACK_TFTP=y
++# CONFIG_NF_CT_NETLINK is not set
++# CONFIG_NETFILTER_TPROXY is not set
++CONFIG_NETFILTER_XTABLES=y
++
++#
++# Xtables combined modules
++#
++CONFIG_NETFILTER_XT_MARK=y
++CONFIG_NETFILTER_XT_CONNMARK=y
++# CONFIG_NETFILTER_XT_SET is not set
++
++#
++# Xtables targets
++#
++# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
++# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
++# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
++# CONFIG_NETFILTER_XT_TARGET_CT is not set
++# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
++CONFIG_NETFILTER_XT_TARGET_HL=y
++# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
++# CONFIG_NETFILTER_XT_TARGET_MARK is not set
++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
++# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
++# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
++# CONFIG_NETFILTER_XT_TARGET_TEE is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
++
++#
++# Xtables matches
++#
++# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
++# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
++# CONFIG_NETFILTER_XT_MATCH_CPU is not set
++# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
++# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
++# CONFIG_NETFILTER_XT_MATCH_ESP is not set
++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
++CONFIG_NETFILTER_XT_MATCH_HL=y
++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
++# CONFIG_NETFILTER_XT_MATCH_IPVS is not set
++# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
++# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_MAC is not set
++# CONFIG_NETFILTER_XT_MATCH_MARK is not set
++# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
++# CONFIG_NETFILTER_XT_MATCH_OSF is not set
++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
++# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
++# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
++# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
++# CONFIG_NETFILTER_XT_MATCH_REALM is not set
++# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
++# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
++# CONFIG_NETFILTER_XT_MATCH_STATE is not set
++# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
++# CONFIG_NETFILTER_XT_MATCH_STRING is not set
++# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++CONFIG_IP_SET=y
++CONFIG_IP_SET_MAX=256
++CONFIG_IP_SET_BITMAP_IP=y
++CONFIG_IP_SET_BITMAP_IPMAC=y
++CONFIG_IP_SET_BITMAP_PORT=y
++# CONFIG_IP_SET_HASH_IP is not set
++# CONFIG_IP_SET_HASH_IPPORT is not set
++# CONFIG_IP_SET_HASH_IPPORTIP is not set
++# CONFIG_IP_SET_HASH_IPPORTNET is not set
++# CONFIG_IP_SET_HASH_NET is not set
++# CONFIG_IP_SET_HASH_NETPORT is not set
++CONFIG_IP_SET_LIST_SET=y
++CONFIG_IP_VS=y
++# CONFIG_IP_VS_DEBUG is not set
++CONFIG_IP_VS_TAB_BITS=12
++
++#
++# IPVS transport protocol load balancing support
++#
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_AH_ESP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++CONFIG_IP_VS_PROTO_SCTP=y
++
++#
++# IPVS scheduler
++#
++CONFIG_IP_VS_RR=y
++CONFIG_IP_VS_WRR=y
++CONFIG_IP_VS_LC=y
++CONFIG_IP_VS_WLC=y
++CONFIG_IP_VS_LBLC=y
++CONFIG_IP_VS_LBLCR=y
++CONFIG_IP_VS_DH=y
++CONFIG_IP_VS_SH=y
++CONFIG_IP_VS_SED=y
++CONFIG_IP_VS_NQ=y
++
++#
++# IPVS application helper
++#
++# CONFIG_IP_VS_FTP is not set
++CONFIG_IP_VS_NFCT=y
++# CONFIG_IP_VS_PE_SIP is not set
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_DEFRAG_IPV4=y
++CONFIG_NF_CONNTRACK_IPV4=y
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++CONFIG_IP_NF_QUEUE=y
++CONFIG_IP_NF_IPTABLES=y
++CONFIG_IP_NF_MATCH_AH=y
++CONFIG_IP_NF_MATCH_ECN=y
++CONFIG_IP_NF_MATCH_TTL=y
++CONFIG_IP_NF_FILTER=y
++CONFIG_IP_NF_TARGET_REJECT=y
++CONFIG_IP_NF_TARGET_LOG=y
++CONFIG_IP_NF_TARGET_ULOG=y
++CONFIG_NF_NAT=y
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=y
++CONFIG_IP_NF_TARGET_NETMAP=y
++CONFIG_IP_NF_TARGET_REDIRECT=y
++CONFIG_NF_NAT_SNMP_BASIC=y
++CONFIG_NF_NAT_PROTO_DCCP=y
++CONFIG_NF_NAT_PROTO_GRE=y
++CONFIG_NF_NAT_PROTO_UDPLITE=y
++CONFIG_NF_NAT_PROTO_SCTP=y
++CONFIG_NF_NAT_FTP=y
++CONFIG_NF_NAT_IRC=y
++CONFIG_NF_NAT_TFTP=y
++CONFIG_NF_NAT_AMANDA=y
++CONFIG_NF_NAT_PPTP=y
++CONFIG_NF_NAT_H323=y
++CONFIG_NF_NAT_SIP=y
++CONFIG_IP_NF_MANGLE=y
++CONFIG_IP_NF_TARGET_CLUSTERIP=y
++CONFIG_IP_NF_TARGET_ECN=y
++CONFIG_IP_NF_TARGET_TTL=y
++CONFIG_IP_NF_RAW=y
++CONFIG_IP_NF_ARPTABLES=y
++CONFIG_IP_NF_ARPFILTER=y
++CONFIG_IP_NF_ARP_MANGLE=y
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_RDS is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_L2TP is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_NET_SCHED is not set
++# CONFIG_DCB is not set
++# CONFIG_BATMAN_ADV is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_WIRELESS=y
++CONFIG_WEXT_CORE=y
++CONFIG_WEXT_PROC=y
++CONFIG_CFG80211=y
++# CONFIG_NL80211_TESTMODE is not set
++# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
++# CONFIG_CFG80211_REG_DEBUG is not set
++CONFIG_CFG80211_DEFAULT_PS=y
++# CONFIG_CFG80211_INTERNAL_REGDB is not set
++CONFIG_CFG80211_WEXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++CONFIG_LIB80211=y
++# CONFIG_LIB80211_DEBUG is not set
++CONFIG_MAC80211=y
++CONFIG_MAC80211_HAS_RC=y
++# CONFIG_MAC80211_RC_PID is not set
++CONFIG_MAC80211_RC_MINSTREL=y
++CONFIG_MAC80211_RC_MINSTREL_HT=y
++CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
++CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
++# CONFIG_MAC80211_MESH is not set
++# CONFIG_MAC80211_DEBUG_MENU is not set
++# CONFIG_WIMAX is not set
++CONFIG_RFKILL=y
++CONFIG_RFKILL_INPUT=y
++# CONFIG_RFKILL_GPIO is not set
++# CONFIG_NET_9P is not set
++# CONFIG_CAIF is not set
++# CONFIG_CEPH_LIB is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_DEVTMPFS is not set
++# CONFIG_STANDALONE is not set
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=y
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_SM_FTL is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SST25L is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND_ECC=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_BCH is not set
++# CONFIG_MTD_SM_COMMON is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_IDS=y
++CONFIG_MTD_NAND_S3C2410=y
++# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
++# CONFIG_MTD_NAND_S3C2410_HWECC is not set
++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# LPDDR flash memory drivers
++#
++# CONFIG_MTD_LPDDR is not set
++CONFIG_MTD_UBI=y
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++# CONFIG_MTD_UBI_DEBUG is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++
++#
++# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
++#
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=16384
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MG_DISK is not set
++# CONFIG_BLK_DEV_RBD is not set
++# CONFIG_SENSORS_LIS3LV02D is not set
++# CONFIG_MISC_DEVICES is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++CONFIG_SCSI_MOD=y
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++CONFIG_CHR_DEV_SG=y
++# CONFIG_CHR_DEV_SCH is not set
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_TARGET_CORE is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++CONFIG_MII=y
++# CONFIG_PHYLIB is not set
++CONFIG_NET_ETHERNET=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++CONFIG_DM9000=y
++CONFIG_DM9000_DEBUGLEVEL=4
++# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_ETHOC is not set
++# CONFIG_SMC911X is not set
++# CONFIG_SMSC911X is not set
++# CONFIG_DNET is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++# CONFIG_B44 is not set
++# CONFIG_KS8851 is not set
++# CONFIG_KS8851_MLL is not set
++# CONFIG_FTMAC100 is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++CONFIG_WLAN=y
++# CONFIG_LIBERTAS_THINFIRM is not set
++# CONFIG_AT76C50X_USB is not set
++# CONFIG_USB_ZD1201 is not set
++# CONFIG_USB_NET_RNDIS_WLAN is not set
++# CONFIG_RTL8187 is not set
++# CONFIG_MAC80211_HWSIM is not set
++# CONFIG_ATH_COMMON is not set
++# CONFIG_B43 is not set
++# CONFIG_B43LEGACY is not set
++# CONFIG_HOSTAP is not set
++# CONFIG_IWM is not set
++# CONFIG_LIBERTAS is not set
++# CONFIG_P54_COMMON is not set
++CONFIG_RT2X00=y
++# CONFIG_RT2500USB is not set
++# CONFIG_RT73USB is not set
++CONFIG_RT2800USB=y
++CONFIG_RT2800USB_RT33XX=y
++# CONFIG_RT2800USB_RT35XX is not set
++# CONFIG_RT2800USB_RT53XX is not set
++# CONFIG_RT2800USB_UNKNOWN is not set
++CONFIG_RT2800_LIB=y
++CONFIG_RT2X00_LIB_USB=y
++CONFIG_RT2X00_LIB=y
++CONFIG_RT2X00_LIB_FIRMWARE=y
++CONFIG_RT2X00_LIB_CRYPTO=y
++# CONFIG_RT2X00_DEBUG is not set
++# CONFIG_RTL8192SE is not set
++# CONFIG_RTL8192CU is not set
++# CONFIG_WL1251 is not set
++# CONFIG_WL12XX_MENU is not set
++# CONFIG_ZD1211RW is not set
++# CONFIG_MWIFIEX is not set
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_USB_HSO is not set
++# CONFIG_USB_IPHETH is not set
++# CONFIG_WAN is not set
++
++#
++# CAIF transport drivers
++#
++CONFIG_PPP=y
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=y
++CONFIG_PPP_SYNC_TTY=y
++CONFIG_PPP_DEFLATE=y
++CONFIG_PPP_BSDCOMP=y
++CONFIG_PPP_MPPE=y
++CONFIG_PPPOE=y
++# CONFIG_SLIP is not set
++CONFIG_SLHC=y
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++# CONFIG_INPUT_SPARSEKMAP is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_AD7877 is not set
++# CONFIG_TOUCHSCREEN_AD7879 is not set
++# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
++# CONFIG_TOUCHSCREEN_BU21013 is not set
++# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
++# CONFIG_TOUCHSCREEN_DYNAPRO is not set
++# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
++# CONFIG_TOUCHSCREEN_EETI is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++CONFIG_TOUCHSCREEN_S3C2410=y
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
++# CONFIG_TOUCHSCREEN_MAX11801 is not set
++# CONFIG_TOUCHSCREEN_MCS5000 is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_INEXIO is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
++# CONFIG_TOUCHSCREEN_TSC2005 is not set
++# CONFIG_TOUCHSCREEN_TSC2007 is not set
++# CONFIG_TOUCHSCREEN_W90X900 is not set
++# CONFIG_TOUCHSCREEN_ST1232 is not set
++# CONFIG_TOUCHSCREEN_TPS6507X is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_SERPORT=y
++# CONFIG_SERIO_LIBPS2 is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_SERIO_ALTERA_PS2 is not set
++# CONFIG_SERIO_PS2MULT is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=4
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_N_GSM is not set
++# CONFIG_TRACE_SINK is not set
++CONFIG_DEVKMEM=y
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++# CONFIG_SERIAL_8250_CONSOLE is not set
++CONFIG_SERIAL_8250_NR_UARTS=4
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++# CONFIG_SERIAL_8250_EXTENDED is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_SAMSUNG=y
++CONFIG_SERIAL_SAMSUNG_UARTS_4=y
++CONFIG_SERIAL_SAMSUNG_UARTS=4
++# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
++CONFIG_SERIAL_SAMSUNG_CONSOLE=y
++CONFIG_SERIAL_S3C6400=y
++# CONFIG_SERIAL_MAX3100 is not set
++# CONFIG_SERIAL_MAX3107 is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_TIMBERDALE is not set
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++# CONFIG_SERIAL_IFX6X60 is not set
++# CONFIG_SERIAL_XILINX_PS_UART is not set
++# CONFIG_TTY_PRINTK is not set
++# CONFIG_HVC_DCC is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_RAMOOPS is not set
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_COMPAT=y
++CONFIG_I2C_CHARDEV=y
++# CONFIG_I2C_MUX is not set
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_DESIGNWARE is not set
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_PXA_PCI is not set
++CONFIG_HAVE_S3C2410_I2C=y
++CONFIG_I2C_S3C2410=y
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_XILINX is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_DIOLAN_U2C is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_ALTERA is not set
++CONFIG_SPI_BITBANG=y
++# CONFIG_SPI_GPIO is not set
++# CONFIG_SPI_OC_TINY is not set
++# CONFIG_SPI_PXA2XX_PCI is not set
++CONFIG_SPI_S3C64XX=y
++# CONFIG_SPI_XILINX is not set
++# CONFIG_SPI_DESIGNWARE is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++
++#
++# PPS generators support
++#
++
++#
++# PTP clock support
++#
++
++#
++# Enable Device Drivers -> PPS to see the PTP clock options.
++#
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++# CONFIG_DEBUG_GPIO is not set
++# CONFIG_GPIO_SYSFS is not set
++
++#
++# Memory mapped GPIO drivers:
++#
++# CONFIG_GPIO_BASIC_MMIO is not set
++# CONFIG_GPIO_IT8761E is not set
++CONFIG_GPIO_PLAT_SAMSUNG=y
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX7300 is not set
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCF857X is not set
++# CONFIG_GPIO_SX150X is not set
++# CONFIG_GPIO_ADP5588 is not set
++
++#
++# PCI GPIO expanders:
++#
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_GPIO_MC33880 is not set
++# CONFIG_GPIO_74X164 is not set
++
++#
++# AC97 GPIO expanders:
++#
++
++#
++# MODULbus GPIO expanders:
++#
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++CONFIG_BCMA_POSSIBLE=y
++
++#
++# Broadcom specific AMBA
++#
++# CONFIG_BCMA is not set
++# CONFIG_MFD_SUPPORT is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_MEDIA_SUPPORT is not set
++
++#
++# Graphics support
++#
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_WMT_GE_ROPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_S3C=y
++# CONFIG_FB_S3C_DEBUG_REGWRITE is not set
++# CONFIG_FB_UDL is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_BROADSHEET is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++# CONFIG_LCD_L4F00242T03 is not set
++# CONFIG_LCD_LMS283GF05 is not set
++CONFIG_LCD_LTV350QV=y
++# CONFIG_LCD_TDO24M is not set
++# CONFIG_LCD_VGG2432A4 is not set
++# CONFIG_LCD_PLATFORM is not set
++# CONFIG_LCD_S6E63M0 is not set
++# CONFIG_LCD_LD9040 is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++CONFIG_BACKLIGHT_GENERIC=y
++# CONFIG_BACKLIGHT_ADP8860 is not set
++# CONFIG_BACKLIGHT_ADP8870 is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++# CONFIG_LOGO is not set
++CONFIG_SOUND=y
++CONFIG_SOUND_OSS_CORE=y
++# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_JACK=y
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=y
++CONFIG_SND_PCM_OSS=y
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++CONFIG_SND_VERBOSE_PRINTK=y
++# CONFIG_SND_DEBUG is not set
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++# CONFIG_SND_DRIVERS is not set
++# CONFIG_SND_ARM is not set
++# CONFIG_SND_SPI is not set
++# CONFIG_SND_USB is not set
++CONFIG_SND_SOC=y
++# CONFIG_SND_SOC_CACHE_LZO is not set
++CONFIG_SND_SOC_SAMSUNG=y
++# CONFIG_SND_SOC_SAMSUNG_SMDK_WM8580 is not set
++# CONFIG_SND_SOC_SAMSUNG_SMDK_WM9713 is not set
++CONFIG_SND_SOC_I2C_AND_SPI=y
++# CONFIG_SND_SOC_ALL_CODECS is not set
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++CONFIG_USB_DYNAMIC_MINORS=y
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_ISP1362_HCD is not set
++CONFIG_USB_OHCI_HCD=y
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=y
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
++#
++
++#
++# also be needed; see USB_STORAGE Help for more info
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_REALTEK is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_STORAGE_ENE_UB6250 is not set
++# CONFIG_USB_UAS is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=y
++# CONFIG_USB_SERIAL_CONSOLE is not set
++# CONFIG_USB_EZUSB is not set
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++CONFIG_USB_SERIAL_CH341=y
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_CP210X is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++CONFIG_USB_SERIAL_FTDI_SIO=y
++# CONFIG_USB_SERIAL_FUNSOFT is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++CONFIG_USB_SERIAL_PL2303=y
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_QCAUX is not set
++# CONFIG_USB_SERIAL_QUALCOMM is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_HP4X is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_SYMBOL is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++CONFIG_USB_SERIAL_WWAN=y
++CONFIG_USB_SERIAL_OPTION=y
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_OPTICON is not set
++# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
++# CONFIG_USB_SERIAL_ZIO is not set
++# CONFIG_USB_SERIAL_SSU100 is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_YUREX is not set
++# CONFIG_USB_GADGET is not set
++
++#
++# OTG and related infrastructure
++#
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_USB_ULPI is not set
++# CONFIG_NOP_USB_XCEIV is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++# CONFIG_MMC_CLKGATE is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_MINORS=8
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++CONFIG_MMC_SDHCI=y
++# CONFIG_MMC_SDHCI_PLTFM is not set
++CONFIG_MMC_SDHCI_S3C=y
++CONFIG_MMC_SDHCI_S3C_DMA=y
++# CONFIG_MMC_SPI is not set
++# CONFIG_MMC_DW is not set
++# CONFIG_MMC_VUB300 is not set
++# CONFIG_MMC_USHC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_NFC_DEVICES is not set
++# CONFIG_ACCESSIBILITY is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++CONFIG_RTC_DRV_DS1307=y
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_DS3232 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_ISL12022 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++# CONFIG_RTC_DRV_BQ32K is not set
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++# CONFIG_RTC_DRV_RX8025 is not set
++# CONFIG_RTC_DRV_EM3027 is not set
++# CONFIG_RTC_DRV_RV3029C2 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T93 is not set
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++# CONFIG_RTC_DRV_PCF2123 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_MSM6242 is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_RP5C01 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_S3C=y
++# CONFIG_DMADEVICES is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_UIO is not set
++# CONFIG_STAGING is not set
++
++#
++# File systems
++#
++# CONFIG_EXT2_FS is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_EXPORTFS=y
++CONFIG_FILE_LOCKING=y
++CONFIG_FSNOTIFY=y
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_FANOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_QUOTACTL is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++CONFIG_GENERIC_ACL=y
++
++#
++# Caches
++#
++# CONFIG_FSCACHE is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++CONFIG_TMPFS_POSIX_ACL=y
++CONFIG_TMPFS_XATTR=y
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_UBIFS_FS=y
++CONFIG_UBIFS_FS_XATTR=y
++CONFIG_UBIFS_FS_ADVANCED_COMPR=y
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++# CONFIG_LOGFS is not set
++CONFIG_CRAMFS=y
++# CONFIG_SQUASHFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_PSTORE is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++# CONFIG_NFS_V3 is not set
++# CONFIG_NFS_V4 is not set
++# CONFIG_ROOT_NFS is not set
++CONFIG_NFSD=y
++# CONFIG_NFSD_DEPRECATED is not set
++# CONFIG_NFSD_V3 is not set
++# CONFIG_NFSD_V4 is not set
++CONFIG_LOCKD=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_CEPH_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++CONFIG_NLS_CODEPAGE_936=y
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=y
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_STRIP_ASM_SYMS is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_SECTION_MISMATCH is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++# CONFIG_LOCKUP_DETECTOR is not set
++# CONFIG_HARDLOCKUP_DETECTOR is not set
++# CONFIG_DETECT_HUNG_TASK is not set
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_DEBUG_KMEMLEAK is not set
++CONFIG_DEBUG_RT_MUTEXES=y
++CONFIG_DEBUG_PI_LIST=y
++# CONFIG_RT_MUTEX_TESTER is not set
++CONFIG_DEBUG_SPINLOCK=y
++CONFIG_DEBUG_MUTEXES=y
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_SPARSE_RCU_POINTER is not set
++# CONFIG_LOCK_STAT is not set
++CONFIG_DEBUG_SPINLOCK_SLEEP=y
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_STACK_USAGE is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_INFO_REDUCED is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_TEST_LIST_SORT is not set
++# CONFIG_DEBUG_SG is not set
++# CONFIG_DEBUG_NOTIFIERS is not set
++# CONFIG_DEBUG_CREDENTIALS is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_LATENCYTOP is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++# CONFIG_DEBUG_PAGEALLOC is not set
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
++CONFIG_HAVE_DYNAMIC_FTRACE=y
++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
++CONFIG_HAVE_C_RECORDMCOUNT=y
++CONFIG_TRACING_SUPPORT=y
++CONFIG_FTRACE=y
++# CONFIG_FUNCTION_TRACER is not set
++# CONFIG_SCHED_TRACER is not set
++# CONFIG_ENABLE_DEFAULT_TRACERS is not set
++CONFIG_BRANCH_PROFILE_NONE=y
++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
++# CONFIG_PROFILE_ALL_BRANCHES is not set
++# CONFIG_STACK_TRACER is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_DMA_API_DEBUG is not set
++# CONFIG_ATOMIC64_SELFTEST is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_KGDB is not set
++# CONFIG_TEST_KSTRTOX is not set
++# CONFIG_STRICT_DEVMEM is not set
++CONFIG_ARM_UNWIND=y
++CONFIG_DEBUG_USER=y
++CONFIG_DEBUG_LL=y
++# CONFIG_EARLY_PRINTK is not set
++# CONFIG_DEBUG_ICEDCC is not set
++# CONFIG_OC_ETM is not set
++CONFIG_DEBUG_S3C_UART=0
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY_DMESG_RESTRICT is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++CONFIG_DEFAULT_SECURITY_DAC=y
++CONFIG_DEFAULT_SECURITY=""
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_PCOMP2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++CONFIG_CRYPTO_WORKQUEUE=y
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++# CONFIG_CRYPTO_CBC is not set
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_VMAC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=y
++# CONFIG_CRYPTO_GHASH is not set
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=y
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_ANUBIS is not set
++CONFIG_CRYPTO_ARC4=y
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=y
++# CONFIG_CRYPTO_ZLIB is not set
++CONFIG_CRYPTO_LZO=y
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++# CONFIG_CRYPTO_USER_API_HASH is not set
++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
++# CONFIG_CRYPTO_HW is not set
++# CONFIG_BINARY_PRINTF is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=y
++CONFIG_CRC16=y
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=y
++CONFIG_CRC32=y
++CONFIG_CRC7=y
++CONFIG_LIBCRC32C=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_LZO_COMPRESS=y
++CONFIG_LZO_DECOMPRESS=y
++CONFIG_XZ_DEC=y
++CONFIG_XZ_DEC_X86=y
++CONFIG_XZ_DEC_POWERPC=y
++CONFIG_XZ_DEC_IA64=y
++CONFIG_XZ_DEC_ARM=y
++CONFIG_XZ_DEC_ARMTHUMB=y
++CONFIG_XZ_DEC_SPARC=y
++CONFIG_XZ_DEC_BCJ=y
++# CONFIG_XZ_DEC_TEST is not set
++CONFIG_DECOMPRESS_GZIP=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_DMA=y
++CONFIG_NLATTR=y
++CONFIG_GENERIC_ATOMIC64=y
++CONFIG_AVERAGE=y
+diff -Nuar linux-3.0/Makefile linux-3.0-s3c6410/Makefile
+--- linux-3.0/Makefile 2011-07-22 10:17:23.000000000 +0800
++++ linux-3.0-s3c6410/Makefile 2013-04-01 12:24:19.894292675 +0800
+@@ -192,8 +192,8 @@
+ # Default value for CROSS_COMPILE is not to prefix executables
+ # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
+ export KBUILD_BUILDHOST := $(SUBARCH)
+-ARCH ?= $(SUBARCH)
+-CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%)
++ARCH ?= arm
++CROSS_COMPILE ?= /opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-
+
+ # Architecture as present in compile.h
+ UTS_MACHINE := $(ARCH)
+@@ -557,6 +557,9 @@
+ # This allow a user to issue only 'make' to build a kernel including modules
+ # Defaults to vmlinux, but the arch makefile usually adds further targets
+ all: vmlinux
++ cp arch/arm/boot/zImage . -f
++ ../../../bin/mkimage -A arm -O linux -T kernel -C none -a 50008000 -e 50008040 -n "Linux Kernel" -d zImage linuxrom-s3c6410.bin
++ rm -f zImage
+
+ ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
+ KBUILD_CFLAGS += -Os
+@@ -1201,6 +1204,7 @@
+ -o -name '.*.rej' -o -size 0 \
+ -o -name '*%' -o -name '.*.cmd' -o -name 'core' \) \
+ -type f -print | xargs rm -f
++ @rm -f linuxrom*.bin
+
+
+ # Packaging of the kernel to various formats
diff --git a/ok6410/src/program/comport/comport.c b/ok6410/src/program/comport/comport.c
new file mode 100644
index 0000000..02877f6
--- /dev/null
+++ b/ok6410/src/program/comport/comport.c
@@ -0,0 +1,238 @@
+/*********************************************************************************
+ * Copyright: (C) 2012 Guo Wenxue <guowenxue@gmail.com>
+ * All rights reserved.
+ *
+ * Filename: comport.c
+ * Description: This file used to do ioctl() on common device or communicate
+ * with serial port/TTY device.
+ *
+ * Version: 1.0.0(10/18/2011~)
+ * Author: Guo Wenxue <guowenxue@gmail.com>
+ * ChangeLog: 1, Release initial version on "10/18/2011 10:08:05 AM"
+ *
+ ********************************************************************************/
+#include <getopt.h>
+#include <libgen.h>
+#include <sys/ioctl.h>
+
+#include "cp_comport.h"
+#include "version.h"
+
+
+unsigned char g_ucProcToken = 0x01;
+unsigned char g_ucCtrlZ;
+
+void print_version(char *name);
+void usage(char *name);
+int do_ioctl(char *dev_name, int cmd, int arg);
+void signal_handler(int i_sig);
+
+int main(int argc, char **argv)
+{
+ int opt = 0;
+ int retval = 0;
+ int recv_size = 0;
+ int i;
+ char *dev_name = NULL;
+ int baudrate = 115200;
+ char *settings = "8N1N";
+ char buf[512];
+ unsigned char disp_mode = 0x00;
+
+ struct sigaction sigact;
+
+ struct option long_options[] = {
+ {"device", required_argument, NULL, 'd'},
+ {"baudrate", required_argument, NULL, 'b'},
+ {"settings", required_argument, NULL, 's'},
+ {"ioctl", required_argument, NULL, 'i'},
+ {"hex", no_argument, NULL, 'x'},
+ {"version", no_argument, NULL, 'v'},
+ {"help", no_argument, NULL, 'h'},
+ {NULL, 0, NULL, 0}
+ };
+
+ while ((opt = getopt_long(argc, argv, "d:b:s:ivh", long_options, NULL)) != -1)
+ {
+ switch (opt)
+ {
+ case 'd':
+ dev_name = optarg;
+ break;
+ case 'b':
+ baudrate = atoi(optarg);
+ break;
+ case 's': /* Default settings as 8N1N */
+ settings = optarg;
+ break;
+ case 'i':
+ if (5 != argc)
+ {
+ usage(argv[0]);
+ }
+ else
+ {
+ do_ioctl(argv[2], atoi(argv[3]), atoi(argv[4]));
+ }
+ return 0;
+ case 'x': /* Display receive data as Hex mode */
+ disp_mode = 0x01;
+ break;
+ case 'v': /* version */
+ print_version(argv[0]);
+ return 0;
+ case 'h': /* help */
+ usage(argv[0]);
+ return 0;
+ default:
+ break;
+ } /* end of "switch(opt)" */
+ }
+
+ if (argc < 2)
+ {
+ usage(argv[0]);
+ return 0;
+ }
+
+ COM_PORT *comport = NULL;
+ if (NULL == (comport = comport_init(dev_name, baudrate, settings)))
+ {
+ printf("Comport initialize failure.\n");
+ return -1;
+ }
+
+ if ( (retval=comport_open(comport)) < 0)
+ {
+ printf("Failed to open %s with baudrate %d, %s. RetCode [%d]\n", dev_name, baudrate,
+ settings, retval);
+ return -1;
+ }
+
+ nonblock();
+
+ /* Process level signal handler */
+ sigemptyset(&sigact.sa_mask);
+ sigact.sa_flags = 0;
+ sigact.sa_handler = signal_handler;
+
+ sigaction(SIGTERM, &sigact, NULL); /* catch terminate signal */
+ sigaction(SIGINT, &sigact, NULL); /* catch interrupt signal */
+ sigaction(SIGSEGV, &sigact, NULL); /* catch segmentation faults */
+ sigaction(SIGTSTP, &sigact, NULL); /* catch ctrl+Z */
+ sigaction(SIGSTOP, &sigact, NULL); /* catch ctrl+Z */
+
+ while (0x01 == g_ucProcToken)
+ {
+ recv_size = comport_recv(comport, buf, sizeof(buf) - 1, 10);
+ if (recv_size > 0)
+ {
+ for (i = 0; i < recv_size; i++)
+ {
+ if (0 == disp_mode)
+ printf("%c", buf[i]);
+ else
+ printf("%02X ", buf[i]);
+ }
+ fflush(stdout);
+ }
+ if (0 != kbhit())
+ {
+ retval = fgetc(stdin);
+
+ if (0x0A == retval)
+ {
+ buf[0] = 0x0D; /* 13 == 0x0D */
+ }
+ else
+ {
+ buf[0] = retval;
+ }
+
+ comport_send(comport, buf, 1);
+ }
+ else if (0x00 != g_ucCtrlZ)
+ {
+ g_ucCtrlZ = 0x00;
+ buf[0] = 0x1A;
+ comport_send(comport, buf, 1);
+ }
+ }
+
+ comport_term(comport);
+ return 0;
+} /* ----- End of main() ----- */
+
+void print_version(char *name)
+{
+ char *progname = NULL;
+ char *ptr = NULL;
+
+ ptr = strdup(name);
+ progname = basename(ptr);
+
+ printf("%s version: %d.%d.%d Build %04d on %s\n", progname, MAJOR, MINOR, REVER, SVNVER, DATE);
+ printf("Copyright (C) 2010 guowenxue <guowenxue@gmail.com>\n");
+
+ free(ptr);
+ return;
+}
+
+void usage(char *name)
+{
+ char *progname = NULL;
+ char *ptr = NULL;
+
+ ptr = strdup(name);
+ progname = basename(ptr);
+ printf("Usage1: comport -d <device> [-b <baudrate>][-s <settings>] [-x]\n");
+ printf("Usage2: comport [-i <driver port> <cmd> <arg>][--help][--version]\n");
+ printf(" -d[device ] device name\n");
+ printf(" -b[baudrate] device baudrate (115200, 57600, 19200, 9600), default is 115200\n");
+ printf(" -s[settings] device settings as like 8N1N(default setting)\n");
+ printf(" - data bits: 8, 7\n");
+ printf(" - parity: N=None, O=Odd, E=Even, S=Space\n");
+ printf(" - stop bits: 1, 0\n");
+ printf(" - flow control: N=None, H=Hardware, S=Software, B=Both\n");
+ printf(" -x[hex ] display received data in hex format\n");
+ printf(" -i[ioctl ] ioctl system call (cmd & arg only support int)\n");
+ printf(" -v[version ] Display the program version\n");
+ printf(" -h[help ] Display this help information\n");
+
+ print_version(progname);
+
+ free(ptr);
+
+ return;
+}
+
+int do_ioctl(char *dev_name, int cmd, int arg)
+{
+ int fd = -1;
+ int retval = -1;
+ if (((fd = open(dev_name, O_RDWR)) < 0))
+ {
+ printf("Open device \"%s\" failure: %s\n", dev_name, strerror(errno));
+ return -1;
+ }
+
+ retval = ioctl(fd, cmd, arg);
+ printf("ioctl (%s, %d, %d) returned %d\n", dev_name, cmd, arg, retval);
+
+ close(fd);
+ return retval;
+}
+
+void signal_handler(int i_sig)
+{
+ if (SIGTERM == i_sig || SIGINT == i_sig)
+ {
+ g_ucProcToken = 0x00;
+ }
+ else if (20 == i_sig)
+ {
+ g_ucCtrlZ = 0x01;
+ }
+}
+
+
diff --git a/ok6410/src/program/comport/cp_comport.c b/ok6410/src/program/comport/cp_comport.c
new file mode 100644
index 0000000..2aecafa
--- /dev/null
+++ b/ok6410/src/program/comport/cp_comport.c
@@ -0,0 +1,600 @@
+/* ********************************************************************************
+ * Copyright: (C) 2012 Guo Wenxue <guowenxue@gmail.com>
+ * All rights reserved.
+ *
+ * Filename: cp_comport.c
+ * Description: It's the comport operate library.
+ *
+ * Version: 1.0.0(10/17/2011~)
+ * Author: Guo Wenxue <guowenxue@gmail.com>
+ * ChangeLog: 1, Release initial version on "10/17/2011 03:33:25 PM"
+ *
+ ********************************************************************************/
+
+#include "cp_comport.h"
+
+/**************************************************************************************
+ * Description: Set the comport structure
+ * Input Args: dev_name: The comport device name path, such as '/dev/ttyS3'
+ * baudrate: The baudrate, such as 115200
+ * settings: The databit,parity,stopbit,flowctrl settings, such as '8N1N'
+ * Output Args: NONE
+ * Return Value: The COM_PORT structure pointer.
+ *************************************************************************************/
+COM_PORT *comport_init(const char *dev_name, int baudrate, const char *settings)
+{
+ COM_PORT *comport = NULL;
+ if (NULL == (comport = (COM_PORT *) malloc(sizeof(COM_PORT))))
+ {
+ return NULL;
+ }
+ memset(comport, 0, sizeof(COM_PORT));
+ comport->is_connted = 0;
+ comport->frag_size = 128;
+
+ strncpy(comport->dev_name, dev_name, DEVNAME_LEN);
+ comport->baudrate = baudrate;
+
+ set_settings(comport, settings);
+#ifdef COM_DEBUG
+ disp_settings(comport);
+#endif
+
+ return comport;
+}
+
+#ifdef COM_DEBUG
+void disp_settings(COM_PORT * comport)
+{
+ COM_PRINT("Device:\t\t\t\"%s\"\n", comport->dev_name);
+ COM_PRINT("Baudrate:\t\t%ld\n", comport->baudrate);
+ COM_PRINT("DataBit:\t\t\'%d\'\n", comport->databit);
+ switch (comport->parity)
+ {
+ case 0:
+ COM_PRINT("Parity:\t\t\t\'N\'\n");
+ break;
+ case 1:
+ COM_PRINT("Parity:\t\t\t\'O\'\n");
+ break;
+ case 2:
+ COM_PRINT("Parity:\t\t\t\'E\'\n");
+ break;
+ case 3:
+ COM_PRINT("Parity:\t\t\t\'S\'\n");
+ break;
+ }
+ COM_PRINT("StopBit:\t\t\'%ld\'\n", (long int)comport->stopbit);
+ switch (comport->flowctrl)
+ {
+ case 0:
+ COM_PRINT("FlowCtrl:\t\t\'N\'\n");
+ break;
+ case 1:
+ COM_PRINT("FlowCtrl:\t\t\'S\'\n");
+ break;
+ case 2:
+ COM_PRINT("FlowCtrl:\t\t\'H\'\n");
+ break;
+ case 3:
+ COM_PRINT("FlowCtrl:\t\t\'B\'\n");
+ break;
+ }
+ COM_PRINT("\n");
+ return;
+}
+#endif
+
+/**************************************************************************************
+ * Description: Set the comport databit,parity,stopbit,flowctrl
+ * Input Args: comport: the COM_PORT pointer
+ * settings: The databit/parity/stopbit/flowctrl settings as like "8N1N"
+ * Output Args: NONE
+ * Return Value: NONE
+ *************************************************************************************/
+void set_settings(COM_PORT * comport, const char *settings)
+{
+ if(NULL==settings || NULL==comport)
+ return ;
+
+ switch (settings[0]) /* data bit */
+ {
+ case '7':
+ comport->databit = 7;
+ break;
+ case '8':
+ default:
+ comport->databit = 8;
+ break;
+ }
+
+ switch (settings[1]) /* parity */
+ {
+ case 'O':
+ case 'o':
+ comport->parity = 1;
+ break;
+ case 'E':
+ case 'e':
+ comport->parity = 2;
+ break;
+ case 'S':
+ case 's':
+ comport->parity = 3;
+ break;
+ case 'N':
+ case 'n':
+ default:
+ comport->parity = 0;
+ break;
+ }
+
+ switch (settings[2]) /* stop bit */
+ {
+ case '0':
+ comport->stopbit = 0;
+ break;
+ case '1':
+ default:
+ comport->stopbit = 1;
+ break;
+ }
+
+ switch (settings[3]) /* flow control */
+ {
+ case 'S':
+ case 's':
+ comport->flowctrl = 1;
+ break;
+ case 'H':
+ case 'h':
+ comport->flowctrl = 2;
+ break;
+ case 'B':
+ case 'b':
+ comport->flowctrl = 3;
+ break;
+ case 'N':
+ case 'n':
+ default:
+ comport->flowctrl = 0;
+ break;
+ }
+}
+
+void comport_close(COM_PORT * comport)
+{
+ if (0 != comport->fd)
+ {
+ COM_PRINT("Close device \"%s\"\n", comport->dev_name);
+ close(comport->fd);
+ }
+ comport->is_connted = 0x00;
+ comport->fd = -1;
+}
+
+void comport_term(COM_PORT * comport)
+{
+ if(NULL == comport)
+ return;
+
+ if (0 != comport->fd)
+ {
+ comport_close(comport);
+ }
+ memset(comport, 0x00, sizeof(COM_PORT));
+ free(comport);
+ comport = NULL;
+
+ return;
+}
+
+int comport_open(COM_PORT * comport)
+{
+ int retval = -1;
+ struct termios old_cfg, new_cfg;
+ int old_flags;
+ long tmp;
+
+ if(NULL==comport)
+ return -1;
+
+ comport_close(comport);
+
+
+ /* Not a TTY device */
+ if( !strstr(comport->dev_name, "tty"))
+ {
+ COM_PRINT("Open Not tty device \"%s\"\n", comport->dev_name);
+ comport->fd = open(comport->dev_name, O_RDWR);
+ retval = comport->fd<0 ? -2 : comport->fd;
+ goto CleanUp;
+ }
+
+ comport->fd = open(comport->dev_name, O_RDWR | O_NOCTTY | O_NONBLOCK);
+ if (comport->fd < 0)
+ {
+ retval = -3;
+ goto CleanUp;
+ }
+ COM_PRINT("Open device \"%s\"\n", comport->dev_name);
+
+ if ((-1 != (old_flags = fcntl(comport->fd, F_GETFL, 0)))
+ && (-1 != fcntl(comport->fd, F_SETFL, old_flags & ~O_NONBLOCK)))
+ {
+ // Flush input and output
+ if (-1 == tcflush(comport->fd, TCIOFLUSH))
+ {
+ retval = -4;
+ goto CleanUp;
+ }
+ }
+ else // Failure
+ {
+ retval = -5;
+ goto CleanUp;
+ }
+
+ if (0 != tcgetattr(comport->fd, &old_cfg))
+ {
+ retval = -6; // Failed to get Com settings
+ goto CleanUp;
+ }
+
+ memset(&new_cfg, 0, sizeof(new_cfg));
+
+ /*=====================================*/
+ /* Configure comport */
+ /*=====================================*/
+
+ new_cfg.c_cflag &= ~CSIZE;
+ new_cfg.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
+ new_cfg.c_iflag &= ~(BRKINT | ICRNL | INPCK | ISTRIP | IXON);
+ new_cfg.c_oflag &= ~(OPOST);
+
+ /* Set the data bit */
+ switch (comport->databit)
+ {
+ case 0x07:
+ new_cfg.c_cflag |= CS7;
+ break;
+ case 0x06:
+ new_cfg.c_cflag |= CS6;
+ break;
+ case 0x05:
+ new_cfg.c_cflag |= CS5;
+ break;
+ default:
+ new_cfg.c_cflag |= CS8;
+ break;
+ }
+
+ /* Set the parity */
+ switch (comport->parity)
+ {
+ case 0x01: // Odd
+ new_cfg.c_cflag |= (PARENB | PARODD);
+ new_cfg.c_cflag |= (INPCK | ISTRIP);
+ break;
+ case 0x02: // Even
+ new_cfg.c_cflag |= PARENB;
+ new_cfg.c_cflag &= ~PARODD;;
+ new_cfg.c_cflag |= (INPCK | ISTRIP);
+ break;
+ case 0x03:
+ new_cfg.c_cflag &= ~PARENB;
+ new_cfg.c_cflag &= ~CSTOPB;
+ break;
+ default:
+ new_cfg.c_cflag &= ~PARENB;
+ }
+
+ /* Set Stop bit */
+ if (0x01 != comport->stopbit)
+ {
+ new_cfg.c_cflag |= CSTOPB;
+ }
+ else
+ {
+ new_cfg.c_cflag &= ~CSTOPB;
+ }
+
+ /* Set flow control */
+ switch (comport->flowctrl)
+ {
+ case 1: // Software control
+ case 3:
+ new_cfg.c_cflag &= ~(CRTSCTS);
+ new_cfg.c_iflag |= (IXON | IXOFF);
+ break;
+ case 2: // Hardware control
+ new_cfg.c_cflag |= CRTSCTS; // Also called CRTSCTS
+ new_cfg.c_iflag &= ~(IXON | IXOFF);
+ break;
+ default: // NONE
+ new_cfg.c_cflag &= ~(CRTSCTS);
+ new_cfg.c_iflag &= ~(IXON | IXOFF);
+ break;
+ }
+
+ /* Set baudrate */
+ switch (comport->baudrate)
+ {
+ case 115200:
+ tmp = B115200;
+ break;
+ case 57600:
+ tmp = B57600;
+ break;
+ case 38400:
+ tmp = B38400;
+ break;
+ case 19200:
+ tmp = B19200;
+ break;
+ case 9600:
+ tmp = B9600;
+ break;
+ case 4800:
+ tmp = B4800;
+ break;
+ case 2400:
+ tmp = B2400;
+ break;
+ case 1800:
+ tmp = B1800;
+ break;
+ case 1200:
+ tmp = B1200;
+ break;
+ case 600:
+ tmp = B600;
+ break;
+ case 300:
+ tmp = B300;
+ break;
+ case 200:
+ tmp = B200;
+ break;
+ case 150:
+ tmp = B150;
+ break;
+ case 134:
+ tmp = B134;
+ break;
+ case 110:
+ tmp = B110;
+ break;
+ case 75:
+ tmp = B75;
+ break;
+ case 50:
+ tmp = B50;
+ break;
+ default:
+ tmp = B115200;
+ }
+ cfsetispeed(&new_cfg, tmp);
+ cfsetispeed(&new_cfg, tmp);
+
+ /* Set the Com port timeout settings */
+ new_cfg.c_cc[VMIN] = 0;
+ new_cfg.c_cc[VTIME] = 0;
+
+ tcflush(comport->fd, TCIFLUSH);
+ if (0 != tcsetattr(comport->fd, TCSANOW, &new_cfg))
+ {
+ retval = -7; // Failed to set device com port settings
+ goto CleanUp;
+ }
+
+ COM_PRINT("Connected device \"%s\".\n", comport->dev_name);
+ comport->is_connted = 0x01;
+ retval = comport->fd;
+
+CleanUp:
+ COM_PRINT("Open device \"%s\" %s.\n", comport->dev_name, retval>0 ? "successfully" : "failure");
+ return retval;
+}
+
+void nonblock()
+{
+ struct termios ttystate;
+
+ //get the terminal state
+ tcgetattr(STDIN_FILENO, &ttystate);
+
+ //turn off canonical mode
+ ttystate.c_lflag &= ~ICANON;
+ //minimum of number input read.
+ ttystate.c_cc[VMIN] = 1;
+
+ //set the terminal attributes.
+ tcsetattr(STDIN_FILENO, TCSANOW, &ttystate);
+}
+
+int kbhit()
+{
+ struct timeval tv;
+ fd_set fds;
+ tv.tv_sec = 0;
+ tv.tv_usec = 0;
+ FD_ZERO(&fds);
+ FD_SET(STDIN_FILENO, &fds); //STDIN_FILENO is 0
+ select(STDIN_FILENO + 1, &fds, NULL, NULL, &tv);
+ return FD_ISSET(STDIN_FILENO, &fds);
+}
+
+int comport_recv(COM_PORT * comport, char *buf, int buf_size, unsigned long timeout)
+{
+ int retval = 0; // Function return value
+ int iRet;
+ fd_set stReadFds, stExcpFds;
+ struct timeval stTime;
+
+ if (NULL == buf || 0 >= buf_size)
+ {
+ COM_PRINT("%s() usage error.\n", __FUNCTION__);
+ retval = -1;
+ goto CleanUp;
+ }
+
+ if (0x01 != comport->is_connted)
+ {
+ COM_PRINT("%s() comport not connected.\n", __FUNCTION__);
+ retval = -2;
+ goto CleanUp;
+ }
+
+ //printf("bufsize=%d timeout=%lu\n", buf_size, timeout);
+
+ FD_ZERO(&stReadFds);
+ FD_ZERO(&stExcpFds);
+ FD_SET(comport->fd, &stReadFds);
+ FD_SET(comport->fd, &stExcpFds);
+
+ if (0xFFFFFFFF != timeout)
+ {
+ stTime.tv_sec = (time_t) (timeout / 1000);
+ stTime.tv_usec = (long)(1000 * (timeout % 1000));
+
+ iRet = select(comport->fd + 1, &stReadFds, 0, &stExcpFds, &stTime);
+ if (0 == iRet)
+ {
+ retval = 0; // No data in Com port buffer
+ goto CleanUp;
+ }
+ else if (0 < iRet)
+ {
+ if (0 != FD_ISSET(comport->fd, &stExcpFds))
+ {
+ retval = -6; // Error during checking recv status
+ COM_PRINT("Error checking recv status.\n");
+ goto CleanUp;
+ }
+
+ if (0 == FD_ISSET(comport->fd, &stReadFds))
+ {
+ retval = 0; // No incoming data
+ COM_PRINT("No incoming data.\n");
+ goto CleanUp;
+ }
+ }
+ else
+ {
+ if (EINTR == errno)
+ {
+ COM_PRINT("catch interrupt signal.\n");
+ retval = 0; // Interrupted signal catched
+ }
+ else
+ {
+ COM_PRINT("Check recv status failure.\n");
+ retval = -7; // Error during checking recv status
+ }
+
+ goto CleanUp;
+ }
+ }
+
+ usleep(10000); /* sleep for 10ms for data incoming */
+
+ // Get data from Com port
+ iRet = read(comport->fd, buf, buf_size);
+ if (0 > iRet)
+ {
+ if (EINTR == errno)
+ retval = 0; // Interrupted signal catched
+ else
+ retval = -3; // Failed to read Com port
+
+ goto CleanUp;
+ }
+
+#if 0
+ {
+ int i=0;
+ printf("Receive %d bytes data: \n", iRet);
+ for(i=0; i<iRet; i++)
+ {
+ printf("0x%02x ", buf[i]);
+ }
+ printf("\n");
+ }
+#endif
+
+ retval = iRet;
+
+ CleanUp:
+ return retval;
+
+}
+
+int comport_send(COM_PORT * comport, char *buf, int send_bytes)
+{
+ char *ptr, *end;
+ int retval = 0;
+ int send = 0;
+
+ if (NULL == buf || 0 >= send_bytes)
+ {
+ COM_PRINT("%s() Usage error.\n", __FUNCTION__);
+ retval = -1;
+ goto CleanUp;
+ }
+
+ if (0x01 != comport->is_connted) // Comport not opened ?
+ {
+ retval = -3;
+ COM_PRINT("Serail not connected.\n");
+ goto CleanUp;
+ }
+
+ //printf("Send %s with %d bytes.\n", buf, send_bytes);
+
+ // Large data, then slice them and send
+ if (comport->frag_size < send_bytes)
+ {
+ ptr = buf;
+ end = buf + send_bytes;
+
+ do
+ {
+ // Large than frag_size
+ if (comport->frag_size < (end - ptr))
+ {
+ send = write(comport->fd, ptr, comport->frag_size);
+ if (0 >= send || comport->frag_size != send)
+ {
+ retval = -4;
+ goto CleanUp;
+ }
+ ptr += comport->frag_size;
+ }
+ else // Less than frag_size, maybe last fragmention.
+ {
+ send = write(comport->fd, ptr, (end - ptr));
+ if (0 >= send || (end - ptr) != send)
+ {
+ retval = -4;
+ goto CleanUp;
+ }
+ ptr += (end - ptr);
+ }
+ }
+ while (ptr < end);
+ }
+ else // The send data is not large than a fragmention.
+ {
+ send = write(comport->fd, buf, send_bytes);
+ if (0 >= send || send_bytes != send)
+ {
+ retval = -5;
+ goto CleanUp;
+ }
+ }
+
+ CleanUp:
+ return retval;
+}
+
diff --git a/ok6410/src/program/comport/cp_comport.h b/ok6410/src/program/comport/cp_comport.h
new file mode 100644
index 0000000..4dea2f1
--- /dev/null
+++ b/ok6410/src/program/comport/cp_comport.h
@@ -0,0 +1,67 @@
+/*********************************************************************************
+ * Copyright: (C) 2012 Guo Wenxue <guowenxue@gmail.com>
+ * All rights reserved.
+ *
+ * Filename: cp_comport.h
+ * Description: This head file is for the common TTY/Serial port operator library
+ *
+ * Version: 1.0.0(10/17/2011~)
+ * Author: Guo Wenxue <guowenxue@gmail.com>
+ * ChangeLog: 1, Release initial version on "10/17/2011 03:33:25 PM"
+ *
+ ********************************************************************************/
+#ifndef _CP_COMPORT_H
+#define _CP_COMPORT_H
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <getopt.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <termios.h>
+#include <sys/stat.h>
+#include <sys/wait.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/select.h>
+
+#define BUF_64 64
+
+#ifndef DEVNAME_LEN
+#define DEVNAME_LEN 64
+#endif
+
+//#define COM_DEBUG
+#ifdef COM_DEBUG
+#define COM_PRINT(format,args...) printf(format, ##args)
+#else
+#define COM_PRINT(format,args...) do{} while(0);
+#endif
+
+//#define msleep(m) {struct timespec cSleep; cSleep.tv_sec = 0; cSleep.tv_nsec = m * 1000; nanosleep(&cSleep, 0);}
+
+typedef struct __COM_PORT
+{
+ unsigned char databit, parity, stopbit, flowctrl, is_connted;
+ char dev_name[DEVNAME_LEN];
+ unsigned char used; /* This comport used or not now */
+ int fd;
+ int frag_size;
+ long baudrate;
+} COM_PORT;
+
+COM_PORT *comport_init(const char *dev_name, int baudrate, const char *settings);
+void comport_close(COM_PORT * comport);
+int comport_open(COM_PORT * comport);
+void comport_term(COM_PORT * comport);
+int comport_recv(COM_PORT * comport, char *buf, int buf_size, unsigned long timeout);
+int comport_send(COM_PORT * comport, char *buf, int send_bytes);
+
+void set_settings(COM_PORT * comport, const char *settings);
+void disp_settings(COM_PORT * comport);
+void nonblock();
+int kbhit();
+
+#endif
diff --git a/ok6410/src/program/comport/makefile b/ok6410/src/program/comport/makefile
new file mode 100644
index 0000000..ed771ae
--- /dev/null
+++ b/ok6410/src/program/comport/makefile
@@ -0,0 +1,113 @@
+#*********************************************************************************
+# Copyright: (C) 2012 Guo Wenxue<Email:guowenxue@gmail.com>
+# All rights reserved.
+#
+# Filename: Makefile
+# Description: This Makefile used to call function to compile all the C source
+# in current folder and links all the objects file into a excutable
+# binary file.
+#
+# Version: 1.0.0(10/08/2011~)
+# Author: Guo Wenxue <guowenxue@gmail.com>
+# ChangeLog: 1, Release initial version on "10/08/2011 01:29:33 AM"
+#
+#********************************************************************************/
+
+PWD=$(shell pwd)
+INSTPATH=/tftp
+
+APP_BINARY_NAME = comport
+#ARCH?=i386
+ARCH?=arm1176jzfs
+
+MODE=PRODUCTION
+LINK_MODE=STATIC
+#DEBUG=1
+
+#LDFLAGS+=-lpthread
+CFLAGS+=-Wall -Werror
+
+ifeq ("${MODE}", "PRODUCTION")
+ CFLAGS+=-DPRODUCTION_MODE
+endif
+ifdef DEBUG
+ CFLAGS+=-g -DDEBUG
+endif
+
+COMPILE_DATE=$(shell date -u +"%Y-%m-%d %H:%M")
+VPATH= .
+SRCS = $(wildcard ${VPATH}/*.c)
+OBJS = $(patsubst %.c,%.o,$(SRCS))
+
+TMP=$(shell echo $(ARCH) | tr "[A-Z]" "[a-z]")
+ifneq (,$(filter i386,$(TMP)))
+ CROSS_COMPILE=
+else
+ CROSS_COMPILE=/opt/buildroot-2012.08/$(ARCH)/usr/bin/arm-linux-
+endif
+
+CFLAGS+=-I${PWD}
+
+export CC=${CROSS_COMPILE}gcc
+export CXX=${CROSS_COMPILE}g++
+export AR=${CROSS_COMPILE}ar
+export AS=${CROSS_COMPILE}as
+export RANLIB=${CROSS_COMPILE}ranlib
+export STRIP=${CROSS_COMPILE}strip
+export CFLAGS
+export LDFLAGS
+export ARCH
+export LINK_MODE
+
+ifeq ("${LINK_MODE}", "STATIC")
+ CFLAGS+=--static
+ LDFLAGS+=-static
+else
+ LDFLAGS+=-ldl
+endif
+
+all: entry version $(APP_BINARY_NAME)
+
+entry:
+ @echo " ";
+ @echo " =========================================================";
+ @echo " ** Compile ${APP_BINARY_NAME} for ${ARCH} ";
+ @echo " =========================================================";
+
+version:
+ @echo "/* Generated by makefile, don't Edit it by hand */" > version.h
+ @echo "#define DATE \"$(COMPILE_DATE)\"" >> version.h
+ @echo "#define MAJOR 1" >>version.h
+ @echo "#define MINOR 0" >>version.h
+ @echo "#define REVER 0" >>version.h
+ @if [ -f .svn/entries ] ; then \
+ echo "#define SVNVER `sed -n -e 11p .svn/entries`" >>version.h; \
+ else \
+ echo "#define SVNVER 0" >>version.h; \
+ fi;
+ @echo "" >> version.h
+ @echo '#define version(progname) printf("%s Version %d.%d.%d Build @%05d (%s)\n", progname, MAJOR, MINOR, REVER,SVNVER, DATE)' >> version.h
+ @echo '#define copyright() printf("Copyright: (C) 2012 Guo Wenxue<Email:guowenxue@gmail.com\n")' >>version.h
+ @echo '#define banner(progname) {version(progname); copyright(); printf("\n");}' >>version.h
+ @echo "" >> version.h
+
+$(APP_BINARY_NAME): $(OBJS)
+ $(CC) -o $@ *.c
+ $(STRIP) $(APP_BINARY_NAME)
+
+tag:
+ @ctags --c-kinds=+defglmnstuvx --langmap=c:.c.h.ho.hem.het.hec.hev.him.hit.hic.hiv -R .
+ @cscope -Rbq
+
+install:
+ @cp $(APP_BINARY_NAME) ${INSTPATH}
+
+clean:
+ @rm -f version.h
+ @rm -f *.o $(APP_BINARY_NAME)
+ @rm -rf *.gdb *.a *.so *.elf*
+
+distclean: clean
+ @rm -f tags cscope*
+
+.PHONY: clean entry
diff --git a/ok6410/src/rootfs/copy_library.sh b/ok6410/src/rootfs/copy_library.sh
new file mode 100644
index 0000000..4642356
--- /dev/null
+++ b/ok6410/src/rootfs/copy_library.sh
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+CMD_PREFIX=sudo
+CROSS_PATH=/opt/buildroot-2012.08/arm1176jzfs/usr/arm-unknown-linux-uclibcgnueabi/
+ROOTFS_PATH=./rootfs_tree
+
+if [ -z "$ROOTFS_PATH" ] ; then
+ echo "Too dangerous to operator rootfs, exit now"
+ exit;
+fi
+
+$CMD_PREFIX rm -f ${ROOTFS_PATH}/lib/*.so*
+$CMD_PREFIX rm -f ${ROOTFS_PATH}/usr/lib/*.so*
+
+
+$CMD_PREFIX cp -af ${CROSS_PATH}/sysroot/lib/*.so* ${ROOTFS_PATH}/lib
+$CMD_PREFIX cp -af ${CROSS_PATH}/lib/*.so* ${ROOTFS_PATH}/lib
+$CMD_PREFIX cp -af ${CROSS_PATH}/sysroot/usr/lib/*.so* ${ROOTFS_PATH}/usr/lib
+
+$CMD_PREFIX rm -f ${ROOTFS_PATH}/lib/*.so*.py
+$CMD_PREFIX rm -f ${ROOTFS_PATH}/usr/lib/*.so*.py
+
+
+
diff --git a/ok6410/src/rootfs/rootfs_tree.tar.bz2 b/ok6410/src/rootfs/rootfs_tree.tar.bz2
new file mode 100644
index 0000000..c8876b8
--- /dev/null
+++ b/ok6410/src/rootfs/rootfs_tree.tar.bz2
Binary files differ
diff --git a/ok6410/src/thirdparty/appweb/build.sh b/ok6410/src/thirdparty/appweb/build.sh
new file mode 100755
index 0000000..3911793
--- /dev/null
+++ b/ok6410/src/thirdparty/appweb/build.sh
@@ -0,0 +1,93 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download lrzsz source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=appweb
+DIR_NAME="appweb-3.3.4"
+PACK_SUFIX="-0-src.tgz"
+DL_ADDR="http://appwebserver.org/software/$DIR_NAME$PACK_SUFIX"
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+PHP_PATH=/apps/${ARCH}/php/
+PHP_SRC_PATH=`pwd`/../php/php-5.3.17
+
+if [ ! -d "$PHP_PATH" ] ; then
+ cd ../php
+ sh build.sh
+ cd -
+fi
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+# Download and decompress source code packet
+download $DL_ADDR
+rm -rf $DIR_NAME
+tar -xzf $DIR_NAME$PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH/{bin,modules}
+
+cd $DIR_NAME
+ set -x
+
+ #--type=RELEASE --shared --port=80 --enable-assert --enable-complete-cross \
+ ./configure $CONFIG_CROSS --prefix=$PREFIX_PATH \
+ --type=RELEASE --static --port=80 --enable-assert --enable-complete-cross \
+ --enable-legacy-api --enable-log --enable-multi-thread --enable-samples \
+ --enable-test --enable-send --enable-upload --enable-file --enable-regex \
+ --with-php=$PHP_SRC_PATH
+ make TRACE=1
+
+ $STRIP bin/arm-unknown-linux/appweb
+ cp bin/arm-unknown-linux/appweb $PREFIX_PATH/bin
+ cp modules/arm-unknown-linux/* $PREFIX_PATH/modules
+ cp -rf test/{appweb.conf,groups.db,mime.types,users.db,web} $PREFIX_PATH
+
+ sed -i -e "s|^Listen 4100|Listen 80|g" $PREFIX_PATH/appweb.conf
+ sed -i -e 's|^LoadModulePath "../modules"|LoadModulePath "./modules"|g' $PREFIX_PATH/appweb.conf
+
+ cd `dirname $PREFIX_PATH`
+ tar -czf appweb_$ARCH.tar.gz `basename $PREFIX_PATH`
+ mv appweb_$ARCH.tar.gz $PREFIX_PATH
+
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp appweb_$ARCH.tar.gz $PREFIX_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/busybox/build.sh b/ok6410/src/thirdparty/busybox/build.sh
new file mode 100644
index 0000000..3257f59
--- /dev/null
+++ b/ok6410/src/thirdparty/busybox/build.sh
@@ -0,0 +1,142 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download busybox source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+
+PRJ_PATH=`pwd`
+ARCH=arm1176jzfs
+
+#APP_NAME="busybox-1.19.3"
+APP_NAME="busybox-1.20.2"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="http://www.busybox.net/downloads/${APP_NAME}.${PACK_SUFIX}"
+INST_PATH=
+
+if [ -z "$ARCH" -a $# -gt 0 ] ; then
+ ARCH=$1
+fi
+INST_PATH=$PRJ_PATH/../../rootfs/rootfs_tree
+
+sup_arch=("" "arm920t" "arm926t" "arm1176jzfs")
+function select_arch()
+{
+ echo "Current support ARCH: "
+ i=1
+ len=${#sup_arch[*]}
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_arch[$i]}"
+ let i++;
+ done
+
+ echo "Please select: "
+ index=
+ read index
+ ARCH=${sup_arch[$index]}
+}
+
+
+function decompress_packet()
+(
+ echo "+---------------------------------------------+"
+ echo "| Decompress $1 now"
+ echo "+---------------------------------------------+"
+
+ ftype=`file "$1"`
+ case "$ftype" in
+ "$1: Zip archive"*)
+ unzip "$1" ;;
+ "$1: gzip compressed"*)
+ if [ 0 != `expr "$1" : ".*.tar.*" ` ] ; then
+ tar -xzf $1
+ else
+ gzip -d "$1"
+ fi ;;
+ "$1: bzip2 compressed"*)
+ if [ 0 != `expr "$1" : ".*.tar.*" ` ] ; then
+ tar -xjf $1
+ else
+ bunzip2 "$1"
+ fi ;;
+ "$1: POSIX tar archive"*)
+ tar -xf "$1" ;;
+ *)
+ echo "$1 is unknow compress format";;
+ esac
+)
+
+if [ -z "$CROSS" ] ; then
+ if [ -z "$ARCH" ] ; then
+ select_arch
+ fi
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+
+
+# Download source code packet
+if [ ! -s $APP_NAME.$PACK_SUFIX ] ; then
+ echo "+------------------------------------------------------------------+"
+ echo "| Download $APP_NAME.$PACK_SUFIX now "
+ echo "+------------------------------------------------------------------+"
+
+ wget $DL_ADDR
+fi
+
+# Decompress source code packet
+if [ ! -d $APP_NAME ] ; then
+ tar -xjf $APP_NAME.tar.*
+fi
+
+#Copy the configure file
+if [ ! -s .config ]; then
+ cp patch/$APP_NAME.config $APP_NAME/.config
+fi
+
+if [ ! -s $APP_NAME/.config ]; then
+ echo "+------------------------------------------------------------------+"
+ echo "| ERROR: Miss default configure file"
+ echo "+------------------------------------------------------------------+"
+ exit -2
+fi
+
+if [ -z $INST_PATH ] ; then
+ INST_PATH=$PRJ_PATH/../$ARCH/mnt
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Build $APP_NAME for $ARCH "
+echo "| Crosstool: $CROSS"
+echo "+------------------------------------------------------------------+"
+
+cd $APP_NAME
+
+ #Modify the cross config in the configure file
+ line=`sed -n '/CONFIG_CROSS_COMPILER_PREFIX/=' .config`
+ sed -i -e ${line}s"|.*|CONFIG_CROSS_COMPILER_PREFIX=\"$CROSS\"|" .config
+
+ #Modify the install path in the configure file
+ line=`sed -n '/CONFIG_PREFIX=/=' .config`
+ sed -i -e ${line}s"|.*|CONFIG_PREFIX=\"$INST_PATH\"|" .config
+
+ #Fix strverscmp not define bug
+ line=`sed -n '/^#define HAVE_STRVERSCMP/=' include/platform.h `
+ sed -i -e ${line}s"|.*|# undef HAVE_STRVERSCMP|" include/platform.h
+
+ set -x
+ make oldconfig
+ make
+ set +x
+
+ #install busybox
+ if [ -d $INST_PATH ] ; then
+ sudo rm -rf $INST_PATH/bin/*
+ sudo rm -rf $INST_PATH/sbin/*
+ sudo make install
+ fi
+ file busybox
+cd -
+
diff --git a/ok6410/src/thirdparty/busybox/patch/.config b/ok6410/src/thirdparty/busybox/patch/.config
new file mode 100644
index 0000000..9c1cf3c
--- /dev/null
+++ b/ok6410/src/thirdparty/busybox/patch/.config
@@ -0,0 +1,1020 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.20.2
+# Tue Mar 12 15:06:07 2013
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_DESKTOP is not set
+# CONFIG_EXTRA_COMPAT is not set
+# CONFIG_INCLUDE_SUSv2 is not set
+# CONFIG_USE_PORTABLE_CODE is not set
+CONFIG_PLATFORM_LINUX=y
+CONFIG_FEATURE_BUFFERS_USE_MALLOC=y
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+CONFIG_FEATURE_COMPRESS_USAGE=y
+CONFIG_FEATURE_INSTALLER=y
+CONFIG_INSTALL_NO_USR=y
+# CONFIG_LOCALE_SUPPORT is not set
+# CONFIG_UNICODE_SUPPORT is not set
+# CONFIG_UNICODE_USING_LOCALE is not set
+# CONFIG_FEATURE_CHECK_UNICODE_IN_ENV is not set
+CONFIG_SUBST_WCHAR=0
+CONFIG_LAST_SUPPORTED_WCHAR=0
+# CONFIG_UNICODE_COMBINING_WCHARS is not set
+# CONFIG_UNICODE_WIDE_WCHARS is not set
+# CONFIG_UNICODE_BIDI_SUPPORT is not set
+# CONFIG_UNICODE_NEUTRAL_TABLE is not set
+# CONFIG_UNICODE_PRESERVE_BROKEN is not set
+CONFIG_LONG_OPTS=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_FEATURE_PIDFILE=y
+CONFIG_FEATURE_SUID=y
+CONFIG_FEATURE_SUID_CONFIG=y
+CONFIG_FEATURE_SUID_CONFIG_QUIET=y
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+# CONFIG_PIE is not set
+# CONFIG_NOMMU is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+# CONFIG_LFS is not set
+CONFIG_CROSS_COMPILER_PREFIX="/opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-"
+CONFIG_SYSROOT=""
+CONFIG_EXTRA_CFLAGS=""
+CONFIG_EXTRA_LDFLAGS=""
+CONFIG_EXTRA_LDLIBS=""
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_PESSIMIZE is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+
+#
+# Installation Options ("make install" behavior)
+#
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/home/guowenxue/ok6410/src/systools/busybox/../../rootfs/rootfs_tree"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_FEATURE_SYSTEMD=y
+CONFIG_FEATURE_RTMINMAX=y
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SMALL=1
+CONFIG_FEATURE_FAST_TOP=y
+CONFIG_FEATURE_ETC_NETWORKS=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_VI=y
+CONFIG_FEATURE_EDITING_HISTORY=255
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+# CONFIG_FEATURE_EDITING_SAVE_ON_EXIT is not set
+CONFIG_FEATURE_REVERSE_SEARCH=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+# CONFIG_FEATURE_EDITING_ASK_TERMINAL is not set
+CONFIG_FEATURE_NON_POSIX_CP=y
+# CONFIG_FEATURE_VERBOSE_CP_MESSAGE is not set
+CONFIG_FEATURE_COPYBUF_KB=4
+CONFIG_FEATURE_SKIP_ROOTFS=y
+# CONFIG_MONOTONIC_SYSCALL is not set
+CONFIG_IOCTL_HEX2STR_ERROR=y
+# CONFIG_FEATURE_HWIB is not set
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_FEATURE_SEAMLESS_XZ=y
+# CONFIG_FEATURE_SEAMLESS_LZMA is not set
+CONFIG_FEATURE_SEAMLESS_BZ2=y
+CONFIG_FEATURE_SEAMLESS_GZ=y
+CONFIG_FEATURE_SEAMLESS_Z=y
+# CONFIG_AR is not set
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+# CONFIG_FEATURE_AR_CREATE is not set
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+# CONFIG_CPIO is not set
+# CONFIG_FEATURE_CPIO_O is not set
+# CONFIG_FEATURE_CPIO_P is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_GZIP=y
+CONFIG_FEATURE_GZIP_LONG_OPTIONS=y
+CONFIG_GZIP_FAST=0
+# CONFIG_LZOP is not set
+# CONFIG_LZOP_COMPR_HIGH is not set
+# CONFIG_RPM2CPIO is not set
+CONFIG_RPM=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_AUTODETECT=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_FEATURE_TAR_TO_COMMAND=y
+CONFIG_FEATURE_TAR_UNAME_GNAME=y
+CONFIG_FEATURE_TAR_NOPRESERVE_TIME=y
+# CONFIG_FEATURE_TAR_SELINUX is not set
+# CONFIG_UNCOMPRESS is not set
+# CONFIG_UNLZMA is not set
+# CONFIG_FEATURE_LZMA_FAST is not set
+# CONFIG_LZMA is not set
+# CONFIG_UNXZ is not set
+# CONFIG_XZ is not set
+CONFIG_UNZIP=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_FEATURE_DATE_NANO=y
+CONFIG_FEATURE_DATE_COMPAT=y
+# CONFIG_HOSTID is not set
+CONFIG_ID=y
+CONFIG_GROUPS=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_FEATURE_TOUCH_SUSV3=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_BASE64=y
+# CONFIG_WHO is not set
+CONFIG_USERS=y
+CONFIG_CAL=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_FEATURE_CHOWN_LONG_OPTIONS=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_FEATURE_CP_LONG_OPTIONS=y
+CONFIG_CUT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_THIRD_STATUS_LINE=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_FEATURE_DF_FANCY=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_FSYNC=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LN=y
+# CONFIG_LOGNAME is not set
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+# CONFIG_NOHUP is not set
+CONFIG_OD=y
+# CONFIG_PRINTENV is not set
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+# CONFIG_RMDIR is not set
+# CONFIG_FEATURE_RMDIR_LONG_OPTIONS is not set
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SHA256SUM=y
+CONFIG_SHA512SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_FEATURE_FLOAT_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+# CONFIG_TAC is not set
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+# CONFIG_TEE is not set
+# CONFIG_FEATURE_TEE_USE_BLOCK_IO is not set
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+# CONFIG_UUDECODE is not set
+# CONFIG_UUENCODE is not set
+# CONFIG_WC is not set
+# CONFIG_FEATURE_WC_LARGE is not set
+# CONFIG_WHOAMI is not set
+# CONFIG_YES is not set
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum, sha256sum, sha512sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+# CONFIG_CHVT is not set
+# CONFIG_FGCONSOLE is not set
+CONFIG_CLEAR=y
+# CONFIG_DEALLOCVT is not set
+# CONFIG_DUMPKMAP is not set
+# CONFIG_KBD_MODE is not set
+# CONFIG_LOADFONT is not set
+# CONFIG_LOADKMAP is not set
+# CONFIG_OPENVT is not set
+# CONFIG_RESET is not set
+# CONFIG_RESIZE is not set
+# CONFIG_FEATURE_RESIZE_PRINT is not set
+# CONFIG_SETCONSOLE is not set
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+# CONFIG_SETFONT is not set
+# CONFIG_FEATURE_SETFONT_TEXTUAL_MAP is not set
+CONFIG_DEFAULT_SETFONT_DIR=""
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+# CONFIG_SHOWKEY is not set
+# CONFIG_FEATURE_LOADFONT_PSF2 is not set
+# CONFIG_FEATURE_LOADFONT_RAW is not set
+
+#
+# Debian Utilities
+#
+# CONFIG_MKTEMP is not set
+# CONFIG_PIPE_PROGRESS is not set
+# CONFIG_RUN_PARTS is not set
+# CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS is not set
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+# CONFIG_START_STOP_DAEMON is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_FANCY is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set
+# CONFIG_WHICH is not set
+
+#
+# Editors
+#
+CONFIG_PATCH=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=4096
+# CONFIG_FEATURE_VI_8BIT is not set
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_REGEX_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_ASK_TERMINAL=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_LIBM=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_LONG_OPTIONS=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_ED is not set
+CONFIG_SED=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_FEATURE_FIND_LINKS=y
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+# CONFIG_BOOTCHARTD is not set
+# CONFIG_FEATURE_BOOTCHARTD_BLOATED_HEADER is not set
+# CONFIG_FEATURE_BOOTCHARTD_CONFIG_FILE is not set
+CONFIG_HALT=y
+# CONFIG_FEATURE_CALL_TELINIT is not set
+CONFIG_TELINIT_PATH=""
+CONFIG_INIT=y
+CONFIG_FEATURE_USE_INITTAB=y
+# CONFIG_FEATURE_KILL_REMOVED is not set
+CONFIG_FEATURE_KILL_DELAY=0
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+CONFIG_FEATURE_INIT_COREDUMPS=y
+CONFIG_FEATURE_INITRD=y
+CONFIG_INIT_TERMINAL_TYPE="linux"
+CONFIG_MESG=y
+CONFIG_FEATURE_MESG_ENABLE_ONLY_GROUP=y
+
+#
+# Login/Password Management Utilities
+#
+# CONFIG_ADD_SHELL is not set
+# CONFIG_REMOVE_SHELL is not set
+CONFIG_FEATURE_SHADOWPASSWDS=y
+CONFIG_USE_BB_PWD_GRP=y
+CONFIG_USE_BB_SHADOW=y
+CONFIG_USE_BB_CRYPT=y
+CONFIG_USE_BB_CRYPT_SHA=y
+CONFIG_ADDUSER=y
+CONFIG_FEATURE_ADDUSER_LONG_OPTIONS=y
+# CONFIG_FEATURE_CHECK_NAMES is not set
+CONFIG_FIRST_SYSTEM_ID=100
+CONFIG_LAST_SYSTEM_ID=999
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDGROUP_LONG_OPTIONS=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELUSER=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_GETTY=y
+CONFIG_LOGIN=y
+# CONFIG_LOGIN_SESSION_AS_CHILD is not set
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+CONFIG_CRYPTPW=y
+CONFIG_CHPASSWD=y
+CONFIG_FEATURE_DEFAULT_PASSWD_ALGO="md5"
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+# CONFIG_CHATTR is not set
+# CONFIG_FSCK is not set
+# CONFIG_LSATTR is not set
+# CONFIG_TUNE2FS is not set
+
+#
+# Linux Module Utilities
+#
+CONFIG_MODINFO=y
+CONFIG_MODPROBE_SMALL=y
+CONFIG_FEATURE_MODPROBE_SMALL_OPTIONS_ON_CMDLINE=y
+CONFIG_FEATURE_MODPROBE_SMALL_CHECK_ALREADY_LOADED=y
+# CONFIG_INSMOD is not set
+# CONFIG_RMMOD is not set
+# CONFIG_LSMOD is not set
+# CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT is not set
+# CONFIG_MODPROBE is not set
+# CONFIG_FEATURE_MODPROBE_BLACKLIST is not set
+# CONFIG_DEPMOD is not set
+
+#
+# Options common to multiple modutils
+#
+# CONFIG_FEATURE_2_4_MODULES is not set
+# CONFIG_FEATURE_INSMOD_TRY_MMAP is not set
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+# CONFIG_FEATURE_CHECK_TAINTED_MODULE is not set
+# CONFIG_FEATURE_MODUTILS_ALIAS is not set
+# CONFIG_FEATURE_MODUTILS_SYMBOLS is not set
+CONFIG_DEFAULT_MODULES_DIR="/lib/modules"
+CONFIG_DEFAULT_DEPMOD_FILE="modules.dep"
+
+#
+# Linux System Utilities
+#
+# CONFIG_BLOCKDEV is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_RENAME=y
+CONFIG_FEATURE_MDEV_RENAME_REGEXP=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+# CONFIG_REV is not set
+# CONFIG_ACPID is not set
+# CONFIG_FEATURE_ACPID_COMPAT is not set
+# CONFIG_BLKID is not set
+# CONFIG_FEATURE_BLKID_TYPE is not set
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+# CONFIG_FDFORMAT is not set
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+# CONFIG_FEATURE_FDISK_WRITABLE is not set
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_GPT_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FINDFS is not set
+CONFIG_FLOCK=y
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_EXT2 is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+# CONFIG_MKFS_REISER is not set
+# CONFIG_MKFS_VFAT is not set
+CONFIG_GETOPT=y
+CONFIG_FEATURE_GETOPT_LONG=y
+CONFIG_HEXDUMP=y
+CONFIG_FEATURE_HEXDUMP_REVERSE=y
+CONFIG_HD=y
+CONFIG_HWCLOCK=y
+CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS=y
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+# CONFIG_LOSETUP is not set
+# CONFIG_LSPCI is not set
+CONFIG_LSUSB=y
+# CONFIG_MKSWAP is not set
+# CONFIG_FEATURE_MKSWAP_UUID is not set
+CONFIG_MORE=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_FAKE=y
+CONFIG_FEATURE_MOUNT_VERBOSE=y
+# CONFIG_FEATURE_MOUNT_HELPERS is not set
+CONFIG_FEATURE_MOUNT_LABEL=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+# CONFIG_PIVOT_ROOT is not set
+CONFIG_RDATE=y
+# CONFIG_RDEV is not set
+# CONFIG_READPROFILE is not set
+# CONFIG_RTCWAKE is not set
+# CONFIG_SCRIPT is not set
+# CONFIG_SCRIPTREPLAY is not set
+# CONFIG_SETARCH is not set
+# CONFIG_SWAPONOFF is not set
+# CONFIG_FEATURE_SWAPON_PRI is not set
+# CONFIG_SWITCH_ROOT is not set
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+# CONFIG_FEATURE_MOUNT_LOOP is not set
+# CONFIG_FEATURE_MOUNT_LOOP_CREATE is not set
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+CONFIG_VOLUMEID=y
+
+#
+# Filesystem/Volume identification
+#
+CONFIG_FEATURE_VOLUMEID_EXT=y
+# CONFIG_FEATURE_VOLUMEID_BTRFS is not set
+# CONFIG_FEATURE_VOLUMEID_REISERFS is not set
+CONFIG_FEATURE_VOLUMEID_FAT=y
+# CONFIG_FEATURE_VOLUMEID_HFS is not set
+# CONFIG_FEATURE_VOLUMEID_JFS is not set
+# CONFIG_FEATURE_VOLUMEID_XFS is not set
+CONFIG_FEATURE_VOLUMEID_NTFS=y
+# CONFIG_FEATURE_VOLUMEID_ISO9660 is not set
+# CONFIG_FEATURE_VOLUMEID_UDF is not set
+# CONFIG_FEATURE_VOLUMEID_LUKS is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXSWAP is not set
+CONFIG_FEATURE_VOLUMEID_CRAMFS=y
+# CONFIG_FEATURE_VOLUMEID_ROMFS is not set
+# CONFIG_FEATURE_VOLUMEID_SYSV is not set
+# CONFIG_FEATURE_VOLUMEID_OCFS2 is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXRAID is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_CONSPY is not set
+# CONFIG_LESS is not set
+CONFIG_FEATURE_LESS_MAXLINES=0
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+# CONFIG_FEATURE_LESS_REGEXP is not set
+# CONFIG_FEATURE_LESS_WINCH is not set
+# CONFIG_FEATURE_LESS_ASK_TERMINAL is not set
+# CONFIG_FEATURE_LESS_DASHCMD is not set
+# CONFIG_FEATURE_LESS_LINENUMS is not set
+CONFIG_NANDWRITE=y
+# CONFIG_NANDDUMP is not set
+CONFIG_SETSERIAL=y
+CONFIG_UBIATTACH=y
+CONFIG_UBIDETACH=y
+CONFIG_UBIMKVOL=y
+CONFIG_UBIRMVOL=y
+CONFIG_UBIRSVOL=y
+CONFIG_UBIUPDATEVOL=y
+CONFIG_ADJTIMEX=y
+# CONFIG_BBCONFIG is not set
+# CONFIG_FEATURE_COMPRESS_BBCONFIG is not set
+# CONFIG_BEEP is not set
+CONFIG_FEATURE_BEEP_FREQ=0
+CONFIG_FEATURE_BEEP_LENGTH_MS=0
+CONFIG_CHAT=y
+CONFIG_FEATURE_CHAT_NOFAIL=y
+# CONFIG_FEATURE_CHAT_TTY_HIFI is not set
+CONFIG_FEATURE_CHAT_IMPLICIT_CR=y
+CONFIG_FEATURE_CHAT_SWALLOW_OPTS=y
+CONFIG_FEATURE_CHAT_SEND_ESCAPES=y
+CONFIG_FEATURE_CHAT_VAR_ABORT_LEN=y
+CONFIG_FEATURE_CHAT_CLR_ABORT=y
+# CONFIG_CHRT is not set
+CONFIG_CROND=y
+CONFIG_FEATURE_CROND_D=y
+CONFIG_FEATURE_CROND_CALL_SENDMAIL=y
+CONFIG_FEATURE_CROND_DIR="/var/spool/cron"
+CONFIG_CRONTAB=y
+# CONFIG_DC is not set
+# CONFIG_FEATURE_DC_LIBM is not set
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_EJECT is not set
+# CONFIG_FEATURE_EJECT_SCSI is not set
+# CONFIG_FBSPLASH is not set
+CONFIG_FLASHCP=y
+CONFIG_FLASH_LOCK=y
+CONFIG_FLASH_UNLOCK=y
+CONFIG_FLASH_ERASEALL=y
+# CONFIG_IONICE is not set
+# CONFIG_INOTIFYD is not set
+# CONFIG_LAST is not set
+# CONFIG_FEATURE_LAST_SMALL is not set
+# CONFIG_FEATURE_LAST_FANCY is not set
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+# CONFIG_MAN is not set
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+# CONFIG_MT is not set
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+# CONFIG_RFKILL is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+# CONFIG_SETSID is not set
+# CONFIG_STRINGS is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TIMEOUT=y
+# CONFIG_TTYSIZE is not set
+# CONFIG_VOLNAME is not set
+# CONFIG_WALL is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_NAMEIF=y
+CONFIG_FEATURE_NAMEIF_EXTENDED=y
+# CONFIG_NBDCLIENT is not set
+CONFIG_NC=y
+CONFIG_NC_SERVER=y
+CONFIG_NC_EXTRA=y
+# CONFIG_NC_110_COMPAT is not set
+CONFIG_PING=y
+# CONFIG_PING6 is not set
+CONFIG_FEATURE_FANCY_PING=y
+# CONFIG_WHOIS is not set
+# CONFIG_FEATURE_IPV6 is not set
+# CONFIG_FEATURE_UNIX_LOCAL is not set
+# CONFIG_FEATURE_PREFER_IPV4_ADDRESS is not set
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_BRCTL=y
+CONFIG_FEATURE_BRCTL_FANCY=y
+CONFIG_FEATURE_BRCTL_SHOW=y
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPD=y
+CONFIG_FEATURE_FTP_WRITE=y
+CONFIG_FEATURE_FTPD_ACCEPT_BROKEN_LIST=y
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+# CONFIG_HTTPD is not set
+# CONFIG_FEATURE_HTTPD_RANGES is not set
+# CONFIG_FEATURE_HTTPD_USE_SENDFILE is not set
+# CONFIG_FEATURE_HTTPD_SETUID is not set
+# CONFIG_FEATURE_HTTPD_BASIC_AUTH is not set
+# CONFIG_FEATURE_HTTPD_AUTH_MD5 is not set
+# CONFIG_FEATURE_HTTPD_CGI is not set
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR is not set
+# CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV is not set
+# CONFIG_FEATURE_HTTPD_ENCODE_URL_STR is not set
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
+# CONFIG_FEATURE_HTTPD_PROXY is not set
+# CONFIG_FEATURE_HTTPD_GZIP is not set
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+CONFIG_FEATURE_IFCONFIG_SLIP=y
+CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ=y
+CONFIG_FEATURE_IFCONFIG_HW=y
+CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS=y
+CONFIG_IFENSLAVE=y
+CONFIG_IFPLUGD=y
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+CONFIG_FEATURE_IFUPDOWN_IP=y
+CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN=y
+# CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+# CONFIG_FEATURE_IFUPDOWN_IPV6 is not set
+CONFIG_FEATURE_IFUPDOWN_MAPPING=y
+# CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+CONFIG_IP=y
+CONFIG_FEATURE_IP_ADDRESS=y
+CONFIG_FEATURE_IP_LINK=y
+CONFIG_FEATURE_IP_ROUTE=y
+CONFIG_FEATURE_IP_TUNNEL=y
+CONFIG_FEATURE_IP_RULE=y
+CONFIG_FEATURE_IP_SHORT_FORMS=y
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+CONFIG_IPADDR=y
+CONFIG_IPLINK=y
+CONFIG_IPROUTE=y
+CONFIG_IPTUNNEL=y
+CONFIG_IPRULE=y
+CONFIG_IPCALC=y
+CONFIG_FEATURE_IPCALC_FANCY=y
+CONFIG_FEATURE_IPCALC_LONG_OPTIONS=y
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_FEATURE_NETSTAT_PRG=y
+# CONFIG_NSLOOKUP is not set
+# CONFIG_NTPD is not set
+# CONFIG_FEATURE_NTPD_SERVER is not set
+CONFIG_PSCAN=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TCPSVD=y
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_FEATURE_TELNETD_INETD_WAIT=y
+CONFIG_TFTP=y
+CONFIG_TFTPD=y
+
+#
+# Common options for tftp/tftpd
+#
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+CONFIG_FEATURE_TFTP_PROGRESS_BAR=y
+# CONFIG_TFTP_DEBUG is not set
+CONFIG_TRACEROUTE=y
+# CONFIG_TRACEROUTE6 is not set
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_TUNCTL=y
+CONFIG_FEATURE_TUNCTL_UG=y
+# CONFIG_UDHCPC6 is not set
+CONFIG_UDHCPD=y
+CONFIG_DHCPRELAY=y
+CONFIG_DUMPLEASES=y
+CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY=y
+# CONFIG_FEATURE_UDHCPD_BASE_IP_ON_MAC is not set
+CONFIG_DHCPD_LEASES_FILE="/var/lib/misc/udhcpd.leases"
+CONFIG_UDHCPC=y
+CONFIG_FEATURE_UDHCPC_ARPING=y
+CONFIG_FEATURE_UDHCP_PORT=y
+CONFIG_UDHCP_DEBUG=9
+CONFIG_FEATURE_UDHCP_RFC3397=y
+CONFIG_FEATURE_UDHCP_8021Q=y
+CONFIG_UDHCPC_DEFAULT_SCRIPT="/usr/share/udhcpc/default.script"
+CONFIG_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80
+CONFIG_IFUPDOWN_UDHCPC_CMD_OPTIONS="-R -n"
+CONFIG_UDPSVD=y
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+CONFIG_FEATURE_WGET_LONG_OPTIONS=y
+CONFIG_FEATURE_WGET_TIMEOUT=y
+# CONFIG_ZCIP is not set
+
+#
+# Print Utilities
+#
+# CONFIG_LPD is not set
+# CONFIG_LPR is not set
+# CONFIG_LPQ is not set
+
+#
+# Mail Utilities
+#
+# CONFIG_MAKEMIME is not set
+CONFIG_FEATURE_MIME_CHARSET=""
+# CONFIG_POPMAILDIR is not set
+# CONFIG_FEATURE_POPMAILDIR_DELIVERY is not set
+# CONFIG_REFORMIME is not set
+# CONFIG_FEATURE_REFORMIME_COMPAT is not set
+# CONFIG_SENDMAIL is not set
+
+#
+# Process Utilities
+#
+# CONFIG_IOSTAT is not set
+CONFIG_LSOF=y
+# CONFIG_MPSTAT is not set
+# CONFIG_NMETER is not set
+# CONFIG_PMAP is not set
+# CONFIG_POWERTOP is not set
+CONFIG_PSTREE=y
+CONFIG_PWDX=y
+# CONFIG_SMEMCAP is not set
+CONFIG_UPTIME=y
+CONFIG_FEATURE_UPTIME_UTMP_SUPPORT=y
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_FEATURE_PS_LONG=y
+# CONFIG_FEATURE_PS_TIME is not set
+# CONFIG_FEATURE_PS_ADDITIONAL_COLUMNS is not set
+# CONFIG_FEATURE_PS_UNUSUAL_SYSTEMS is not set
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_SMP_CPU=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOP_SMP_PROCESS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_FEATURE_SHOW_THREADS=y
+CONFIG_WATCH=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_FEATURE_RUNSVDIR_LOG is not set
+# CONFIG_SV is not set
+CONFIG_SV_DEFAULT_SERVICE_DIR=""
+CONFIG_SVLOGD=y
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+CONFIG_ENVDIR=y
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+# CONFIG_SESTATUS is not set
+
+#
+# Shells
+#
+CONFIG_ASH=y
+CONFIG_ASH_BASH_COMPAT=y
+# CONFIG_ASH_IDLE_TIMEOUT is not set
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_PRINTF=y
+CONFIG_ASH_BUILTIN_TEST=y
+CONFIG_ASH_CMDCMD=y
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+CONFIG_ASH_RANDOM_SUPPORT=y
+CONFIG_ASH_EXPAND_PRMT=y
+CONFIG_CTTYHACK=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_BASH_COMPAT is not set
+# CONFIG_HUSH_BRACE_EXPANSION is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_SAVEHISTORY is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_HUSH_CASE is not set
+# CONFIG_HUSH_FUNCTIONS is not set
+# CONFIG_HUSH_LOCAL is not set
+# CONFIG_HUSH_RANDOM_SUPPORT is not set
+# CONFIG_HUSH_EXPORT_N is not set
+# CONFIG_HUSH_MODE_X is not set
+# CONFIG_MSH is not set
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_FEATURE_BASH_IS_ASH=y
+# CONFIG_FEATURE_BASH_IS_HUSH is not set
+# CONFIG_FEATURE_BASH_IS_NONE is not set
+CONFIG_SH_MATH_SUPPORT=y
+CONFIG_SH_MATH_SUPPORT_64=y
+CONFIG_FEATURE_SH_EXTRA_QUIET=y
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_FEATURE_SH_NOFORK is not set
+CONFIG_FEATURE_SH_HISTFILESIZE=y
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+CONFIG_FEATURE_REMOTE_LOG=y
+CONFIG_FEATURE_SYSLOGD_DUP=y
+CONFIG_FEATURE_SYSLOGD_CFG=y
+CONFIG_FEATURE_SYSLOGD_READ_BUFFER_SIZE=256
+CONFIG_FEATURE_IPC_SYSLOG=y
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=16
+CONFIG_LOGREAD=y
+CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING=y
+CONFIG_KLOGD=y
+CONFIG_FEATURE_KLOGD_KLOGCTL=y
+CONFIG_LOGGER=y
diff --git a/ok6410/src/thirdparty/busybox/patch/busybox-1.20.2.config b/ok6410/src/thirdparty/busybox/patch/busybox-1.20.2.config
new file mode 100644
index 0000000..5a40f6e
--- /dev/null
+++ b/ok6410/src/thirdparty/busybox/patch/busybox-1.20.2.config
@@ -0,0 +1,1020 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.20.2
+# Tue Mar 12 15:01:45 2013
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_DESKTOP is not set
+# CONFIG_EXTRA_COMPAT is not set
+# CONFIG_INCLUDE_SUSv2 is not set
+# CONFIG_USE_PORTABLE_CODE is not set
+CONFIG_PLATFORM_LINUX=y
+CONFIG_FEATURE_BUFFERS_USE_MALLOC=y
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+CONFIG_FEATURE_COMPRESS_USAGE=y
+CONFIG_FEATURE_INSTALLER=y
+CONFIG_INSTALL_NO_USR=y
+# CONFIG_LOCALE_SUPPORT is not set
+# CONFIG_UNICODE_SUPPORT is not set
+# CONFIG_UNICODE_USING_LOCALE is not set
+# CONFIG_FEATURE_CHECK_UNICODE_IN_ENV is not set
+CONFIG_SUBST_WCHAR=0
+CONFIG_LAST_SUPPORTED_WCHAR=0
+# CONFIG_UNICODE_COMBINING_WCHARS is not set
+# CONFIG_UNICODE_WIDE_WCHARS is not set
+# CONFIG_UNICODE_BIDI_SUPPORT is not set
+# CONFIG_UNICODE_NEUTRAL_TABLE is not set
+# CONFIG_UNICODE_PRESERVE_BROKEN is not set
+CONFIG_LONG_OPTS=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_FEATURE_PIDFILE=y
+CONFIG_FEATURE_SUID=y
+CONFIG_FEATURE_SUID_CONFIG=y
+CONFIG_FEATURE_SUID_CONFIG_QUIET=y
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+# CONFIG_PIE is not set
+# CONFIG_NOMMU is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+# CONFIG_LFS is not set
+CONFIG_CROSS_COMPILER_PREFIX="/opt/buildroot-2012.08/arm1176jzfs/usr/bin/arm-linux-"
+CONFIG_SYSROOT=""
+CONFIG_EXTRA_CFLAGS=""
+CONFIG_EXTRA_LDFLAGS=""
+CONFIG_EXTRA_LDLIBS=""
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_PESSIMIZE is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+
+#
+# Installation Options ("make install" behavior)
+#
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/home/guowenxue/ok6410/src/systools/busybox/../../rootfs/rootfs_tree"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_FEATURE_SYSTEMD=y
+CONFIG_FEATURE_RTMINMAX=y
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SMALL=1
+CONFIG_FEATURE_FAST_TOP=y
+CONFIG_FEATURE_ETC_NETWORKS=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_VI=y
+CONFIG_FEATURE_EDITING_HISTORY=255
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+# CONFIG_FEATURE_EDITING_SAVE_ON_EXIT is not set
+CONFIG_FEATURE_REVERSE_SEARCH=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+# CONFIG_FEATURE_EDITING_ASK_TERMINAL is not set
+CONFIG_FEATURE_NON_POSIX_CP=y
+# CONFIG_FEATURE_VERBOSE_CP_MESSAGE is not set
+CONFIG_FEATURE_COPYBUF_KB=4
+CONFIG_FEATURE_SKIP_ROOTFS=y
+# CONFIG_MONOTONIC_SYSCALL is not set
+CONFIG_IOCTL_HEX2STR_ERROR=y
+# CONFIG_FEATURE_HWIB is not set
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_FEATURE_SEAMLESS_XZ=y
+# CONFIG_FEATURE_SEAMLESS_LZMA is not set
+CONFIG_FEATURE_SEAMLESS_BZ2=y
+CONFIG_FEATURE_SEAMLESS_GZ=y
+CONFIG_FEATURE_SEAMLESS_Z=y
+# CONFIG_AR is not set
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+# CONFIG_FEATURE_AR_CREATE is not set
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+# CONFIG_CPIO is not set
+# CONFIG_FEATURE_CPIO_O is not set
+# CONFIG_FEATURE_CPIO_P is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_GZIP=y
+CONFIG_FEATURE_GZIP_LONG_OPTIONS=y
+CONFIG_GZIP_FAST=0
+# CONFIG_LZOP is not set
+# CONFIG_LZOP_COMPR_HIGH is not set
+# CONFIG_RPM2CPIO is not set
+CONFIG_RPM=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_AUTODETECT=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_FEATURE_TAR_TO_COMMAND=y
+CONFIG_FEATURE_TAR_UNAME_GNAME=y
+CONFIG_FEATURE_TAR_NOPRESERVE_TIME=y
+# CONFIG_FEATURE_TAR_SELINUX is not set
+# CONFIG_UNCOMPRESS is not set
+# CONFIG_UNLZMA is not set
+# CONFIG_FEATURE_LZMA_FAST is not set
+# CONFIG_LZMA is not set
+# CONFIG_UNXZ is not set
+# CONFIG_XZ is not set
+CONFIG_UNZIP=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_FEATURE_DATE_NANO=y
+CONFIG_FEATURE_DATE_COMPAT=y
+# CONFIG_HOSTID is not set
+CONFIG_ID=y
+CONFIG_GROUPS=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_FEATURE_TOUCH_SUSV3=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_BASE64=y
+# CONFIG_WHO is not set
+CONFIG_USERS=y
+CONFIG_CAL=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_FEATURE_CHOWN_LONG_OPTIONS=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_FEATURE_CP_LONG_OPTIONS=y
+CONFIG_CUT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_THIRD_STATUS_LINE=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_FEATURE_DF_FANCY=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_FSYNC=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LN=y
+# CONFIG_LOGNAME is not set
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+# CONFIG_NOHUP is not set
+CONFIG_OD=y
+# CONFIG_PRINTENV is not set
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+# CONFIG_RMDIR is not set
+# CONFIG_FEATURE_RMDIR_LONG_OPTIONS is not set
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SHA256SUM=y
+CONFIG_SHA512SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_FEATURE_FLOAT_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+# CONFIG_TAC is not set
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+# CONFIG_TEE is not set
+# CONFIG_FEATURE_TEE_USE_BLOCK_IO is not set
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+# CONFIG_UUDECODE is not set
+# CONFIG_UUENCODE is not set
+# CONFIG_WC is not set
+# CONFIG_FEATURE_WC_LARGE is not set
+# CONFIG_WHOAMI is not set
+# CONFIG_YES is not set
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum, sha256sum, sha512sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+# CONFIG_CHVT is not set
+# CONFIG_FGCONSOLE is not set
+CONFIG_CLEAR=y
+# CONFIG_DEALLOCVT is not set
+# CONFIG_DUMPKMAP is not set
+# CONFIG_KBD_MODE is not set
+# CONFIG_LOADFONT is not set
+# CONFIG_LOADKMAP is not set
+# CONFIG_OPENVT is not set
+# CONFIG_RESET is not set
+# CONFIG_RESIZE is not set
+# CONFIG_FEATURE_RESIZE_PRINT is not set
+# CONFIG_SETCONSOLE is not set
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+# CONFIG_SETFONT is not set
+# CONFIG_FEATURE_SETFONT_TEXTUAL_MAP is not set
+CONFIG_DEFAULT_SETFONT_DIR=""
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+# CONFIG_SHOWKEY is not set
+# CONFIG_FEATURE_LOADFONT_PSF2 is not set
+# CONFIG_FEATURE_LOADFONT_RAW is not set
+
+#
+# Debian Utilities
+#
+# CONFIG_MKTEMP is not set
+# CONFIG_PIPE_PROGRESS is not set
+# CONFIG_RUN_PARTS is not set
+# CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS is not set
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+# CONFIG_START_STOP_DAEMON is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_FANCY is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set
+# CONFIG_WHICH is not set
+
+#
+# Editors
+#
+CONFIG_PATCH=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=4096
+# CONFIG_FEATURE_VI_8BIT is not set
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_REGEX_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_ASK_TERMINAL=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_LIBM=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_LONG_OPTIONS=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_ED is not set
+CONFIG_SED=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_FEATURE_FIND_LINKS=y
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+# CONFIG_BOOTCHARTD is not set
+# CONFIG_FEATURE_BOOTCHARTD_BLOATED_HEADER is not set
+# CONFIG_FEATURE_BOOTCHARTD_CONFIG_FILE is not set
+CONFIG_HALT=y
+# CONFIG_FEATURE_CALL_TELINIT is not set
+CONFIG_TELINIT_PATH=""
+CONFIG_INIT=y
+CONFIG_FEATURE_USE_INITTAB=y
+# CONFIG_FEATURE_KILL_REMOVED is not set
+CONFIG_FEATURE_KILL_DELAY=0
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+CONFIG_FEATURE_INIT_COREDUMPS=y
+CONFIG_FEATURE_INITRD=y
+CONFIG_INIT_TERMINAL_TYPE="linux"
+CONFIG_MESG=y
+CONFIG_FEATURE_MESG_ENABLE_ONLY_GROUP=y
+
+#
+# Login/Password Management Utilities
+#
+# CONFIG_ADD_SHELL is not set
+# CONFIG_REMOVE_SHELL is not set
+CONFIG_FEATURE_SHADOWPASSWDS=y
+CONFIG_USE_BB_PWD_GRP=y
+CONFIG_USE_BB_SHADOW=y
+CONFIG_USE_BB_CRYPT=y
+CONFIG_USE_BB_CRYPT_SHA=y
+CONFIG_ADDUSER=y
+CONFIG_FEATURE_ADDUSER_LONG_OPTIONS=y
+# CONFIG_FEATURE_CHECK_NAMES is not set
+CONFIG_FIRST_SYSTEM_ID=100
+CONFIG_LAST_SYSTEM_ID=999
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDGROUP_LONG_OPTIONS=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELUSER=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_GETTY=y
+CONFIG_LOGIN=y
+# CONFIG_LOGIN_SESSION_AS_CHILD is not set
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+CONFIG_CRYPTPW=y
+CONFIG_CHPASSWD=y
+CONFIG_FEATURE_DEFAULT_PASSWD_ALGO="md5"
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+# CONFIG_CHATTR is not set
+# CONFIG_FSCK is not set
+# CONFIG_LSATTR is not set
+# CONFIG_TUNE2FS is not set
+
+#
+# Linux Module Utilities
+#
+CONFIG_MODINFO=y
+CONFIG_MODPROBE_SMALL=y
+CONFIG_FEATURE_MODPROBE_SMALL_OPTIONS_ON_CMDLINE=y
+CONFIG_FEATURE_MODPROBE_SMALL_CHECK_ALREADY_LOADED=y
+# CONFIG_INSMOD is not set
+# CONFIG_RMMOD is not set
+# CONFIG_LSMOD is not set
+# CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT is not set
+# CONFIG_MODPROBE is not set
+# CONFIG_FEATURE_MODPROBE_BLACKLIST is not set
+# CONFIG_DEPMOD is not set
+
+#
+# Options common to multiple modutils
+#
+# CONFIG_FEATURE_2_4_MODULES is not set
+# CONFIG_FEATURE_INSMOD_TRY_MMAP is not set
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+# CONFIG_FEATURE_CHECK_TAINTED_MODULE is not set
+# CONFIG_FEATURE_MODUTILS_ALIAS is not set
+# CONFIG_FEATURE_MODUTILS_SYMBOLS is not set
+CONFIG_DEFAULT_MODULES_DIR="/lib/modules"
+CONFIG_DEFAULT_DEPMOD_FILE="modules.dep"
+
+#
+# Linux System Utilities
+#
+# CONFIG_BLOCKDEV is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_RENAME=y
+CONFIG_FEATURE_MDEV_RENAME_REGEXP=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+# CONFIG_REV is not set
+# CONFIG_ACPID is not set
+# CONFIG_FEATURE_ACPID_COMPAT is not set
+# CONFIG_BLKID is not set
+# CONFIG_FEATURE_BLKID_TYPE is not set
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+# CONFIG_FDFORMAT is not set
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+# CONFIG_FEATURE_FDISK_WRITABLE is not set
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_GPT_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FINDFS is not set
+CONFIG_FLOCK=y
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_EXT2 is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+# CONFIG_MKFS_REISER is not set
+# CONFIG_MKFS_VFAT is not set
+CONFIG_GETOPT=y
+CONFIG_FEATURE_GETOPT_LONG=y
+CONFIG_HEXDUMP=y
+CONFIG_FEATURE_HEXDUMP_REVERSE=y
+CONFIG_HD=y
+CONFIG_HWCLOCK=y
+CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS=y
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+# CONFIG_LOSETUP is not set
+# CONFIG_LSPCI is not set
+CONFIG_LSUSB=y
+# CONFIG_MKSWAP is not set
+# CONFIG_FEATURE_MKSWAP_UUID is not set
+CONFIG_MORE=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_FAKE=y
+CONFIG_FEATURE_MOUNT_VERBOSE=y
+# CONFIG_FEATURE_MOUNT_HELPERS is not set
+CONFIG_FEATURE_MOUNT_LABEL=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+# CONFIG_PIVOT_ROOT is not set
+CONFIG_RDATE=y
+# CONFIG_RDEV is not set
+# CONFIG_READPROFILE is not set
+# CONFIG_RTCWAKE is not set
+# CONFIG_SCRIPT is not set
+# CONFIG_SCRIPTREPLAY is not set
+# CONFIG_SETARCH is not set
+# CONFIG_SWAPONOFF is not set
+# CONFIG_FEATURE_SWAPON_PRI is not set
+# CONFIG_SWITCH_ROOT is not set
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+# CONFIG_FEATURE_MOUNT_LOOP is not set
+# CONFIG_FEATURE_MOUNT_LOOP_CREATE is not set
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+CONFIG_VOLUMEID=y
+
+#
+# Filesystem/Volume identification
+#
+CONFIG_FEATURE_VOLUMEID_EXT=y
+# CONFIG_FEATURE_VOLUMEID_BTRFS is not set
+# CONFIG_FEATURE_VOLUMEID_REISERFS is not set
+CONFIG_FEATURE_VOLUMEID_FAT=y
+# CONFIG_FEATURE_VOLUMEID_HFS is not set
+# CONFIG_FEATURE_VOLUMEID_JFS is not set
+# CONFIG_FEATURE_VOLUMEID_XFS is not set
+CONFIG_FEATURE_VOLUMEID_NTFS=y
+# CONFIG_FEATURE_VOLUMEID_ISO9660 is not set
+# CONFIG_FEATURE_VOLUMEID_UDF is not set
+# CONFIG_FEATURE_VOLUMEID_LUKS is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXSWAP is not set
+CONFIG_FEATURE_VOLUMEID_CRAMFS=y
+# CONFIG_FEATURE_VOLUMEID_ROMFS is not set
+# CONFIG_FEATURE_VOLUMEID_SYSV is not set
+# CONFIG_FEATURE_VOLUMEID_OCFS2 is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXRAID is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_CONSPY is not set
+# CONFIG_LESS is not set
+CONFIG_FEATURE_LESS_MAXLINES=0
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+# CONFIG_FEATURE_LESS_REGEXP is not set
+# CONFIG_FEATURE_LESS_WINCH is not set
+# CONFIG_FEATURE_LESS_ASK_TERMINAL is not set
+# CONFIG_FEATURE_LESS_DASHCMD is not set
+# CONFIG_FEATURE_LESS_LINENUMS is not set
+CONFIG_NANDWRITE=y
+# CONFIG_NANDDUMP is not set
+CONFIG_SETSERIAL=y
+CONFIG_UBIATTACH=y
+CONFIG_UBIDETACH=y
+CONFIG_UBIMKVOL=y
+CONFIG_UBIRMVOL=y
+CONFIG_UBIRSVOL=y
+CONFIG_UBIUPDATEVOL=y
+CONFIG_ADJTIMEX=y
+# CONFIG_BBCONFIG is not set
+# CONFIG_FEATURE_COMPRESS_BBCONFIG is not set
+# CONFIG_BEEP is not set
+CONFIG_FEATURE_BEEP_FREQ=0
+CONFIG_FEATURE_BEEP_LENGTH_MS=0
+CONFIG_CHAT=y
+CONFIG_FEATURE_CHAT_NOFAIL=y
+# CONFIG_FEATURE_CHAT_TTY_HIFI is not set
+CONFIG_FEATURE_CHAT_IMPLICIT_CR=y
+CONFIG_FEATURE_CHAT_SWALLOW_OPTS=y
+CONFIG_FEATURE_CHAT_SEND_ESCAPES=y
+CONFIG_FEATURE_CHAT_VAR_ABORT_LEN=y
+CONFIG_FEATURE_CHAT_CLR_ABORT=y
+# CONFIG_CHRT is not set
+CONFIG_CROND=y
+CONFIG_FEATURE_CROND_D=y
+CONFIG_FEATURE_CROND_CALL_SENDMAIL=y
+CONFIG_FEATURE_CROND_DIR="/var/spool/cron"
+CONFIG_CRONTAB=y
+# CONFIG_DC is not set
+# CONFIG_FEATURE_DC_LIBM is not set
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_EJECT is not set
+# CONFIG_FEATURE_EJECT_SCSI is not set
+# CONFIG_FBSPLASH is not set
+CONFIG_FLASHCP=y
+CONFIG_FLASH_LOCK=y
+CONFIG_FLASH_UNLOCK=y
+CONFIG_FLASH_ERASEALL=y
+# CONFIG_IONICE is not set
+# CONFIG_INOTIFYD is not set
+# CONFIG_LAST is not set
+# CONFIG_FEATURE_LAST_SMALL is not set
+# CONFIG_FEATURE_LAST_FANCY is not set
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+# CONFIG_MAN is not set
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+# CONFIG_MT is not set
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+# CONFIG_RFKILL is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+# CONFIG_SETSID is not set
+# CONFIG_STRINGS is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TIMEOUT=y
+# CONFIG_TTYSIZE is not set
+# CONFIG_VOLNAME is not set
+# CONFIG_WALL is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_NAMEIF=y
+CONFIG_FEATURE_NAMEIF_EXTENDED=y
+# CONFIG_NBDCLIENT is not set
+CONFIG_NC=y
+CONFIG_NC_SERVER=y
+CONFIG_NC_EXTRA=y
+# CONFIG_NC_110_COMPAT is not set
+CONFIG_PING=y
+# CONFIG_PING6 is not set
+CONFIG_FEATURE_FANCY_PING=y
+# CONFIG_WHOIS is not set
+# CONFIG_FEATURE_IPV6 is not set
+# CONFIG_FEATURE_UNIX_LOCAL is not set
+# CONFIG_FEATURE_PREFER_IPV4_ADDRESS is not set
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_BRCTL=y
+CONFIG_FEATURE_BRCTL_FANCY=y
+CONFIG_FEATURE_BRCTL_SHOW=y
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPD=y
+CONFIG_FEATURE_FTP_WRITE=y
+CONFIG_FEATURE_FTPD_ACCEPT_BROKEN_LIST=y
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+# CONFIG_HTTPD is not set
+# CONFIG_FEATURE_HTTPD_RANGES is not set
+# CONFIG_FEATURE_HTTPD_USE_SENDFILE is not set
+# CONFIG_FEATURE_HTTPD_SETUID is not set
+# CONFIG_FEATURE_HTTPD_BASIC_AUTH is not set
+# CONFIG_FEATURE_HTTPD_AUTH_MD5 is not set
+# CONFIG_FEATURE_HTTPD_CGI is not set
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR is not set
+# CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV is not set
+# CONFIG_FEATURE_HTTPD_ENCODE_URL_STR is not set
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
+# CONFIG_FEATURE_HTTPD_PROXY is not set
+# CONFIG_FEATURE_HTTPD_GZIP is not set
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+CONFIG_FEATURE_IFCONFIG_SLIP=y
+CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ=y
+CONFIG_FEATURE_IFCONFIG_HW=y
+CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS=y
+CONFIG_IFENSLAVE=y
+CONFIG_IFPLUGD=y
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+CONFIG_FEATURE_IFUPDOWN_IP=y
+CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN=y
+# CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+# CONFIG_FEATURE_IFUPDOWN_IPV6 is not set
+CONFIG_FEATURE_IFUPDOWN_MAPPING=y
+# CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+CONFIG_IP=y
+CONFIG_FEATURE_IP_ADDRESS=y
+CONFIG_FEATURE_IP_LINK=y
+CONFIG_FEATURE_IP_ROUTE=y
+CONFIG_FEATURE_IP_TUNNEL=y
+CONFIG_FEATURE_IP_RULE=y
+CONFIG_FEATURE_IP_SHORT_FORMS=y
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+CONFIG_IPADDR=y
+CONFIG_IPLINK=y
+CONFIG_IPROUTE=y
+CONFIG_IPTUNNEL=y
+CONFIG_IPRULE=y
+CONFIG_IPCALC=y
+CONFIG_FEATURE_IPCALC_FANCY=y
+CONFIG_FEATURE_IPCALC_LONG_OPTIONS=y
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_FEATURE_NETSTAT_PRG=y
+# CONFIG_NSLOOKUP is not set
+# CONFIG_NTPD is not set
+# CONFIG_FEATURE_NTPD_SERVER is not set
+CONFIG_PSCAN=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TCPSVD=y
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_FEATURE_TELNETD_INETD_WAIT=y
+CONFIG_TFTP=y
+CONFIG_TFTPD=y
+
+#
+# Common options for tftp/tftpd
+#
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+CONFIG_FEATURE_TFTP_PROGRESS_BAR=y
+# CONFIG_TFTP_DEBUG is not set
+CONFIG_TRACEROUTE=y
+# CONFIG_TRACEROUTE6 is not set
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_TUNCTL=y
+CONFIG_FEATURE_TUNCTL_UG=y
+# CONFIG_UDHCPC6 is not set
+CONFIG_UDHCPD=y
+CONFIG_DHCPRELAY=y
+CONFIG_DUMPLEASES=y
+CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY=y
+# CONFIG_FEATURE_UDHCPD_BASE_IP_ON_MAC is not set
+CONFIG_DHCPD_LEASES_FILE="/var/lib/misc/udhcpd.leases"
+CONFIG_UDHCPC=y
+CONFIG_FEATURE_UDHCPC_ARPING=y
+CONFIG_FEATURE_UDHCP_PORT=y
+CONFIG_UDHCP_DEBUG=9
+CONFIG_FEATURE_UDHCP_RFC3397=y
+CONFIG_FEATURE_UDHCP_8021Q=y
+CONFIG_UDHCPC_DEFAULT_SCRIPT="/usr/share/udhcpc/default.script"
+CONFIG_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80
+CONFIG_IFUPDOWN_UDHCPC_CMD_OPTIONS="-R -n"
+CONFIG_UDPSVD=y
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+CONFIG_FEATURE_WGET_LONG_OPTIONS=y
+CONFIG_FEATURE_WGET_TIMEOUT=y
+# CONFIG_ZCIP is not set
+
+#
+# Print Utilities
+#
+# CONFIG_LPD is not set
+# CONFIG_LPR is not set
+# CONFIG_LPQ is not set
+
+#
+# Mail Utilities
+#
+# CONFIG_MAKEMIME is not set
+CONFIG_FEATURE_MIME_CHARSET=""
+# CONFIG_POPMAILDIR is not set
+# CONFIG_FEATURE_POPMAILDIR_DELIVERY is not set
+# CONFIG_REFORMIME is not set
+# CONFIG_FEATURE_REFORMIME_COMPAT is not set
+# CONFIG_SENDMAIL is not set
+
+#
+# Process Utilities
+#
+# CONFIG_IOSTAT is not set
+CONFIG_LSOF=y
+# CONFIG_MPSTAT is not set
+# CONFIG_NMETER is not set
+# CONFIG_PMAP is not set
+# CONFIG_POWERTOP is not set
+CONFIG_PSTREE=y
+CONFIG_PWDX=y
+# CONFIG_SMEMCAP is not set
+CONFIG_UPTIME=y
+CONFIG_FEATURE_UPTIME_UTMP_SUPPORT=y
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_FEATURE_PS_LONG=y
+# CONFIG_FEATURE_PS_TIME is not set
+# CONFIG_FEATURE_PS_ADDITIONAL_COLUMNS is not set
+# CONFIG_FEATURE_PS_UNUSUAL_SYSTEMS is not set
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_SMP_CPU=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOP_SMP_PROCESS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_FEATURE_SHOW_THREADS=y
+CONFIG_WATCH=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_FEATURE_RUNSVDIR_LOG is not set
+# CONFIG_SV is not set
+CONFIG_SV_DEFAULT_SERVICE_DIR=""
+CONFIG_SVLOGD=y
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+CONFIG_ENVDIR=y
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+# CONFIG_SESTATUS is not set
+
+#
+# Shells
+#
+CONFIG_ASH=y
+CONFIG_ASH_BASH_COMPAT=y
+# CONFIG_ASH_IDLE_TIMEOUT is not set
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_PRINTF=y
+CONFIG_ASH_BUILTIN_TEST=y
+CONFIG_ASH_CMDCMD=y
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+CONFIG_ASH_RANDOM_SUPPORT=y
+CONFIG_ASH_EXPAND_PRMT=y
+CONFIG_CTTYHACK=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_BASH_COMPAT is not set
+# CONFIG_HUSH_BRACE_EXPANSION is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_SAVEHISTORY is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_HUSH_CASE is not set
+# CONFIG_HUSH_FUNCTIONS is not set
+# CONFIG_HUSH_LOCAL is not set
+# CONFIG_HUSH_RANDOM_SUPPORT is not set
+# CONFIG_HUSH_EXPORT_N is not set
+# CONFIG_HUSH_MODE_X is not set
+# CONFIG_MSH is not set
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_FEATURE_BASH_IS_ASH=y
+# CONFIG_FEATURE_BASH_IS_HUSH is not set
+# CONFIG_FEATURE_BASH_IS_NONE is not set
+CONFIG_SH_MATH_SUPPORT=y
+CONFIG_SH_MATH_SUPPORT_64=y
+CONFIG_FEATURE_SH_EXTRA_QUIET=y
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_FEATURE_SH_NOFORK is not set
+CONFIG_FEATURE_SH_HISTFILESIZE=y
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+CONFIG_FEATURE_REMOTE_LOG=y
+CONFIG_FEATURE_SYSLOGD_DUP=y
+CONFIG_FEATURE_SYSLOGD_CFG=y
+CONFIG_FEATURE_SYSLOGD_READ_BUFFER_SIZE=256
+CONFIG_FEATURE_IPC_SYSLOG=y
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=16
+CONFIG_LOGREAD=y
+CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING=y
+CONFIG_KLOGD=y
+CONFIG_FEATURE_KLOGD_KLOGCTL=y
+CONFIG_LOGGER=y
diff --git a/ok6410/src/thirdparty/curl/build.sh b/ok6410/src/thirdparty/curl/build.sh
new file mode 100644
index 0000000..be16e3d
--- /dev/null
+++ b/ok6410/src/thirdparty/curl/build.sh
@@ -0,0 +1,85 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download curl source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=curl
+DIR_NAME=curl-7.19.7
+PACK_SUFIX="tar.bz2"
+DL_ADDR=http://curl.haxx.se/download/${DIR_NAME}.$PACK_SUFIX
+INST_PATH=/tftp
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+OPENSSL_PATH=/apps/${ARCH}/openssl
+
+if [ ! -d ${OPENSSL_PATH}/lib ] ; then
+ cd ../openssl
+ sh build.sh
+ cd -
+fi
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure ${CONFIG_CROSS} --prefix=${PREFIX_PATH} ${CONFIG_LD_STATUS} --with-random=/dev/urandom \
+ --disable-largefile --enable-debug --enable-curldebug --disable-optimize \
+ --enable-http --enable-ftp --disable-file --disable-file --disable-ldap --disable-ldaps --disable-proxy \
+ --disable-dict --disable-telnet --disable-tftp --disable-manual --disable-ipv6 -disable-thread --disable-ares \
+ --enable-verbose --disable-sspi -enable-crypto-auth --disable-cookies --disable-hidden-symbols --disable-soname-bump \
+ --without-krb4 --without-spnego --without-gssapi --with-ssl=${OPENSSL_PATH} --without-zlib --without-gnutls \
+ --without-nss --without-ca-bundle --without-libssh2 --without-libidn
+
+ make && make install
+
+ ${STRIP} $PREFIX_PATH/bin/*
+ file $PREFIX_PATH/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp -f $PREFIX_PATH/bin/${APP_NAME} $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/dhcp/build.sh b/ok6410/src/thirdparty/dhcp/build.sh
new file mode 100755
index 0000000..93e8636
--- /dev/null
+++ b/ok6410/src/thirdparty/dhcp/build.sh
@@ -0,0 +1,85 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download dhcp source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=dhcp
+DIR_NAME="dhcp-4.0.3"
+PACK_SUFIX="tar.gz"
+DL_ADDR="ftp://ftp.isc.org/isc/dhcp/$DIR_NAME.$PACK_SUFIX"
+#DL_ADDR="ftp://ftp.isc.org/isc/dhcp/4.2.3/$DIR_NAME.$PACK_SUFIX"
+
+PRJ_PATH=`pwd`
+INST_PATH=${PRJ_PATH}/../mnt/usr/sbin/
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--disable-shared --enable-static'
+else
+ CONFIG_LD_STATUS='--enable-shared --disable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+
+cd $DIR_NAME
+ set -x
+ echo "ac_cv_file__dev_random=yes" > linux.cache
+ ./configure --prefix=$PREFIX_PATH CC=${CROSS}gcc ${CONFIG_CROSS} \
+ --cache-file=linux.cache -with-srv-lease-file=/tmp/dhcpd.leases \
+ --with-srv-pid-file=/var/run/dhcpd.pid --with-relay-pid-file=/var/run/dhcrelay.pid
+ make
+ rm -f linux.cache
+
+ make install
+
+ ${STRIP} $PREFIX_PATH/sbin/*
+ file $PREFIX_PATH/sbin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/sbin/dhcpd $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+
+cd -
+
diff --git a/ok6410/src/thirdparty/dropbear/build.sh b/ok6410/src/thirdparty/dropbear/build.sh
new file mode 100755
index 0000000..d7d48b7
--- /dev/null
+++ b/ok6410/src/thirdparty/dropbear/build.sh
@@ -0,0 +1,79 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download dropbear source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=dropbear
+#DIR_NAME="dropbear-0.53"
+DIR_NAME="dropbear-2013.56"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="http://matt.ucc.asn.au/dropbear/releases/$DIR_NAME.$PACK_SUFIX"
+
+INST_PATH=`pwd`/../mnt/usr/sbin/
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--disable-shared --enable-static'
+else
+ CONFIG_LD_STATUS='--enable-shared --disable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH CC=${CROSS}gcc ${CONFIG_CROSS} --disable-zlib
+ make && make scp
+
+ find -name dbclient -exec mv '{}' ssh \;
+ cp dropbear ssh scp $PREFIX_PATH
+
+ $STRIP $PREFIX_PATH/*
+ file $PREFIX_PATH/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/dropbear $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+
+cd -
+
diff --git a/ok6410/src/thirdparty/ethtool/build.sh b/ok6410/src/thirdparty/ethtool/build.sh
new file mode 100755
index 0000000..f79c179
--- /dev/null
+++ b/ok6410/src/thirdparty/ethtool/build.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download ethtool source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=ethtool
+DIR_NAME="ethtool-2.6.36"
+PACK_SUFIX="tar.gz"
+#Official web site: http://sourceforge.net/projects/gkernel/files/ethtool/
+DL_ADDR="http://nchc.dl.sourceforge.net/project/gkernel/ethtool/2.6.36/$DIR_NAME.$PACK_SUFIX"
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--disable-shared --enable-static'
+else
+ CONFIG_LD_STATUS='--enable-shared --disable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure ${CONFIG_CROSS} $CONFIG_LD_STATUS --prefix=$PREFIX_PATH
+ make && make install
+ $STRIP ${PREFIX_PATH}/sbin/*
+ file ${PREFIX_PATH}/sbin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp ${PREFIX_PATH}/sbin/ethtool $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/file/build.sh b/ok6410/src/thirdparty/file/build.sh
new file mode 100755
index 0000000..47e37ee
--- /dev/null
+++ b/ok6410/src/thirdparty/file/build.sh
@@ -0,0 +1,78 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download file source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+# CentOS 6.0 use file-5.04, so we should cross compile 5.04 for ARM too, for make magic file depends on it.
+APP_NAME=file
+DIR_NAME="file-5.04"
+PACK_SUFIX="tar.gz"
+DL_ADDR="ftp://ftp.astron.com/pub/file/$DIR_NAME.$PACK_SUFIX"
+INST_PATH=`pwd`/../mnt/usr/bin/
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--disable-shared --enable-static'
+else
+ CONFIG_LD_STATUS='--enable-shared --disable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS}
+ line=`sed -n '/const char \*magicfile = /=' src/file.c `
+ sed -i -e ${line}s"|.*|\tconst char \*magicfile = \"/usr/share/magic\";|" src/file.c
+ make && make install
+ cp /usr/share/magic $PREFIX_PATH/share
+
+ $STRIP ${PREFIX_PATH}/bin/*
+ file ${PREFIX_PATH}/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp ${PREFIX_PATH}/bin/* $INST_PATH
+ #cp $PREFIX_PATH/magic ${PRJ_PATH}
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/gmp/build.sh b/ok6410/src/thirdparty/gmp/build.sh
new file mode 100755
index 0000000..29636d8
--- /dev/null
+++ b/ok6410/src/thirdparty/gmp/build.sh
@@ -0,0 +1,64 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download libgmp library source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=gmp
+DIR_NAME="gmp-5.1.1"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="ftp://ftp.gmplib.org/pub/${DIR_NAME}/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS}
+ make && make install
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/iptables/build.sh b/ok6410/src/thirdparty/iptables/build.sh
new file mode 100755
index 0000000..7d7d584
--- /dev/null
+++ b/ok6410/src/thirdparty/iptables/build.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download iptables source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=iptables
+DIR_NAME="iptables-1.4.12.2"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="http://www.netfilter.org/projects/iptables/files/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS} \
+ --disable-ipv6 --disable-largefile
+ make && make install
+
+ $STRIP $PREFIX_PATH/sbin/xtables-multi
+ file $PREFIX_PATH/sbin/xtables-multi
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/sbin/xtables-multi $INST_PATH/iptables
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/libconfig/build.sh b/ok6410/src/thirdparty/libconfig/build.sh
new file mode 100755
index 0000000..5daea40
--- /dev/null
+++ b/ok6410/src/thirdparty/libconfig/build.sh
@@ -0,0 +1,65 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download libconfig library source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=libconfig
+DIR_NAME="libconfig-1.4.8"
+PACK_SUFIX="tar.gz"
+DL_ADDR="http://www.hyperrealm.com/libconfig/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ CONFIG_LD_STATUS='--enable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS}
+ make && make install
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/lib/*.so* $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/lrzsz/build.sh b/ok6410/src/thirdparty/lrzsz/build.sh
new file mode 100755
index 0000000..c26f366
--- /dev/null
+++ b/ok6410/src/thirdparty/lrzsz/build.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download lrzsz source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=lrzsz
+DIR_NAME="lrzsz-0.12.20"
+PACK_SUFIX="tar.gz"
+DL_ADDR="http://www.ohse.de/uwe/releases/$DIR_NAME.$PACK_SUFIX"
+INST_PATH=`pwd`/../mnt/usr/bin/
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS}
+ make && make install
+
+ ${STRIP} $PREFIX_PATH/bin/*
+ file $PREFIX_PATH/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/lrz $INST_PATH
+ cp $PREFIX_PATH/lsz $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/ntp/build.sh b/ok6410/src/thirdparty/ntp/build.sh
new file mode 100755
index 0000000..bcd9303
--- /dev/null
+++ b/ok6410/src/thirdparty/ntp/build.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download ntp source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=ntp
+DIR_NAME="ntp-4.2.6p5"
+PACK_SUFIX="tar.gz"
+DL_ADDR="http://www.eecis.udel.edu/~ntp/ntp_spool/ntp4/ntp-4.2/$DIR_NAME.$PACK_SUFIX"
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS} \
+ --disable-ipv6 --disable-tickadj --disable-tick --disable-ntp-signd
+ make && make install
+
+ ${STRIP} $PREFIX_PATH/bin/*
+ file $PREFIX_PATH/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/ntpd $INST_PATH
+ cp $PREFIX_PATH/ntpdate $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/openssl/build.sh b/ok6410/src/thirdparty/openssl/build.sh
new file mode 100755
index 0000000..2479946
--- /dev/null
+++ b/ok6410/src/thirdparty/openssl/build.sh
@@ -0,0 +1,117 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download openssl source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=openssl
+DIR_NAME="openssl-1.0.1c"
+PACK_SUFIX="tar.gz"
+DL_ADDR="http://www.openssl.org/source/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export LDFLAGS=-static
+fi
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+
+ #Modify the compiler
+ FILE=Makefile
+ line=`sed -n '/^CC= cc/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|CC = ${CROSS}gcc|" $FILE
+ fi
+
+ line=`sed -n '/^AR=/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|AR = ${CROSS}ar \$(ARFLAGS) r|" $FILE
+ fi
+
+ line=`sed -n '/^RANLIB= /=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|RANLIB = ${CROSS}ranlib|" $FILE
+ fi
+
+ #Support build shared library
+ line=`sed -n '/^OPTIONS= /=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|OPTIONS=no-ec_nistp_64_gcc_128 no-gmp no-jpake no-krb5 no-md2 no-rc5 no-rfc3779 no-sctp enalbe-shared no-store no-zlib no-zlib-dynamic static-engine|" $FILE
+ fi
+
+
+ line=`sed -n '/^SHLIB_EXT=/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|SHLIB_EXT=.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)|" $FILE
+ fi
+
+ line=`sed -n '/^SHLIB_TARGET/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|SHLIB_TARGET=linux-shared|" $FILE
+ fi
+
+ line=`sed -n '/^build_all:/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|build_all: build_libs build_apps build_tests build_tools build-shared|" $FILE
+ fi
+
+ #Modify install path
+ line=`sed -n '/^INSTALLTOP=/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|INSTALLTOP = $PREFIX_PATH|" $FILE
+ fi
+
+ line=`sed -n '/^OPENSSLDIR=/=' $FILE`
+ if [ -n "$line" ] ; then
+ sed -i -e ${line}s"|.*|OPENSSLDIR = $PREFIX_PATH|" $FILE
+ fi
+
+ make && make install
+ cp -af *.so* $PREFIX_PATH/lib
+ $STRIP $PREFIX_PATH/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/lib/*.so* $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/openswan/build-x86.sh b/ok6410/src/thirdparty/openswan/build-x86.sh
new file mode 100644
index 0000000..44cf51b
--- /dev/null
+++ b/ok6410/src/thirdparty/openswan/build-x86.sh
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+sudo yum install -y openssl* gmp*
+wget https://nodeload.github.com/xelerance/Openswan/zip/v3.0.14
+mv v3.0.14 Openswan-v3.0.14.zip
+unzip Openswan-v3.0.14.zip
+cd Openswan-3.0.14/
+sh buildlin.sh
+
diff --git a/ok6410/src/thirdparty/openswan/build.sh b/ok6410/src/thirdparty/openswan/build.sh
new file mode 100644
index 0000000..2a3ac55
--- /dev/null
+++ b/ok6410/src/thirdparty/openswan/build.sh
@@ -0,0 +1,77 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download openswan source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2011.12.23
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+APP_NAME=openswan
+DIR_NAME=Openswan-3.0.14
+PACK_SUFIX="zip"
+DL_ADDR=https://nodeload.github.com/xelerance/Openswan/zip/v3.0.14
+
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+
+set_crosstool $CROSS
+
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+INST_PREFIX=/apps/$ARCH/
+PREFIX_PATH=${INST_PREFIX}/${APP_NAME}
+GMP_LIB_PATH=${INST_PREFIX}/gmp/lib
+GMP_INC_PATH=${INST_PREFIX}/gmp/include
+OPENSSL_LIB_PATH=${INST_PREFIX}/openssl/lib
+OPENSSL_INC_PATH=${INST_PREFIX}/openssl/include
+
+#Check GMP dependency
+if [ ! -d ${GMP_LIB_PATH} ] ; then
+ echo "${GMP_LIB_PATH} doesn't exist, cross compile GMP"
+ cd ../gmp
+ sh build.sh
+ cd -
+fi
+
+#Check Openssl dependency
+if [ ! -d ${OPENSSL_LIB_PATH} ] ; then
+ cd ../openssl
+ sh build.sh
+ cd -
+fi
+
+export CFLAGS="-I${OPENSSL_INC_PATH} --static"
+export C_INCLUDE_PATH=${GMP_INC_PATH}
+export LDFLAGS="-L${GMP_LIB_PATH} -L${OPENSSL_LIB_PATH} -static"
+
+export ARCH=arm
+export KERNELSRC=/home/guowenxue/stac.1/src/kernel/linux-3.4/
+export DESTDIR=${PREFIX_PATH}
+
+#Prepare OpenSwan source code
+if [ ! -f ${DIR_NAME}.$PACK_SUFIX ] ; then
+ wget https://nodeload.github.com/xelerance/Openswan/zip/v3.0.14 -O ${DIR_NAME}.${PACK_SUFIX}
+fi
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+cd ${DIR_NAME}
+make programs install
+
+${STRIP} ${DESTDIR}/usr/local/libexec/ipsec/*
+
diff --git a/ok6410/src/thirdparty/php/build.sh b/ok6410/src/thirdparty/php/build.sh
new file mode 100755
index 0000000..0efe9e1
--- /dev/null
+++ b/ok6410/src/thirdparty/php/build.sh
@@ -0,0 +1,78 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download libconfig library source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=php
+DIR_NAME="php-5.3.17"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="http://cn.php.net/distributions/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ CONFIG_LD_STATUS='--enable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+
+ line=`sed -n '/Your system seems to lack POSIX threads/=' configure`
+ sed -i -e ${line}s'|.*|{ echo "configure: error: Your system seems to lack POSIX threads." 1>\&2;}|' configure
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} --disable-rpath \
+ --disable-cli --enable-bcmath --enable-calendar --enable-maintainer-zts \
+ --enable-embed=shared --enable-force-cgi-redirect --enable-ftp \
+ --enable-inline-optimization --enable-magic-quotes --enable-memory-limit \
+ --enable-safe-mode --enable-sockets --enable-track-vars --enable-trans-sid \
+ --enable-wddx --sysconfdir=/etc/appWeb --with-pic --with-exec-dir=/etc/appWeb/exec \
+ --with-db --with-regex=system --with-pear --without-zlib --without-iconv \
+ --disable-dom --disable-libxml --disable-simplexml --disable-xml --disable-wddx \
+ --disable-xmlreader --without-xmlrpc --disable-xmlwriter
+ make && make install
+
+ $STRIP $PREFIX_PATH/lib/*.so*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH/lib/*.so* $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/pppd/build.sh b/ok6410/src/thirdparty/pppd/build.sh
new file mode 100755
index 0000000..646e47e
--- /dev/null
+++ b/ok6410/src/thirdparty/pppd/build.sh
@@ -0,0 +1,77 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download pppd source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=pppd
+DIR_NAME="ppp-2.4.5"
+PACK_SUFIX="tar.gz"
+DL_ADDR="ftp://ftp.samba.org/pub/ppp/$DIR_NAME.$PACK_SUFIX"
+INST_PATH=`pwd`/../mnt/usr/sbin/
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ patch -p1 < ../patch/$DIR_NAME.patch
+ cd pppd
+ make -f Makefile.linux
+ cd -
+ cd chat
+ make -f Makefile.linux
+ cd -
+
+ cp pppd/pppd chat/chat $PREFIX_PATH
+ $STRIP $PREFIX_PATH/*
+ file $PREFIX_PATH/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/pppd/patch/ppp-2.4.5.patch b/ok6410/src/thirdparty/pppd/patch/ppp-2.4.5.patch
new file mode 100644
index 0000000..fd8e1d6
--- /dev/null
+++ b/ok6410/src/thirdparty/pppd/patch/ppp-2.4.5.patch
@@ -0,0 +1,79 @@
+diff -Nuar ppp-2.4.5/chat/chat.c ppp-2.4.5-new/chat/chat.c
+--- ppp-2.4.5/chat/chat.c 2009-11-16 22:26:07.000000000 +0000
++++ ppp-2.4.5-new/chat/chat.c 2011-10-15 15:38:16.835758436 +0000
+@@ -1167,7 +1167,9 @@
+
+ if (timeout_next) {
+ timeout_next = 0;
++ s = clean(s, 0); /* Add by guowenxue */
+ timeout = atoi(s);
++ free(s); /* Add by guowenxue */
+
+ if (timeout <= 0)
+ timeout = DEFAULT_CHAT_TIMEOUT;
+diff -Nuar ppp-2.4.5/chat/Makefile.linux ppp-2.4.5-new/chat/Makefile.linux
+--- ppp-2.4.5/chat/Makefile.linux 2009-11-16 22:26:07.000000000 +0000
++++ ppp-2.4.5-new/chat/Makefile.linux 2011-10-15 15:39:25.753003031 +0000
+@@ -14,11 +14,12 @@
+ CFLAGS= $(COPTS) $(CDEFS)
+
+ INSTALL= install
++CC ?= /opt/buildroot-2011.02/arm926t/usr/bin/arm-linux-gcc
+
+ all: chat
+
+ chat: chat.o
+- $(CC) -o chat chat.o
++ $(CC) -static -o chat chat.o
+
+ chat.o: chat.c
+ $(CC) -c $(CFLAGS) -o chat.o chat.c
+diff -Nuar ppp-2.4.5/pppd/auth.c ppp-2.4.5-new/pppd/auth.c
+--- ppp-2.4.5/pppd/auth.c 2009-11-16 22:26:07.000000000 +0000
++++ ppp-2.4.5-new/pppd/auth.c 2011-10-15 15:38:16.835758436 +0000
+@@ -1323,7 +1323,8 @@
+ int hadchap;
+
+ hadchap = -1;
+- ao->neg_upap = !refuse_pap && (passwd[0] != 0 || get_pap_passwd(NULL));
++ /* Modify by guowenxue, don't set password support */
++ ao->neg_upap = !refuse_pap; // && (passwd[0] != 0 || get_pap_passwd(NULL));
+ ao->neg_chap = (!refuse_chap || !refuse_mschap || !refuse_mschap_v2)
+ && (passwd[0] != 0 ||
+ (hadchap = have_chap_secret(user, (explicit_remote? remote_name:
+diff -Nuar ppp-2.4.5/pppd/Makefile.linux ppp-2.4.5-new/pppd/Makefile.linux
+--- ppp-2.4.5/pppd/Makefile.linux 2009-11-16 22:26:07.000000000 +0000
++++ ppp-2.4.5-new/pppd/Makefile.linux 2011-10-15 15:38:16.836783792 +0000
+@@ -30,7 +30,7 @@
+ include .depend
+ endif
+
+-# CC = gcc
++CC ?= /opt/buildroot-2011.02/arm926t/usr/bin/arm-linux-gcc
+ #
+ COPTS = -O2 -pipe -Wall -g
+ LIBS =
+@@ -43,12 +43,12 @@
+ #MSLANMAN=y
+ # Uncomment the next line to include support for MPPE. CHAPMS (above) must
+ # also be enabled. Also, edit plugins/radius/Makefile.linux.
+-MPPE=y
++#MPPE=y
+
+ # Uncomment the next line to include support for PPP packet filtering.
+ # This requires that the libpcap library and headers be installed
+ # and that the kernel driver support PPP packet filtering.
+-FILTER=y
++#FILTER=y
+
+ # Uncomment the next line to enable multilink PPP (enabled by default)
+ # Linux distributions: Please leave multilink ENABLED in your builds
+@@ -65,7 +65,7 @@
+ #HAVE_INET6=y
+
+ # Enable plugins
+-PLUGIN=y
++#PLUGIN=y
+
+ # Enable Microsoft proprietary Callback Control Protocol
+ #CBCP=y
diff --git a/ok6410/src/thirdparty/scripts/envs.sh b/ok6410/src/thirdparty/scripts/envs.sh
new file mode 100644
index 0000000..b00febf
--- /dev/null
+++ b/ok6410/src/thirdparty/scripts/envs.sh
@@ -0,0 +1,11 @@
+#!/bin/sh
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to provide some common enviroment variable for other scripts
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+
+#ARCH=arm920t
+ARCH=arm1176jzfs
+CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
diff --git a/ok6410/src/thirdparty/scripts/funcs.sh b/ok6410/src/thirdparty/scripts/funcs.sh
new file mode 100644
index 0000000..5acbe65
--- /dev/null
+++ b/ok6410/src/thirdparty/scripts/funcs.sh
@@ -0,0 +1,116 @@
+#!/bin/sh
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to provide some common shell functions for other scripts
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+
+function set_crosstool()
+{
+ CROSS=$1
+ export CC=${CROSS}gcc
+ export LD=${CROSS}ld
+ export AS=${CROSS}as
+ export CXX=${CROSS}g++
+ export AR=${CROSS}ar
+ export NM=${CROSS}nm
+ export STRIP=${CROSS}strip
+ export OBJCOPY=${CROSS}objcopy
+ export OBJDUMP=${CROSS}objdump
+ export RANLIB=${CROSS}ranlib
+}
+
+function clear_crossenv()
+{
+ unset CC
+ unset LD
+ unset AS
+ unset AR
+ unset NM
+ unset CXX
+ unset STRIP
+ unset OBJCOPY
+ unset OBJDUMP
+
+ unset ARCH
+ unset CPU
+ unset CROSS
+ unset INST_PATH
+ unset C_INCLUDE_PATH
+ unset LDFLAGS
+ unset CFLAGS
+}
+
+sup_arch=("" "arm926t" "arm920t" "arm1176jzfs" "x86" )
+function select_arch()
+{
+ if [ -n "$ARCH" ] ; then
+ return 0
+ fi
+
+ echo "Current support ARCH: "
+ i=1
+
+ len=${#sup_arch[*]}
+
+ while [ $i -lt $len ]; do
+ echo "$i: ${sup_arch[$i]}"
+ let i++;
+ done
+
+ echo "Please select: "
+ index=
+ read index
+ ARCH=${sup_arch[$index]}
+}
+
+
+function decompress_packet()
+(
+ if [ $# != 2 ] ; then
+ echo "Usage: $1 [APP_NAME] [PACK_SUFIX]"
+ return 1;
+ fi
+ dir_name=$1
+ pack_sufix=$2
+ pack_name=$1.$2
+
+ echo "+---------------------------------------------+"
+ echo "| Remove and decompress $pack_name now"
+ echo "+---------------------------------------------+"
+
+ rm -rf $dir_name
+
+ case "$pack_sufix" in
+ "zip")
+ unzip $pack_name ;;
+ "tar")
+ tar -xf "$pack_name" ;;
+ "gz")
+ gzip -d "$pack_name" ;;
+ "tar.gz")
+ tar -xzf "$pack_name" ;;
+ "bz2")
+ bunzip2 "$pack_name" ;;
+ "tar.bz2")
+ tar -xjf "$pack_name" ;;
+ *)
+ echo "$pack_name is unknow compress format" ;;
+ esac
+)
+
+function download()
+{
+ dl_addr=$1
+ file_name=`echo ${dl_addr} | awk -F "/" '{print $NF}'`
+
+ if [ ! -f $file_name ] ; then
+ echo "+---------------------------------------------+"
+ echo "| Download $file_name now"
+ echo "+---------------------------------------------+"
+ wget ${dl_addr}
+ fi
+}
+
+
diff --git a/ok6410/src/thirdparty/sqlite/build.sh b/ok6410/src/thirdparty/sqlite/build.sh
new file mode 100755
index 0000000..481283f
--- /dev/null
+++ b/ok6410/src/thirdparty/sqlite/build.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download sqlite source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=sqlite
+DIR_NAME="sqlite-autoconf-3070900"
+DL_ADDR="http://www.sqlite.org/$DIR_NAME.$PACK_SUFIX"
+PACK_SUFIX="tar.gz"
+#DIR_NAME="sqlite-autoconf-3071601"
+#DL_ADDR="http://www.sqlite.org/2013/$DIR_NAME.$PACK_SUFIX"
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS}
+ make && make install
+
+ $STRIP $PREFIX_PATH/bin/*
+ file $PREFIX_PATH/bin/*
+
+ if [ -n "$INST_PATH" -a -d "$INST_PATH" ] ; then
+ cp $PREFIX_PATH $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/tree/build.sh b/ok6410/src/thirdparty/tree/build.sh
new file mode 100755
index 0000000..854c826
--- /dev/null
+++ b/ok6410/src/thirdparty/tree/build.sh
@@ -0,0 +1,83 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download tree source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=tree
+DIR_NAME="tree-1.5.3"
+PACK_SUFIX="tar.gz"
+#DL_ADDR="http://tree.sourcearchive.com/downloads/1.5.3-2/$DIR_NAME.$PACK_SUFIX"
+DL_ADDR="http://www-uxsup.csx.cam.ac.uk/pub/misc/sunfreeware/SOURCES/$DIR_NAME.$PACK_SUFIX"
+
+INST_PATH=`pwd`/../mnt/usr/bin/
+
+#LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ FILE=Makefile
+ line=`sed -n '/^CC=/=' $FILE`
+ sed -i -e ${line}s"|.*|CC=${CROSS}gcc |" $FILE
+
+ line=`sed -n '/^CFLAGS=-ggdb/=' $FILE`
+ sed -i -e ${line}s"|.*|CFLAGS=-Wall -DLINUX|" $FILE
+ sed -n "`expr $line + 1`p" $FILE | grep "XOBJS=strverscmp"
+ if [ 0 != $? ] ; then
+ sed -i -e ${line}a"XOBJS=strverscmp.o" $FILE
+ fi
+
+ make
+ cp tree $PREFIX_PATH
+
+ $STRIP $PREFIX_PATH/tree
+ file $PREFIX_PATH/*
+ if [ -d $INST_PATH ] ; then
+ cp $PREFIX_PATH/tree $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
diff --git a/ok6410/src/thirdparty/wget/build.sh b/ok6410/src/thirdparty/wget/build.sh
new file mode 100755
index 0000000..6e6cee9
--- /dev/null
+++ b/ok6410/src/thirdparty/wget/build.sh
@@ -0,0 +1,70 @@
+#!/bin/sh
+
+#+--------------------------------------------------------------------------------------------
+#|Description: This shell script used to download wget source code and cross compile it.
+#| Author: GuoWenxue <guowenxue@gmail.com>
+#| ChangeLog:
+#| 1, Initialize 1.0.0 on 2013.03.22
+#+--------------------------------------------------------------------------------------------
+. ../scripts/funcs.sh
+clear_crossenv
+. ../scripts/envs.sh
+
+if [ -z $ARCH ]; then
+ ARCH=
+fi
+
+APP_NAME=wget
+DIR_NAME="wget-1.13.4"
+PACK_SUFIX="tar.bz2"
+DL_ADDR="ftp://ftp.gnu.org/gnu/wget/$DIR_NAME.$PACK_SUFIX"
+
+LINK_STATIC=YES
+
+select_arch
+if [ -z $CROSS -a "x86" != "$ARCH" ] ; then
+ CROSS="/opt/buildroot-2012.08/${ARCH}/usr/bin/arm-linux-"
+fi
+set_crosstool $CROSS
+
+if [ "x86" != "$ARCH" ] ; then
+ CONFIG_CROSS=--host=arm-linux
+fi
+PREFIX_PATH=/apps/${ARCH}/${APP_NAME}
+
+
+# Download and decompress source code packet
+download $DL_ADDR
+decompress_packet $DIR_NAME $PACK_SUFIX
+
+if [ "$LINK_STATIC" == "YES" ] ; then
+ export CFLAGS=--static
+ export LDFLAGS=-static
+ CONFIG_LD_STATUS='--enable-static --disable-shared'
+fi
+
+echo "+------------------------------------------------------------------+"
+echo "| Platform: $DIR_NAME for $ARCH "
+echo "| Compiler: ${CROSS}gcc "
+echo "+------------------------------------------------------------------+"
+mkdir -p $PREFIX_PATH
+
+cd $DIR_NAME
+ set -x
+ ./configure --prefix=$PREFIX_PATH ${CONFIG_CROSS} ${CONFIG_LD_STATUS} --without-ssl
+ make && make install
+
+ $STRIP $PREFIX_PATH/bin/*
+ file $PREFIX_PATH/bin/*
+
+ if [ -d $INST_PATH ] ; then
+ cp $PREFIX_PATH/bin/$APP_NAME $INST_PATH
+ fi
+ set +x
+
+ echo "+------------------------------------------------------------------+"
+ echo "| Install Prefix: $PREFIX_PATH"
+ echo "| Install Path: $INST_PATH"
+ echo "+------------------------------------------------------------------+"
+cd -
+
--
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